mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-29 07:33:39 +00:00
rtl8188eu: Remove CONFIG_ODM_REFRESH_RAMASK and CONFIG_PHY_SETTING_WITH_ODM
Both are always defined. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
37c29a6af7
commit
e294a4c385
7 changed files with 3 additions and 305 deletions
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@ -213,7 +213,6 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
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macid = arg&0x1f;
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macid = arg&0x1f;
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#ifdef CONFIG_ODM_REFRESH_RAMASK
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raid = (bitmap>>28) & 0x0f;
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raid = (bitmap>>28) & 0x0f;
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bitmap &=0x0fffffff;
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bitmap &=0x0fffffff;
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@ -221,7 +220,6 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
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bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level);
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bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level);
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bitmap |= ((raid<<28)&0xf0000000);
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bitmap |= ((raid<<28)&0xf0000000);
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#endif /* CONFIG_ODM_REFRESH_RAMASK */
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init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
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init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
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@ -193,9 +193,7 @@ static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
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int i;
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int i;
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pdmpriv->InitODMFlag = ODM_BB_DIG |
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pdmpriv->InitODMFlag = ODM_BB_DIG |
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#ifdef CONFIG_ODM_REFRESH_RAMASK
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ODM_BB_RA_MASK |
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ODM_BB_RA_MASK |
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#endif
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ODM_BB_DYNAMIC_TXPWR |
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ODM_BB_DYNAMIC_TXPWR |
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ODM_BB_FA_CNT |
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ODM_BB_FA_CNT |
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ODM_BB_RSSI_MONITOR |
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ODM_BB_RSSI_MONITOR |
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@ -603,43 +603,6 @@ phy_ConfigMACWithParaFile(
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return rtStatus;
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return rtStatus;
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}
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}
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/*-----------------------------------------------------------------------------
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* Function: phy_ConfigMACWithHeaderFile()
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*
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* Overview: This function read BB parameters from Header file we gen, and do register
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* Read/Write
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*
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* Input: PADAPTER Adapter
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* ps1Byte pFileName
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*
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* Output: NONE
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*
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* Return: RT_STATUS_SUCCESS: configuration file exist
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*
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* Note: The format of MACPHY_REG.txt is different from PHY and RF.
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* [Register][Mask][Value]
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*---------------------------------------------------------------------------*/
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#ifndef CONFIG_PHY_SETTING_WITH_ODM
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static int
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phy_ConfigMACWithHeaderFile(
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PADAPTER Adapter
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)
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{
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u32 i = 0;
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u32 ArrayLength = 0;
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u32* ptrArray;
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/* 2008.11.06 Modified by tynli. */
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ArrayLength = Rtl8188E_MAC_ArrayLength;
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ptrArray = (u32*)Rtl8188E_MAC_Array;
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for (i = 0 ;i < ArrayLength;i=i+2){ /* Add by tynli for 2 column */
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rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]);
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}
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return _SUCCESS;
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}
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#endif /* ifndef CONFIG_PHY_SETTING_WITH_ODM */
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/*-----------------------------------------------------------------------------
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/*-----------------------------------------------------------------------------
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* Function: PHY_MACConfig8192C
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* Function: PHY_MACConfig8192C
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*
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*
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@ -672,12 +635,8 @@ s32 PHY_MACConfig8188E(PADAPTER Adapter)
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/* Config MAC */
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/* Config MAC */
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/* */
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/* */
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_PHY_SETTING_WITH_ODM
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if (HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv))
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if (HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv))
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rtStatus = _FAIL;
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rtStatus = _FAIL;
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#else
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rtStatus = phy_ConfigMACWithHeaderFile(Adapter);
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#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
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#else
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#else
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/* Not make sure EEPROM, add later */
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/* Not make sure EEPROM, add later */
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@ -854,86 +813,6 @@ static void phy_ConfigBBExternalPA(PADAPTER Adapter)
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/* same code as SU. It is already updated in PHY_REG_1T_HP.txt. */
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/* same code as SU. It is already updated in PHY_REG_1T_HP.txt. */
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}
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}
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/*-----------------------------------------------------------------------------
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* Function: phy_ConfigBBWithHeaderFile()
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*
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* Overview: This function read BB parameters from general file format, and do register
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* Read/Write
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*
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* Input: PADAPTER Adapter
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* u1Byte ConfigType 0 => PHY_CONFIG
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* 1 =>AGC_TAB
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*
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* Output: NONE
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*
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* Return: RT_STATUS_SUCCESS: configuration file exist
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*
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*---------------------------------------------------------------------------*/
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#ifndef CONFIG_PHY_SETTING_WITH_ODM
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static int
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phy_ConfigBBWithHeaderFile(
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PADAPTER Adapter,
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u8 ConfigType
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)
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{
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int i;
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u32* Rtl819XPHY_REGArray_Table;
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u32* Rtl819XAGCTAB_Array_Table;
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u16 PHY_REGArrayLen, AGCTAB_ArrayLen;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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DM_ODM_T *podmpriv = &pHalData->odmpriv;
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int ret = _SUCCESS;
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AGCTAB_ArrayLen = Rtl8188E_AGCTAB_1TArrayLength;
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Rtl819XAGCTAB_Array_Table = (u32*)Rtl8188E_AGCTAB_1TArray;
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PHY_REGArrayLen = Rtl8188E_PHY_REG_1TArrayLength;
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Rtl819XPHY_REGArray_Table = (u32*)Rtl8188E_PHY_REG_1TArray;
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if (ConfigType == CONFIG_BB_PHY_REG)
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{
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for (i=0;i<PHY_REGArrayLen;i=i+2)
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{
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if (Rtl819XPHY_REGArray_Table[i] == 0xfe){
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rtw_msleep_os(50);
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}
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else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
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rtw_mdelay_os(5);
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else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
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rtw_mdelay_os(1);
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else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
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rtw_udelay_os(50);
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else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
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rtw_udelay_os(5);
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else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
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rtw_udelay_os(1);
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else if (Rtl819XPHY_REGArray_Table[i] == 0xa24)
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podmpriv->RFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1];
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PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
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/* Add 1us delay between BB/RF register setting. */
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rtw_udelay_os(1);
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}
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/* for External PA */
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phy_ConfigBBExternalPA(Adapter);
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}
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else if (ConfigType == CONFIG_BB_AGC_TAB)
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{
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for (i=0;i<AGCTAB_ArrayLen;i=i+2)
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{
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PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
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/* Add 1us delay between BB/RF register setting. */
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rtw_udelay_os(1);
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}
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}
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exit:
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return ret;
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}
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#endif /* ifndef CONFIG_PHY_SETTING_WITH_ODM */
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void
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void
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storePwrIndexDiffRateOffset(
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storePwrIndexDiffRateOffset(
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PADAPTER Adapter,
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PADAPTER Adapter,
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@ -1013,54 +892,6 @@ phy_ConfigBBWithPgParaFile(
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} /* phy_ConfigBBWithPgParaFile */
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} /* phy_ConfigBBWithPgParaFile */
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#ifndef CONFIG_PHY_SETTING_WITH_ODM
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/*-----------------------------------------------------------------------------
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* Function: phy_ConfigBBWithPgHeaderFile
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*
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* Overview: Config PHY_REG_PG array
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*
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* Input: NONE
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*
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* Output: NONE
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*
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* Return: NONE
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*
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* Revised History:
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* When Who Remark
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* 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!!
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* 11/10/2008 tynli Modify to mew files.
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*---------------------------------------------------------------------------*/
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static int
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phy_ConfigBBWithPgHeaderFile(
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PADAPTER Adapter,
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u8 ConfigType)
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{
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int i;
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u32* Rtl819XPHY_REGArray_Table_PG;
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u16 PHY_REGArrayPGLen;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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PHY_REGArrayPGLen = Rtl8188E_PHY_REG_Array_PGLength;
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Rtl819XPHY_REGArray_Table_PG = (u32*)Rtl8188E_PHY_REG_Array_PG;
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if (ConfigType == CONFIG_BB_PHY_REG)
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{
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for (i=0;i<PHY_REGArrayPGLen;i=i+3)
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{
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storePwrIndexDiffRateOffset(Adapter, Rtl819XPHY_REGArray_Table_PG[i],
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Rtl819XPHY_REGArray_Table_PG[i+1],
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Rtl819XPHY_REGArray_Table_PG[i+2]);
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}
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}
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return _SUCCESS;
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} /* phy_ConfigBBWithPgHeaderFile */
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#endif /* CONFIG_PHY_SETTING_WITH_ODM */
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static void
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static void
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phy_BB8192C_Config_1T(
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phy_BB8192C_Config_1T(
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PADAPTER Adapter
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PADAPTER Adapter
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@ -1126,12 +957,8 @@ phy_BB8188E_Config_ParaFile(
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/* We will seperate as 88C / 92C according to chip version */
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/* We will seperate as 88C / 92C according to chip version */
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/* */
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/* */
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_PHY_SETTING_WITH_ODM
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if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG))
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if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG))
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rtStatus = _FAIL;
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rtStatus = _FAIL;
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#else
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rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_PHY_REG);
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#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
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#else
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#else
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/* No matter what kind of CHIP we always read PHY_REG.txt. We must copy different */
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/* No matter what kind of CHIP we always read PHY_REG.txt. We must copy different */
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/* type of parameter files to phy_reg.txt at first. */
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/* type of parameter files to phy_reg.txt at first. */
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@ -1149,12 +976,8 @@ phy_BB8188E_Config_ParaFile(
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pHalData->pwrGroupCnt = 0;
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pHalData->pwrGroupCnt = 0;
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_PHY_SETTING_WITH_ODM
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if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG))
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if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG))
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rtStatus = _FAIL;
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rtStatus = _FAIL;
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#else
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rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, CONFIG_BB_PHY_REG_PG);
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#endif
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#else
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#else
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rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile);
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rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile);
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#endif
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#endif
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@ -1167,12 +990,8 @@ phy_BB8188E_Config_ParaFile(
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/* 3. BB AGC table Initialization */
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/* 3. BB AGC table Initialization */
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/* */
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/* */
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_EMBEDDED_FWIMG
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#ifdef CONFIG_PHY_SETTING_WITH_ODM
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if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB))
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if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB))
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rtStatus = _FAIL;
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rtStatus = _FAIL;
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#else
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rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_AGC_TAB);
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#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
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#else
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#else
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/* RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); */
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/* RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); */
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rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile);
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rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile);
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@ -1276,107 +1095,6 @@ static int PHY_ConfigRFExternalPA(PADAPTER Adapter, RF_RADIO_PATH_E eRFPath)
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/* same code as SU. It is already updated in radio_a_1T_HP.txt. */
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/* same code as SU. It is already updated in radio_a_1T_HP.txt. */
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return rtStatus;
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return rtStatus;
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}
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}
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/* */
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/*-----------------------------------------------------------------------------
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* Function: PHY_ConfigRFWithHeaderFile()
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*
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* Overview: This function read RF parameters from general file format, and do RF 3-wire
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*
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* Input: PADAPTER Adapter
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* ps1Byte pFileName
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* RF_RADIO_PATH_E eRFPath
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*
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* Output: NONE
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*
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* Return: RT_STATUS_SUCCESS: configuration file exist
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*
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* Note: Delay may be required for RF configuration
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*---------------------------------------------------------------------------*/
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#ifndef CONFIG_PHY_SETTING_WITH_ODM
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int
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rtl8188e_PHY_ConfigRFWithHeaderFile(
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PADAPTER Adapter,
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RF_RADIO_PATH_E eRFPath
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)
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{
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int i;
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int rtStatus = _SUCCESS;
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u32* Rtl819XRadioA_Array_Table;
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u32* Rtl819XRadioB_Array_Table;
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u16 RadioA_ArrayLen,RadioB_ArrayLen;
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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RadioA_ArrayLen = Rtl8188E_RadioA_1TArrayLength;
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Rtl819XRadioA_Array_Table = (u32*)Rtl8188E_RadioA_1TArray;
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RadioB_ArrayLen = Rtl8188E_RadioB_1TArrayLength;
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Rtl819XRadioB_Array_Table = (u32*)Rtl8188E_RadioB_1TArray;
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switch (eRFPath)
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{
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case RF_PATH_A:
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for (i = 0;i<RadioA_ArrayLen; i=i+2)
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{
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if (Rtl819XRadioA_Array_Table[i] == 0xfe) {
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rtw_msleep_os(50);
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}
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else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
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rtw_mdelay_os(5);
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else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
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rtw_mdelay_os(1);
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else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
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rtw_udelay_os(50);
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||||||
else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
|
|
||||||
rtw_udelay_os(5);
|
|
||||||
else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
|
|
||||||
rtw_udelay_os(1);
|
|
||||||
else
|
|
||||||
{
|
|
||||||
PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]);
|
|
||||||
/* Add 1us delay between BB/RF register setting. */
|
|
||||||
rtw_udelay_os(1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
/* Add for High Power PA */
|
|
||||||
PHY_ConfigRFExternalPA(Adapter, eRFPath);
|
|
||||||
break;
|
|
||||||
case RF_PATH_B:
|
|
||||||
for (i = 0;i<RadioB_ArrayLen; i=i+2)
|
|
||||||
{
|
|
||||||
if (Rtl819XRadioB_Array_Table[i] == 0xfe)
|
|
||||||
{ /* Delay specific ms. Only RF configuration require delay. */
|
|
||||||
rtw_msleep_os(50);
|
|
||||||
}
|
|
||||||
else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
|
|
||||||
rtw_mdelay_os(5);
|
|
||||||
else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
|
|
||||||
rtw_mdelay_os(1);
|
|
||||||
else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
|
|
||||||
rtw_udelay_os(50);
|
|
||||||
else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
|
|
||||||
rtw_udelay_os(5);
|
|
||||||
else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
|
|
||||||
rtw_udelay_os(1);
|
|
||||||
else
|
|
||||||
{
|
|
||||||
PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]);
|
|
||||||
/* Add 1us delay between BB/RF register setting. */
|
|
||||||
rtw_udelay_os(1);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case RF_PATH_C:
|
|
||||||
break;
|
|
||||||
case RF_PATH_D:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
exit:
|
|
||||||
return rtStatus;
|
|
||||||
|
|
||||||
}
|
|
||||||
#endif/* ifndef CONFIG_PHY_SETTING_WITH_ODM */
|
|
||||||
|
|
||||||
void
|
void
|
||||||
rtl8192c_PHY_GetHWRegOriginalValue(
|
rtl8192c_PHY_GetHWRegOriginalValue(
|
||||||
|
|
|
@ -623,24 +623,16 @@ phy_RF6052_Config_ParaFile(
|
||||||
switch (eRFPath) {
|
switch (eRFPath) {
|
||||||
case RF_PATH_A:
|
case RF_PATH_A:
|
||||||
#ifdef CONFIG_EMBEDDED_FWIMG
|
#ifdef CONFIG_EMBEDDED_FWIMG
|
||||||
#ifdef CONFIG_PHY_SETTING_WITH_ODM
|
|
||||||
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
||||||
rtStatus= _FAIL;
|
rtStatus= _FAIL;
|
||||||
#else
|
|
||||||
rtStatus= rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
|
|
||||||
#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
|
|
||||||
#else
|
#else
|
||||||
rtStatus = rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath);
|
rtStatus = rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath);
|
||||||
#endif/* ifdef CONFIG_EMBEDDED_FWIMG */
|
#endif/* ifdef CONFIG_EMBEDDED_FWIMG */
|
||||||
break;
|
break;
|
||||||
case RF_PATH_B:
|
case RF_PATH_B:
|
||||||
#ifdef CONFIG_EMBEDDED_FWIMG
|
#ifdef CONFIG_EMBEDDED_FWIMG
|
||||||
#ifdef CONFIG_PHY_SETTING_WITH_ODM
|
|
||||||
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
|
||||||
rtStatus= _FAIL;
|
rtStatus= _FAIL;
|
||||||
#else
|
|
||||||
rtStatus = rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
|
|
||||||
#endif /* ifdef CONFIG_PHY_SETTING_WITH_ODM */
|
|
||||||
#else
|
#else
|
||||||
rtStatus =rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath);
|
rtStatus =rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath);
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -3477,13 +3477,9 @@ static void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level
|
||||||
}
|
}
|
||||||
|
|
||||||
rate_bitmap = 0x0fffffff;
|
rate_bitmap = 0x0fffffff;
|
||||||
#ifdef CONFIG_ODM_REFRESH_RAMASK
|
rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level);
|
||||||
{
|
DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
|
||||||
rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level);
|
__func__,mac_id,networkType,mask,rssi_level,rate_bitmap);
|
||||||
DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
|
|
||||||
__func__,mac_id,networkType,mask,rssi_level,rate_bitmap);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
mask &= rate_bitmap;
|
mask &= rate_bitmap;
|
||||||
|
|
||||||
|
|
|
@ -315,7 +315,6 @@ SetAntennaConfig92C(
|
||||||
u8 DefaultAnt
|
u8 DefaultAnt
|
||||||
);
|
);
|
||||||
|
|
||||||
#ifdef CONFIG_PHY_SETTING_WITH_ODM
|
|
||||||
void
|
void
|
||||||
storePwrIndexDiffRateOffset(
|
storePwrIndexDiffRateOffset(
|
||||||
PADAPTER Adapter,
|
PADAPTER Adapter,
|
||||||
|
@ -323,7 +322,6 @@ storePwrIndexDiffRateOffset(
|
||||||
u32 BitMask,
|
u32 BitMask,
|
||||||
u32 Data
|
u32 Data
|
||||||
);
|
);
|
||||||
#endif //CONFIG_PHY_SETTING_WITH_ODM
|
|
||||||
/*--------------------------Exported Function prototype---------------------*/
|
/*--------------------------Exported Function prototype---------------------*/
|
||||||
|
|
||||||
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8188e_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
|
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8188e_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))
|
||||||
|
|
|
@ -19,8 +19,6 @@
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
//***** temporarily flag *******
|
//***** temporarily flag *******
|
||||||
|
|
||||||
#define CONFIG_ODM_REFRESH_RAMASK
|
|
||||||
#define CONFIG_PHY_SETTING_WITH_ODM
|
|
||||||
//for FPGA VERIFICATION config
|
//for FPGA VERIFICATION config
|
||||||
#define RTL8188E_FPGA_true_PHY_VERIFICATION 0
|
#define RTL8188E_FPGA_true_PHY_VERIFICATION 0
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue