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rtl8188eu: Remove CONFIG_ODM_REFRESH_RAMASK and CONFIG_PHY_SETTING_WITH_ODM

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Both are always defined.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-07-18 23:26:46 -05:00
parent 37c29a6af7
commit e294a4c385
7 changed files with 3 additions and 305 deletions
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2
hal/rtl8188e_cmd.c
View file

@ -213,7 +213,6 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
macid = arg&0x1f;
#ifdef CONFIG_ODM_REFRESH_RAMASK
raid = (bitmap>>28) & 0x0f;
bitmap &=0x0fffffff;
@ -221,7 +220,6 @@ void rtl8188e_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv, macid, bitmap, rssi_level);
bitmap |= ((raid<<28)&0xf0000000);
#endif /* CONFIG_ODM_REFRESH_RAMASK */
init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;

2
hal/rtl8188e_dm.c
View file

@ -193,9 +193,7 @@ static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
int i;
pdmpriv->InitODMFlag = ODM_BB_DIG |
#ifdef CONFIG_ODM_REFRESH_RAMASK
ODM_BB_RA_MASK |
#endif
ODM_BB_DYNAMIC_TXPWR |
ODM_BB_FA_CNT |
ODM_BB_RSSI_MONITOR |

282
hal/rtl8188e_phycfg.c
View file

@ -603,43 +603,6 @@ phy_ConfigMACWithParaFile(
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: phy_ConfigMACWithHeaderFile()
*
* Overview: This function read BB parameters from Header file we gen, and do register
* Read/Write
*
* Input: PADAPTER Adapter
* ps1Byte pFileName
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
*
* Note: The format of MACPHY_REG.txt is different from PHY and RF.
* [Register][Mask][Value]
*---------------------------------------------------------------------------*/
#ifndef CONFIG_PHY_SETTING_WITH_ODM
static int
phy_ConfigMACWithHeaderFile(
PADAPTER Adapter
)
{
u32 i = 0;
u32 ArrayLength = 0;
u32* ptrArray;
/* 2008.11.06 Modified by tynli. */
ArrayLength = Rtl8188E_MAC_ArrayLength;
ptrArray = (u32*)Rtl8188E_MAC_Array;
for (i = 0 ;i < ArrayLength;i=i+2){ /* Add by tynli for 2 column */
rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]);
}
return _SUCCESS;
}
#endif /* ifndef CONFIG_PHY_SETTING_WITH_ODM */
/*-----------------------------------------------------------------------------
* Function: PHY_MACConfig8192C
*
@ -672,12 +635,8 @@ s32 PHY_MACConfig8188E(PADAPTER Adapter)
/* Config MAC */
/* */
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if (HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv))
rtStatus = _FAIL;
#else
rtStatus = phy_ConfigMACWithHeaderFile(Adapter);
#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
#else
/* Not make sure EEPROM, add later */
@ -854,86 +813,6 @@ static void phy_ConfigBBExternalPA(PADAPTER Adapter)
/* same code as SU. It is already updated in PHY_REG_1T_HP.txt. */
}
/*-----------------------------------------------------------------------------
* Function: phy_ConfigBBWithHeaderFile()
*
* Overview: This function read BB parameters from general file format, and do register
* Read/Write
*
* Input: PADAPTER Adapter
* u1Byte ConfigType 0 => PHY_CONFIG
* 1 =>AGC_TAB
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
*
*---------------------------------------------------------------------------*/
#ifndef CONFIG_PHY_SETTING_WITH_ODM
static int
phy_ConfigBBWithHeaderFile(
PADAPTER Adapter,
u8 ConfigType
)
{
int i;
u32* Rtl819XPHY_REGArray_Table;
u32* Rtl819XAGCTAB_Array_Table;
u16 PHY_REGArrayLen, AGCTAB_ArrayLen;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
DM_ODM_T *podmpriv = &pHalData->odmpriv;
int ret = _SUCCESS;
AGCTAB_ArrayLen = Rtl8188E_AGCTAB_1TArrayLength;
Rtl819XAGCTAB_Array_Table = (u32*)Rtl8188E_AGCTAB_1TArray;
PHY_REGArrayLen = Rtl8188E_PHY_REG_1TArrayLength;
Rtl819XPHY_REGArray_Table = (u32*)Rtl8188E_PHY_REG_1TArray;
if (ConfigType == CONFIG_BB_PHY_REG)
{
for (i=0;i<PHY_REGArrayLen;i=i+2)
{
if (Rtl819XPHY_REGArray_Table[i] == 0xfe){
rtw_msleep_os(50);
}
else if (Rtl819XPHY_REGArray_Table[i] == 0xfd)
rtw_mdelay_os(5);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfc)
rtw_mdelay_os(1);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfb)
rtw_udelay_os(50);
else if (Rtl819XPHY_REGArray_Table[i] == 0xfa)
rtw_udelay_os(5);
else if (Rtl819XPHY_REGArray_Table[i] == 0xf9)
rtw_udelay_os(1);
else if (Rtl819XPHY_REGArray_Table[i] == 0xa24)
podmpriv->RFCalibrateInfo.RegA24 = Rtl819XPHY_REGArray_Table[i+1];
PHY_SetBBReg(Adapter, Rtl819XPHY_REGArray_Table[i], bMaskDWord, Rtl819XPHY_REGArray_Table[i+1]);
/* Add 1us delay between BB/RF register setting. */
rtw_udelay_os(1);
}
/* for External PA */
phy_ConfigBBExternalPA(Adapter);
}
else if (ConfigType == CONFIG_BB_AGC_TAB)
{
for (i=0;i<AGCTAB_ArrayLen;i=i+2)
{
PHY_SetBBReg(Adapter, Rtl819XAGCTAB_Array_Table[i], bMaskDWord, Rtl819XAGCTAB_Array_Table[i+1]);
/* Add 1us delay between BB/RF register setting. */
rtw_udelay_os(1);
}
}
exit:
return ret;
}
#endif /* ifndef CONFIG_PHY_SETTING_WITH_ODM */
void
storePwrIndexDiffRateOffset(
PADAPTER Adapter,
@ -1013,54 +892,6 @@ phy_ConfigBBWithPgParaFile(
} /* phy_ConfigBBWithPgParaFile */
#ifndef CONFIG_PHY_SETTING_WITH_ODM
/*-----------------------------------------------------------------------------
* Function: phy_ConfigBBWithPgHeaderFile
*
* Overview: Config PHY_REG_PG array
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!!
* 11/10/2008 tynli Modify to mew files.
*---------------------------------------------------------------------------*/
static int
phy_ConfigBBWithPgHeaderFile(
PADAPTER Adapter,
u8 ConfigType)
{
int i;
u32* Rtl819XPHY_REGArray_Table_PG;
u16 PHY_REGArrayPGLen;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
PHY_REGArrayPGLen = Rtl8188E_PHY_REG_Array_PGLength;
Rtl819XPHY_REGArray_Table_PG = (u32*)Rtl8188E_PHY_REG_Array_PG;
if (ConfigType == CONFIG_BB_PHY_REG)
{
for (i=0;i<PHY_REGArrayPGLen;i=i+3)
{
storePwrIndexDiffRateOffset(Adapter, Rtl819XPHY_REGArray_Table_PG[i],
Rtl819XPHY_REGArray_Table_PG[i+1],
Rtl819XPHY_REGArray_Table_PG[i+2]);
}
}
return _SUCCESS;
} /* phy_ConfigBBWithPgHeaderFile */
#endif /* CONFIG_PHY_SETTING_WITH_ODM */
static void
phy_BB8192C_Config_1T(
PADAPTER Adapter
@ -1126,12 +957,8 @@ phy_BB8188E_Config_ParaFile(
/* We will seperate as 88C / 92C according to chip version */
/* */
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG))
rtStatus = _FAIL;
#else
rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_PHY_REG);
#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
#else
/* No matter what kind of CHIP we always read PHY_REG.txt. We must copy different */
/* type of parameter files to phy_reg.txt at first. */
@ -1149,12 +976,8 @@ phy_BB8188E_Config_ParaFile(
pHalData->pwrGroupCnt = 0;
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG))
rtStatus = _FAIL;
#else
rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, CONFIG_BB_PHY_REG_PG);
#endif
#else
rtStatus = phy_ConfigBBWithPgParaFile(Adapter, pszBBRegPgFile);
#endif
@ -1167,12 +990,8 @@ phy_BB8188E_Config_ParaFile(
/* 3. BB AGC table Initialization */
/* */
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if (HAL_STATUS_FAILURE ==ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB))
rtStatus = _FAIL;
#else
rtStatus = phy_ConfigBBWithHeaderFile(Adapter, CONFIG_BB_AGC_TAB);
#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
#else
/* RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); */
rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile);
@ -1276,107 +1095,6 @@ static int PHY_ConfigRFExternalPA(PADAPTER Adapter, RF_RADIO_PATH_E eRFPath)
/* same code as SU. It is already updated in radio_a_1T_HP.txt. */
return rtStatus;
}
/* */
/*-----------------------------------------------------------------------------
* Function: PHY_ConfigRFWithHeaderFile()
*
* Overview: This function read RF parameters from general file format, and do RF 3-wire
*
* Input: PADAPTER Adapter
* ps1Byte pFileName
* RF_RADIO_PATH_E eRFPath
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
*
* Note: Delay may be required for RF configuration
*---------------------------------------------------------------------------*/
#ifndef CONFIG_PHY_SETTING_WITH_ODM
int
rtl8188e_PHY_ConfigRFWithHeaderFile(
PADAPTER Adapter,
RF_RADIO_PATH_E eRFPath
)
{
int i;
int rtStatus = _SUCCESS;
u32* Rtl819XRadioA_Array_Table;
u32* Rtl819XRadioB_Array_Table;
u16 RadioA_ArrayLen,RadioB_ArrayLen;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
RadioA_ArrayLen = Rtl8188E_RadioA_1TArrayLength;
Rtl819XRadioA_Array_Table = (u32*)Rtl8188E_RadioA_1TArray;
RadioB_ArrayLen = Rtl8188E_RadioB_1TArrayLength;
Rtl819XRadioB_Array_Table = (u32*)Rtl8188E_RadioB_1TArray;
switch (eRFPath)
{
case RF_PATH_A:
for (i = 0;i<RadioA_ArrayLen; i=i+2)
{
if (Rtl819XRadioA_Array_Table[i] == 0xfe) {
rtw_msleep_os(50);
}
else if (Rtl819XRadioA_Array_Table[i] == 0xfd)
rtw_mdelay_os(5);
else if (Rtl819XRadioA_Array_Table[i] == 0xfc)
rtw_mdelay_os(1);
else if (Rtl819XRadioA_Array_Table[i] == 0xfb)
rtw_udelay_os(50);
else if (Rtl819XRadioA_Array_Table[i] == 0xfa)
rtw_udelay_os(5);
else if (Rtl819XRadioA_Array_Table[i] == 0xf9)
rtw_udelay_os(1);
else
{
PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]);
/* Add 1us delay between BB/RF register setting. */
rtw_udelay_os(1);
}
}
/* Add for High Power PA */
PHY_ConfigRFExternalPA(Adapter, eRFPath);
break;
case RF_PATH_B:
for (i = 0;i<RadioB_ArrayLen; i=i+2)
{
if (Rtl819XRadioB_Array_Table[i] == 0xfe)
{ /* Delay specific ms. Only RF configuration require delay. */
rtw_msleep_os(50);
}
else if (Rtl819XRadioB_Array_Table[i] == 0xfd)
rtw_mdelay_os(5);
else if (Rtl819XRadioB_Array_Table[i] == 0xfc)
rtw_mdelay_os(1);
else if (Rtl819XRadioB_Array_Table[i] == 0xfb)
rtw_udelay_os(50);
else if (Rtl819XRadioB_Array_Table[i] == 0xfa)
rtw_udelay_os(5);
else if (Rtl819XRadioB_Array_Table[i] == 0xf9)
rtw_udelay_os(1);
else
{
PHY_SetRFReg(Adapter, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]);
/* Add 1us delay between BB/RF register setting. */
rtw_udelay_os(1);
}
}
break;
case RF_PATH_C:
break;
case RF_PATH_D:
break;
}
exit:
return rtStatus;
}
#endif/* ifndef CONFIG_PHY_SETTING_WITH_ODM */
void
rtl8192c_PHY_GetHWRegOriginalValue(

8
hal/rtl8188e_rf6052.c
View file

@ -623,24 +623,16 @@ phy_RF6052_Config_ParaFile(
switch (eRFPath) {
case RF_PATH_A:
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
rtStatus= _FAIL;
#else
rtStatus= rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
#endif/* ifdef CONFIG_PHY_SETTING_WITH_ODM */
#else
rtStatus = rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF_RADIO_PATH_E)eRFPath);
#endif/* ifdef CONFIG_EMBEDDED_FWIMG */
break;
case RF_PATH_B:
#ifdef CONFIG_EMBEDDED_FWIMG
#ifdef CONFIG_PHY_SETTING_WITH_ODM
if (HAL_STATUS_FAILURE ==ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,(ODM_RF_RADIO_PATH_E)eRFPath, (ODM_RF_RADIO_PATH_E)eRFPath))
rtStatus= _FAIL;
#else
rtStatus = rtl8188e_PHY_ConfigRFWithHeaderFile(Adapter,(RF_RADIO_PATH_E)eRFPath);
#endif /* ifdef CONFIG_PHY_SETTING_WITH_ODM */
#else
rtStatus =rtl8188e_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF_RADIO_PATH_E)eRFPath);
#endif

4
hal/usb_halinit.c
View file

@ -3477,13 +3477,9 @@ static void UpdateHalRAMask8188EUsb(PADAPTER padapter, u32 mac_id, u8 rssi_level
}
rate_bitmap = 0x0fffffff;
#ifdef CONFIG_ODM_REFRESH_RAMASK
{
rate_bitmap = ODM_Get_Rate_Bitmap(&pHalData->odmpriv,mac_id,mask,rssi_level);
DBG_88E("%s => mac_id:%d, networkType:0x%02x, mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n",
__func__,mac_id,networkType,mask,rssi_level,rate_bitmap);
}
#endif
mask &= rate_bitmap;

2
include/Hal8188EPhyCfg.h
View file

@ -315,7 +315,6 @@ SetAntennaConfig92C(
u8 DefaultAnt
);
#ifdef CONFIG_PHY_SETTING_WITH_ODM
void
storePwrIndexDiffRateOffset(
PADAPTER Adapter,
@ -323,7 +322,6 @@ storePwrIndexDiffRateOffset(
u32 BitMask,
u32 Data
);
#endif //CONFIG_PHY_SETTING_WITH_ODM
/*--------------------------Exported Function prototype---------------------*/
#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8188e_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask))

2
include/autoconf.h
View file

@ -19,8 +19,6 @@
******************************************************************************/
//***** temporarily flag *******
#define CONFIG_ODM_REFRESH_RAMASK
#define CONFIG_PHY_SETTING_WITH_ODM
//for FPGA VERIFICATION config
#define RTL8188E_FPGA_true_PHY_VERIFICATION 0