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rtl8188eu: Convert typedef statements in include/rtw_rf.h

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-07-26 16:27:19 -05:00
parent 5cfecb6edc
commit ec5245f648
9 changed files with 36 additions and 51 deletions
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2
core/rtw_wlan_util.c
View file

@ -433,7 +433,7 @@ void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_
rtw_set_oper_bw(padapter, bwmode); rtw_set_oper_bw(padapter, bwmode);
rtw_set_oper_choffset(padapter, channel_offset); rtw_set_oper_choffset(padapter, channel_offset);
rtw_hal_set_bwmode(padapter, (HT_CHANNEL_WIDTH)bwmode, channel_offset); rtw_hal_set_bwmode(padapter, (enum ht_channel_width)bwmode, channel_offset);
} }
void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode)

2
hal/hal_intf.c
View file

@ -326,7 +326,7 @@ s32 rtw_hal_interrupt_handler(_adapter *padapter)
return _FAIL; return _FAIL;
} }
void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset) void rtw_hal_set_bwmode(_adapter *padapter, enum ht_channel_width Bandwidth, u8 Offset)
{ {
if (padapter->HalFunc.set_bwmode_handler) if (padapter->HalFunc.set_bwmode_handler)
padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset); padapter->HalFunc.set_bwmode_handler(padapter, Bandwidth, Offset);

6
hal/rtl8188e_phycfg.c
View file

@ -1503,7 +1503,7 @@ _PHY_SetBWMode92C(
* Overview: This function is export to "HalCommon" moudule * Overview: This function is export to "HalCommon" moudule
* *
* Input: PADAPTER Adapter * Input: PADAPTER Adapter
* HT_CHANNEL_WIDTH Bandwidth 20M or 40M * enum ht_channel_width Bandwidth 20M or 40M
* *
* Output: NONE * Output: NONE
* *
@ -1514,12 +1514,12 @@ _PHY_SetBWMode92C(
void void
PHY_SetBWMode8188E( PHY_SetBWMode8188E(
PADAPTER Adapter, PADAPTER Adapter,
HT_CHANNEL_WIDTH Bandwidth, /* 20M or 40M */ enum ht_channel_width Bandwidth, /* 20M or 40M */
unsigned char Offset /* Upper, Lower, or Don't care */ unsigned char Offset /* Upper, Lower, or Don't care */
) )
{ {
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; enum ht_channel_width tmpBW= pHalData->CurrentChannelBW;
pHalData->CurrentChannelBW = Bandwidth; pHalData->CurrentChannelBW = Bandwidth;

2
hal/rtl8188e_rf6052.c
View file

@ -115,7 +115,7 @@ void rtl8188e_RF_ChangeTxPath( PADAPTER Adapter,
void void
rtl8188e_PHY_RF6052SetBandwidth( rtl8188e_PHY_RF6052SetBandwidth(
PADAPTER Adapter, PADAPTER Adapter,
HT_CHANNEL_WIDTH Bandwidth) /* 20M or 40M */ enum ht_channel_width Bandwidth) /* 20M or 40M */
{ {
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);

15
include/Hal8188EPhyCfg.h
View file

@ -235,23 +235,12 @@ PHY_ScanOperationBackup8188E( PADAPTER Adapter,
// //
// Switch bandwidth for 8192S // Switch bandwidth for 8192S
// //
void PHY_SetBWMode8188E( PADAPTER pAdapter, void PHY_SetBWMode8188E(PADAPTER pAdapter, enum ht_channel_width ChnlWidth, unsigned char Offset);
HT_CHANNEL_WIDTH ChnlWidth,
unsigned char Offset );
//
// Set FW CMD IO for 8192S.
//
//extern bool HalSetIO8192C( PADAPTER Adapter,
// IO_TYPE IOType);
// //
// Set A2 entry to fw for 8192S // Set A2 entry to fw for 8192S
// //
extern void FillA2Entry8192C( PADAPTER Adapter, extern void FillA2Entry8192C(PADAPTER Adapter, u8 index, u8 *val);
u8 index,
u8* val);
// //
// channel switch related funciton // channel switch related funciton

4
include/hal_intf.h
View file

@ -182,7 +182,7 @@ struct hal_ops {
void (*disable_interrupt)(_adapter *padapter); void (*disable_interrupt)(_adapter *padapter);
s32 (*interrupt_handler)(_adapter *padapter); s32 (*interrupt_handler)(_adapter *padapter);
void (*set_bwmode_handler)(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset); void (*set_bwmode_handler)(_adapter *padapter, enum ht_channel_width Bandwidth, u8 Offset);
void (*set_channel_handler)(_adapter *padapter, u8 channel); void (*set_channel_handler)(_adapter *padapter, u8 channel);
void (*hal_dm_watchdog)(_adapter *padapter); void (*hal_dm_watchdog)(_adapter *padapter);
@ -410,7 +410,7 @@ void rtw_hal_write_rfreg(_adapter *padapter, enum rf_radio_path eRFPath, u32 Reg
s32 rtw_hal_interrupt_handler(_adapter *padapter); s32 rtw_hal_interrupt_handler(_adapter *padapter);
void rtw_hal_set_bwmode(_adapter *padapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset); void rtw_hal_set_bwmode(_adapter *padapter, enum ht_channel_width Bandwidth, u8 Offset);
void rtw_hal_set_chan(_adapter *padapter, u8 channel); void rtw_hal_set_chan(_adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog(_adapter *padapter); void rtw_hal_dm_watchdog(_adapter *padapter);

2
include/rtl8188e_hal.h
View file

@ -284,7 +284,7 @@ struct hal_data_8188e {
//current WIFI_PHY values //current WIFI_PHY values
u32 ReceiveConfig; u32 ReceiveConfig;
enum wireless_mode CurrentWirelessMode; enum wireless_mode CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW; enum ht_channel_width CurrentChannelBW;
u8 CurrentChannel; u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier u8 nCur40MhzPrimeSC;// Control channel sub-carrier

2
include/rtl8188e_rf.h
View file

@ -30,7 +30,7 @@ void rtl8188e_RF_ChangeTxPath( PADAPTER Adapter,
u16 DataRate); u16 DataRate);
void rtl8188e_PHY_RF6052SetBandwidth( void rtl8188e_PHY_RF6052SetBandwidth(
PADAPTER Adapter, PADAPTER Adapter,
HT_CHANNEL_WIDTH Bandwidth); enum ht_channel_width Bandwidth);
void rtl8188e_PHY_RF6052SetCckTxPower( void rtl8188e_PHY_RF6052SetCckTxPower(
PADAPTER Adapter, PADAPTER Adapter,
u8* pPowerlevel); u8* pPowerlevel);

24
include/rtw_rf.h
View file

@ -63,7 +63,7 @@ struct regulatory_class {
u8 modem; u8 modem;
}; };
typedef enum _CAPABILITY{ enum capability {
cESS = 0x0001, cESS = 0x0001,
cIBSS = 0x0002, cIBSS = 0x0002,
cPollable = 0x0004, cPollable = 0x0004,
@ -80,7 +80,7 @@ typedef enum _CAPABILITY{
cDSSS_OFDM = 0x2000, cDSSS_OFDM = 0x2000,
cDelayedBA = 0x4000, cDelayedBA = 0x4000,
cImmediateBA = 0x8000, cImmediateBA = 0x8000,
}CAPABILITY, *PCAPABILITY; };
enum _REG_PREAMBLE_MODE{ enum _REG_PREAMBLE_MODE{
PREAMBLE_LONG = 1, PREAMBLE_LONG = 1,
@ -101,13 +101,13 @@ enum _RTL8712_RF_MIMO_CONFIG_{
}; };
typedef enum _RF90_RADIO_PATH{ enum rf90_radio_path {
RF90_PATH_A = 0, //Radio Path A RF90_PATH_A = 0, //Radio Path A
RF90_PATH_B = 1, //Radio Path B RF90_PATH_B = 1, //Radio Path B
RF90_PATH_C = 2, //Radio Path C RF90_PATH_C = 2, //Radio Path C
RF90_PATH_D = 3 //Radio Path D RF90_PATH_D = 3 //Radio Path D
//RF90_PATH_MAX //Max RF number 90 support //RF90_PATH_MAX //Max RF number 90 support
}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; };
// Bandwidth Offset // Bandwidth Offset
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 #define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
@ -116,38 +116,34 @@ typedef enum _RF90_RADIO_PATH{
// Represent Channel Width in HT Capabilities // Represent Channel Width in HT Capabilities
// //
typedef enum _HT_CHANNEL_WIDTH { enum ht_channel_width {
HT_CHANNEL_WIDTH_20 = 0, HT_CHANNEL_WIDTH_20 = 0,
HT_CHANNEL_WIDTH_40 = 1, HT_CHANNEL_WIDTH_40 = 1,
HT_CHANNEL_WIDTH_80 = 2, HT_CHANNEL_WIDTH_80 = 2,
HT_CHANNEL_WIDTH_160 = 3, HT_CHANNEL_WIDTH_160 = 3,
HT_CHANNEL_WIDTH_10 = 4, HT_CHANNEL_WIDTH_10 = 4,
};
}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
// //
// Represent Extention Channel Offset in HT Capabilities // Represent Extention Channel Offset in HT Capabilities
// This is available only in 40Mhz mode. // This is available only in 40Mhz mode.
// //
typedef enum _HT_EXTCHNL_OFFSET{ enum ht_extchnl_offset {
HT_EXTCHNL_OFFSET_NO_EXT = 0, HT_EXTCHNL_OFFSET_NO_EXT = 0,
HT_EXTCHNL_OFFSET_UPPER = 1, HT_EXTCHNL_OFFSET_UPPER = 1,
HT_EXTCHNL_OFFSET_NO_DEF = 2, HT_EXTCHNL_OFFSET_NO_DEF = 2,
HT_EXTCHNL_OFFSET_LOWER = 3, HT_EXTCHNL_OFFSET_LOWER = 3,
}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; };
/* 2007/11/15 MH Define different RF type. */ /* 2007/11/15 MH Define different RF type. */
typedef enum _RT_RF_TYPE_DEFINITION enum rt_rf_type_def {
{
RF_1T2R = 0, RF_1T2R = 0,
RF_2T4R = 1, RF_2T4R = 1,
RF_2T2R = 2, RF_2T2R = 2,
RF_1T1R = 3, RF_1T1R = 3,
RF_2T2R_GREEN = 4, RF_2T2R_GREEN = 4,
RF_819X_MAX_TYPE = 5, RF_819X_MAX_TYPE = 5,
}RT_RF_TYPE_DEF_E; };
u32 rtw_ch2freq(u32 ch); u32 rtw_ch2freq(u32 ch);
u32 rtw_freq2ch(u32 freq); u32 rtw_freq2ch(u32 freq);