rtl8188eu: Remove dead code inside #if 0 .... #endif

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-11-12 19:26:10 -06:00
parent e3e242b712
commit f0050d3365
52 changed files with 38 additions and 3703 deletions

View file

@ -960,12 +960,6 @@ VOID
EXhalbtcoutsrc_UpdateMinBtRssi(
IN s1Byte btRssi
);
#if 0
VOID
EXhalbtcoutsrc_SetBtExist(
IN BOOLEAN bBtExist
);
#endif
VOID
EXhalbtcoutsrc_SetChipType(
IN u1Byte chipType

View file

@ -330,14 +330,6 @@ void halbtcoutsrc_NormalLps(PBTC_COEXIST pBtCoexist)
pBtCoexist->bt_info.bt_lps_on = _FALSE;
rtw_btcoex_LPS_Leave(padapter);
pBtCoexist->bt_info.bt_ctrl_lps = _FALSE;
/* recover the LPS state to the original */
#if 0
padapter->hal_func.UpdateLPSStatusHandler(
padapter,
pPSC->RegLeisurePsMode,
pPSC->RegPowerSaveMode);
#endif
}
}
@ -839,13 +831,9 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf)
break;
case BTC_GET_BL_WIFI_SCAN:
#if 0
*pu8 = (rtw_mi_check_fwstate(padapter, WIFI_SITE_MONITOR)) ? _TRUE : _FALSE;
#else
/* Use the value of the new variable GLBtcWiFiInScanState to judge whether WiFi is in scan state or not, since the originally used flag
WIFI_SITE_MONITOR in fwstate may not be cleared in time */
*pu8 = GLBtcWiFiInScanState;
#endif
break;
case BTC_GET_BL_WIFI_LINK:
@ -1127,11 +1115,7 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
/* the following are some action which will be triggered */
case BTC_SET_ACT_GET_BT_RSSI:
#if 0
BT_SendGetBtRssiEvent(padapter);
#else
ret = _FALSE;
#endif
break;
case BTC_SET_ACT_AGGREGATE_CTRL:
@ -1229,17 +1213,7 @@ u8 halbtcoutsrc_Set(void *pBtcContext, u8 setType, void *pInBuf)
#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
break;
case BTC_SET_ACT_CTRL_8723B_ANT:
#if 0
{
u1Byte dataLen = *pU1Tmp;
u1Byte tmpBuf[BTC_TMP_BUF_SHORT];
if (dataLen)
PlatformMoveMemory(&tmpBuf[0], pU1Tmp + 1, dataLen);
BT_Set8723bAnt(Adapter, dataLen, &tmpBuf[0]);
}
#else
ret = _FALSE;
#endif
break;
/* ===================== */
default:
@ -1288,156 +1262,6 @@ u8 halbtcoutsrc_Under32K(PBTC_COEXIST pBtCoexist)
void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist)
{
#if 0
PADAPTER padapter = (PADAPTER)pBtCoexist->Adapter;
PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
u8 *cliBuf = pBtCoexist->cliBuf;
u1Byte i, j;
u1Byte tmpbuf[BTC_TMP_BUF_SHORT];
if (gl_coex_offload.cnt_h2c_sent) {
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex h2c notify]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = H2c(%d)/Ack(%d)", "Coex h2c/c2h overall statistics",
gl_coex_offload.cnt_h2c_sent, gl_coex_offload.cnt_c2h_ack);
for (j = 0; j < COL_STATUS_MAX; j++) {
if (gl_coex_offload.status[j]) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.status[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT);
}
}
CL_PRINTF(cliBuf);
}
for (i = 0; i < COL_OP_WIFI_OPCODE_MAX; i++) {
if (gl_coex_offload.h2c_record[i].count) {
/*==========================================*/
/* H2C result statistics*/
/*==========================================*/
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = total:%d", coexOpcodeString[i], gl_coex_offload.h2c_record[i].count);
for (j = 0; j < COL_STATUS_MAX; j++) {
if (gl_coex_offload.h2c_record[i].status[j]) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.h2c_record[i].status[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT);
}
}
CL_PRINTF(cliBuf);
/*==========================================*/
/* H2C/C2H content*/
/*==========================================*/
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = ", "H2C / C2H content");
for (j = 0; j < gl_coex_offload.h2c_record[i].h2c_len; j++) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.h2c_record[i].h2c_buf[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3);
}
if (gl_coex_offload.h2c_record[i].c2h_ack_len) {
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, "/ ", 2);
for (j = 0; j < gl_coex_offload.h2c_record[i].c2h_ack_len; j++) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.h2c_record[i].c2h_ack_buf[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3);
}
}
CL_PRINTF(cliBuf);
/*==========================================*/
}
}
if (gl_coex_offload.cnt_c2h_ind) {
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Coex c2h indication]============");
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = Ind(%d)", "C2H indication statistics",
gl_coex_offload.cnt_c2h_ind);
for (j = 0; j < COL_STATUS_MAX; j++) {
if (gl_coex_offload.c2h_ind_status[j]) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.c2h_ind_status[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT);
}
}
CL_PRINTF(cliBuf);
}
for (i = 0; i < COL_IND_MAX; i++) {
if (gl_coex_offload.c2h_ind_record[i].count) {
/*==========================================*/
/* H2C result statistics*/
/*==========================================*/
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = total:%d", coexIndTypeString[i], gl_coex_offload.c2h_ind_record[i].count);
for (j = 0; j < COL_STATUS_MAX; j++) {
if (gl_coex_offload.c2h_ind_record[i].status[j]) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, ", %s:%d", coexH2cResultString[j], gl_coex_offload.c2h_ind_record[i].status[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, BTC_TMP_BUF_SHORT);
}
}
CL_PRINTF(cliBuf);
/*==========================================*/
/* content*/
/*==========================================*/
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = ", "C2H indication content");
for (j = 0; j < gl_coex_offload.c2h_ind_record[i].ind_len; j++) {
CL_SPRINTF(tmpbuf, BTC_TMP_BUF_SHORT, "%02x ", gl_coex_offload.c2h_ind_record[i].ind_buf[j]);
CL_STRNCAT(cliBuf, BT_TMP_BUF_SIZE, tmpbuf, 3);
}
CL_PRINTF(cliBuf);
/*==========================================*/
}
}
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s", "============[Statistics]============");
CL_PRINTF(cliBuf);
#if (H2C_USE_IO_THREAD != 1)
for (i = 0; i < H2C_STATUS_MAX; i++) {
if (pHalData->h2cStatistics[i]) {
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s] = %d", "H2C statistics", \
h2cStaString[i], pHalData->h2cStatistics[i]);
CL_PRINTF(cliBuf);
}
}
#else
for (i = 0; i < IO_STATUS_MAX; i++) {
if (Adapter->ioComStr.ioH2cStatistics[i]) {
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s] = %d", "H2C statistics", \
ioStaString[i], Adapter->ioComStr.ioH2cStatistics[i]);
CL_PRINTF(cliBuf);
}
}
#endif
#if 0
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "lastHMEBoxNum", \
pHalData->LastHMEBoxNum);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x / 0x%x", "LastOkH2c/FirstFailH2c(fwNotRead)", \
pHalData->lastSuccessH2cEid, pHalData->firstFailedH2cEid);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "c2hIsr/c2hIntr/clr1AF/noRdy/noBuf", \
pHalData->InterruptLog.nIMR_C2HCMD, DBG_Var.c2hInterruptCnt, DBG_Var.c2hClrReadC2hCnt,
DBG_Var.c2hNotReadyCnt, DBG_Var.c2hBufAlloFailCnt);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "c2hPacket", \
DBG_Var.c2hPacketCnt);
CL_PRINTF(cliBuf);
#endif
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d", "Periodical/ DbgCtrl", \
pBtCoexist->statistics.cntPeriodical, pBtCoexist->statistics.cntDbgCtrl);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d", "PowerOn/InitHw/InitCoexDm/RfStatus", \
pBtCoexist->statistics.cntPowerOn, pBtCoexist->statistics.cntInitHwConfig, pBtCoexist->statistics.cntInitCoexDm,
pBtCoexist->statistics.cntRfStatusNotify);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d", "Ips/Lps/Scan/Connect/Mstatus", \
pBtCoexist->statistics.cntIpsNotify, pBtCoexist->statistics.cntLpsNotify,
pBtCoexist->statistics.cntScanNotify, pBtCoexist->statistics.cntConnectNotify,
pBtCoexist->statistics.cntMediaStatusNotify);
CL_PRINTF(cliBuf);
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d", "Special pkt/Bt info/ bind",
pBtCoexist->statistics.cntSpecialPacketNotify, pBtCoexist->statistics.cntBtInfoNotify,
pBtCoexist->statistics.cntBind);
CL_PRINTF(cliBuf);
#endif
PADAPTER padapter = pBtCoexist->Adapter;
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
u8 *cliBuf = pBtCoexist->cli_buf;
@ -1454,30 +1278,6 @@ void halbtcoutsrc_DisplayCoexStatistics(PBTC_COEXIST pBtCoexist)
void halbtcoutsrc_DisplayBtLinkInfo(PBTC_COEXIST pBtCoexist)
{
#if 0
PADAPTER padapter = (PADAPTER)pBtCoexist->Adapter;
PBT_MGNT pBtMgnt = &padapter->MgntInfo.BtInfo.BtMgnt;
u8 *cliBuf = pBtCoexist->cliBuf;
u8 i;
if (pBtCoexist->stack_info.profile_notified) {
for (i = 0; i < pBtMgnt->ExtConfig.NumberOfACL; i++) {
if (pBtMgnt->ExtConfig.HCIExtensionVer >= 1) {
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s", "Bt link type/spec/role", \
BtProfileString[pBtMgnt->ExtConfig.aclLink[i].BTProfile],
BtSpecString[pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec],
BtLinkRoleString[pBtMgnt->ExtConfig.aclLink[i].linkRole]);
CL_PRINTF(cliBuf);
} else {
CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s", "Bt link type/spec", \
BtProfileString[pBtMgnt->ExtConfig.aclLink[i].BTProfile],
BtSpecString[pBtMgnt->ExtConfig.aclLink[i].BTCoreSpec]);
CL_PRINTF(cliBuf);
}
}
}
#endif
}
void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist)
@ -1779,20 +1579,7 @@ u16 halbtcoutsrc_SetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr, u32 Data)
u8 halbtcoutsrc_SetBtAntDetection(void *pBtcContext, u8 txTime, u8 btChnl)
{
/* Always return _FALSE since we don't implement this yet */
#if 0
PBTC_COEXIST pBtCoexist = (PBTC_COEXIST)pBtcContext;
PADAPTER Adapter = pBtCoexist->Adapter;
u1Byte btCanTx = 0;
BOOLEAN bStatus = FALSE;
bStatus = NDBG_SetBtAntDetection(Adapter, txTime, btChnl, &btCanTx);
if (bStatus && btCanTx)
return _TRUE;
else
return _FALSE;
#else
return _FALSE;
#endif
}
BOOLEAN
@ -1802,29 +1589,7 @@ halbtcoutsrc_SetBtTRXMASK(
)
{
/* Always return _FALSE since we don't implement this yet */
#if 0
struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
PADAPTER Adapter = pBtCoexist->Adapter;
BOOLEAN bStatus = FALSE;
u1Byte btCanTx = 0;
if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter) || IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)
|| IS_HARDWARE_TYPE_8821C(pBtCoexist->Adapter)) {
if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter))
bStatus = NDBG_SetBtTRXMASK(Adapter, 1, bt_trx_mask, &btCanTx);
else
bStatus = NDBG_SetBtTRXMASK(Adapter, 2, bt_trx_mask, &btCanTx);
}
if (bStatus)
return TRUE;
else
return FALSE;
#else
return _FALSE;
#endif
}
u16 halbtcoutsrc_GetBtReg_with_status(void *pBtcContext, u8 RegType, u32 RegAddr, u32 *data)
@ -1903,18 +1668,6 @@ static COL_H2C_STATUS halbtcoutsrc_send_h2c(PADAPTER Adapter, PCOL_H2C pcol_h2c,
INIT_COMPLETION(gl_coex_offload.c2h_event[pcol_h2c->req_num]);
#endif
if (TRUE) {
#if 0 /*(USE_HAL_MAC_API == 1) */
if (RT_STATUS_SUCCESS == HAL_MAC_Send_BT_COEX(&GET_HAL_MAC_INFO(Adapter), (pu1Byte)(pcol_h2c), (u4Byte)h2c_cmd_len, 1)) {
if (!wait_for_completion_timeout(&gl_coex_offload.c2h_event[pcol_h2c->req_num], 20)) {
h2c_status = COL_STATUS_H2C_TIMTOUT;
}
} else {
h2c_status = COL_STATUS_H2C_HALMAC_FAIL;
}
#endif
}
return h2c_status;
}
@ -1998,21 +1751,7 @@ COL_H2C_STATUS halbtcoutsrc_CoexH2cProcess(void *pBtCoexist,
u8 halbtcoutsrc_GetAntDetValFromBt(void *pBtcContext)
{
/* Always return 0 since we don't implement this yet */
#if 0
struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
PADAPTER Adapter = pBtCoexist->Adapter;
u1Byte AntDetVal = 0x0;
u1Byte opcodeVer = 1;
BOOLEAN status = false;
status = NDBG_GetAntDetValFromBt(Adapter, opcodeVer, &AntDetVal);
RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$ halbtcoutsrc_GetAntDetValFromBt(): status = %d, feature = %x\n", status, AntDetVal));
return AntDetVal;
#else
return 0;
#endif
}
u8 halbtcoutsrc_GetBleScanTypeFromBt(void *pBtcContext)
@ -2152,128 +1891,9 @@ u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type)
struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
/* switch to #if 0 in case the phydm version does not provide the function */
#if 1
return phydm_cmn_info_query((struct PHY_DM_STRUCT *)pBtCoexist->odm_priv, (enum phydm_info_query_e)info_type);
#else
return 0;
#endif
}
#if 0
static void BT_CoexOffloadRecordErrC2hAck(PADAPTER Adapter)
{
PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter);
if (pDefaultAdapter != Adapter)
return;
if (!hal_btcoex_IsBtExist(Adapter))
return;
gl_coex_offload.cnt_c2h_ack++;
gl_coex_offload.status[COL_STATUS_INVALID_C2H_LEN]++;
}
static void BT_CoexOffloadC2hAckCheck(PADAPTER Adapter, u8 *tmpBuf, u8 length)
{
PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter);
PCOL_C2H_ACK p_c2h_ack = NULL;
u8 req_num = 0xff;
if (pDefaultAdapter != Adapter)
return;
if (!hal_btcoex_IsBtExist(Adapter))
return;
gl_coex_offload.cnt_c2h_ack++;
if (length < COL_C2H_ACK_HDR_LEN) { /* c2h ack length must >= 3 (status, opcode_ver, req_num and ret_len) */
gl_coex_offload.status[COL_STATUS_INVALID_C2H_LEN]++;
} else {
BT_PrintData(Adapter, "[COL], c2h ack:", length, tmpBuf);
p_c2h_ack = (PCOL_C2H_ACK)tmpBuf;
req_num = p_c2h_ack->req_num;
_rtw_memmove(&gl_coex_offload.c2h_ack_buf[req_num][0], tmpBuf, length);
gl_coex_offload.c2h_ack_len[req_num] = length;
complete(&gl_coex_offload.c2h_event[req_num]);
}
}
static void BT_CoexOffloadC2hIndCheck(PADAPTER Adapter, u8 *tmpBuf, u8 length)
{
PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter);
PCOL_C2H_IND p_c2h_ind = NULL;
u8 ind_type = 0, ind_version = 0, ind_length = 0;
if (pDefaultAdapter != Adapter)
return;
if (!hal_btcoex_IsBtExist(Adapter))
return;
gl_coex_offload.cnt_c2h_ind++;
if (length < COL_C2H_IND_HDR_LEN) { /* c2h indication length must >= 3 (type, version and length) */
gl_coex_offload.c2h_ind_status[COL_STATUS_INVALID_C2H_LEN]++;
} else {
BT_PrintData(Adapter, "[COL], c2h indication:", length, tmpBuf);
p_c2h_ind = (PCOL_C2H_IND)tmpBuf;
ind_type = p_c2h_ind->type;
ind_version = p_c2h_ind->version;
ind_length = p_c2h_ind->length;
_rtw_memmove(&gl_coex_offload.c2h_ind_buf[0], tmpBuf, length);
gl_coex_offload.c2h_ind_len = length;
/* log */
gl_coex_offload.c2h_ind_record[ind_type].count++;
gl_coex_offload.c2h_ind_record[ind_type].status[COL_STATUS_C2H_OK]++;
_rtw_memmove(&gl_coex_offload.c2h_ind_record[ind_type].ind_buf[0], tmpBuf, length);
gl_coex_offload.c2h_ind_record[ind_type].ind_len = length;
gl_coex_offload.c2h_ind_status[COL_STATUS_C2H_OK]++;
/*TODO: need to check c2h indication length*/
/* TODO: Notification */
}
}
void BT_CoexOffloadC2hCheck(PADAPTER Adapter, u8 *Buffer, u8 Length)
{
#if 0 /*(USE_HAL_MAC_API == 1)*/
u8 c2hSubCmdId = 0, c2hAckLen = 0, h2cCmdId = 0, h2cSubCmdId = 0, c2hIndLen = 0;
BT_PrintData(Adapter, "[COL], c2h packet:", Length - 2, Buffer + 2);
c2hSubCmdId = (u1Byte)C2H_HDR_GET_C2H_SUB_CMD_ID(Buffer);
if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR ||
c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) {
if (c2hSubCmdId == C2H_SUB_CMD_ID_H2C_ACK_HDR) {
/* coex c2h ack */
h2cCmdId = (u1Byte)H2C_ACK_HDR_GET_H2C_CMD_ID(Buffer);
h2cSubCmdId = (u1Byte)H2C_ACK_HDR_GET_H2C_SUB_CMD_ID(Buffer);
if (h2cCmdId == 0xff && h2cSubCmdId == 0x60) {
c2hAckLen = (u1Byte)C2H_HDR_GET_LEN(Buffer);
if (c2hAckLen >= 8)
BT_CoexOffloadC2hAckCheck(Adapter, &Buffer[12], (u1Byte)(c2hAckLen - 8));
else
BT_CoexOffloadRecordErrC2hAck(Adapter);
}
} else if (c2hSubCmdId == C2H_SUB_CMD_ID_BT_COEX_INFO) {
/* coex c2h indication */
c2hIndLen = (u1Byte)C2H_HDR_GET_LEN(Buffer);
BT_CoexOffloadC2hIndCheck(Adapter, &Buffer[4], (u1Byte)c2hIndLen);
}
}
#endif
}
#endif
/* ************************************
* Extern functions called by other module
* ************************************ */
@ -2473,11 +2093,6 @@ void EXhalbtcoutsrc_init_hw_config(PBTC_COEXIST pBtCoexist, u8 bWifiOnly)
pBtCoexist->statistics.cnt_init_hw_config++;
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_init_hw_config(pBtCoexist, bWifiOnly);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_init_hw_config(pBtCoexist, bWifiOnly);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2534,11 +2149,6 @@ void EXhalbtcoutsrc_init_coex_dm(PBTC_COEXIST pBtCoexist)
pBtCoexist->statistics.cnt_init_coex_dm++;
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_init_coex_dm(pBtCoexist);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_init_coex_dm(pBtCoexist);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2604,11 +2214,6 @@ void EXhalbtcoutsrc_ips_notify(PBTC_COEXIST pBtCoexist, u8 type)
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_ips_notify(pBtCoexist, ipsType);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_ips_notify(pBtCoexist, ipsType);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2672,11 +2277,6 @@ void EXhalbtcoutsrc_lps_notify(PBTC_COEXIST pBtCoexist, u8 type)
}
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_lps_notify(pBtCoexist, lpsType);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_lps_notify(pBtCoexist, lpsType);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2739,11 +2339,6 @@ void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type)
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_scan_notify(pBtCoexist, scanType);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_scan_notify(pBtCoexist, scanType);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2788,32 +2383,6 @@ void EXhalbtcoutsrc_scan_notify(PBTC_COEXIST pBtCoexist, u8 type)
void EXhalbtcoutsrc_SetAntennaPathNotify(PBTC_COEXIST pBtCoexist, u8 type)
{
#if 0
u8 switchType;
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
if (pBtCoexist->manual_control)
return;
halbtcoutsrc_LeaveLowPower(pBtCoexist);
switchType = type;
if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) {
if (pBtCoexist->board_info.btdm_ant_num == 1)
ex_halbtc8723b1ant_set_antenna_notify(pBtCoexist, type);
}
if (IS_HARDWARE_TYPE_8723D(pBtCoexist->Adapter)) {
if (pBtCoexist->board_info.btdm_ant_num == 1)
ex_halbtc8723d1ant_set_antenna_notify(pBtCoexist, type);
else if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8723d2ant_set_antenna_notify(pBtCoexist, type);
}
halbtcoutsrc_NormalLowPower(pBtCoexist);
#endif
}
void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 action)
@ -2835,11 +2404,6 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 action)
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_connect_notify(pBtCoexist, assoType);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_connect_notify(pBtCoexist, assoType);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2902,11 +2466,6 @@ void EXhalbtcoutsrc_media_status_notify(PBTC_COEXIST pBtCoexist, RT_MEDIA_STATUS
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_media_status_notify(pBtCoexist, mStatus);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_media_status_notify(pBtCoexist, mStatus);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -2974,11 +2533,6 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType)
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_specific_packet_notify(pBtCoexist, packetType);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_specific_packet_notify(pBtCoexist, packetType);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -3032,11 +2586,6 @@ void EXhalbtcoutsrc_bt_info_notify(PBTC_COEXIST pBtCoexist, u8 *tmpBuf, u8 lengt
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_bt_info_notify(pBtCoexist, tmpBuf, length);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_bt_info_notify(pBtCoexist, tmpBuf, length);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -3116,28 +2665,6 @@ EXhalbtcoutsrc_RfStatusNotify(
void EXhalbtcoutsrc_StackOperationNotify(PBTC_COEXIST pBtCoexist, u8 type)
{
#if 0
u8 stackOpType;
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
pBtCoexist->statistics.cntStackOperationNotify++;
if (pBtCoexist->manual_control)
return;
if ((HCI_BT_OP_INQUIRY_START == type) ||
(HCI_BT_OP_PAGING_START == type) ||
(HCI_BT_OP_PAIRING_START == type))
stackOpType = BTC_STACK_OP_INQ_PAGE_PAIR_START;
else if ((HCI_BT_OP_INQUIRY_FINISH == type) ||
(HCI_BT_OP_PAGING_SUCCESS == type) ||
(HCI_BT_OP_PAGING_UNSUCCESS == type) ||
(HCI_BT_OP_PAIRING_FINISH == type))
stackOpType = BTC_STACK_OP_INQ_PAGE_PAIR_FINISH;
else
stackOpType = BTC_STACK_OP_NONE;
#endif
}
void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist)
@ -3146,11 +2673,6 @@ void EXhalbtcoutsrc_halt_notify(PBTC_COEXIST pBtCoexist)
return;
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_halt_notify(pBtCoexist);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_halt_notify(pBtCoexist);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -3226,11 +2748,6 @@ void EXhalbtcoutsrc_pnp_notify(PBTC_COEXIST pBtCoexist, u8 pnpState)
else if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8723d2ant_pnp_notify(pBtCoexist, pnpState);
} else if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_pnp_notify(pBtCoexist, pnpState);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 1)
ex_halbtc8821a1ant_pnp_notify(pBtCoexist, pnpState);
else if (pBtCoexist->board_info.btdm_ant_num == 2)
@ -3296,11 +2813,6 @@ void EXhalbtcoutsrc_periodical(PBTC_COEXIST pBtCoexist)
* halbtcoutsrc_LeaveLowPower(pBtCoexist); */
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_periodical(pBtCoexist);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_periodical(pBtCoexist);
else if (pBtCoexist->board_info.btdm_ant_num == 1) {
@ -3371,34 +2883,6 @@ void EXhalbtcoutsrc_dbg_control(PBTC_COEXIST pBtCoexist, u8 opCode, u8 opLen, u8
/* halbtcoutsrc_NormalLowPower(pBtCoexist); */
}
#if 0
VOID
EXhalbtcoutsrc_AntennaDetection(
IN PBTC_COEXIST pBtCoexist,
IN u4Byte centFreq,
IN u4Byte offset,
IN u4Byte span,
IN u4Byte seconds
)
{
if (!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist))
return;
/* Need to refine the following power save operations to enable this function in the future */
#if 0
IPSDisable(pBtCoexist->Adapter, FALSE, 0);
LeisurePSLeave(pBtCoexist->Adapter, LPS_DISABLE_BT_COEX);
#endif
if (IS_HARDWARE_TYPE_8723B(pBtCoexist->Adapter)) {
if (pBtCoexist->board_info.btdm_ant_num == 1)
ex_halbtc8723b1ant_AntennaDetection(pBtCoexist, centFreq, offset, span, seconds);
}
/* IPSReturn(pBtCoexist->Adapter, 0xff); */
}
#endif
void EXhalbtcoutsrc_StackUpdateProfileInfo(void)
{
#ifdef CONFIG_BT_COEXIST_SOCKET_TRX
@ -3480,12 +2964,6 @@ void EXhalbtcoutsrc_SetBtPatchVersion(u16 btHciVersion, u16 btPatchVersion)
pBtCoexist->bt_info.bt_hci_ver = btHciVersion;
}
#if 0
void EXhalbtcoutsrc_SetBtExist(u8 bBtExist)
{
GLBtCoexist.boardInfo.bBtExist = bBtExist;
}
#endif
void EXhalbtcoutsrc_SetChipType(u8 chipType)
{
switch (chipType) {
@ -3519,21 +2997,10 @@ void EXhalbtcoutsrc_SetAntNum(u8 type, u8 antNum)
if (BT_COEX_ANT_TYPE_PG == type) {
GLBtCoexist.board_info.pg_ant_num = antNum;
GLBtCoexist.board_info.btdm_ant_num = antNum;
#if 0
/* The antenna position: Main (default) or Aux for pgAntNum=2 && btdmAntNum =1 */
/* The antenna position should be determined by auto-detect mechanism */
/* The following is assumed to main, and those must be modified if y auto-detect mechanism is ready */
if ((GLBtCoexist.board_info.pg_ant_num == 2) && (GLBtCoexist.board_info.btdm_ant_num == 1))
GLBtCoexist.board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
else
GLBtCoexist.board_info.btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
#endif
} else if (BT_COEX_ANT_TYPE_ANTDIV == type) {
GLBtCoexist.board_info.btdm_ant_num = antNum;
/* GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; */
} else if (BT_COEX_ANT_TYPE_DETECTED == type) {
GLBtCoexist.board_info.btdm_ant_num = antNum;
/* GLBtCoexist.boardInfo.btdmAntPos = BTC_ANTENNA_AT_MAIN_PORT; */
}
}
@ -3553,11 +3020,6 @@ void EXhalbtcoutsrc_DisplayBtCoexInfo(PBTC_COEXIST pBtCoexist)
halbtcoutsrc_LeaveLowPower(pBtCoexist);
if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) {
#if 0
if (halbtcoutsrc_IsCsrBtCoex(pBtCoexist) == _TRUE)
ex_halbtc8821aCsr2ant_display_coex_info(pBtCoexist);
else
#endif
if (pBtCoexist->board_info.btdm_ant_num == 2)
ex_halbtc8821a2ant_display_coex_info(pBtCoexist);
else if (pBtCoexist->board_info.btdm_ant_num == 1)
@ -3890,12 +3352,8 @@ void hal_btcoex_SuspendNotify(PADAPTER padapter, u8 state)
break;
case BTCOEX_SUSPEND_STATE_SUSPEND_KEEP_ANT:
/* should switch to "#if 1" once all ICs' coex. revision are upgraded to support the KEEP_ANT case */
#if 0
EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP_KEEP_ANT);
#else
EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP);
EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_SLEEP_KEEP_ANT);
#endif
break;
case BTCOEX_SUSPEND_STATE_RESUME:
EXhalbtcoutsrc_pnp_notify(&GLBtCoexist, BTC_WIFI_PNP_WAKE_UP);
@ -4085,96 +3543,8 @@ u32 hal_btcoex_GetDBG(PADAPTER padapter, u8 *pStrBuf, u32 bufSize)
pstr += count;
leftSize -= count;
#if 0
count = rtw_sprintf(pstr, leftSize, "INTERFACE Debug Setting Definition:\n");
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[0]=%d for INTF_INIT\n",
GLBtcDbgType[BTC_MSG_INTERFACE] & INTF_INIT ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[2]=%d for INTF_NOTIFY\n\n",
GLBtcDbgType[BTC_MSG_INTERFACE] & INTF_NOTIFY ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "ALGORITHM Debug Setting Definition:\n");
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[0]=%d for BT_RSSI_STATE\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_BT_RSSI_STATE ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[1]=%d for WIFI_RSSI_STATE\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_WIFI_RSSI_STATE ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[2]=%d for BT_MONITOR\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_BT_MONITOR ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[3]=%d for TRACE\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[4]=%d for TRACE_FW\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_FW ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[5]=%d for TRACE_FW_DETAIL\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_FW_DETAIL ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[6]=%d for TRACE_FW_EXEC\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_FW_EXEC ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[7]=%d for TRACE_SW\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_SW ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[8]=%d for TRACE_SW_DETAIL\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_SW_DETAIL ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
count = rtw_sprintf(pstr, leftSize, "\tbit[9]=%d for TRACE_SW_EXEC\n",
GLBtcDbgType[BTC_MSG_ALGORITHM] & ALGO_TRACE_SW_EXEC ? 1 : 0);
if ((count < 0) || (count >= leftSize))
goto exit;
pstr += count;
leftSize -= count;
#endif
exit:
count = pstr - pStrBuf;
/* RTW_INFO(FUNC_ADPT_FMT ": usedsize=%d\n", FUNC_ADPT_ARG(padapter), count); */
return count;
}

View file

@ -2002,17 +2002,7 @@ void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key)
u32 wdata;
/* TODO: consider other key length accordingly */
#if 0
switch ((ctrl & 0x1c) >> 2) {
case _WEP40_:
case _TKIP_:
case _AES_:
case _WEP104_:
}
#else
j = 7;
#endif
for (; j >= 0; j--) {
switch (j) {
@ -2447,44 +2437,16 @@ void rtw_mbid_cam_restore(_adapter *adapter)
void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr)
{
#if 0 /*TODO - modify for more flexible*/
u8 idx = 0;
/*
MBID entry_id = 0~7 ,for IFACE_ID0 ~ IFACE_IDx
*/
u8 entry_id = rtw_mbid_camid_alloc(adapter, mac_addr);
if ((check_fwstate(&adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) &&
(DEV_STA_NUM(adapter_to_dvobj(adapter)) == 1)) {
for (idx = 0; idx < 6; idx++)
rtw_write8(GET_PRIMARY_ADAPTER(adapter), (REG_MACID + idx), val[idx]);
} else {
/*MBID entry_id = 0~7 ,0 for root AP, 1~7 for VAP*/
u8 entry_id;
if ((check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE) &&
(DEV_AP_NUM(adapter_to_dvobj(adapter)) == 1)) {
entry_id = 0;
if (rtw_mbid_cam_assign(adapter, val, entry_id)) {
RTW_INFO(FUNC_ADPT_FMT" Root AP assigned success\n", FUNC_ADPT_ARG(adapter));
write_mbssid_cam(adapter, entry_id, val);
}
} else {
entry_id = rtw_mbid_camid_alloc(adapter, val);
if (entry_id != INVALID_CAM_ID)
write_mbssid_cam(adapter, entry_id, val);
}
if (entry_id != INVALID_CAM_ID) {
write_mbssid_cam(adapter, entry_id, mac_addr);
enable_mbssid_cam(adapter);
}
#else
{
/*
MBID entry_id = 0~7 ,for IFACE_ID0 ~ IFACE_IDx
*/
u8 entry_id = rtw_mbid_camid_alloc(adapter, mac_addr);
if (entry_id != INVALID_CAM_ID) {
write_mbssid_cam(adapter, entry_id, mac_addr);
enable_mbssid_cam(adapter);
}
}
#endif
}
void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr)
@ -3952,14 +3914,6 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable)
rtw_hal_check_pno_enabled(padapter);
#endif /* CONFIG_PNO_SUPPORT */
} else {
#if 0
{
u32 PageSize = 0;
rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, (u8 *)&PageSize);
dump_TX_FIFO(padapter, 4, PageSize);
}
#endif
rtw_hal_set_remote_wake_ctrl_cmd(padapter, enable);
}
RTW_PRINT("-%s()-\n", __func__);
@ -4396,21 +4350,6 @@ static void rtw_hal_construct_P2PBeacon(_adapter *padapter, u8 *pframe, u32 *pLe
pframe += (cur_network->IELength + len_diff);
pktlen += (cur_network->IELength + len_diff);
}
#if 0
{
u8 *wps_ie;
uint wps_ielen;
u8 sr = 0;
wps_ie = rtw_get_wps_ie(pmgntframe->buf_addr + TXDESC_OFFSET + sizeof(struct rtw_ieee80211_hdr_3addr) + _BEACON_IE_OFFSET_,
pattrib->pktlen - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_, NULL, &wps_ielen);
if (wps_ie && wps_ielen > 0)
rtw_get_wps_attr_content(wps_ie, wps_ielen, WPS_ATTR_SELECTED_REGISTRAR, (u8 *)(&sr), NULL);
if (sr != 0)
set_fwstate(pmlmepriv, WIFI_UNDER_WPS);
else
_clr_fwstate_(pmlmepriv, WIFI_UNDER_WPS);
}
#endif
#ifdef CONFIG_P2P
if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
u32 len;
@ -4501,18 +4440,6 @@ _issue_bcn:
* #endif */ /* #if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) */
*pLength = pktlen;
#if 0
/* printf dbg msg */
dbgbufLen = pktlen;
RTW_INFO("======> DBG MSG FOR CONSTRAUCT P2P BEACON\n");
for (index = 0; index < dbgbufLen; index++)
printk("%x ", *(dbgbuf + index));
printk("\n");
RTW_INFO("<====== DBG MSG FOR CONSTRAUCT P2P BEACON\n");
#endif
}
static int get_reg_classes_full_count(struct p2p_channels channel_list)
@ -4834,19 +4761,8 @@ static void rtw_hal_construct_P2PProbeRsp(_adapter *padapter, u8 *pframe, u32 *p
#endif
*pLength = pktlen;
#if 0
/* printf dbg msg */
dbgbufLen = pktlen;
RTW_INFO("======> DBG MSG FOR CONSTRAUCT P2P Probe Rsp\n");
for (index = 0; index < dbgbufLen; index++)
printk("%x ", *(dbgbuf + index));
printk("\n");
RTW_INFO("<====== DBG MSG FOR CONSTRAUCT P2P Probe Rsp\n");
#endif
}
static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
{
unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
@ -5250,19 +5166,7 @@ static void rtw_hal_construct_P2PNegoRsp(_adapter *padapter, u8 *pframe, u32 *pL
pframe += wfdielen;
pktlen += wfdielen;
#endif
*pLength = pktlen;
#if 0
/* printf dbg msg */
dbgbufLen = pktlen;
RTW_INFO("======> DBG MSG FOR CONSTRAUCT Nego Rsp\n");
for (index = 0; index < dbgbufLen; index++)
printk("%x ", *(dbgbuf + index));
printk("\n");
RTW_INFO("<====== DBG MSG FOR CONSTRAUCT Nego Rsp\n");
#endif
}
static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
@ -5364,142 +5268,6 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *
p2pie[p2pielen++] = 200; /* 2 seconds needed to be the P2P Client */
/* due to defult value is FAIL INFO UNAVAILABLE, so the following IE is not needed */
#if 0
if (status_code == P2P_STATUS_SUCCESS) {
if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
/* The P2P Invitation request frame asks this Wi-Fi device to be the P2P GO */
/* In this case, the P2P Invitation response frame should carry the two more P2P attributes. */
/* First one is operating channel attribute. */
/* Second one is P2P Group BSSID attribute. */
/* Operating Channel */
/* Type: */
p2pie[p2pielen++] = P2P_ATTR_OPERATING_CH;
/* Length: */
*(u16 *)(p2pie + p2pielen) = cpu_to_le16(0x0005);
p2pielen += 2;
/* Value: */
/* Country String */
p2pie[p2pielen++] = 'X';
p2pie[p2pielen++] = 'X';
/* The third byte should be set to 0x04. */
/* Described in the "Operating Channel Attribute" section. */
p2pie[p2pielen++] = 0x04;
/* Operating Class */
p2pie[p2pielen++] = 0x51; /* Copy from SD7 */
/* Channel Number */
p2pie[p2pielen++] = pwdinfo->operating_channel; /* operating channel number */
/* P2P Group BSSID */
/* Type: */
p2pie[p2pielen++] = P2P_ATTR_GROUP_BSSID;
/* Length: */
*(u16 *)(p2pie + p2pielen) = cpu_to_le16(ETH_ALEN);
p2pielen += 2;
/* Value: */
/* P2P Device Address for GO */
_rtw_memcpy(p2pie + p2pielen, adapter_mac_addr(padapter), ETH_ALEN);
p2pielen += ETH_ALEN;
}
/* Channel List */
/* Type: */
p2pie[p2pielen++] = P2P_ATTR_CH_LIST;
/* Length: */
/* Country String(3) */
/* + ( Operating Class (1) + Number of Channels(1) ) * Operation Classes (?) */
/* + number of channels in all classes */
len_channellist_attr = 3
+ (1 + 1) * (u16)pmlmeext->channel_list.reg_classes
+ get_reg_classes_full_count(pmlmeext->channel_list);
#ifdef CONFIG_CONCURRENT_MODE
if (rtw_mi_check_status(padapter, MI_LINKED))
*(u16 *)(p2pie + p2pielen) = cpu_to_le16(5 + 1);
else
*(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr);
#else
*(u16 *)(p2pie + p2pielen) = cpu_to_le16(len_channellist_attr);
#endif
p2pielen += 2;
/* Value: */
/* Country String */
p2pie[p2pielen++] = 'X';
p2pie[p2pielen++] = 'X';
/* The third byte should be set to 0x04. */
/* Described in the "Operating Channel Attribute" section. */
p2pie[p2pielen++] = 0x04;
/* Channel Entry List */
#ifdef CONFIG_CONCURRENT_MODE
if (rtw_mi_check_status(padapter, MI_LINKED)) {
u8 union_ch = rtw_mi_get_union_chan(padapter);
/* Operating Class */
if (union_ch > 14) {
if (union_ch >= 149)
p2pie[p2pielen++] = 0x7c;
else
p2pie[p2pielen++] = 0x73;
} else
p2pie[p2pielen++] = 0x51;
/* Number of Channels */
/* Just support 1 channel and this channel is AP's channel */
p2pie[p2pielen++] = 1;
/* Channel List */
p2pie[p2pielen++] = union_ch;
} else {
int i, j;
for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
/* Operating Class */
p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
/* Number of Channels */
p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
/* Channel List */
for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
}
}
#else /* CONFIG_CONCURRENT_MODE */
{
int i, j;
for (j = 0; j < pmlmeext->channel_list.reg_classes; j++) {
/* Operating Class */
p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].reg_class;
/* Number of Channels */
p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channels;
/* Channel List */
for (i = 0; i < pmlmeext->channel_list.reg_class[j].channels; i++)
p2pie[p2pielen++] = pmlmeext->channel_list.reg_class[j].channel[i];
}
}
#endif /* CONFIG_CONCURRENT_MODE */
}
#endif
pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pktlen);
#ifdef CONFIG_WFD
@ -5509,21 +5277,8 @@ static void rtw_hal_construct_P2PInviteRsp(_adapter *padapter, u8 *pframe, u32 *
#endif
*pLength = pktlen;
#if 0
/* printf dbg msg */
dbgbufLen = pktlen;
RTW_INFO("======> DBG MSG FOR CONSTRAUCT Invite Rsp\n");
for (index = 0; index < dbgbufLen; index++)
printk("%x ", *(dbgbuf + index));
printk("\n");
RTW_INFO("<====== DBG MSG FOR CONSTRAUCT Invite Rsp\n");
#endif
}
static void rtw_hal_construct_P2PProvisionDisRsp(_adapter *padapter, u8 *pframe, u32 *pLength)
{
unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
@ -5583,20 +5338,6 @@ static void rtw_hal_construct_P2PProvisionDisRsp(_adapter *padapter, u8 *pframe,
RTW_PUT_BE32(wpsie, WPSOUI);
wpsielen += 4;
#if 0
/* WPS version */
/* Type: */
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(WPS_ATTR_VER1);
wpsielen += 2;
/* Length: */
*(u16 *)(wpsie + wpsielen) = cpu_to_be16(0x0001);
wpsielen += 2;
/* Value: */
wpsie[wpsielen++] = WPS_VERSION_1; /* Version 1.0 */
#endif
/* Config Method */
/* Type: */
/* *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); */
@ -5622,18 +5363,6 @@ static void rtw_hal_construct_P2PProvisionDisRsp(_adapter *padapter, u8 *pframe,
#endif
*pLength = pktlen;
/* printf dbg msg */
#if 0
dbgbufLen = pktlen;
RTW_INFO("======> DBG MSG FOR CONSTRAUCT ProvisionDis Rsp\n");
for (index = 0; index < dbgbufLen; index++)
printk("%x ", *(dbgbuf + index));
printk("\n");
RTW_INFO("<====== DBG MSG FOR CONSTRAUCT ProvisionDis Rsp\n");
#endif
}
u8 rtw_hal_set_FwP2PRsvdPage_cmd(_adapter *adapter, PRSVDPAGE_LOC rsvdpageloc)
@ -6521,23 +6250,6 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
}
CurtPktPageNum = (u8)PageNum(GTKLength, page_size);
}
#if 0
{
int i;
printk("\ntoFW KCK: ");
for (i = 0; i < 16; i++)
printk(" %02x ", kck[i]);
printk("\ntoFW KEK: ");
for (i = 0; i < 16; i++)
printk(" %02x ", kek[i]);
printk("\n");
}
RTW_INFO("%s(): HW_VAR_SET_TX_CMD: KEK KCK %p %d\n",
__func__, &pframe[index - tx_desc],
(tx_desc + RTW_KCK_LEN + RTW_KEK_LEN));
#endif
*page_num += CurtPktPageNum;
index += (CurtPktPageNum * page_size);
@ -6549,22 +6261,6 @@ void rtw_hal_set_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc],
GTKLength, _FALSE, _FALSE, _TRUE);
#if 0
{
int gj;
printk("123GTK pkt=>\n");
for (gj = 0; gj < GTKLength + tx_desc; gj++) {
printk(" %02x ", pframe[index - tx_desc + gj]);
if ((gj + 1) % 16 == 0)
printk("\n");
}
printk(" <=end\n");
}
RTW_INFO("%s(): HW_VAR_SET_TX_CMD: GTK RSP %p %d\n",
__func__, &pframe[index - tx_desc],
(tx_desc + GTKLength));
#endif
CurtPktPageNum = (u8)PageNum(tx_desc + GTKLength, page_size);
@ -7719,11 +7415,6 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc],
P2PBCNLength, _FALSE, _FALSE, _FALSE);
#if 0
RTW_INFO("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n",
__func__, &pframe[index - tx_desc], (P2PBCNLength + tx_desc));
#endif
CurtPktPageNum = (u8)PageNum(tx_desc + P2PBCNLength, page_size);
*page_num += CurtPktPageNum;
@ -7737,9 +7428,6 @@ void rtw_hal_set_p2p_wow_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 index,
rtw_hal_fill_fake_txdesc(adapter, &pframe[index - tx_desc],
P2PProbeRspLength, _FALSE, _FALSE, _FALSE);
/* RTW_INFO("%s(): HW_VAR_SET_TX_CMD: PROBE RSP %p %d\n", */
/* __func__, &pframe[index-tx_desc], (P2PProbeRspLength+tx_desc)); */
CurtPktPageNum = (u8)PageNum(tx_desc + P2PProbeRspLength, page_size);
*page_num += CurtPktPageNum;
@ -9560,21 +9248,8 @@ void rtw_dump_cur_efuse(PADAPTER padapter)
RTW_INFO("EFUSE FILE\n");
else
RTW_INFO("HW EFUSE\n");
#if 0 //def CONFIG_RTW_DEBUG
for (i = 0; i < mapsize; i++) {
if (i % 16 == 0)
RTW_PRINT_SEL(RTW_DBGDUMP, "0x%03x: ", i);
_RTW_PRINT_SEL(RTW_DBGDUMP, "%02X%s"
, hal_data->efuse_eeprom_data[i]
, ((i + 1) % 16 == 0) ? "\n" : " ");
}
_RTW_PRINT_SEL(RTW_DBGDUMP, "\n");
#endif
}
#ifdef CONFIG_EFUSE_CONFIG_FILE
u32 Hal_readPGDataFromConfigFile(PADAPTER padapter)
{

View file

@ -4821,25 +4821,6 @@ PHY_ConfigRFWithTxPwrTrackParaFile(
}
} else
RTW_INFO("%s(): No File %s, Load from HWImg Array!\n", __func__, pFileName);
#if 0
for (i = 0; i < DELTA_SWINGIDX_SIZE; ++i) {
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2ga_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2ga_p[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2ga_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2ga_n[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2gb_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2gb_p[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2gb_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2gb_n[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_p[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_a_n[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_p[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_p[i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_n[%d] = %d\n", i, pRFCalibrateInfo->delta_swing_table_idx_2g_cck_b_n[i]);
for (j = 0; j < 3; ++j) {
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5ga_p[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5ga_p[j][i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5ga_n[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5ga_n[j][i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5gb_p[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5gb_p[j][i]);
RTW_INFO("pRFCalibrateInfo->delta_swing_table_idx_5gb_n[%d][%d] = %d\n", j, i, pRFCalibrateInfo->delta_swing_table_idx_5gb_n[j][i]);
}
}
#endif
return rtStatus;
}

View file

@ -580,10 +580,6 @@ void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, CHANNEL_WIDTH Bandwidth
/* MP mode channel don't use secondary channel */
if (rtw_mi_mp_mode_check(padapter) == _FALSE) {
#if 0
if (cch_160 != 0)
cch_80 = rtw_get_scch_by_cch_offset(cch_160, CHANNEL_WIDTH_160, Offset80);
#endif
if (cch_80 != 0)
cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, Offset80);
if (cch_40 != 0)

View file

@ -506,11 +506,6 @@ static void mpt_SetRFPath_819X(PADAPTER pAdapter)
default:
break;
}
#if 0
/* r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D */
/* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */
/* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */
#endif
switch (ulAntennaRx) {
case ANTENNA_A:
r_rx_antenna_ofdm = 0x1; /* A*/
@ -607,23 +602,13 @@ u8 hal_mpt_ReadRFThermalMeter(PADAPTER pAdapter)
}
void hal_mpt_GetThermalMeter(PADAPTER pAdapter, u8 *value)
{
#if 0
fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER);
rtw_msleep_os(1000);
fw_cmd_data(pAdapter, value, 1);
*value &= 0xFF;
#else
hal_mpt_TriggerRFThermalMeter(pAdapter);
rtw_msleep_os(1000);
*value = hal_mpt_ReadRFThermalMeter(pAdapter);
#endif
}
void hal_mpt_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);

View file

@ -52,20 +52,6 @@ static u8 RETRY_PENALTY_UP[RETRYSIZE + 1] = {49, 44, 16, 16, 0, 48}; /* 12% for
static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32};
#if 0
static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
}, /* 0329 R01 */
{
4, 4, 4, 5, 7, 7, 9, 9, 0x0c, 0x0e, 0x10, 0x12, /* SS<TH */
4, 4, 5, 5, 6, 0x0a, 0x11, 0x13,
9, 9, 9, 9, 0x0c, 0x0e, 0x11, 0x13
}
};
#endif
/* wilson modify */
static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
@ -106,14 +92,6 @@ static u8 TRYING_NECESSARY[RATESIZE] = {2, 2, 2, 2,
4, 4, 7, 10, 10, 12, 12, 18,
5, 7, 7, 8, 11, 18, 36, 60
}; /* 0329 */ /* 1207 */
#if 0
static u8 POOL_RETRY_TH[RATESIZE] = {30, 30, 30, 30,
30, 30, 25, 25, 20, 15, 15, 10,
30, 25, 25, 20, 15, 10, 10, 10,
30, 25, 25, 20, 15, 10, 10, 10
};
#endif
static u8 DROPING_NECESSARY[RATESIZE] = {1, 1, 1, 1,
1, 2, 3, 4, 5, 6, 7, 8,
1, 2, 3, 4, 5, 6, 7, 8,
@ -630,34 +608,9 @@ odm_ra_info_init(
)
{
struct _odm_ra_info_ *p_ra_info = &p_dm_odm->ra_info[mac_id];
#if 0
u8 wireless_mode = 0xFF; /* invalid value */
u8 max_rate_idx = 0x13; /* MCS7 */
if (p_dm_odm->p_wireless_mode != NULL)
wireless_mode = *(p_dm_odm->p_wireless_mode);
if (wireless_mode != 0xFF) {
if (wireless_mode & ODM_WM_N24G)
max_rate_idx = 0x13;
else if (wireless_mode & ODM_WM_G)
max_rate_idx = 0x0b;
else if (wireless_mode & ODM_WM_B)
max_rate_idx = 0x03;
}
/* printk("%s ==>wireless_mode:0x%08x,max_raid_idx:0x%02x\n ",__func__,wireless_mode,max_rate_idx); */
ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("odm_ra_info_init(): wireless_mode:0x%08x,max_raid_idx:0x%02x\n",
wireless_mode, max_rate_idx));
p_ra_info->decision_rate = max_rate_idx;
p_ra_info->pre_rate = max_rate_idx;
p_ra_info->highest_rate = max_rate_idx;
#else
p_ra_info->decision_rate = 0x13;
p_ra_info->pre_rate = 0x13;
p_ra_info->highest_rate = 0x13;
#endif
p_ra_info->lowest_rate = 0;
p_ra_info->rate_id = 0;
p_ra_info->rate_mask = 0xffffffff;

View file

@ -313,11 +313,6 @@ odm_update_rx_idle_ant(
value16 |= ((u16)optional_ant << 6);
value16 |= ((u16)default_ant << 9);
odm_write_2byte(p_dm_odm, ODM_REG_TRMUX_11AC + 2, value16);
#if 0
odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(21) | BIT20 | BIT19, default_ant); /* Default RX */
odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(24) | BIT23 | BIT22, optional_ant); /* Optional RX */
odm_set_bb_reg(p_dm_odm, ODM_REG_TRMUX_11AC, BIT(27) | BIT26 | BIT25, default_ant); /* Default TX */
#endif
}
if (p_dm_odm->support_ic_type == ODM_RTL8188E) {
@ -1614,39 +1609,12 @@ odm_fast_ant_training(
if (target_ant_path_a == 0)
odm_ant_div_on_off(p_dm_odm, ANTDIV_OFF);
}
#if 0
#if (RTL8192E_SUPPORT == 1)
/* 3 [path-B]--------------------------- */
if (is_pkt_filter_macth_path_b == false) {
if (p_dm_odm->fat_print_rssi == 1)
ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("***[%d]{path-B}: None Packet is matched\n\n\n", __LINE__));
} else {
if (p_dm_odm->fat_print_rssi == 1) {
ODM_RT_TRACE(p_dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
(" ***target_ant_path_b = (( %d )) *** max_rssi = (( %d ))***\n\n\n", target_ant_path_b, max_rssi_path_b));
}
odm_set_bb_reg(p_dm_odm, 0xB38, BIT(21) | BIT20 | BIT19, target_ant_path_b); /* Default RX is Omni, Optional RX is the best decision by FAT */
odm_set_bb_reg(p_dm_odm, 0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 //from TX Info */
p_dm_fat_table->antsel_pathB[p_dm_fat_table->train_idx] = target_ant_path_b;
}
#endif
#endif
/* 2 Reset counter */
for (i = 0; i < (p_dm_odm->fat_comb_a); i++) {
p_dm_fat_table->ant_sum_rssi[i] = 0;
p_dm_fat_table->ant_rssi_cnt[i] = 0;
}
/*
#if (RTL8192E_SUPPORT == 1)
for(i=0; i<=(p_dm_odm->fat_comb_b); i++)
{
p_dm_fat_table->antSumRSSI_pathB[i] = 0;
p_dm_fat_table->antRSSIcnt_pathB[i] = 0;
}
#endif
*/
p_dm_fat_table->fat_state = FAT_PREPARE_STATE;
return;
@ -3225,11 +3193,6 @@ odm_antenna_diversity_init(
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
#if 0
if (p_dm_odm->mp_mode == true)
return;
#endif
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
odm_ant_div_config(p_dm_odm);
odm_ant_div_init(p_dm_odm);

View file

@ -457,16 +457,8 @@ phydm_bb_debug_info(
u8 rf_gain_path_a, rf_gain_path_b, rf_gain_path_c, rf_gain_path_d;
u8 rx_snr_path_a, rx_snr_path_b, rx_snr_path_c, rx_snr_path_d;
s32 sig_power;
const char *L_rate[8] = {"6M", "9M", "12M", "18M", "24M", "36M", "48M", "54M"};
#if 0
const double evm_comp_20M = 0.579919469776867; /* 10*log10(64.0/56.0) */
const double evm_comp_40M = 0.503051183113957; /* 10*log10(128.0/114.0) */
const double evm_comp_80M = 0.244245993314183; /* 10*log10(256.0/242.0) */
const double evm_comp_160M = 0.244245993314183; /* 10*log10(512.0/484.0) */
#endif
if (p_dm_odm->support_ic_type & ODM_IC_11N_SERIES) {
phydm_bb_debug_info_n_series(p_dm_odm, &used, output, &out_len);
return;
@ -2300,21 +2292,6 @@ phydm_fw_trace_handler_code(
/**/
/*C2H_RA_Dbg_code(F_RA_H2C,1,0, SysMib.ODM.DEBUG.fw_trace_en, mode, macid, 0); //RA MASK*/
}
#if 0
else if (dbg_num == 2) {
if (content_0 == 1) {
ODM_RT_TRACE(p_dm_odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][H2C=0x40] MACID=((%d)), rate ID=((%d)), SGI=((%d)), BW=((%d))\n", content_1, content_2, content_3, content_4));
/**/
} else if (content_0 == 2) {
ODM_RT_TRACE(p_dm_odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][H2C=0x40] VHT_en=((%d)), Disable_PowerTraining=((%d)), Disable_RA=((%d)), No_Update=((%d))\n", content_1, content_2, content_3, content_4));
/**/
} else if (content_0 == 3) {
ODM_RT_TRACE(p_dm_odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW][H2C=0x40] RA_MSK=[%x | %x | %x | %x ]\n", content_1, content_2, content_3, content_4));
/**/
}
}
#endif
}
}
/*--------------------------------------------*/
@ -2359,11 +2336,6 @@ phydm_fw_trace_handler_8051(
{
#if CONFIG_PHYDM_DEBUG_FUNCTION
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
#if 0
if (cmd_len >= 3)
cmd_buf[cmd_len - 1] = '\0';
ODM_RT_TRACE(p_dm_odm, ODM_FW_DEBUG_TRACE, ODM_DBG_LOUD, ("[FW DBG Msg] %s\n", &(cmd_buf[3])));
#else
int i = 0;
u8 extend_c2h_sub_id = 0, extend_c2h_dbg_len = 0, extend_c2h_dbg_seq = 0;
@ -2397,6 +2369,5 @@ go_backfor_aggre_dbg_pkt:
}
#endif
#endif /*#if CONFIG_PHYDM_DEBUG_FUNCTION*/
}

View file

@ -39,20 +39,14 @@
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
/* _cat: implemented by Token-Pasting Operator. */
#if 0
#define _cat(_name, _ic_type, _func) \
(\
_func##_all(_name) \
)
#endif
/* _cat: implemented by Token-Passing Operator. */
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG,_pdm_odm)
ODM_REG(DIG, _pdm_odm)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N

View file

@ -219,19 +219,7 @@ odm_ra_para_adjust_init(
u8 ra_para_pool_u8[3] = { RADBG_RTY_PENALTY, RADBG_RATE_UP_RTY_RATIO, RADBG_RATE_DOWN_RTY_RATIO};
u8 rate_size_ht_1ss = 20, rate_size_ht_2ss = 28, rate_size_ht_3ss = 36; /*4+8+8+8+8 =36*/
u8 rate_size_vht_1ss = 10, rate_size_vht_2ss = 20, rate_size_vht_3ss = 30; /*10 + 10 +10 =30*/
#if 0
/* RTY_PENALTY = 1, u8 */
/* N_HIGH = 2, */
/* N_LOW = 3, */
/* RATE_UP_TABLE = 4, */
/* RATE_DOWN_TABLE = 5, */
/* TRYING_NECESSARY = 6, */
/* DROPING_NECESSARY = 7, */
/* RATE_UP_RTY_RATIO = 8, u8 */
/* RATE_DOWN_RTY_RATIO= 9, u8 */
/* ALL_PARA = 0xff */
#endif
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("odm_ra_para_adjust_init\n"));
if (p_dm_odm->support_ic_type & (ODM_RTL8188F | ODM_RTL8195A | ODM_RTL8703B | ODM_RTL8723B | ODM_RTL8188E | ODM_RTL8723D))

View file

@ -288,89 +288,6 @@ static struct _RT_CHANNEL_PLAN_MAXPWR chnl_plan_pwr_max_2g[] = {
/* ...... */
};
#if 0
/* ===========================================1:(2G_WORLD, 5G_NULL) */
struct _RT_CHANNEL_PLAN_MAXPWR RT_DOMAIN_01 = {{{01, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
/* ===========================================2:(2G_ETSI1, 5G_NULL) */
RT_DOMAIN_02 = {{{01, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
/* ===========================================3:(2G_FCC1, 5G_NULL) */
RT_DOMAIN_03 = {{{01, 11, 30}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
/* ===========================================4:(2G_MKK1, 5G_NULL) */
RT_DOMAIN_04 = {{{01, 14, 23}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
/* ===========================================5:(2G_ETSI2, 5G_NULL) */
RT_DOMAIN_05 = {{{10, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}}, 1}
/* ===========================================6:(2G_FCC1, 5G_FCC1) */
RT_DOMAIN_06 = {{{01, 13, 30}, {36, 48, 17}, {52, 64, 24}, {100, 140, 24}, {149, 165, 30}}, 5}
/* ===========================================7:(2G_WORLD, 5G_ETSI1) */
RT_DOMAIN_07 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 140, 30}, {NR, NR, 0}}, 4}
/* ===========================================8:(2G_MKK1, 5G_MKK1) */
RT_DOMAIN_08 = {{{01, 14, 23}, {36, 48, 23}, {52, 64, 23}, {100, 140, 23}, {NR, NR, 0}}, 4}
/* ===========================================9:(2G_WORLD, 5G_KCC1) */
RT_DOMAIN_09 = {{{01, 13, 20}, {36, 48, 17}, {52, 64, 23}, {100, 124, 23}, {149, 165, 23}}, 5}
/* ===========================================10:(2G_WORLD, 5G_FCC2) */
RT_DOMAIN_10 = {{{01, 13, 20}, {36, 48, 17}, {NR, NR, 0}, {NR, NR, 0}, {149, 165, 30}}, 3}
/* ===========================================11:(2G_WORLD, 5G_FCC3) */
RT_DOMAIN_11 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {NR, NR, 0}, {149, 165, 23}}, 4}
/* ===========================================12:(2G_WORLD, 5G_FCC4) */
RT_DOMAIN_12 = {{{01, 13, 20}, {36, 48, 24}, {52, 64, 24}, {NR, NR, 0}, {149, 161, 27}}, 4}
/* ===========================================13:(2G_WORLD, 5G_FCC5) */
RT_DOMAIN_13 = {{{01, 13, 20}, {NR, NR, 0}, {NR, NR, 0}, {NR, NR, 0}, {149, 165, 27}}, 2}
/* ===========================================14:(2G_WORLD, 5G_FCC6) */
RT_DOMAIN_14 = {{{01, 13, 20}, {36, 48, 17}, {52, 64, 17}, {NR, NR, 0}, {NR, NR, 0}}, 3}
/* ===========================================15:(2G_FCC1, 5G_FCC7) */
RT_DOMAIN_15 = {{{01, 11, 30}, {36, 48, 23}, {52, 64, 24}, {100, 140, 24}, {149, 165, 30}}, 5}
/* ===========================================16:(2G_WORLD, 5G_ETSI2) */
RT_DOMAIN_16 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 140, 30}, {149, 165, 30}}, 5}
/* ===========================================17:(2G_WORLD, 5G_ETSI3) */
RT_DOMAIN_17 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 132, 30}, {149, 165, 20}}, 5}
/* ===========================================18:(2G_MKK1, 5G_MKK2) */
RT_DOMAIN_18 = {{{01, 14, 23}, {36, 48, 23}, {52, 64, 23}, {NR, NR, 0}, {NR, NR, 0}}, 3}
/* ===========================================19:(2G_MKK1, 5G_MKK3) */
RT_DOMAIN_19 = {{{01, 14, 23}, {NR, NR, 0}, {NR, NR, 0}, {100, 140, 23}, {NR, NR, 0}}, 2}
/* ===========================================20:(2G_FCC1, 5G_NCC1) */
RT_DOMAIN_20 = {{{01, 11, 30}, {NR, NR, 0}, {56, 64, 23}, {100, 140, 24}, {149, 165, 30}}, 4}
/* ===========================================21:(2G_FCC1, 5G_NCC2) */
RT_DOMAIN_21 = {{{01, 11, 30}, {NR, NR, 0}, {56, 64, 23}, {NR, NR, 0}, {149, 165, 30}}, 3}
/* ===========================================22:(2G_WORLD, 5G_FCC3) */
RT_DOMAIN_22 = {{{01, 13, 24}, {36, 48, 20}, {52, 64, 24}, {NR, NR, 0}, {149, 165, 30}}, 4}
/* ===========================================23:(2G_WORLD, 5G_ETSI2) */
RT_DOMAIN_23 = {{{01, 13, 20}, {36, 48, 23}, {52, 64, 23}, {100, 140, 30}, {149, 165, 30}}, 5}
#endif
/*
* counter & Realtek channel plan transfer table.
* */
@ -383,93 +300,4 @@ struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE rt_ctry_chnl_tbl[] = {
RT_5G_WORLD,
RT_CHANNEL_DOMAIN_UNDEFINED /* 2G/5G world. */
},
#if 0
{
RT_CTRY_BB, /* "Barbados巴巴多斯" */
"BB",
RT_2G_WORLD,
RT_5G_NULL,
RT_CHANNEL_DOMAIN_EFUSE_0x20 /* 2G world. 5G_NULL */
},
{
RT_CTRY_DE, /* "Germany德國" */
"DE",
RT_2G_WORLD,
RT_5G_ETSI1,
RT_CHANNEL_DOMAIN_EFUSE_0x26
},
{
RT_CTRY_US, /* "Germany德國" */
"US",
RT_2G_FCC1,
RT_5G_FCC7,
RT_CHANNEL_DOMAIN_EFUSE_0x34
},
{
RT_CTRY_JP, /* "Germany德國" */
"JP",
RT_2G_MKK1,
RT_5G_MKK1,
RT_CHANNEL_DOMAIN_EFUSE_0x34
},
{
RT_CTRY_TW, /* "Germany德國" */
"TW",
RT_2G_FCC1,
RT_5G_NCC1,
RT_CHANNEL_DOMAIN_EFUSE_0x39
},
#endif
}; /* rt_ctry_chnl_tbl */
/*
* Realtek Defined channel plan.
* */
#if 0
static struct _RT_CHANNEL_PLAN_NEW rt_chnl_plan[] = {
/* channel Plan 0x20. */
{
&rt_ctry_chnl_tbl[1], /* struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE Country & channel plan transfer table. */
RT_CHANNEL_DOMAIN_EFUSE_0x20, /* RT_CHANNEL_DOMAIN RT channel Plan Define */
RT_2G_WORLD, /* enum rt_regulation_2g */
RT_5G_NULL, /* enum rt_regulation_5g */
RT_WORLD, /* enum rt_regulation_cmn RT Regulatory domain definition. */
RT_SREQ_NA, /* RT channel plan special & customerize requirement. */
CHNL_RT_2G_WORLD,
CHNL_RT_2G_WORLD_SCAN_TYPE,
&chnl_plan_pwr_max_2g[0],
CHNL_RT_5G_NULL,
CHNL_RT_5G_NULL_SCAN_TYPE,
},
/* channel Plan 0x26. */
{
&rt_ctry_chnl_tbl[1], /* struct _RT_CHANNEL_PLAN_COUNTRY_TRANSFER_TABLE Country & channel plan transfer table. */
RT_CHANNEL_DOMAIN_EFUSE_0x26, /* RT_CHANNEL_DOMAIN RT channel Plan Define */
RT_2G_WORLD, /* enum rt_regulation_2g */
RT_5G_ETSI1, /* enum rt_regulation_5g */
RT_WORLD, /* enum rt_regulation_cmn RT Regulatory domain definition. */
RT_SREQ_NA, /* RT channel plan special & customerize requirement. */
CHNL_RT_2G_WORLD, /* 2G workd cannel */
CHNL_RT_2G_WORLD_SCAN_TYPE,
&chnl_plan_pwr_max_2g[1],
CHNL_RT_5G_ETSI1,
CHNL_RT_5G_ETSI1_SCAN_TYPE,
}
};
#endif

View file

@ -43,57 +43,6 @@ enum rt_channel_domain_new {
};
#if 0
#define DOMAIN_CODE_2G_WORLD \
{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
#define DOMAIN_CODE_2G_ETSI1 \
{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13
#define DOMAIN_CODE_2G_ETSI2 \
{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11}, 11
#define DOMAIN_CODE_2G_FCC1 \
{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14
#define DOMAIN_CODE_2G_MKK1 \
{10, 11, 12, 13}, 4
#define DOMAIN_CODE_5G_ETSI1 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
#define DOMAIN_CODE_5G_ETSI2 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
#define DOMAIN_CODE_5G_ETSI3 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165}, 22
#define DOMAIN_CODE_5G_FCC1 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 24
#define DOMAIN_CODE_5G_FCC2 \
{36, 40, 44, 48, 149, 153, 157, 161, 165}, 9
#define DOMAIN_CODE_5G_FCC3 \
{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 13
#define DOMAIN_CODE_5G_FCC4 \
{36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161}, 12
#define DOMAIN_CODE_5G_FCC5 \
{149, 153, 157, 161, 165}, 5
#define DOMAIN_CODE_5G_FCC6 \
{36, 40, 44, 48, 52, 56, 60, 64}, 8
#define DOMAIN_CODE_5G_FCC7 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
#define DOMAIN_CODE_5G_IC1 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 20
#define DOMAIN_CODE_5G_KCC1 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 20
#define DOMAIN_CODE_5G_MKK1 \
{36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 19
#define DOMAIN_CODE_5G_MKK2 \
{36, 40, 44, 48, 52, 56, 60, 64}, 8
#define DOMAIN_CODE_5G_MKK3 \
{100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 11
#define DOMAIN_CODE_5G_NCC1 \
{56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 24
#define DOMAIN_CODE_5G_NCC2 \
{56, 60, 64, 149, 153, 157, 161, 165}, 8
#define UNDEFINED \
{0}, 0
#endif
/*
*
*

View file

@ -166,20 +166,7 @@ static u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf)
return H2C_SUCCESS;
}
#if 0
#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED)
u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter , u8 bfwpoll, u16 period)
{
u8 res = _SUCCESS;
struct H2C_SS_RFOFF_PARAM param;
RTW_INFO("==>%s bfwpoll(%x)\n", __func__, bfwpoll);
param.gpio_period = period;/* Polling GPIO_11 period time */
param.ROFOn = (_TRUE == bfwpoll) ? 1 : 0;
FillH2CCmd_88E(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8 *)(&param));
return res;
}
#endif /* CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED */
#endif
u8 rtl8188e_set_rssi_cmd(_adapter *padapter, u8 *param)
{
u8 res = _SUCCESS;

View file

@ -42,23 +42,6 @@ dm_CheckProtection(
IN PADAPTER Adapter
)
{
#if 0
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
u1Byte CurRate, RateThreshold;
if (pMgntInfo->pHTInfo->bCurBW40MHz)
RateThreshold = MGN_MCS1;
else
RateThreshold = MGN_MCS3;
if (Adapter->TxStats.CurrentInitTxRate <= RateThreshold) {
pMgntInfo->bDmDisableProtect = TRUE;
dbg_print("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
} else {
pMgntInfo->bDmDisableProtect = FALSE;
dbg_print("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate);
}
#endif
}
static VOID
@ -66,20 +49,6 @@ dm_CheckStatistics(
IN PADAPTER Adapter
)
{
#if 0
if (!Adapter->MgntInfo.bMediaConnect)
return;
/* 2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. */
rtw_hal_get_hwreg(Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate));
/* Calculate current Tx Rate(Successful transmited!!) */
/* Calculate current Rx Rate(Successful received!!) */
/* for tx tx retry count */
rtw_hal_get_hwreg(Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount));
#endif
}
#ifdef CONFIG_SUPPORT_HW_WPS_PBC

View file

@ -300,23 +300,7 @@ static void efuse_read_phymap_from_txpktbuf(
lo32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_L);
hi32 = rtw_read32(adapter, REG_PKTBUF_DBG_DATA_H);
#if 0
RTW_INFO("%s lo32:0x%08x, %02x %02x %02x %02x\n", __func__, lo32
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L)
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L + 1)
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L + 2)
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_L + 3)
);
RTW_INFO("%s hi32:0x%08x, %02x %02x %02x %02x\n", __func__, hi32
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H)
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H + 1)
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H + 2)
, rtw_read8(adapter, REG_PKTBUF_DBG_DATA_H + 3)
);
#endif
if (i == 0) {
#if 1 /* for debug */
u8 lenc[2];
u16 lenbak, aaabak;
u16 aaa;
@ -326,7 +310,6 @@ static void efuse_read_phymap_from_txpktbuf(
aaabak = le16_to_cpup((__le16 *)lenc);
lenbak = le16_to_cpu(*((__le16 *)lenc));
aaa = le16_to_cpup((__le16 *)&lo32);
#endif
len = le16_to_cpu(*((__le16 *)&lo32));
limit = (len - 2 < limit) ? len - 2 : limit;
@ -383,34 +366,13 @@ static s32 iol_read_efuse(
rtw_write8(padapter, REG_TDECTRL + 1, txpktbuf_bndy);
_rtw_memset(physical_map, 0xFF, 512);
/* /reg_0x106 = rtw_read8(padapter, REG_PKT_BUFF_ACCESS_CTRL); */
/* RTW_INFO("%s reg_0x106:0x%02x, write 0x%02x\n", __func__, reg_0x106, 0x69); */
rtw_write8(padapter, REG_PKT_BUFF_ACCESS_CTRL, TXPKT_BUF_SELECT);
/* RTW_INFO("%s reg_0x106:0x%02x\n", __func__, rtw_read8(padapter, 0x106)); */
status = iol_execute(padapter, CMD_READ_EFUSE_MAP);
if (status == _SUCCESS)
efuse_read_phymap_from_txpktbuf(padapter, txpktbuf_bndy, physical_map, &size);
#if 0
RTW_PRINT("%s physical map\n", __func__);
for (i = 0; i < size; i++) {
if (i % 16 == 0)
RTW_PRINT("%02x", physical_map[i]);
else
_RTW_PRINT("%02x", physical_map[i]);
if (i % 16 == 7)
_RTW_PRINT(" ");
else if (i % 16 == 15)
_RTW_PRINT("\n");
else
_RTW_PRINT(" ");
}
_RTW_PRINT("\n");
#endif
efuse_phymap_to_logical(physical_map, offset, size_byte, logical_map);
return status;
@ -1041,14 +1003,6 @@ hal_EfusePowerSwitch_RTL8188E(
if (PwrState == _TRUE) {
rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
#if 0
/* 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
tmpV16 = rtw_read16(pAdapter, REG_SYS_ISO_CTRL);
if (!(tmpV16 & PWC_EV12V)) {
tmpV16 |= PWC_EV12V ;
rtw_write16(pAdapter, REG_SYS_ISO_CTRL, tmpV16);
}
#endif
/* Reset: 0x0000h[28], default valid */
tmpV16 = rtw_read16(pAdapter, REG_SYS_FUNC_EN);
if (!(tmpV16 & FEN_ELDR)) {
@ -2874,15 +2828,6 @@ Hal_ReadPAType_8188E(
pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
}
#if 0
if (GetRegAmplifierType5G(Adapter) == 0) { /* AUTO */
pHalData->external_pa_5g = ((pHalData->PAType_5G & BIT1) && (pHalData->PAType_5G & BIT0)) ? 1 : 0;
pHalData->external_lna_5g = ((pHalData->LNAType_5G & BIT7) && (pHalData->LNAType_5G & BIT3)) ? 1 : 0; /* 5G only now. */
} else {
pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
}
#endif
} else {
pHalData->ExternalPA_2G = EEPROM_Default_PAType;
pHalData->external_pa_5g = EEPROM_Default_PAType;
@ -2897,16 +2842,6 @@ Hal_ReadPAType_8188E(
pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
}
#if 0
if (GetRegAmplifierType5G(Adapter) == 0) {
/* AUTO */
pHalData->external_pa_5g = 0;
pHalData->external_lna_5g = 0;
} else {
pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
}
#endif
}
RTW_INFO("pHalData->ExternalPA_2G = %d , pHalData->ExternalLNA_2G = %d\n", pHalData->ExternalPA_2G, pHalData->ExternalLNA_2G);
}
@ -3273,14 +3208,6 @@ static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val)
/* Append FCS */
rcr_bits |= RCR_APPFCS;
#if 0
/*
CRC and ICV packet will drop in recvbuf2recvframe()
We no turn on it.
*/
rcr_bits |= (RCR_ACRC32 | RCR_AICV);
#endif
/* Receive all data frames */
value_rxfltmap2 = 0xFFFF;
@ -3288,15 +3215,9 @@ static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val)
rtw_write32(Adapter, REG_RCR, value_rcr);
rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2);
#if 0
/* tx pause */
rtw_write8(padapter, REG_TXPAUSE, 0xFF);
#endif
} else {
/* do nothing */
}
}
static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8 *val)

View file

@ -210,25 +210,6 @@ SIC_SetBBReg(
u32 OriginalValue, BitShift;
u16 BBWaitCounter = 0;
/* RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() start\n")); */
#if 0
while (PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) {
BBWaitCounter++;
delay_ms(10); /* 1 ms */
if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) {
/* Wait too long, return FALSE to avoid to be stuck here. */
RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), Fail to set BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter));
return;
}
}
#endif
/* */
/* Critical section start */
/* */
/* RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg(), mask=0x%x, addr[0x%x]=0x%x\n", BitMask, RegAddr, Data)); */
if (BitMask != bMaskDWord) { /* if not "double word" write */
OriginalValue = sic_Read4Byte(Adapter, RegAddr);
/* BitShift = sic_CalculateBitShift(BitMask); */
@ -237,9 +218,6 @@ SIC_SetBBReg(
}
sic_Write4Byte(Adapter, RegAddr, Data);
/* PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); */
/* RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_SetBBReg() end\n")); */
}
static u32
@ -253,29 +231,10 @@ SIC_QueryBBReg(
u32 ReturnValue = 0, OriginalValue, BitShift;
u16 BBWaitCounter = 0;
/* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() start\n")); */
#if 0
while (PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _TRUE) == _TRUE) {
BBWaitCounter++;
delay_ms(10); /* 10 ms */
if ((BBWaitCounter > 100) || RT_CANNOT_IO(Adapter)) {
/* Wait too long, return FALSE to avoid to be stuck here. */
RTPRINT(FPHY, PHY_SICW, ("[SIC], SIC_QueryBBReg(), Fail to query BB offset(%#x)!!, WaitCnt(%d)\n", RegAddr, BBWaitCounter));
return ReturnValue;
}
}
#endif
OriginalValue = sic_Read4Byte(Adapter, RegAddr);
/* BitShift = sic_CalculateBitShift(BitMask); */
BitShift = PHY_CalculateBitShift(BitMask);
ReturnValue = (OriginalValue & BitMask) >> BitShift;
/* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg(), 0x%x=0x%x\n", RegAddr, OriginalValue)); */
/* RTPRINT(FPHY, PHY_SICR, ("[SIC], SIC_QueryBBReg() end\n")); */
/* PlatformAtomicExchange(&pHalData->bChangeBBInProgress, _FALSE); */
return ReturnValue;
}
@ -450,20 +409,10 @@ phy_RFSerialRead(
u8 RfPiEnable = 0;
_enter_critical_mutex(&(adapter_to_dvobj(Adapter)->rf_read_reg_mutex) , NULL);
#if 0
if (pHalData->RFChipID == RF_8225 && Offset > 0x24) /* 36 valid regs */
return retValue;
if (pHalData->RFChipID == RF_8256 && Offset > 0x2D) /* 45 valid regs */
return retValue;
#endif
/* */
/* Make sure RF register offset is correct */
/* */
Offset &= 0xff;
/* */
/* Switch page for 8256 RF IC */
/* */
NewOffset = Offset;
/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
@ -571,48 +520,18 @@ phy_RFSerialWrite(
BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath];
u32 NewOffset;
#if 0
/* <Roger_TODO> We should check valid regs for RF_6052 case. */
if (pHalData->RFChipID == RF_8225 && Offset > 0x24) /* 36 valid regs */
return;
if (pHalData->RFChipID == RF_8256 && Offset > 0x2D) /* 45 valid regs */
return;
#endif
/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
/* if(RT_CANNOT_IO(Adapter)) */
/* { */
/* RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); */
/* return; */
/* } */
Offset &= 0xff;
/* */
/* Shadow Update */
/* */
/* PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); */
/* */
/* Switch page for 8256 RF IC */
/* */
NewOffset = Offset;
/* */
/* Put write addr in [5:0] and write data in [31:16] */
/* */
/* DataAndAddr = (Data<<16) | (NewOffset&0x3f); */
DataAndAddr = ((NewOffset << 20) | (Data & 0x000fffff)) & 0x0fffffff; /* T65 RF */
/* */
/* Write Operation */
/* */
phy_set_bb_reg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
/* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */
}
/**
* Function: PHY_QueryRFReg
*
@ -806,9 +725,6 @@ phy_InitBBRFRegisterDefinition(
/* Tranceiver LSSI Readback PI mode */
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
/* pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; */
/* pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; */
}
static void
@ -816,16 +732,6 @@ phy_BB8192C_Config_1T(
IN PADAPTER Adapter
)
{
#if 0
/* for path - A */
phy_set_bb_reg(Adapter, rFPGA0_TxInfo, 0x3, 0x1);
phy_set_bb_reg(Adapter, rFPGA1_TxInfo, 0x0303, 0x0101);
phy_set_bb_reg(Adapter, 0xe74, 0x0c000000, 0x1);
phy_set_bb_reg(Adapter, 0xe78, 0x0c000000, 0x1);
phy_set_bb_reg(Adapter, 0xe7c, 0x0c000000, 0x1);
phy_set_bb_reg(Adapter, 0xe80, 0x0c000000, 0x1);
phy_set_bb_reg(Adapter, 0xe88, 0x0c000000, 0x1);
#endif
/* for path - B */
phy_set_bb_reg(Adapter, rFPGA0_TxInfo, 0x3, 0x2);
phy_set_bb_reg(Adapter, rFPGA1_TxInfo, 0x300033, 0x200022);
@ -1046,16 +952,6 @@ PHY_GetTxPowerLevel8188E(
OUT s32 *powerlevel
)
{
#if 0
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
s4Byte TxPwrDbm = 13;
if (pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM)
*powerlevel = pMgntInfo->ClientConfigPwrInDbm;
else
*powerlevel = TxPwrDbm;
#endif
}
/*-----------------------------------------------------------------------------
@ -1393,27 +1289,6 @@ PHY_ScanOperationBackup8188E(
IN u8 Operation
)
{
#if 0
IO_TYPE IoType;
if (!rtw_is_drv_stopped(padapter)) {
switch (Operation) {
case SCAN_OPT_BACKUP:
IoType = IO_CMD_PAUSE_DM_BY_SCAN;
rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (pu1Byte)&IoType);
break;
case SCAN_OPT_RESTORE:
IoType = IO_CMD_RESUME_DM_BY_SCAN;
rtw_hal_set_hwreg(Adapter, HW_VAR_IO_CMD, (pu1Byte)&IoType);
break;
default:
break;
}
}
#endif
}
static void
@ -1424,7 +1299,6 @@ phy_SpurCalibration_8188E(
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct PHY_DM_STRUCT *p_dm_odm = &(pHalData->odmpriv);
/* DbgPrint("===> phy_SpurCalibration_8188E current_channel_bw = %d, current_channel = %d\n", pHalData->current_channel_bw, pHalData->current_channel);*/
if (pHalData->current_channel_bw == CHANNEL_WIDTH_20 && (pHalData->current_channel == 13 || pHalData->current_channel == 14)) {
phy_set_bb_reg(Adapter, rOFDM0_RxDSP, BIT(9), 0x1);/* enable notch filter */
phy_set_bb_reg(Adapter, rOFDM1_IntfDet, BIT(8) | BIT(7) | BIT(6), 0x2); /* intf_TH */
@ -1591,23 +1465,6 @@ _PHY_SetBWMode88E(
}
#if 0
/* -----------------------------------------------------------------------------
* * Function: SetBWMode8190Pci()
* *
* * Overview: This function is export to "HalCommon" moudule
* *
* * Input: PADAPTER Adapter
* * CHANNEL_WIDTH Bandwidth 20M or 40M
* *
* * Output: NONE
* *
* * Return: NONE
* *
* * Note: We do not take j mode into consideration now
* *--------------------------------------------------------------------------- */
#endif
void
PHY_SetBWMode8188E(
IN PADAPTER Adapter,
@ -1642,16 +1499,7 @@ PHY_SetBWMode8188E(
pHalData->current_channel_bw = Bandwidth;
#if 0
if (Offset == EXTCHNL_OFFSET_LOWER)
pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER;
else if (Offset == EXTCHNL_OFFSET_UPPER)
pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER;
else
pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
#else
pHalData->nCur40MhzPrimeSC = Offset;
#endif
if (!RTW_CANNOT_RUN(Adapter)) {
_PHY_SetBWMode88E(Adapter);

View file

@ -79,50 +79,8 @@ void rtl8188e_RF_ChangeTxPath(IN PADAPTER Adapter,
IN u16 DataRate)
{
/* We do not support gain table change inACUT now !!!! Delete later !!! */
#if 0/* (RTL92SE_FPGA_VERIFY == 0) */
static u1Byte RF_Path_Type = 2; /* 1 = 1T 2= 2T */
static u4Byte tx_gain_tbl1[6]
= {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100};
static u4Byte tx_gain_tbl2[6]
= {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030};
u1Byte i;
if (RF_Path_Type == 2 && (DataRate & 0xF) <= 0x7) {
/* Set TX SYNC power G2G3 loop filter */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x0f000);
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1);
/* Change TX AGC gain table */
for (i = 0; i < 6; i++)
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]);
/* Set PA to high value */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x01e39);
} else if (RF_Path_Type == 1 && (DataRate & 0xF) >= 0x8) {
/* Set TX SYNC power G2G3 loop filter */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x04440);
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1);
/* Change TX AGC gain table */
for (i = 0; i < 6; i++)
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]);
/* Set PA low gain */
phy_set_rf_reg(Adapter, RF_PATH_A,
RF_TXPA_G2, bRFRegOffsetMask, 0x01e19);
}
#endif
} /* RF_ChangeTxPath */
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetBandwidth()
*
@ -297,29 +255,7 @@ PHY_RF6052_Config8188E(
/* Config BB and RF */
/* */
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
#if 0
switch (Adapter->MgntInfo.bRegHwParaFile) {
case 0:
phy_RF6052_Config_HardCode(Adapter);
break;
case 1:
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
break;
case 2:
/* Partial Modify. */
phy_RF6052_Config_HardCode(Adapter);
phy_RF6052_Config_ParaFile(Adapter);
break;
default:
phy_RF6052_Config_HardCode(Adapter);
break;
}
#endif
return rtStatus;
}
/* End of HalRf6052.c */

View file

@ -91,22 +91,6 @@ void rtl8188e_sreset_linked_status_check(_adapter *padapter)
else if (fw_status == 2)
RTW_INFO("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status);
}
#if 0
u32 regc50, regc58, reg824, reg800;
regc50 = rtw_read32(padapter, 0xc50);
regc58 = rtw_read32(padapter, 0xc58);
reg824 = rtw_read32(padapter, 0x824);
reg800 = rtw_read32(padapter, 0x800);
if (((regc50 & 0xFFFFFF00) != 0x69543400) ||
((regc58 & 0xFFFFFF00) != 0x69543400) ||
(((reg824 & 0xFFFFFF00) != 0x00390000) && (((reg824 & 0xFFFFFF00) != 0x80390000))) ||
(((reg800 & 0xFFFFFF00) != 0x03040000) && ((reg800 & 0xFFFFFF00) != 0x83040000))) {
RTW_INFO("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __func__,
regc50, regc58, reg824, reg800);
rtw_hal_sreset_reset(padapter);
}
#endif
if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) {
psrtpriv->dbg_trigger_point = SRESET_TGP_NULL;
rtw_hal_sreset_reset(padapter);

View file

@ -38,21 +38,6 @@ void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf)
_rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
_rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
#if 0 /* DBG */
{
u32 hisr = 0 , hisr_ex = 0;
_rtw_memcpy(&hisr, &(pHalData->IntArray[0]), 4);
hisr = le32_to_cpu(hisr);
_rtw_memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4);
hisr_ex = le32_to_cpu(hisr_ex);
if ((hisr != 0) || (hisr_ex != 0))
RTW_INFO("===> %s hisr:0x%08x ,hisr_ex:0x%08x\n", __func__, hisr, hisr_ex);
}
#endif
#ifdef CONFIG_LPS_LCLK
if (pHalData->IntArray[0] & IMR_CPWM_88E) {
_rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1);
@ -73,15 +58,6 @@ void interrupt_handler_8188eu(_adapter *padapter, u16 pkt_len, u8 *pbuf)
if (pHalData->IntArray[0] & (IMR_TBDER_88E | IMR_TBDOK_88E))
#endif
{
#if 0
if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E)
RTW_INFO("%s: HISR_BCNERLY_INT\n", __func__);
if (pHalData->IntArray[0] & IMR_TBDOK_88E)
RTW_INFO("%s: HISR_TXBCNOK\n", __func__);
if (pHalData->IntArray[0] & IMR_TBDER_88E)
RTW_INFO("%s: HISR_TXBCNERR\n", __func__);
#endif
rtw_mi_set_tx_beacon_cmd(padapter);
}
#endif /* CONFIG_INTERRUPT_BASED_TXBCN */
@ -137,13 +113,7 @@ int recvbuf2recvframe(PADAPTER padapter, void *ptr)
prxstat = (struct recv_stat *)pbuf;
pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff;
#if 0 /* temp remove when disable usb rx aggregation */
if ((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_len < RXDESC_SIZE) || (pkt_len <= 0))
return _FAIL;
#endif
do {
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);