mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-06-23 08:34:20 +00:00
rtl8188eu: Convert C90 comments to kernel form for hal/*.c
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
e5113c831c
commit
fe06a8b006
30 changed files with 4334 additions and 6166 deletions
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@ -212,7 +212,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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PADAPTER Adapter = pDM_Odm->Adapter;
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struct xmit_frame *pxmit_frame;
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u8 bndy_cnt=1;
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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HAL_STATUS rst =HAL_STATUS_SUCCESS;
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hex += board;
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@ -228,14 +228,14 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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return HAL_STATUS_FAILURE;
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}
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}
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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for (i = 0; i < ArrayLen; i += 2 )
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{
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u4Byte v1 = Array[i];
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u4Byte v2 = Array[i+1];
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// This (offset, data) pair meets the condition.
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/* This (offset, data) pair meets the condition. */
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if ( v1 < 0xCDCDCDCD )
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{
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#ifdef CONFIG_IOL_IOREG_CFG
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@ -245,16 +245,16 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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continue;
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}
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else
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{ // This line is the start line of branch.
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{ /* This line is the start line of branch. */
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if ( !CheckCondition(Array[i], hex) )
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{ // Discard the following (offset, data) pairs.
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{ /* Discard the following (offset, data) pairs. */
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READ_NEXT_PAIR(v1, v2, i);
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while ( v2 != 0xDEAD &&
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v2 != 0xCDEF &&
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@ -262,9 +262,9 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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{
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READ_NEXT_PAIR(v1, v2, i);
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}
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i -= 2; // prevent from for-loop += 2
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i -= 2; /* prevent from for-loop += 2 */
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}
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else // Configure matched pairs and skip to end of if-else.
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else /* Configure matched pairs and skip to end of if-else. */
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{
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READ_NEXT_PAIR(v1, v2, i);
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while ( v2 != 0xDEAD &&
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@ -278,7 +278,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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rtw_IOL_append_WD_cmd(pxmit_frame,(u2Byte)v1, v2,bMaskDWord);
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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@ -295,31 +295,30 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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}
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#ifdef CONFIG_IOL_IOREG_CFG
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if (biol){
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//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
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if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
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{
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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printk("~~~ %s Success !!!\n",__func__);
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{
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//dump data from TX packet buffer
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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}
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else{
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printk("~~~ %s IOL_exec_cmds Failed !!!\n",__func__);
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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{
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//dump data from TX packet buffer
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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rst = HAL_STATUS_FAILURE;
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}
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}
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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return rst;
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}
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@ -547,7 +546,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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struct cmd_cmp cmpdata[ArrayLen];
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u4Byte cmpdata_idx=0;
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#endif
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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HAL_STATUS rst =HAL_STATUS_SUCCESS;
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hex += board;
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hex += interfaceValue << 8;
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@ -563,7 +562,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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return HAL_STATUS_FAILURE;
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}
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}
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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for (i = 0; i < ArrayLen; i += 2 )
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{
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@ -571,7 +570,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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u4Byte v2 = Array[i+1];
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// This (offset, data) pair meets the condition.
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/* This (offset, data) pair meets the condition. */
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if ( v1 < 0xCDCDCDCD )
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{
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#ifdef CONFIG_IOL_IOREG_CFG
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@ -611,16 +610,16 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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continue;
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}
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else
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{ // This line is the start line of branch.
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{ /* This line is the start line of branch. */
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if ( !CheckCondition(Array[i], hex) )
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{ // Discard the following (offset, data) pairs.
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{ /* Discard the following (offset, data) pairs. */
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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v2 != 0xCDEF &&
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@ -628,9 +627,9 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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{
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READ_NEXT_PAIR(v1, v2, i);
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}
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i -= 2; // prevent from for-loop += 2
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i -= 2; /* prevent from for-loop += 2 */
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}
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else // Configure matched pairs and skip to end of if-else.
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else /* Configure matched pairs and skip to end of if-else. */
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{
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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@ -672,7 +671,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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@ -689,7 +688,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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#ifdef CONFIG_IOL_IOREG_CFG
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if (biol){
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//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
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/* printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); */
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if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
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{
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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@ -709,27 +708,22 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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}
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printk("### %s data compared !!###\n",__func__);
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//if (rst == HAL_STATUS_FAILURE)
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{//dump data from TX packet buffer
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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}
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else{
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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} else {
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rst = HAL_STATUS_FAILURE;
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printk("~~~ IOL Config %s Failed !!!\n",__func__);
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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{
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//dump data from TX packet buffer
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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}
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}
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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return rst;
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}
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@ -856,19 +850,16 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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u4Byte v2 = Array[i+1];
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u4Byte v3 = Array[i+2];
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// this line is a line of pure_body
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if ( v1 < 0xCDCDCDCD )
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{
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/* this line is a line of pure_body */
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if ( v1 < 0xCDCDCDCD ) {
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odm_ConfigBB_PHY_REG_PG_8188E(pDM_Odm, v1, v2, v3);
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continue;
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}
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else
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{ // this line is the start of branch
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} else { /* this line is the start of branch */
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if ( !CheckCondition(Array[i], hex) )
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{ // don't need the hw_body
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i += 2; // skip the pair of expression
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{ /* don't need the hw_body */
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i += 2; /* skip the pair of expression */
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v1 = Array[i];
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v2 = Array[i+1];
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v3 = Array[i+2];
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@ -885,6 +876,4 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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}
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#endif // end of HWIMG_SUPPORT
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#endif /* end of HWIMG_SUPPORT */
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