skyfall/rtl8188eu
1
0
Fork 0
mirror of https://github.com/lwfinger/rtl8188eu.git synced 2024-11-14 09:09:35 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

rtl8188eu: Simplify Makefile

Browse source 
In addition, unused files are removed.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-11-03 14:51:32 -05:00
parent 22421e29fb
commit fec17178bc
58 changed files with 0 additions and 94528 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

684
Makefile
View file

@ -42,9 +42,6 @@ CONFIG_RTL8723D = n
CONFIG_RTL8821C = n
######################### Interface ###########################
CONFIG_USB_HCI = y
CONFIG_PCI_HCI = n
CONFIG_SDIO_HCI = n
CONFIG_GSPI_HCI = n
########################## Features ###########################
CONFIG_MP_INCLUDED = y
CONFIG_POWER_SAVING = y
@ -157,22 +154,8 @@ endif
export TopDIR ?= $(shell pwd)
########### COMMON #################################
ifeq ($(CONFIG_GSPI_HCI), y)
HCI_NAME = gspi
endif
ifeq ($(CONFIG_SDIO_HCI), y)
HCI_NAME = sdio
endif
ifeq ($(CONFIG_USB_HCI), y)
HCI_NAME = usb
endif
ifeq ($(CONFIG_PCI_HCI), y)
HCI_NAME = pci
endif
_OS_INTFS_FILES := os_dep/osdep_service.o \
os_dep/os_intfs.o \
@ -192,17 +175,6 @@ ifeq ($(CONFIG_MP_INCLUDED), y)
_OS_INTFS_FILES += os_dep/ioctl_mp.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_OS_INTFS_FILES += os_dep/custom_gpio_linux.o
_OS_INTFS_FILES += os_dep/$(HCI_NAME)_ops_linux.o
endif
ifeq ($(CONFIG_GSPI_HCI), y)
_OS_INTFS_FILES += os_dep/custom_gpio_linux.o
_OS_INTFS_FILES += os_dep/$(HCI_NAME)_ops_linux.o
endif
_HAL_INTFS_FILES := hal/hal_intf.o \
hal/hal_com.o \
hal/hal_com_phycfg.o \
@ -248,47 +220,11 @@ EXTRA_CFLAGS += -I$(src)/platform
_PLATFORM_FILES := platform/platform_ops.o
EXTRA_CFLAGS += -I$(src)/hal/btc
_OUTSRC_FILES += hal/btc/halbtc8723bwifionly.o \
hal/btc/halbtc8822bwifionly.o \
hal/btc/halbtc8821cwifionly.o
ifeq ($(CONFIG_BT_COEXIST), y)
_OUTSRC_FILES += hal/btc/halbtc8192e1ant.o \
hal/btc/halbtc8192e2ant.o \
hal/btc/halbtc8723b1ant.o \
hal/btc/halbtc8723b2ant.o \
hal/btc/halbtc8812a1ant.o \
hal/btc/halbtc8812a2ant.o \
hal/btc/halbtc8821a1ant.o \
hal/btc/halbtc8821a2ant.o \
hal/btc/halbtc8703b1ant.o \
hal/btc/halbtc8723d1ant.o \
hal/btc/halbtc8723d2ant.o \
hal/btc/halbtc8822b1ant.o \
hal/btc/halbtc8822b2ant.o \
hal/btc/halbtc8821c1ant.o \
hal/btc/halbtc8821c2ant.o
endif
########### HAL_RTL8188E #################################
ifeq ($(CONFIG_RTL8188E), y)
RTL871X = rtl8188e
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8189es
endif
ifeq ($(CONFIG_GSPI_HCI), y)
MODULE_NAME = 8189es
endif
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8188eu
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8188ee
endif
EXTRA_CFLAGS += -DCONFIG_RTL8188E
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
@ -309,25 +245,9 @@ _HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/rtl$(MODULE_NAME)_xmit.o \
hal/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
ifeq ($(CONFIG_GSPI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
endif
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8188E_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8188E_PCIE.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8188E_SDIO.o
endif
#hal/OUTSRC/Hal8188EFWImg_CE.o
_OUTSRC_FILES += hal/phydm/halhwimg8188e_mac.o\
@ -338,521 +258,21 @@ _OUTSRC_FILES += hal/phydm/halhwimg8188e_mac.o\
hal/phydm/hal8188erateadaptive.o\
hal/phydm/phydm_rtl8188e.o
endif
########### HAL_RTL8192E #################################
ifeq ($(CONFIG_RTL8192E), y)
RTL871X = rtl8192e
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8192es
endif
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8192eu
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8192ee
endif
EXTRA_CFLAGS += -DCONFIG_RTL8192E
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8192EPwrSeq.o\
hal/$(RTL871X)_xmit.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/hal8192e_fw.o \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_NAME)_led.o \
hal/rtl$(MODULE_NAME)_xmit.o \
hal/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
ifeq ($(CONFIG_GSPI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
endif
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8192E_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8192E_PCIE.o
endif
#hal/OUTSRC/HalHWImg8188E_FW.o
_OUTSRC_FILES += hal/phydm/halhwimg8192e_mac.o\
hal/phydm/halhwimg8192e_bb.o\
hal/phydm/halhwimg8192e_rf.o\
hal/phydm/halphyrf_8192e_ce.o\
hal/phydm/phydm_regconfig8192e.o\
hal/phydm/phydm_rtl8192e.o
endif
########### HAL_RTL8812A_RTL8821A #################################
ifneq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A), n_n)
RTL871X = rtl8812a
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8812au
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8812ae
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8812as
endif
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8812PwrSeq.o \
hal/Hal8821APwrSeq.o\
hal/$(RTL871X)_xmit.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_NAME)_led.o \
hal/rtl$(MODULE_NAME)_xmit.o \
hal/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
ifeq ($(CONFIG_GSPI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
endif
endif
ifeq ($(CONFIG_RTL8812A), y)
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8812A_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8812A_PCIE.o
endif
endif
ifeq ($(CONFIG_RTL8821A), y)
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8821A_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8821A_PCIE.o
endif
endif
ifeq ($(CONFIG_RTL8812A), y)
EXTRA_CFLAGS += -DCONFIG_RTL8812A
_HAL_INTFS_FILES += hal/rtl8812a/hal8812a_fw.o
_OUTSRC_FILES += hal/phydm/halhwimg8812a_mac.o\
hal/phydm/halhwimg8812a_bb.o\
hal/phydm/halhwimg8812a_rf.o\
hal/phydm/halphyrf_8812a_ce.o\
hal/phydm/phydm_regconfig8812a.o\
hal/phydm/phydm_rtl8812a.o\
hal/phydm/txbf/haltxbfjaguar.o
endif
ifeq ($(CONFIG_RTL8821A), y)
ifeq ($(CONFIG_RTL8812A), n)
RTL871X = rtl8821a
ifeq ($(CONFIG_USB_HCI), y)
ifeq ($(CONFIG_BT_COEXIST), y)
MODULE_NAME := 8821au
else
MODULE_NAME := 8811au
endif
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME := 8821ae
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME := 8821as
endif
endif
EXTRA_CFLAGS += -DCONFIG_RTL8821A
_HAL_INTFS_FILES += hal/rtl8812a/hal8821a_fw.o
_OUTSRC_FILES += hal/phydm/rtl8821a/halhwimg8821a_mac.o\
hal/phydm/rtl8821a/halhwimg8821a_bb.o\
hal/phydm/rtl8821a/halhwimg8821a_rf.o\
hal/phydm/rtl8812a/halphyrf_8812a_ce.o\
hal/phydm/rtl8821a/halphyrf_8821a_ce.o\
hal/phydm/rtl8821a/phydm_regconfig8821a.o\
hal/phydm/rtl8821a/phydm_rtl8821a.o\
hal/phydm/rtl8821a/phydm_iqk_8821a_ce.o\
hal/phydm/txbf/haltxbfjaguar.o
endif
endif
########### HAL_RTL8723B #################################
ifeq ($(CONFIG_RTL8723B), y)
RTL871X = rtl8723b
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8723bu
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8723be
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8723bs
endif
EXTRA_CFLAGS += -DCONFIG_RTL8723B
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8723BPwrSeq.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/hal8723b_fw.o
_HAL_INTFS_FILES += \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_NAME)_led.o \
hal/rtl$(MODULE_NAME)_xmit.o \
hal/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8723B_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8723B_PCIE.o
endif
_OUTSRC_FILES += hal/phydm/halhwimg8723b_bb.o\
hal/phydm/halhwimg8723b_mac.o\
hal/phydm/halhwimg8723b_rf.o\
hal/phydm/halhwimg8723b_mp.o\
hal/phydm/phydm_regconfig8723b.o\
hal/phydm/halphyrf_8723b_ce.o\
hal/phydm/phydm_rtl8723b.o
endif
########### HAL_RTL8814A #################################
ifeq ($(CONFIG_RTL8814A), y)
## ADD NEW VHT MP HW TX MODE ##
#EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE
#CONFIG_MP_VHT_HW_TX_MODE = y
##########################################
RTL871X = rtl8814a
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8814au
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8814ae
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8814as
endif
EXTRA_CFLAGS += -DCONFIG_RTL8814A
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8814PwrSeq.o \
hal/$(RTL871X)_xmit.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/hal8814a_fw.o
_HAL_INTFS_FILES += \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_NAME)_led.o \
hal/rtl$(MODULE_NAME)_xmit.o \
hal/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
ifeq ($(CONFIG_GSPI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
endif
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8814A_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8814A_PCIE.o
endif
_OUTSRC_FILES += hal/phydm/halhwimg8814a_bb.o\
hal/phydm/halhwimg8814a_mac.o\
hal/phydm/halhwimg8814a_rf.o\
hal/phydm/phydm_iqk_8814a.o\
hal/phydm/phydm_regconfig8814a.o\
hal/phydm/halphyrf_8814a_ce.o\
hal/phydm/phydm_rtl8814a.o\
hal/phydm/txbf/haltxbf8814a.o
endif
########### HAL_RTL8723C #################################
ifeq ($(CONFIG_RTL8723C), y)
RTL871X = rtl8703b
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8723cu
MODULE_SUB_NAME = 8703bu
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8723ce
MODULE_SUB_NAME = 8703be
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8723cs
MODULE_SUB_NAME = 8703bs
endif
EXTRA_CFLAGS += -DCONFIG_RTL8703B
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8703BPwrSeq.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/hal8703b_fw.o
_HAL_INTFS_FILES += \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_SUB_NAME)_led.o \
hal/rtl$(MODULE_SUB_NAME)_xmit.o \
hal/rtl$(MODULE_SUB_NAME)_recv.o
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8703B_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8703B_PCIE.o
endif
_OUTSRC_FILES += hal/phydm/halhwimg8703b_bb.o\
hal/phydm/halhwimg8703b_mac.o\
hal/phydm/halhwimg8703b_rf.o\
hal/phydm/phydm_regconfig8703b.o\
hal/phydm/halphyrf_8703b.o
endif
########### HAL_RTL8723D #################################
ifeq ($(CONFIG_RTL8723D), y)
RTL871X = rtl8723d
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8723du
MODULE_SUB_NAME = 8723du
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8723de
MODULE_SUB_NAME = 8723de
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8723ds
MODULE_SUB_NAME = 8723ds
endif
EXTRA_CFLAGS += -DCONFIG_RTL8723D
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8723DPwrSeq.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/hal8723d_fw.o \
hal/$(RTL871X)_lps_poff.o
_HAL_INTFS_FILES += \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_SUB_NAME)_led.o \
hal/rtl$(MODULE_SUB_NAME)_xmit.o \
hal/rtl$(MODULE_SUB_NAME)_recv.o
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8723D_USB.o
endif
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8723D_PCIE.o
endif
_OUTSRC_FILES += hal/phydm/halhwimg8723d_bb.o\
hal/phydm/halhwimg8723d_mac.o\
hal/phydm/halhwimg8723d_rf.o\
hal/phydm/phydm_regconfig8723d.o\
hal/phydm/phydm_rtl8723d.o\
hal/phydm/halphyrf_8723d.o
endif
########### HAL_RTL8188F #################################
ifeq ($(CONFIG_RTL8188F), y)
RTL871X = rtl8188f
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME = 8188fu
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME = 8188fe
endif
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME = 8189fs
endif
EXTRA_CFLAGS += -DCONFIG_RTL8188F
_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \
hal/Hal8188FPwrSeq.o\
hal/$(RTL871X)_sreset.o
_HAL_INTFS_FILES += hal/$(RTL871X)_hal_init.o \
hal/$(RTL871X)_phycfg.o \
hal/$(RTL871X)_rf6052.o \
hal/$(RTL871X)_dm.o \
hal/$(RTL871X)_rxdesc.o \
hal/$(RTL871X)_cmd.o \
hal/hal8188f_fw.o
_HAL_INTFS_FILES += \
hal/$(HCI_NAME)_halinit.o \
hal/rtl$(MODULE_NAME)_led.o \
hal/rtl$(MODULE_NAME)_xmit.o \
hal/rtl$(MODULE_NAME)_recv.o
ifeq ($(CONFIG_PCI_HCI), y)
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops_linux.o
else
_HAL_INTFS_FILES += hal/$(HCI_NAME)_ops.o
endif
ifeq ($(CONFIG_USB_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8188F_USB.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_HAL_INTFS_FILES +=hal/HalEfuseMask8188F_SDIO.o
endif
_OUTSRC_FILES += hal/phydm/halhwimg8188f_bb.o\
hal/phydm/halhwimg8188f_mac.o\
hal/phydm/halhwimg8188f_rf.o\
hal/phydm/phydm_regconfig8188f.o\
hal/phydm/halphyrf_8188f.o \
hal/phydm/phydm_rtl8188f.o
endif
########### HAL_RTL8822B #################################
ifeq ($(CONFIG_RTL8822B), y)
include $(TopDIR)/rtl8822b.mk
endif
########### HAL_RTL8821C #################################
ifeq ($(CONFIG_RTL8821C), y)
include $(TopDIR)/rtl8821c.mk
_OUTSRC_FILES += hal/phydm/rtl8821c/halhwimg8821c_bb.o \
hal/phydm/rtl8821c/halhwimg8821c_mac.o \
hal/phydm/rtl8821c/halhwimg8821c_rf.o \
hal/phydm/rtl8821c/phydm_hal_api8821c.o \
hal/phydm/rtl8821c/phydm_regconfig8821c.o\
hal/phydm/rtl8821c/halphyrf_8821c.o\
hal/phydm/rtl8821c/phydm_iqk_8821c.o
endif
########### AUTO_CFG #################################
ifeq ($(CONFIG_AUTOCFG_CP), y)
ifeq ($(CONFIG_MULTIDRV), y)
$(shell cp $(TopDIR)/autoconf_multidrv_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else
ifeq ($(CONFIG_RTL8188E)$(CONFIG_SDIO_HCI),yy)
$(shell cp $(TopDIR)/autoconf_rtl8189e_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else ifeq ($(CONFIG_RTL8188F)$(CONFIG_SDIO_HCI),yy)
$(shell cp $(TopDIR)/autoconf_rtl8189f_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else ifeq ($(CONFIG_RTL8723C),y)
$(shell cp $(TopDIR)/autoconf_rtl8723c_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
else
$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h)
endif
endif
endif
########### END OF PATH #################################
ifeq ($(CONFIG_USB_HCI), y)
ifeq ($(CONFIG_USB_AUTOSUSPEND), y)
EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND
endif
endif
ifeq ($(CONFIG_MP_INCLUDED), y)
#MODULE_NAME := $(MODULE_NAME)_mp
@ -970,9 +390,6 @@ endif
ifeq ($(CONFIG_WOWLAN), y)
EXTRA_CFLAGS += -DCONFIG_WOWLAN
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
endif
ifeq ($(CONFIG_DEFAULT_PATTERNS_EN), y)
EXTRA_CFLAGS += -DCONFIG_DEFAULT_PATTERNS_EN
endif
@ -980,9 +397,6 @@ endif
ifeq ($(CONFIG_AP_WOWLAN), y)
EXTRA_CFLAGS += -DCONFIG_AP_WOWLAN
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
endif
endif
ifeq ($(CONFIG_PNO_SUPPORT), y)
@ -1005,12 +419,6 @@ ifneq ($(CONFIG_WAKEUP_GPIO_IDX), default)
EXTRA_CFLAGS += -DWAKEUP_GPIO_IDX=$(CONFIG_WAKEUP_GPIO_IDX)
endif
ifeq ($(CONFIG_RTW_SDIO_PM_KEEP_POWER), y)
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RTW_SDIO_PM_KEEP_POWER
endif
endif
ifeq ($(CONFIG_REDUCE_TX_CPU_LOADING), y)
EXTRA_CFLAGS += -DCONFIG_REDUCE_TX_CPU_LOADING
endif
@ -1119,11 +527,6 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
# Enable this for Android 5.0
EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
_PLATFORM_FILES += platform/platform_arm_act_sdio.o
endif
ARCH := arm
CROSS_COMPILE := /opt/arm-2011.09/bin/arm-none-linux-gnueabi-
KSRC := /home/android_sdk/Action-semi/705a_android_L/android/kernel
@ -1141,13 +544,8 @@ EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
# Enable this for Android 5.0
EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUN50IW1P1_sdio.o
endif
ARCH := arm64
# ===Cross compile setting for Android 5.1(64) SDK ===
@ -1210,9 +608,6 @@ EXTRA_CFLAGS += -DCONFIG_PLATFORM_ANDROID
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_SKIP_SIGNAL_SCALE_MAPPING
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_RESUME_IN_WORKQUEUE
endif
endif
ifeq ($(CONFIG_PLATFORM_JB_X86), y)
@ -1293,9 +688,7 @@ endif
ifeq ($(CONFIG_PLATFORM_RTK_DMP), y)
EXTRA_CFLAGS += -DRTK_DMP_PLATFORM -DCONFIG_WIRELESS_EXT
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
_PLATFORM_FILES += platform/platform_RTK_DMP_usb.o
endif
ARCH:=mips
CROSS_COMPILE:=mipsel-linux-
KVER:=
@ -1430,9 +823,6 @@ EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_RK3066
EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DRTW_SUPPORT_PLATFORM_SHUTDOWN
endif
EXTRA_CFLAGS += -fno-pic
ARCH := arm
CROSS_COMPILE := /home/android_sdk/Rockchip/rk3066_20130607/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/bin/arm-linux-androideabi-
@ -1489,15 +879,8 @@ EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
# default setting for A10-EVB mmc0
#EXTRA_CFLAGS += -DCONFIG_WITS_EVB_V13
_PLATFORM_FILES += platform/platform_ARM_SUNxI_sdio.o
endif
ARCH := arm
#CROSS_COMPILE := arm-none-linux-gnueabi-
@ -1516,23 +899,10 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
# default setting for A31-EVB mmc0
EXTRA_CFLAGS += -DCONFIG_A31_EVB
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
#Android-JB42
#CROSS_COMPILE := /home/android_sdk/Allwinner/a31/android-jb42/lichee/buildroot/output/external-toolchain/bin/arm-linux-gnueabi-
#KSRC :=/home/android_sdk/Allwinner/a31/android-jb42/lichee/linux-3.3
#ifeq ($(CONFIG_USB_HCI), y)
#MODULE_NAME := 8188eu_sw
#endif
# ==== Cross compile setting for kitkat-a3x_v4.5 =====
CROSS_COMPILE := /home/android_sdk/Allwinner/a31/kitkat-a3x_v4.5/lichee/buildroot/output/external-toolchain/bin/arm-linux-gnueabi-
KSRC :=/home/android_sdk/Allwinner/a31/kitkat-a3x_v4.5/lichee/linux-3.3
@ -1547,13 +917,8 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
# ===Cross compile setting for Android 4.2 SDK ===
@ -1576,13 +941,8 @@ EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
# ===Cross compile setting for Android 4.2 SDK ===
@ -1605,13 +965,8 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_RADIO_WORK
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
# ===Cross compile setting for Android L SDK ===
@ -1666,10 +1021,6 @@ EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_6820
ifeq ($(RTL871X), rtl8188e)
EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50
endif
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
_PLATFORM_FILES += platform/platform_sprd_sdio.o
endif
endif
ifeq ($(CONFIG_PLATFORM_ARM_SPREADTRUM_8810), y)
@ -1681,19 +1032,12 @@ EXTRA_CFLAGS += -DPLATFORM_SPREADTRUM_8810
ifeq ($(RTL871X), rtl8188e)
EXTRA_CFLAGS += -DSOFTAP_PS_DURATION=50
endif
ifeq ($(CONFIG_SDIO_HCI), y)
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
_PLATFORM_FILES += platform/platform_sprd_sdio.o
endif
endif
ifeq ($(CONFIG_PLATFORM_ARM_WMT), y)
EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE
EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
EXTRA_CFLAGS += -DCONFIG_PLATFORM_OPS
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_WMT_sdio.o
endif
ARCH := arm
CROSS_COMPILE := /home/android_sdk/WonderMedia/wm8880-android4.4/toolchain/arm_201103_gcc4.5.2/mybin/arm_1103_le-
KSRC := /home/android_sdk/WonderMedia/wm8880-android4.4/kernel4.4/
@ -1710,14 +1054,7 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT
#EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
EXTRA_CFLAGS += -DCONFIG_QOS_OPTIMIZATION
#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm
@ -1745,14 +1082,7 @@ EXTRA_CFLAGS += -Wno-error=date-time
ifeq ($(RTK_ANDROID_VERSION), nougat)
EXTRA_CFLAGS += -DRTW_P2P_GROUP_INTERFACE=1
endif
#EXTRA_CFLAGS += -DCONFIG_#PLATFORM_OPS
ifeq ($(CONFIG_USB_HCI), y)
EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX
#_PLATFORM_FILES += platform/platform_ARM_SUNxI_usb.o
endif
ifeq ($(CONFIG_SDIO_HCI), y)
_PLATFORM_FILES += platform/platform_ARM_SUNnI_sdio.o
endif
ARCH := arm64
@ -1789,18 +1119,8 @@ endif
ifeq ($(CONFIG_MULTIDRV), y)
ifeq ($(CONFIG_SDIO_HCI), y)
MODULE_NAME := rtw_sdio
endif
ifeq ($(CONFIG_USB_HCI), y)
MODULE_NAME := rtw_usb
endif
ifeq ($(CONFIG_PCI_HCI), y)
MODULE_NAME := rtw_pci
endif
endif
@ -1840,10 +1160,6 @@ rtk_core := core/rtw_cmd.o \
core/rtw_odm.o \
core/rtw_efuse.o
ifeq ($(CONFIG_SDIO_HCI), y)
rtk_core += core/rtw_sdio.o
endif
$(MODULE_NAME)-y += $(rtk_core)
$(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o

25
core/rtw_bt_mp.c
View file

@ -1,25 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <drv_types.h>
#include <rtw_bt_mp.h>

329
core/rtw_eeprom.c
View file

@ -1,329 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_EEPROM_C_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
void up_clk(_adapter *padapter, u16 *x)
{
*x = *x | _EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
}
void down_clk(_adapter *padapter, u16 *x)
{
*x = *x & ~_EESK;
rtw_write8(padapter, EE_9346CR, (u8)*x);
rtw_udelay_os(CLOCK_RATE);
}
void shift_out_bits(_adapter *padapter, u16 data, u16 count)
{
u16 x, mask;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
mask = 0x01 << (count - 1);
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
do {
x &= ~_EEDI;
if (data & mask)
x |= _EEDI;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
rtw_write8(padapter, EE_9346CR, (u8)x);
rtw_udelay_os(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
mask = mask >> 1;
} while (mask);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~_EEDI;
rtw_write8(padapter, EE_9346CR, (u8)x);
out:
return;
}
u16 shift_in_bits(_adapter *padapter)
{
u16 x, d = 0, i;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDO | _EEDI);
d = 0;
for (i = 0; i < 16; i++) {
d = d << 1;
up_clk(padapter, &x);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI);
if (x & _EEDO)
d |= 1;
down_clk(padapter, &x);
}
out:
return d;
}
void standby(_adapter *padapter)
{
u8 x;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EECS | _EESK);
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
x |= _EECS;
rtw_write8(padapter, EE_9346CR, x);
rtw_udelay_os(CLOCK_RATE);
}
u16 wait_eeprom_cmd_done(_adapter *padapter)
{
u8 x;
u16 i, res = _FALSE;
standby(padapter);
for (i = 0; i < 200; i++) {
x = rtw_read8(padapter, EE_9346CR);
if (x & _EEDO) {
res = _TRUE;
goto exit;
}
rtw_udelay_os(CLOCK_RATE);
}
exit:
return res;
}
void eeprom_clean(_adapter *padapter)
{
u16 x;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x = rtw_read8(padapter, EE_9346CR);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~(_EECS | _EEDI);
rtw_write8(padapter, EE_9346CR, (u8)x);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
up_clk(padapter, &x);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
down_clk(padapter, &x);
out:
return;
}
void eeprom_write16(_adapter *padapter, u16 reg, u16 data)
{
u8 x;
x = rtw_read8(padapter, EE_9346CR);
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, x);
shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
if (padapter->EepromAddressSize == 8) /* CF+ and SDIO */
shift_out_bits(padapter, 0, 6);
else /* USB */
shift_out_bits(padapter, 0, 4);
standby(padapter);
/* Commented out by rcnjko, 2004.0
* Erase this particular word. Write the erase opcode and register
* number in that order. The opcode is 3bits in length; reg is 6 bits long. */
/* shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
* shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
*
* if (wait_eeprom_cmd_done(Adapter ) == FALSE)
* {
* return;
* } */
standby(padapter);
/* write the new word to the EEPROM */
/* send the write opcode the EEPORM */
shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
/* select which word in the EEPROM that we are writing to. */
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
/* write the data to the selected EEPROM word. */
shift_out_bits(padapter, data, 16);
if (wait_eeprom_cmd_done(padapter) == _FALSE)
goto exit;
standby(padapter);
shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
shift_out_bits(padapter, reg, 4);
eeprom_clean(padapter);
exit:
return;
}
u16 eeprom_read16(_adapter *padapter, u16 reg) /* ReadEEprom */
{
u16 x;
u16 data = 0;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
/* select EEPROM, reset bits, set _EECS */
x = rtw_read8(padapter, EE_9346CR);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
/* write the read opcode and register number in that order */
/* The opcode is 3bits in length, reg is 6 bits long */
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
/* Now read the data (16 bits) in from the selected EEPROM word */
data = shift_in_bits(padapter);
eeprom_clean(padapter);
out:
return data;
}
/* From even offset */
void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz)
{
u16 x, data16;
u32 i;
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
/* select EEPROM, reset bits, set _EECS */
x = rtw_read8(padapter, EE_9346CR);
if (rtw_is_surprise_removed(padapter)) {
goto out;
}
x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
x |= _EEM1 | _EECS;
rtw_write8(padapter, EE_9346CR, (unsigned char)x);
/* write the read opcode and register number in that order */
/* The opcode is 3bits in length, reg is 6 bits long */
shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
shift_out_bits(padapter, reg, padapter->EepromAddressSize);
for (i = 0; i < sz; i += 2) {
data16 = shift_in_bits(padapter);
data[i] = data16 & 0xff;
data[i + 1] = data16 >> 8;
}
eeprom_clean(padapter);
out:
return;
}
/* addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) */
u8 eeprom_read(_adapter *padapter, u32 addr_off, u8 sz, u8 *rbuf)
{
u8 quotient, remainder, addr_2align_odd;
u16 reg, stmp , i = 0, idx = 0;
reg = (u16)(addr_off >> 1);
addr_2align_odd = (u8)(addr_off & 0x1);
if (addr_2align_odd) { /* read that start at high part: e.g 1,3,5,7,9,... */
stmp = eeprom_read16(padapter, reg);
rbuf[idx++] = (u8)((stmp >> 8) & 0xff); /* return hogh-part of the short */
reg++;
sz--;
}
quotient = sz >> 1;
remainder = sz & 0x1;
for (i = 0 ; i < quotient; i++) {
stmp = eeprom_read16(padapter, reg + i);
rbuf[idx++] = (u8)(stmp & 0xff);
rbuf[idx++] = (u8)((stmp >> 8) & 0xff);
}
reg = reg + i;
if (remainder) { /* end of read at lower part of short : 0,2,4,6,... */
stmp = eeprom_read16(padapter, reg);
rbuf[idx] = (u8)(stmp & 0xff);
}
return _TRUE;
}
VOID read_eeprom_content(_adapter *padapter)
{
}

904
core/rtw_ioctl_rtl.c
View file

@ -1,904 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_IOCTL_RTL_C_
#include <drv_types.h>
#ifdef CONFIG_MP_INCLUDED
#include <rtw_mp_ioctl.h>
#endif
struct oid_obj_priv oid_rtl_seg_01_01[] = {
{1, &oid_null_function}, /* 0x80 */
{1, &oid_null_function}, /* 0x81 */
{1, &oid_null_function}, /* 0x82 */
{1, &oid_null_function}, /* 0x83 */ /* OID_RT_SET_SNIFFER_MODE */
{1, &oid_rt_get_signal_quality_hdl}, /* 0x84 */
{1, &oid_rt_get_small_packet_crc_hdl}, /* 0x85 */
{1, &oid_rt_get_middle_packet_crc_hdl}, /* 0x86 */
{1, &oid_rt_get_large_packet_crc_hdl}, /* 0x87 */
{1, &oid_rt_get_tx_retry_hdl}, /* 0x88 */
{1, &oid_rt_get_rx_retry_hdl}, /* 0x89 */
{1, &oid_rt_pro_set_fw_dig_state_hdl}, /* 0x8A */
{1, &oid_rt_pro_set_fw_ra_state_hdl} , /* 0x8B */
{1, &oid_null_function}, /* 0x8C */
{1, &oid_null_function}, /* 0x8D */
{1, &oid_null_function}, /* 0x8E */
{1, &oid_null_function}, /* 0x8F */
{1, &oid_rt_get_rx_total_packet_hdl}, /* 0x90 */
{1, &oid_rt_get_tx_beacon_ok_hdl}, /* 0x91 */
{1, &oid_rt_get_tx_beacon_err_hdl}, /* 0x92 */
{1, &oid_rt_get_rx_icv_err_hdl}, /* 0x93 */
{1, &oid_rt_set_encryption_algorithm_hdl}, /* 0x94 */
{1, &oid_null_function}, /* 0x95 */
{1, &oid_rt_get_preamble_mode_hdl}, /* 0x96 */
{1, &oid_null_function}, /* 0x97 */
{1, &oid_rt_get_ap_ip_hdl}, /* 0x98 */
{1, &oid_rt_get_channelplan_hdl}, /* 0x99 */
{1, &oid_rt_set_preamble_mode_hdl}, /* 0x9A */
{1, &oid_rt_set_bcn_intvl_hdl}, /* 0x9B */
{1, &oid_null_function}, /* 0x9C */
{1, &oid_rt_dedicate_probe_hdl}, /* 0x9D */
{1, &oid_null_function}, /* 0x9E */
{1, &oid_null_function}, /* 0x9F */
{1, &oid_null_function}, /* 0xA0 */
{1, &oid_null_function}, /* 0xA1 */
{1, &oid_null_function}, /* 0xA2 */
{1, &oid_null_function}, /* 0xA3 */
{1, &oid_null_function}, /* 0xA4 */
{1, &oid_null_function}, /* 0xA5 */
{1, &oid_null_function}, /* 0xA6 */
{1, &oid_rt_get_total_tx_bytes_hdl}, /* 0xA7 */
{1, &oid_rt_get_total_rx_bytes_hdl}, /* 0xA8 */
{1, &oid_rt_current_tx_power_level_hdl}, /* 0xA9 */
{1, &oid_rt_get_enc_key_mismatch_count_hdl}, /* 0xAA */
{1, &oid_rt_get_enc_key_match_count_hdl}, /* 0xAB */
{1, &oid_rt_get_channel_hdl}, /* 0xAC */
{1, &oid_rt_set_channelplan_hdl}, /* 0xAD */
{1, &oid_rt_get_hardware_radio_off_hdl}, /* 0xAE */
{1, &oid_null_function}, /* 0xAF */
{1, &oid_null_function}, /* 0xB0 */
{1, &oid_null_function}, /* 0xB1 */
{1, &oid_null_function}, /* 0xB2 */
{1, &oid_null_function}, /* 0xB3 */
{1, &oid_rt_get_key_mismatch_hdl}, /* 0xB4 */
{1, &oid_null_function}, /* 0xB5 */
{1, &oid_null_function}, /* 0xB6 */
{1, &oid_null_function}, /* 0xB7 */
{1, &oid_null_function}, /* 0xB8 */
{1, &oid_null_function}, /* 0xB9 */
{1, &oid_null_function}, /* 0xBA */
{1, &oid_rt_supported_wireless_mode_hdl}, /* 0xBB */
{1, &oid_rt_get_channel_list_hdl}, /* 0xBC */
{1, &oid_rt_get_scan_in_progress_hdl}, /* 0xBD */
{1, &oid_null_function}, /* 0xBE */
{1, &oid_null_function}, /* 0xBF */
{1, &oid_null_function}, /* 0xC0 */
{1, &oid_rt_forced_data_rate_hdl}, /* 0xC1 */
{1, &oid_rt_wireless_mode_for_scan_list_hdl}, /* 0xC2 */
{1, &oid_rt_get_bss_wireless_mode_hdl}, /* 0xC3 */
{1, &oid_rt_scan_with_magic_packet_hdl}, /* 0xC4 */
{1, &oid_null_function}, /* 0xC5 */
{1, &oid_null_function}, /* 0xC6 */
{1, &oid_null_function}, /* 0xC7 */
{1, &oid_null_function}, /* 0xC8 */
{1, &oid_null_function}, /* 0xC9 */
{1, &oid_null_function}, /* 0xCA */
{1, &oid_null_function}, /* 0xCB */
{1, &oid_null_function}, /* 0xCC */
{1, &oid_null_function}, /* 0xCD */
{1, &oid_null_function}, /* 0xCE */
{1, &oid_null_function}, /* 0xCF */
};
struct oid_obj_priv oid_rtl_seg_01_03[] = {
{1, &oid_rt_ap_get_associated_station_list_hdl}, /* 0x00 */
{1, &oid_null_function}, /* 0x01 */
{1, &oid_rt_ap_switch_into_ap_mode_hdl}, /* 0x02 */
{1, &oid_null_function}, /* 0x03 */
{1, &oid_rt_ap_supported_hdl}, /* 0x04 */
{1, &oid_rt_ap_set_passphrase_hdl}, /* 0x05 */
};
struct oid_obj_priv oid_rtl_seg_01_11[] = {
{1, &oid_null_function}, /* 0xC0 OID_RT_PRO_RX_FILTER */
{1, &oid_null_function}, /* 0xC1 OID_CE_USB_WRITE_REGISTRY */
{1, &oid_null_function}, /* 0xC2 OID_CE_USB_READ_REGISTRY */
{1, &oid_null_function}, /* 0xC3 OID_RT_PRO_SET_INITIAL_GAIN */
{1, &oid_null_function}, /* 0xC4 OID_RT_PRO_SET_BB_RF_STANDBY_MODE */
{1, &oid_null_function}, /* 0xC5 OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE */
{1, &oid_null_function}, /* 0xC6 OID_RT_PRO_SET_TX_CHARGE_PUMP */
{1, &oid_null_function}, /* 0xC7 OID_RT_PRO_SET_RX_CHARGE_PUMP */
{1, &oid_rt_pro_rf_write_registry_hdl}, /* 0xC8 */
{1, &oid_rt_pro_rf_read_registry_hdl}, /* 0xC9 */
{1, &oid_null_function} /* 0xCA OID_RT_PRO_QUERY_RF_TYPE */
};
struct oid_obj_priv oid_rtl_seg_03_00[] = {
{1, &oid_null_function}, /* 0x00 */
{1, &oid_rt_get_connect_state_hdl}, /* 0x01 */
{1, &oid_null_function}, /* 0x02 */
{1, &oid_null_function}, /* 0x03 */
{1, &oid_rt_set_default_key_id_hdl}, /* 0x04 */
};
/* ************** oid_rtl_seg_01_01 section start ************** */
NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
#if 0
PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
_irqL oldirql;
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
_irqlevel_changed_(&oldirql, LOWER);
if (poid_par_priv->information_buf_len >= sizeof(struct setdig_parm)) {
/* DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); */
if (!rtw_setfwdig_cmd(Adapter, *((unsigned char *)poid_par_priv->information_buf)))
status = NDIS_STATUS_NOT_ACCEPTED;
} else
status = NDIS_STATUS_NOT_ACCEPTED;
_irqlevel_changed_(&oldirql, RAISE);
#endif
return status;
}
/* ----------------------------------------------------------------------------- */
NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
#if 0
PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
_irqL oldirql;
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
_irqlevel_changed_(&oldirql, LOWER);
if (poid_par_priv->information_buf_len >= sizeof(struct setra_parm)) {
/* DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); */
if (!rtw_setfwra_cmd(Adapter, *((unsigned char *)poid_par_priv->information_buf)))
status = NDIS_STATUS_NOT_ACCEPTED;
} else
status = NDIS_STATUS_NOT_ACCEPTED;
_irqlevel_changed_(&oldirql, RAISE);
#endif
return status;
}
/* ----------------------------------------------------------------------------- */
NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
/* DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl\n")); */
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
#if 0
if (pMgntInfo->mAssoc || pMgntInfo->mIbss) {
ulInfo = pAdapter->RxStats.SignalQuality;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else {
ulInfo = 0xffffffff; /* It stands for -1 in 4-byte integer. */
}
break;
#endif
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
*(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(u32)) {
/* _rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); */
*(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH ;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
ULONG preamblemode = 0 ;
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
if (padapter->registrypriv.preamble == PREAMBLE_LONG)
preamblemode = 0;
else if (padapter->registrypriv.preamble == PREAMBLE_AUTO)
preamblemode = 1;
else if (padapter->registrypriv.preamble == PREAMBLE_SHORT)
preamblemode = 2;
*(ULONG *)poid_par_priv->information_buf = preamblemode ;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH ;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
*(u16 *)poid_par_priv->information_buf = padapter->mlmepriv.ChannelPlan ;
return status;
}
NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
padapter->mlmepriv.ChannelPlan = *(u16 *)poid_par_priv->information_buf ;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
ULONG preamblemode = 0;
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
preamblemode = *(ULONG *)poid_par_priv->information_buf ;
if (preamblemode == 0)
padapter->registrypriv.preamble = PREAMBLE_LONG;
else if (preamblemode == 1)
padapter->registrypriv.preamble = PREAMBLE_AUTO;
else if (preamblemode == 2)
padapter->registrypriv.preamble = PREAMBLE_SHORT;
*(ULONG *)poid_par_priv->information_buf = preamblemode ;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH ;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
*(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH ;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
/* _rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); */
*(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH ;
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
NDIS_802_11_CONFIGURATION *pnic_Config;
ULONG channelnum;
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
pnic_Config = &pmlmepriv->cur_network.network.Configuration;
else
pnic_Config = &padapter->registrypriv.dev_network.Configuration;
channelnum = pnic_Config->DSConfig;
*(ULONG *)poid_par_priv->information_buf = channelnum;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
return status;
}
NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
ULONG ulInfo = 0 ;
/* DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl\n")); */
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
ulInfo |= 0x0100; /* WIRELESS_MODE_B */
ulInfo |= 0x0200; /* WIRELESS_MODE_G */
ulInfo |= 0x0400; /* WIRELESS_MODE_A */
*(ULONG *) poid_par_priv->information_buf = ulInfo;
/* DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo)); */
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
} else
status = NDIS_STATUS_INVALID_LENGTH;
return status;
}
NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
/* ************** oid_rtl_seg_01_01 section end ************** */
/* ************** oid_rtl_seg_01_03 section start ************** */
NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
return status;
}
NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
/* ************** oid_rtl_seg_01_03 section end ************** */
/* **************** oid_rtl_seg_01_11 section start **************** */
NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
_irqL oldirql;
/* DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl\n")); */
if (poid_par_priv->type_of_oid != SET_OID) { /* QUERY_OID */
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
_irqlevel_changed_(&oldirql, LOWER);
if (poid_par_priv->information_buf_len == (sizeof(unsigned long) * 3)) {
/* RegOffsetValue - The offset of RF register to write. */
/* RegDataWidth - The data width of RF register to write. */
/* RegDataValue - The value to write. */
/* RegOffsetValue = *((unsigned long*)InformationBuffer); */
/* RegDataWidth = *((unsigned long*)InformationBuffer+1); */
/* RegDataValue = *((unsigned long*)InformationBuffer+2); */
if (!rtw_setrfreg_cmd(Adapter,
*(unsigned char *)poid_par_priv->information_buf,
(unsigned long)(*((unsigned long *)poid_par_priv->information_buf + 2))))
status = NDIS_STATUS_NOT_ACCEPTED;
} else
status = NDIS_STATUS_INVALID_LENGTH;
_irqlevel_changed_(&oldirql, RAISE);
return status;
}
/* ------------------------------------------------------------------------------ */
NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
#if 0
PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context);
_irqL oldirql;
/* DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl\n")); */
if (poid_par_priv->type_of_oid != SET_OID) { /* QUERY_OID */
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
_irqlevel_changed_(&oldirql, LOWER);
if (poid_par_priv->information_buf_len == (sizeof(unsigned long) * 3)) {
if (Adapter->mppriv.act_in_progress == _TRUE)
status = NDIS_STATUS_NOT_ACCEPTED;
else {
/* init workparam */
Adapter->mppriv.act_in_progress = _TRUE;
Adapter->mppriv.workparam.bcompleted = _FALSE;
Adapter->mppriv.workparam.act_type = MPT_READ_RF;
Adapter->mppriv.workparam.io_offset = *(unsigned long *)poid_par_priv->information_buf;
Adapter->mppriv.workparam.io_value = 0xcccccccc;
/* RegOffsetValue - The offset of RF register to read. */
/* RegDataWidth - The data width of RF register to read. */
/* RegDataValue - The value to read. */
/* RegOffsetValue = *((unsigned long*)InformationBuffer); */
/* RegDataWidth = *((unsigned long*)InformationBuffer+1); */
/* RegDataValue = *((unsigned long*)InformationBuffer+2); */
if (!rtw_getrfreg_cmd(Adapter,
*(unsigned char *)poid_par_priv->information_buf,
(unsigned char *)&Adapter->mppriv.workparam.io_value))
status = NDIS_STATUS_NOT_ACCEPTED;
}
} else
status = NDIS_STATUS_INVALID_LENGTH;
_irqlevel_changed_(&oldirql, RAISE);
#endif
return status;
}
/* **************** oid_rtl_seg_01_11 section end**************** */
/* ************** oid_rtl_seg_03_00 section start ************** */
enum _CONNECT_STATE_ {
CHECKINGSTATUS,
ASSOCIATED,
ADHOCMODE,
NOTASSOCIATED
};
NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
ULONG ulInfo;
if (poid_par_priv->type_of_oid != QUERY_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
/* nStatus==0 CheckingStatus */
/* nStatus==1 Associated */
/* nStatus==2 AdHocMode */
/* nStatus==3 NotAssociated */
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
ulInfo = CHECKINGSTATUS;
else if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
ulInfo = ASSOCIATED;
else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)
ulInfo = ADHOCMODE;
else
ulInfo = NOTASSOCIATED ;
*(ULONG *)poid_par_priv->information_buf = ulInfo;
*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
#if 0
/* Rearrange the order to let the UI still shows connection when scan is in progress */
if (pMgntInfo->mAssoc)
ulInfo = 1;
else if (pMgntInfo->mIbss)
ulInfo = 2;
else if (pMgntInfo->bScanInProgress)
ulInfo = 0;
else
ulInfo = 3;
ulInfoLen = sizeof(ULONG);
#endif
return status;
}
NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv *poid_par_priv)
{
NDIS_STATUS status = NDIS_STATUS_SUCCESS;
PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context);
if (poid_par_priv->type_of_oid != SET_OID) {
status = NDIS_STATUS_NOT_ACCEPTED;
return status;
}
return status;
}
/* ************** oid_rtl_seg_03_00 section end ************** */

114
core/rtw_mem.c
View file

@ -1,114 +0,0 @@
#include <drv_types.h>
#include <rtw_mem.h>
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek Wireless Lan Driver");
MODULE_AUTHOR("Realtek Semiconductor Corp.");
MODULE_VERSION("DRIVERVERSION");
struct sk_buff_head rtk_skb_mem_q;
struct u8 *rtk_buf_mem[NR_RECVBUFF];
struct u8 *rtw_get_buf_premem(int index)
{
RTW_INFO("%s, rtk_buf_mem index : %d\n", __func__, index);
return rtk_buf_mem[index];
}
u16 rtw_rtkm_get_buff_size(void)
{
return MAX_RTKM_RECVBUF_SZ;
}
EXPORT_SYMBOL(rtw_rtkm_get_buff_size);
u8 rtw_rtkm_get_nr_recv_skb(void)
{
return MAX_RTKM_NR_PREALLOC_RECV_SKB;
}
EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb);
struct sk_buff *rtw_alloc_skb_premem(u16 in_size)
{
struct sk_buff *skb = NULL;
if (in_size > MAX_RTKM_RECVBUF_SZ) {
pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ);
WARN_ON(1);
return skb;
}
skb = skb_dequeue(&rtk_skb_mem_q);
RTW_INFO("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return skb;
}
EXPORT_SYMBOL(rtw_alloc_skb_premem);
int rtw_free_skb_premem(struct sk_buff *pskb)
{
if (!pskb)
return -1;
if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB)
return -1;
skb_queue_tail(&rtk_skb_mem_q, pskb);
RTW_INFO("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return 0;
}
EXPORT_SYMBOL(rtw_free_skb_premem);
static int __init rtw_mem_init(void)
{
int i;
SIZE_PTR tmpaddr = 0;
SIZE_PTR alignment = 0;
struct sk_buff *pskb = NULL;
RTW_INFO("%s\n", __func__);
pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB);
pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ);
#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
for (i = 0; i < NR_RECVBUFF; i++)
rtk_buf_mem[i] = usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma);
#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */
skb_queue_head_init(&rtk_skb_mem_q);
for (i = 0; i < MAX_RTKM_NR_PREALLOC_RECV_SKB; i++) {
pskb = __dev_alloc_skb(MAX_RTKM_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
if (pskb) {
tmpaddr = (SIZE_PTR)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
skb_queue_tail(&rtk_skb_mem_q, pskb);
} else
RTW_INFO("%s, alloc skb memory fail!\n", __func__);
pskb = NULL;
}
RTW_INFO("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
return 0;
}
static void __exit rtw_mem_exit(void)
{
if (skb_queue_len(&rtk_skb_mem_q))
RTW_INFO("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
skb_queue_purge(&rtk_skb_mem_q);
RTW_INFO("%s\n", __func__);
}
module_init(rtw_mem_init);
module_exit(rtw_mem_exit);

1200
core/rtw_mp_ioctl.c
View file

File diff suppressed because it is too large Load diff

98
core/rtw_sdio.c
View file

@ -1,98 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
******************************************************************************/
#define _RTW_SDIO_C_
#include <drv_types.h> /* struct dvobj_priv and etc. */
#include <drv_types_sdio.h> /* RTW_SDIO_ADDR_CMD52_GEN */
/*
* Description:
* Use SDIO cmd52 or cmd53 to read/write data
*
* Parameters:
* d pointer of device object(struct dvobj_priv)
* addr SDIO address, 17 bits
* buf buffer for I/O
* len length
* write 0:read, 1:write
* cmd52 0:cmd52, 1:cmd53
*
* Return:
* _SUCCESS I/O ok.
* _FAIL I/O fail.
*/
static u8 sdio_io(struct dvobj_priv *d, u32 addr, void *buf, size_t len, u8 write, u8 cmd52)
{
int err;
if (cmd52)
addr = RTW_SDIO_ADDR_CMD52_GEN(addr);
if (write)
err = d->intf_ops->write(d, addr, buf, len, 0);
else
err = d->intf_ops->read(d, addr, buf, len, 0);
if (err) {
RTW_INFO("%s: [ERROR] %s FAIL! error(%d)\n",
__func__, write ? "write" : "read", err);
return _FAIL;
}
return _SUCCESS;
}
u8 rtw_sdio_read_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 0, 1);
}
u8 rtw_sdio_read_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 0, 0);
}
u8 rtw_sdio_write_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 1, 1);
}
u8 rtw_sdio_write_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
return sdio_io(d, addr, buf, len, 1, 0);
}
u8 rtw_sdio_f0_read(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
{
int err;
u8 ret;
ret = _SUCCESS;
addr = RTW_SDIO_ADDR_F0_GEN(addr);
err = d->intf_ops->read(d, addr, buf, len, 0);
if (err) {
RTW_INFO("%s: [ERROR] Read f0 register FAIL!\n", __func__);
ret = _FAIL;
}
return ret;
}

1240
core/rtw_wapi.c
View file

File diff suppressed because it is too large Load diff

908
core/rtw_wapi_sms4.c
View file

@ -1,908 +0,0 @@
#ifdef CONFIG_WAPI_SUPPORT
#include <linux/unistd.h>
#include <linux/etherdevice.h>
#include <drv_types.h>
#include <rtw_wapi.h>
#ifdef CONFIG_WAPI_SW_SMS4
#define WAPI_LITTLE_ENDIAN
/* #define BIG_ENDIAN */
#define ENCRYPT 0
#define DECRYPT 1
/**********************************************************
**********************************************************/
const u8 Sbox[256] = {
0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7, 0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05,
0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3, 0xaa, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99,
0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a, 0x33, 0x54, 0x0b, 0x43, 0xed, 0xcf, 0xac, 0x62,
0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95, 0x80, 0xdf, 0x94, 0xfa, 0x75, 0x8f, 0x3f, 0xa6,
0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba, 0x83, 0x59, 0x3c, 0x19, 0xe6, 0x85, 0x4f, 0xa8,
0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b, 0xf8, 0xeb, 0x0f, 0x4b, 0x70, 0x56, 0x9d, 0x35,
0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2, 0x25, 0x22, 0x7c, 0x3b, 0x01, 0x21, 0x78, 0x87,
0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52, 0x4c, 0x36, 0x02, 0xe7, 0xa0, 0xc4, 0xc8, 0x9e,
0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5, 0xa3, 0xf7, 0xf2, 0xce, 0xf9, 0x61, 0x15, 0xa1,
0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55, 0xad, 0x93, 0x32, 0x30, 0xf5, 0x8c, 0xb1, 0xe3,
0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60, 0xc0, 0x29, 0x23, 0xab, 0x0d, 0x53, 0x4e, 0x6f,
0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f, 0x03, 0xff, 0x6a, 0x72, 0x6d, 0x6c, 0x5b, 0x51,
0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f, 0x11, 0xd9, 0x5c, 0x41, 0x1f, 0x10, 0x5a, 0xd8,
0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd, 0x2d, 0x74, 0xd0, 0x12, 0xb8, 0xe5, 0xb4, 0xb0,
0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e, 0x65, 0xb9, 0xf1, 0x09, 0xc5, 0x6e, 0xc6, 0x84,
0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20, 0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48
};
const u32 CK[32] = {
0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279
};
#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y))))
#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \
Sbox[(_A) >> 16 & 0xFF] << 16 | \
Sbox[(_A) >> 8 & 0xFF] << 8 | \
Sbox[(_A) & 0xFF])
#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24))
#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23))
static void
xor_block(void *dst, void *src1, void *src2)
/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */
{
((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0];
((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1];
((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2];
((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3];
}
void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk)
{
u32 r, mid, x0, x1, x2, x3, *p;
p = (u32 *)Input;
x0 = p[0];
x1 = p[1];
x2 = p[2];
x3 = p[3];
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16);
x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16);
x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16);
x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16);
x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
for (r = 0; r < 32; r += 4) {
mid = x1 ^ x2 ^ x3 ^ rk[r + 0];
mid = ByteSub(mid);
x0 ^= L1(mid);
mid = x2 ^ x3 ^ x0 ^ rk[r + 1];
mid = ByteSub(mid);
x1 ^= L1(mid);
mid = x3 ^ x0 ^ x1 ^ rk[r + 2];
mid = ByteSub(mid);
x2 ^= L1(mid);
mid = x0 ^ x1 ^ x2 ^ rk[r + 3];
mid = ByteSub(mid);
x3 ^= L1(mid);
}
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16);
x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16);
x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16);
x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16);
x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
p = (u32 *)Output;
p[0] = x3;
p[1] = x2;
p[2] = x1;
p[3] = x0;
}
void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag)
{
u32 r, mid, x0, x1, x2, x3, *p;
p = (u32 *)Key;
x0 = p[0];
x1 = p[1];
x2 = p[2];
x3 = p[3];
#ifdef WAPI_LITTLE_ENDIAN
x0 = Rotl(x0, 16);
x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
x1 = Rotl(x1, 16);
x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
x2 = Rotl(x2, 16);
x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
x3 = Rotl(x3, 16);
x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
#endif
x0 ^= 0xa3b1bac6;
x1 ^= 0x56aa3350;
x2 ^= 0x677d9197;
x3 ^= 0xb27022dc;
for (r = 0; r < 32; r += 4) {
mid = x1 ^ x2 ^ x3 ^ CK[r + 0];
mid = ByteSub(mid);
rk[r + 0] = x0 ^= L2(mid);
mid = x2 ^ x3 ^ x0 ^ CK[r + 1];
mid = ByteSub(mid);
rk[r + 1] = x1 ^= L2(mid);
mid = x3 ^ x0 ^ x1 ^ CK[r + 2];
mid = ByteSub(mid);
rk[r + 2] = x2 ^= L2(mid);
mid = x0 ^ x1 ^ x2 ^ CK[r + 3];
mid = ByteSub(mid);
rk[r + 3] = x3 ^= L2(mid);
}
if (CryptFlag == DECRYPT) {
for (r = 0; r < 16; r++)
mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid;
}
}
void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength, u32 CryptFlag)
{
u32 blockNum, i, j, rk[32];
u16 remainder;
u8 blockIn[16], blockOut[16], tempIV[16], k;
*OutputLength = 0;
remainder = InputLength & 0x0F;
blockNum = InputLength >> 4;
if (remainder != 0)
blockNum++;
else
remainder = 16;
for (k = 0; k < 16; k++)
tempIV[k] = IV[15 - k];
memcpy(blockIn, tempIV, 16);
SMS4KeyExt((u8 *)Key, rk, CryptFlag);
for (i = 0; i < blockNum - 1; i++) {
SMS4Crypt((u8 *)blockIn, blockOut, rk);
xor_block(&Output[i * 16], &Input[i * 16], blockOut);
memcpy(blockIn, blockOut, 16);
}
*OutputLength = i * 16;
SMS4Crypt((u8 *)blockIn, blockOut, rk);
for (j = 0; j < remainder; j++)
Output[i * 16 + j] = Input[i * 16 + j] ^ blockOut[j];
*OutputLength += remainder;
}
void WapiSMS4Encryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength)
{
WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
}
void WapiSMS4Decryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
u8 *Output, u16 *OutputLength)
{
/* OFB mode: is also ENCRYPT flag */
WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
}
void WapiSMS4CalculateMic(u8 *Key, u8 *IV, u8 *Input1, u8 Input1Length,
u8 *Input2, u16 Input2Length, u8 *Output, u8 *OutputLength)
{
u32 blockNum, i, remainder, rk[32];
u8 BlockIn[16], BlockOut[16], TempBlock[16], tempIV[16], k;
*OutputLength = 0;
remainder = Input1Length & 0x0F;
blockNum = Input1Length >> 4;
for (k = 0; k < 16; k++)
tempIV[k] = IV[15 - k];
memcpy(BlockIn, tempIV, 16);
SMS4KeyExt((u8 *)Key, rk, ENCRYPT);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
for (i = 0; i < blockNum; i++) {
xor_block(BlockIn, (Input1 + i * 16), BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
if (remainder != 0) {
memset(TempBlock, 0, 16);
memcpy(TempBlock, (Input1 + blockNum * 16), remainder);
xor_block(BlockIn, TempBlock, BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
remainder = Input2Length & 0x0F;
blockNum = Input2Length >> 4;
for (i = 0; i < blockNum; i++) {
xor_block(BlockIn, (Input2 + i * 16), BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
if (remainder != 0) {
memset(TempBlock, 0, 16);
memcpy(TempBlock, (Input2 + blockNum * 16), remainder);
xor_block(BlockIn, TempBlock, BlockOut);
SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
}
memcpy(Output, BlockOut, 16);
*OutputLength = 16;
}
void SecCalculateMicSMS4(
u8 KeyIdx,
u8 *MicKey,
u8 *pHeader,
u8 *pData,
u16 DataLen,
u8 *MicBuffer
)
{
#if 0
struct ieee80211_hdr_3addr_qos *header;
u8 TempBuf[34], TempLen = 32, MicLen, QosOffset, *IV;
u16 *pTemp, fc;
WAPI_TRACE(WAPI_TX | WAPI_RX, "=========>%s\n", __func__);
header = (struct ieee80211_hdr_3addr_qos *)pHeader;
memset(TempBuf, 0, 34);
memcpy(TempBuf, pHeader, 2); /* FrameCtrl */
pTemp = (u16 *)TempBuf;
*pTemp &= 0xc78f; /* bit4,5,6,11,12,13 */
memcpy((TempBuf + 2), (pHeader + 4), 12); /* Addr1, Addr2 */
memcpy((TempBuf + 14), (pHeader + 22), 2); /* SeqCtrl */
pTemp = (u16 *)(TempBuf + 14);
*pTemp &= 0x000f;
memcpy((TempBuf + 16), (pHeader + 16), 6); /* Addr3 */
fc = le16_to_cpu(header->frame_ctl);
if (GetFrDs((u16 *)&fc) && GetToDs((u16 *)&fc)) {
memcpy((TempBuf + 22), (pHeader + 24), 6);
QosOffset = 30;
} else {
memset((TempBuf + 22), 0, 6);
QosOffset = 24;
}
if ((fc & 0x0088) == 0x0088) {
memcpy((TempBuf + 28), (pHeader + QosOffset), 2);
TempLen += 2;
/* IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; */
IV = pHeader + QosOffset + 2 + 2;
} else {
IV = pHeader + QosOffset + 2;
/* IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; */
}
TempBuf[TempLen - 1] = (u8)(DataLen & 0xff);
TempBuf[TempLen - 2] = (u8)((DataLen & 0xff00) >> 8);
TempBuf[TempLen - 4] = KeyIdx;
WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16);
WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16);
WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen);
WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen);
WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen,
pData, DataLen, MicBuffer, &MicLen);
if (MicLen != 16)
WAPI_TRACE(WAPI_ERR, "%s: MIC Length Error!!\n", __func__);
WAPI_TRACE(WAPI_TX | WAPI_RX, "<=========%s\n", __func__);
#endif
}
/* AddCount: 1 or 2.
* If overflow, return 1,
* else return 0.
*/
u8 WapiIncreasePN(u8 *PN, u8 AddCount)
{
u8 i;
if (NULL == PN)
return 1;
/* YJ,test,091102 */
/*
if(AddCount == 2){
RTW_INFO("############################%s(): PN[0]=0x%x\n", __func__, PN[0]);
if(PN[0] == 0x48){
PN[0] += AddCount;
return 1;
}else{
PN[0] += AddCount;
return 0;
}
}
*/
/* YJ,test,091102,end */
for (i = 0; i < 16; i++) {
if (PN[i] + AddCount <= 0xff) {
PN[i] += AddCount;
return 0;
} else {
PN[i] += AddCount;
AddCount = 1;
}
}
return 1;
}
void WapiGetLastRxUnicastPNForQoSData(
u8 UserPriority,
PRT_WAPI_STA_INFO pWapiStaInfo,
u8 *PNOut
)
{
WAPI_TRACE(WAPI_RX, "===========> %s\n", __func__);
switch (UserPriority) {
case 0:
case 3:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBEQueue, 16);
break;
case 1:
case 2:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBKQueue, 16);
break;
case 4:
case 5:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVIQueue, 16);
break;
case 6:
case 7:
memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVOQueue, 16);
break;
default:
WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __func__);
break;
}
WAPI_TRACE(WAPI_RX, "<=========== %s\n", __func__);
}
void WapiSetLastRxUnicastPNForQoSData(
u8 UserPriority,
u8 *PNIn,
PRT_WAPI_STA_INFO pWapiStaInfo
)
{
WAPI_TRACE(WAPI_RX, "===========> %s\n", __func__);
switch (UserPriority) {
case 0:
case 3:
memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue, PNIn, 16);
break;
case 1:
case 2:
memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue, PNIn, 16);
break;
case 4:
case 5:
memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue, PNIn, 16);
break;
case 6:
case 7:
memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue, PNIn, 16);
break;
default:
WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __func__);
break;
}
WAPI_TRACE(WAPI_RX, "<=========== %s\n", __func__);
}
/****************************************************************************
FALSE not RX-Reorder
TRUE do RX Reorder
add to support WAPI to N-mode
*****************************************************************************/
u8 WapiCheckPnInSwDecrypt(
_adapter *padapter,
struct sk_buff *pskb
)
{
u8 ret = false;
#if 0
struct ieee80211_hdr_3addr_qos *header;
u16 fc;
u8 *pDaddr, *pTaddr, *pRaddr;
header = (struct ieee80211_hdr_3addr_qos *)pskb->data;
pTaddr = header->addr2;
pRaddr = header->addr1;
fc = le16_to_cpu(header->frame_ctl);
if (GetToDs(&fc))
pDaddr = header->addr3;
else
pDaddr = header->addr1;
if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0)
&& !(pDaddr)
&& (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE))
/* && ieee->pHTInfo->bCurrentHTSupport && */
/* ieee->pHTInfo->bCurRxReorderEnable) */
ret = false;
else
ret = true;
#endif
WAPI_TRACE(WAPI_RX, "%s: return %d\n", __func__, ret);
return ret;
}
int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe)
{
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
u8 *frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL;
u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0;
PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL;
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
PRT_WAPI_STA_INFO pWapiSta = NULL;
int ret = 0;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __func__);
return ret;
#if 0
hdr_len = sMacHdrLng;
if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE)
hdr_len += 2;
/* hdr_len += SNAP_SIZE + sizeof(u16); */
pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len);
memmove(pos, pos + padapter->wapiInfo.extra_prefix_len, hdr_len);
pSecHeader = pskb->data + hdr_len;
pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader;
pRA = pskb->data + 4;
WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len);
/* Address 1 is always receiver's address */
if (IS_MCAST(pRA)) {
if (!pWapiInfo->wapiTxMsk.bTxEnable) {
WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __func__);
return -2;
}
if (pWapiInfo->wapiTxMsk.keyId <= 1) {
pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId;
pWapiExt->Reserved = 0;
bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1);
memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16);
if (bPNOverflow) {
/* Update MSK Notification. */
WAPI_TRACE(WAPI_ERR, "===============>%s():multicast PN overflow\n", __func__);
rtw_wapi_app_event_handler(padapter, NULL, 0, pRA, false, false, true, 0, false);
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Multicast KeyIdx!!\n", __func__);
ret = -3;
}
} else {
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (!memcmp(pWapiSta->PeerMacAddr, pRA, 6)) {
bFindMatchPeer = true;
break;
}
}
if (bFindMatchPeer) {
if ((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) {
WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __func__);
return -4;
}
if (pWapiSta->wapiUsk.keyId <= 1) {
if (pWapiSta->wapiUskUpdate.bTxEnable)
pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId;
else
pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId;
pWapiExt->Reserved = 0;
bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2);
memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16);
if (bPNOverflow) {
/* Update USK Notification. */
WAPI_TRACE(WAPI_ERR, "===============>%s():unicast PN overflow\n", __func__);
rtw_wapi_app_event_handler(padapter, NULL, 0, pWapiSta->PeerMacAddr, false, true, false, 0, false);
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Unicast KeyIdx!!\n", __func__);
ret = -5;
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT"!!\n", __func__, MAC_ARG(pRA));
ret = -6;
}
}
WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __func__);
return ret;
#endif
}
/* WAPI SW Enc: must have done Coalesce! */
void SecSWSMS4Encryption(
_adapter *padapter,
u8 *pxmitframe
)
{
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
PRT_WAPI_STA_INFO pWapiSta = NULL;
u8 *pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_SIZE;
struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL;
u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16];
u16 OutputLength;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __func__);
WAPI_TRACE(WAPI_TX, "hdrlen: %d\n", pattrib->hdrlen);
return;
DataOffset = pattrib->hdrlen + pattrib->iv_len;
pRA = pframe + 4;
if (IS_MCAST(pRA)) {
KeyIdx = pWapiInfo->wapiTxMsk.keyId;
pIV = pWapiInfo->lastTxMulticastPN;
pMicKey = pWapiInfo->wapiTxMsk.micKey;
pDataKey = pWapiInfo->wapiTxMsk.dataKey;
} else {
if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) {
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)) {
bFindMatchPeer = true;
break;
}
}
if (bFindMatchPeer) {
if (pWapiSta->wapiUskUpdate.bTxEnable) {
KeyIdx = pWapiSta->wapiUskUpdate.keyId;
WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __func__, KeyIdx);
pIV = pWapiSta->lastTxUnicastPN;
pMicKey = pWapiSta->wapiUskUpdate.micKey;
pDataKey = pWapiSta->wapiUskUpdate.dataKey;
} else {
KeyIdx = pWapiSta->wapiUsk.keyId;
WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __func__, KeyIdx);
pIV = pWapiSta->lastTxUnicastPN;
pMicKey = pWapiSta->wapiUsk.micKey;
pDataKey = pWapiSta->wapiUsk.dataKey;
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta!!\n", __func__);
return;
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: wapiSTAUsedList is empty!!\n", __func__);
return;
}
}
SecPtr = pframe;
SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr + DataOffset), pattrib->pktlen, MicBuffer);
WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len);
memcpy(pframe + pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen - pattrib->icv_len,
(u8 *)MicBuffer,
padapter->wapiInfo.extra_postfix_len
);
WapiSMS4Encryption(pDataKey, pIV, (SecPtr + DataOffset), pattrib->pktlen + pattrib->icv_len, (SecPtr + DataOffset), &OutputLength);
WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption", pframe, pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __func__);
}
u8 SecSWSMS4Decryption(
_adapter *padapter,
u8 *precv_frame,
struct recv_priv *precv_priv
)
{
PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
struct recv_frame_hdr *precv_hdr;
PRT_WAPI_STA_INFO pWapiSta = NULL;
u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false;
u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16];
u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos;
u8 TID = 0;
u16 OutputLength, DataLen;
u8 bQosData;
struct sk_buff *pskb;
WAPI_TRACE(WAPI_RX, "=========>%s\n", __func__);
return 0;
precv_hdr = &((union recv_frame *)precv_frame)->u.hdr;
pskb = (struct sk_buff *)(precv_hdr->rx_data);
precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb);
WAPI_TRACE(WAPI_RX, "=========>%s: check PN %d\n", __func__, precv_hdr->bWapiCheckPNInDecrypt);
WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len);
IVOffset = sMacHdrLng;
bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE;
if (bQosData)
IVOffset += 2;
/* if(GetHTC()) */
/* IVOffset += 4; */
/* IVOffset += SNAP_SIZE + sizeof(u16); */
DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len;
pRA = pskb->data + 4;
pTA = pskb->data + 10;
KeyIdx = *(pskb->data + IVOffset);
pRecvPN = pskb->data + IVOffset + 2;
pSecData = pskb->data + DataOffset;
DataLen = pskb->len - DataOffset;
pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len;
TID = GetTid(pskb->data);
if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) {
list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)) {
bFindMatchPeer = true;
break;
}
}
}
if (!bFindMatchPeer) {
WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __func__, MAC_ARG(pTA));
return false;
}
if (IS_MCAST(pRA)) {
WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __func__);
if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet) {
pLastRxPN = pWapiSta->lastRxMulticastPN;
if (!WapiComparePN(pRecvPN, pLastRxPN)) {
WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __func__);
WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16);
WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16);
return false;
}
memcpy(pLastRxPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiMsk.micKey;
pDataKey = pWapiSta->wapiMsk.dataKey;
} else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet) {
WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __func__);
bUseUpdatedKey = true;
memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiMskUpdate.micKey;
pDataKey = pWapiSta->wapiMskUpdate.dataKey;
} else {
WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __func__, KeyIdx);
return false;
}
} else {
WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __func__);
if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet) {
WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __func__);
if (precv_hdr->bWapiCheckPNInDecrypt) {
if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) {
WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS);
pLastRxPN = lastRxPNforQoS;
} else
pLastRxPN = pWapiSta->lastRxUnicastPN;
if (!WapiComparePN(pRecvPN, pLastRxPN))
return false;
if (bQosData)
WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
else
memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
} else
memcpy(precv_hdr->WapiTempPN, pRecvPN, 16);
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) {
if ((pRecvPN[0] & 0x1) == 0) {
WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __func__);
return false;
}
}
pMicKey = pWapiSta->wapiUsk.micKey;
pDataKey = pWapiSta->wapiUsk.dataKey;
} else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet) {
WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __func__);
if (pWapiSta->bAuthenticatorInUpdata)
bUseUpdatedKey = true;
else
bUseUpdatedKey = false;
if (bQosData)
WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
else
memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
pMicKey = pWapiSta->wapiUskUpdate.micKey;
pDataKey = pWapiSta->wapiUskUpdate.dataKey;
} else {
WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __func__, KeyIdx, pWapiSta->wapiUsk.keyId,
pWapiSta->wapiUskUpdate.keyId);
/* dump_buf(pskb->data,pskb->len); */
return false;
}
}
WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16);
WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16);
WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength);
if (OutputLength != DataLen)
WAPI_TRACE(WAPI_ERR, "%s: Output Length Error!!!!\n", __func__);
WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len);
DataLen -= padapter->wapiInfo.extra_postfix_len;
SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer);
WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN);
WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN);
if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)) {
WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __func__);
if (bUseUpdatedKey) {
/* delete the old key */
if (IS_MCAST(pRA)) {
WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __func__);
pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId;
memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16);
memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16);
pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false;
} else {
WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __func__);
pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId;
memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16);
memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16);
pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false;
}
}
} else {
WAPI_TRACE(WAPI_ERR, "%s: Check MIC Error, Dropped !!!!\n", __func__);
return false;
}
pos = pskb->data;
memmove(pos + padapter->wapiInfo.extra_prefix_len, pos, IVOffset);
skb_pull(pskb, padapter->wapiInfo.extra_prefix_len);
WAPI_TRACE(WAPI_RX, "<=========%s\n", __func__);
return true;
}
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
{
u8 *pframe;
u32 res = _SUCCESS;
WAPI_TRACE(WAPI_TX, "=========>%s\n", __func__);
if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) {
WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __func__);
return _FAIL;
}
if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL)
return _FAIL;
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
SecSWSMS4Encryption(padapter, pxmitframe);
WAPI_TRACE(WAPI_TX, "<=========%s\n", __func__);
return res;
}
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
{
u8 *pframe;
u32 res = _SUCCESS;
WAPI_TRACE(WAPI_RX, "=========>%s\n", __func__);
if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) {
WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __func__);
return _FAIL;
}
/* drop packet when hw decrypt fail
* return tempraily */
return _FAIL;
/* pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; */
if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) {
WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n", __func__);
return _FAIL;
}
WAPI_TRACE(WAPI_RX, "<=========%s\n", __func__);
return res;
}
#else
u32 rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
{
WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __func__);
WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __func__);
return _SUCCESS;
}
u32 rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
{
WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __func__);
WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __func__);
return _SUCCESS;
}
#endif
#endif

3417
hal/btc/halbtc8192e1ant.c
View file

File diff suppressed because it is too large Load diff

226
hal/btc/halbtc8192e1ant.h
View file

@ -1,226 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
/* *******************************************
* The following is for 8192E 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1
#define BT_INFO_8192E_1ANT_B_FTP BIT(7)
#define BT_INFO_8192E_1ANT_B_A2DP BIT(6)
#define BT_INFO_8192E_1ANT_B_HID BIT(5)
#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8192E_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2
#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
enum bt_info_src_8192e_1ant {
BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8192E_1ANT_MAX
};
enum bt_8192e_1ant_bt_status {
BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8192E_1ANT_BT_STATUS_MAX
};
enum bt_8192e_1ant_wifi_status {
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8192E_1ANT_WIFI_STATUS_MAX
};
enum bt_8192e_1ant_coex_algo {
BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8192E_1ANT_COEX_ALGO_SCO = 0x1,
BT_8192E_1ANT_COEX_ALGO_HID = 0x2,
BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8192E_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8192e_1ant {
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8192e_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8192E_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_1ANT_MAX];
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
boolean cck_lock;
boolean pre_ccklock;
u8 coex_table_type;
boolean force_lps_on;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
#else /* #if (RTL8192E_SUPPORT == 1) */
#define ex_halbtc8192e1ant_power_on_setting(btcoexist)
#define ex_halbtc8192e1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8192e1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8192e1ant_init_coex_dm(btcoexist)
#define ex_halbtc8192e1ant_ips_notify(btcoexist, type)
#define ex_halbtc8192e1ant_lps_notify(btcoexist, type)
#define ex_halbtc8192e1ant_scan_notify(btcoexist, type)
#define ex_halbtc8192e1ant_connect_notify(btcoexist, type)
#define ex_halbtc8192e1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8192e1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8192e1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8192e1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8192e1ant_halt_notify(btcoexist)
#define ex_halbtc8192e1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8192e1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8192e1ant_periodical(btcoexist)
#define ex_halbtc8192e1ant_display_coex_info(btcoexist)
#define ex_halbtc8192e1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#endif
#endif

4377
hal/btc/halbtc8192e2ant.c
View file

File diff suppressed because it is too large Load diff

211
hal/btc/halbtc8192e2ant.h
View file

@ -1,211 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
/* *******************************************
* The following is for 8192E 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0
#define BT_INFO_8192E_2ANT_B_FTP BIT(7)
#define BT_INFO_8192E_2ANT_B_A2DP BIT(6)
#define BT_INFO_8192E_2ANT_B_HID BIT(5)
#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8192E_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2
#define NOISY_AP_NUM_THRESH_8192E 10
enum bt_info_src_8192e_2ant {
BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8192E_2ANT_MAX
};
enum bt_8192e_2ant_bt_status {
BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8192E_2ANT_BT_STATUS_MAX
};
enum bt_8192e_2ant_coex_algo {
BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8192E_2ANT_COEX_ALGO_SCO = 0x1,
BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2,
BT_8192E_2ANT_COEX_ALGO_HID = 0x3,
BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4,
BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6,
BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7,
BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb,
BT_8192E_2ANT_COEX_ALGO_MAX = 0xc
};
struct coex_dm_8192e_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean auto_tdma_adjust_low_rssi;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u8 pre_ss_type;
u8 cur_ss_type;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 cur_ra_mask_type;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
};
struct coex_sta_8192e_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_2ANT_MAX];
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
u32 bt_coex_supported_version;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else /* #if (RTL8192E_SUPPORT == 1) */
#define ex_halbtc8192e2ant_power_on_setting(btcoexist)
#define ex_halbtc8192e2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8192e2ant_init_coex_dm(btcoexist)
#define ex_halbtc8192e2ant_ips_notify(btcoexist, type)
#define ex_halbtc8192e2ant_lps_notify(btcoexist, type)
#define ex_halbtc8192e2ant_scan_notify(btcoexist, type)
#define ex_halbtc8192e2ant_connect_notify(btcoexist, type)
#define ex_halbtc8192e2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8192e2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8192e2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8192e2ant_halt_notify(btcoexist)
#define ex_halbtc8192e2ant_periodical(btcoexist)
#define ex_halbtc8192e2ant_display_coex_info(btcoexist)
#endif
#endif

4293
hal/btc/halbtc8703b1ant.c
View file

File diff suppressed because it is too large Load diff

404
hal/btc/halbtc8703b1ant.h
View file

@ -1,404 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8703B_SUPPORT == 1)
/* *******************************************
* The following is for 8703B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1
#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 0
#define BT_INFO_8703B_1ANT_B_FTP BIT(7)
#define BT_INFO_8703B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8703B_1ANT_B_HID BIT(5)
#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8703B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2
#define BT_8703B_1ANT_WIFI_NOISY_THRESH 50 /* max: 255 */
/* for Antenna detection */
#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
#define BT_8703B_1ANT_ANTDET_ENABLE 0
#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8703b_1ant_signal_state {
BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8703B_1ANT_SIG_STA_MAX
};
enum bt_8703b_1ant_path_ctrl_owner {
BT_8703B_1ANT_PCO_BTSIDE = 0x0,
BT_8703B_1ANT_PCO_WLSIDE = 0x1,
BT_8703B_1ANT_PCO_MAX
};
enum bt_8703b_1ant_gnt_ctrl_type {
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8703B_1ANT_GNT_TYPE_MAX
};
enum bt_8703b_1ant_gnt_ctrl_block {
BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8703B_1ANT_GNT_BLOCK_BB = 0x2,
BT_8703B_1ANT_GNT_BLOCK_MAX
};
enum bt_8703b_1ant_lte_coex_table_type {
BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8703B_1ANT_CTT_MAX
};
enum bt_8703b_1ant_lte_break_table_type {
BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8703B_1ANT_LBTT_MAX
};
enum bt_info_src_8703b_1ant {
BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8703B_1ANT_MAX
};
enum bt_8703b_1ant_bt_status {
BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8703B_1ANT_BT_STATUS_MAX
};
enum bt_8703b_1ant_wifi_status {
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8703B_1ANT_WIFI_STATUS_MAX
};
enum bt_8703b_1ant_coex_algo {
BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8703B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8703B_1ANT_COEX_ALGO_HID = 0x2,
BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8703B_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8703b_1ant_phase {
BT_8703B_1ANT_PHASE_COEX_INIT = 0x0,
BT_8703B_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8703B_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8703B_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8703B_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8703B_1ANT_PHASE_BTMPMODE = 0x5,
BT_8703B_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8703B_1ANT_PHASE_MAX
};
enum bt_8703b_1ant_Scoreboard {
BT_8703B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8703B_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8703B_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8703B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8703B_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8703b_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8703b_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
};
#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8703B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8703b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8703b1ant_power_on_setting(btcoexist)
#define ex_halbtc8703b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8703b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8703b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8703b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8703b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8703b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8703b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8703b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8703b1ant_halt_notify(btcoexist)
#define ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8703b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8703b1ant_periodical(btcoexist)
#define ex_halbtc8703b1ant_display_coex_info(btcoexist)
#define ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_display_ant_detection(btcoexist)
#endif
#endif

4970
hal/btc/halbtc8723b1ant.c
View file

File diff suppressed because it is too large Load diff

293
hal/btc/halbtc8723b1ant.h
View file

@ -1,293 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723B_SUPPORT == 1)
/* *******************************************
* The following is for 8723B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1
#define BT_INFO_8723B_1ANT_B_FTP BIT(7)
#define BT_INFO_8723B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_1ANT_B_HID BIT(5)
#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2
#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 /* 30 /max: 255 */
/* for Antenna detection */
#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 48
#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 32
#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
#define BT_8723B_1ANT_ANTDET_ENABLE 1
#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 1
#define BT_8723B_1ANT_ANTDET_BTTXTIME 100
#define BT_8723B_1ANT_ANTDET_BTTXCHANNEL 39
enum bt_info_src_8723b_1ant {
BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723B_1ANT_MAX
};
enum bt_8723b_1ant_bt_status {
BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723B_1ANT_BT_STATUS_MAX
};
enum bt_8723b_1ant_wifi_status {
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8723B_1ANT_WIFI_STATUS_MAX
};
enum bt_8723b_1ant_coex_algo {
BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8723B_1ANT_COEX_ALGO_HID = 0x2,
BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723B_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8723b_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8723b_1ant {
boolean bt_disabled;
boolean bt_enable_disable_change;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean bt_abnormal_scan;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
u32 bt_coex_supported_version;
u8 a2dp_bit_pool;
u8 cut_version;
};
#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723b1ant_power_on_setting(btcoexist)
#define ex_halbtc8723b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8723b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8723b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8723b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8723b1ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8723b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723b1ant_halt_notify(btcoexist)
#define ex_halbtc8723b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8723b1ant_periodical(btcoexist)
#define ex_halbtc8723b1ant_display_coex_info(btcoexist)
#define ex_halbtc8723b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723b1ant_display_ant_detection(btcoexist)
#endif
#endif

4958
hal/btc/halbtc8723b2ant.c
View file

File diff suppressed because it is too large Load diff

217
hal/btc/halbtc8723b2ant.h
View file

@ -1,217 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723B_SUPPORT == 1)
/* *******************************************
* The following is for 8723B 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1
#define BT_INFO_8723B_2ANT_B_FTP BIT(7)
#define BT_INFO_8723B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_2ANT_B_HID BIT(5)
#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2
#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
enum bt_info_src_8723b_2ant {
BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723B_2ANT_MAX
};
enum bt_8723b_2ant_bt_status {
BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723B_2ANT_BT_STATUS_MAX
};
enum bt_8723b_2ant_coex_algo {
BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723B_2ANT_COEX_ALGO_SCO = 0x1,
BT_8723B_2ANT_COEX_ALGO_HID = 0x2,
BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723B_2ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8723b_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
};
struct coex_sta_8723b_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_abnormal_scan;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723b2ant_power_on_setting(btcoexist)
#define ex_halbtc8723b2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723b2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723b2ant_init_coex_dm(btcoexist)
#define ex_halbtc8723b2ant_ips_notify(btcoexist, type)
#define ex_halbtc8723b2ant_lps_notify(btcoexist, type)
#define ex_halbtc8723b2ant_scan_notify(btcoexist, type)
#define ex_halbtc8723b2ant_connect_notify(btcoexist, type)
#define ex_halbtc8723b2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723b2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723b2ant_halt_notify(btcoexist)
#define ex_halbtc8723b2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723b2ant_periodical(btcoexist)
#define ex_halbtc8723b2ant_display_coex_info(btcoexist)
#endif
#endif

68
hal/btc/halbtc8723bwifionly.c
View file

@ -1,68 +0,0 @@
#include "mp_precomp.h"
VOID
ex_hal8723b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
halwifionly_write1byte(pwifionlycfg, 0x778, 0x3); /* Set pta for wifi first priority, 0x1 need to reference pta table to determine wifi and bt priority */
halwifionly_bitmaskwrite1byte(pwifionlycfg, 0x40, 0x20, 0x1);
/* Set Antenna path to Wifi */
halwifionly_write2byte(pwifionlycfg, 0x0765, 0x8); /* Set pta for wifi first priority, 0x0 need to reference pta table to determine wifi and bt priority */
halwifionly_write2byte(pwifionlycfg, 0x076e, 0xc);
halwifionly_write4byte(pwifionlycfg, 0x000006c0, 0xaaaaaaaa); /* pta table, 0xaaaaaaaa means wifi is higher priority than bt */
halwifionly_write4byte(pwifionlycfg, 0x000006c4, 0xaaaaaaaa);
halwifionly_bitmaskwrite1byte(pwifionlycfg, 0x67, 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */
/* 0x948 setting */
if (pwifionlycfg->chip_interface == WIFIONLY_INTF_PCI) {
/* HP Foxconn NGFF at S0
not sure HP pg correct or not(EEPROMBluetoothSingleAntPath), so here we just write
0x948=0x280 for HP HW id NIC. */
if (pwifionly_haldata->customer_id == CUSTOMER_HP_1) {
halwifionly_write4byte(pwifionlycfg, 0x948, 0x280);
halwifionly_phy_set_rf_reg(pwifionlycfg, 0, 0x1, 0xfffff, 0x0); /* WiFi TRx Mask off */
return;
}
}
if (pwifionly_haldata->efuse_pg_antnum == 2) {
halwifionly_write4byte(pwifionlycfg, 0x948, 0x0);
} else {
/* 3Attention !!! For 8723BU !!!!
For 8723BU single ant case: jira [USB-1237]
Because of 8723BU S1 has HW problem, we only can use S0 instead.
Whether Efuse 0xc3 [6] is 0 or 1, we should always use S0 and write 0x948 to 80/280
--------------------------------------------------
BT Team :
When in Single Ant case, Reg[0x948] has two case : 0x80 or 0x200
When in Two Ant case, Reg[0x948] has two case : 0x280 or 0x0
Efuse 0xc3 [6] Antenna Path
0xc3 [6] = 0 ==> S1 ==> 0x948 = 0/40/200
0xc3 [6] = 1 ==> S0 ==> 0x948 = 80/240/280 */
if (pwifionlycfg->chip_interface == WIFIONLY_INTF_USB)
halwifionly_write4byte(pwifionlycfg, 0x948, 0x80);
else {
if (pwifionly_haldata->efuse_pg_antpath == 0)
halwifionly_write4byte(pwifionlycfg, 0x948, 0x0);
else
halwifionly_write4byte(pwifionlycfg, 0x948, 0x280);
}
}
/* after 8723B F-cut, TRx Mask should be set when 0x948=0x0 or 0x280
PHY_SetRFReg(Adapter, 0, 0x1, 0xfffff, 0x780); WiFi TRx Mask on */
halwifionly_phy_set_rf_reg(pwifionlycfg, 0, 0x1, 0xfffff, 0x0); /*WiFi TRx Mask off */
}

8
hal/btc/halbtc8723bwifionly.h
View file

@ -1,8 +0,0 @@
#ifndef __INC_HAL8723BWIFIONLYHWCFG_H
#define __INC_HAL8723BWIFIONLYHWCFG_H
VOID
ex_hal8723b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
#endif

6080
hal/btc/halbtc8723d1ant.c
View file

File diff suppressed because it is too large Load diff

413
hal/btc/halbtc8723d1ant.h
View file

@ -1,413 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723D_SUPPORT == 1)
/* *******************************************
* The following is for 8723D 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8723D_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8723D_1ANT 1
#define BT_INFO_8723D_1ANT_B_FTP BIT(7)
#define BT_INFO_8723D_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723D_1ANT_B_HID BIT(5)
#define BT_INFO_8723D_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723D_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723D_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723D_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723D_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723D_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT 2
#define BT_8723D_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
#define BT_8723D_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8723D_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8723D_1ANT_ANTDET_ENABLE 1
#define BT_8723D_1ANT_ANTDET_BTTXTIME 100
#define BT_8723D_1ANT_ANTDET_BTTXCHANNEL 39
#define BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8723D_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8723d_1ant_signal_state {
BT_8723D_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8723D_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8723D_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8723D_1ANT_SIG_STA_MAX
};
enum bt_8723d_1ant_path_ctrl_owner {
BT_8723D_1ANT_PCO_BTSIDE = 0x0,
BT_8723D_1ANT_PCO_WLSIDE = 0x1,
BT_8723D_1ANT_PCO_MAX
};
enum bt_8723d_1ant_gnt_ctrl_type {
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8723D_1ANT_GNT_TYPE_MAX
};
enum bt_8723d_1ant_gnt_ctrl_block {
BT_8723D_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8723D_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8723D_1ANT_GNT_BLOCK_BB = 0x2,
BT_8723D_1ANT_GNT_BLOCK_MAX
};
enum bt_8723d_1ant_lte_coex_table_type {
BT_8723D_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8723D_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8723D_1ANT_CTT_MAX
};
enum bt_8723d_1ant_lte_break_table_type {
BT_8723D_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8723D_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8723D_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8723D_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8723D_1ANT_LBTT_MAX
};
enum bt_info_src_8723d_1ant {
BT_INFO_SRC_8723D_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723D_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723D_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723D_1ANT_MAX
};
enum bt_8723d_1ant_bt_status {
BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723D_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723D_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723D_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723D_1ANT_BT_STATUS_MAX
};
enum bt_8723d_1ant_wifi_status {
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8723D_1ANT_WIFI_STATUS_MAX
};
enum bt_8723d_1ant_coex_algo {
BT_8723D_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723D_1ANT_COEX_ALGO_SCO = 0x1,
BT_8723D_1ANT_COEX_ALGO_HID = 0x2,
BT_8723D_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723D_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723D_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723D_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723D_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723D_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8723d_1ant_phase {
BT_8723D_1ANT_PHASE_COEX_INIT = 0x0,
BT_8723D_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8723D_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8723D_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8723D_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8723D_1ANT_PHASE_BTMPMODE = 0x5,
BT_8723D_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8723D_1ANT_PHASE_COEX_POWERON = 0x7,
BT_8723D_1ANT_PHASE_MAX
};
enum bt_8723d_1ant_Scoreboard {
BT_8723D_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8723D_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8723D_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8723D_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8723D_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8723d_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8723d_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
};
#define BT_8723D_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723D_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723D_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723d_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723d1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723d1ant_power_on_setting(btcoexist)
#define ex_halbtc8723d1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723d1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723d1ant_init_coex_dm(btcoexist)
#define ex_halbtc8723d1ant_ips_notify(btcoexist, type)
#define ex_halbtc8723d1ant_lps_notify(btcoexist, type)
#define ex_halbtc8723d1ant_scan_notify(btcoexist, type)
#define ex_halbtc8723d1ant_connect_notify(btcoexist, type)
#define ex_halbtc8723d1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723d1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723d1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723d1ant_halt_notify(btcoexist)
#define ex_halbtc8723d1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723d1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8723d1ant_periodical(btcoexist)
#define ex_halbtc8723d1ant_display_coex_info(btcoexist)
#define ex_halbtc8723d1ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723d1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_display_ant_detection(btcoexist)
#endif
#endif

6556
hal/btc/halbtc8723d2ant.c
View file

File diff suppressed because it is too large Load diff

418
hal/btc/halbtc8723d2ant.h
View file

@ -1,418 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723D_SUPPORT == 1)
/* *******************************************
* The following is for 8723D 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8723D_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8723D_2ANT 1
#define BT_INFO_8723D_2ANT_B_FTP BIT(7)
#define BT_INFO_8723D_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723D_2ANT_B_HID BIT(5)
#define BT_INFO_8723D_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723D_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723D_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723D_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723D_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT 2
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8723D_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8723D_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8723D_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8723D_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8723D_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8723D_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8723D_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8723D_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8723D_2ANT_ANTDET_ENABLE 1
#define BT_8723D_2ANT_ANTDET_BTTXTIME 100
#define BT_8723D_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8723d_2ant_signal_state {
BT_8723D_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8723D_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8723D_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8723D_2ANT_SIG_STA_MAX
};
enum bt_8723d_2ant_path_ctrl_owner {
BT_8723D_2ANT_PCO_BTSIDE = 0x0,
BT_8723D_2ANT_PCO_WLSIDE = 0x1,
BT_8723D_2ANT_PCO_MAX
};
enum bt_8723d_2ant_gnt_ctrl_type {
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8723D_2ANT_GNT_TYPE_MAX
};
enum bt_8723d_2ant_gnt_ctrl_block {
BT_8723D_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8723D_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8723D_2ANT_GNT_BLOCK_BB = 0x2,
BT_8723D_2ANT_GNT_BLOCK_MAX
};
enum bt_8723d_2ant_lte_coex_table_type {
BT_8723D_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8723D_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8723D_2ANT_CTT_MAX
};
enum bt_8723d_2ant_lte_break_table_type {
BT_8723D_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8723D_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8723D_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8723D_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8723D_2ANT_LBTT_MAX
};
enum bt_info_src_8723d_2ant {
BT_INFO_SRC_8723D_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723D_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723D_2ANT_MAX
};
enum bt_8723d_2ant_bt_status {
BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723D_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723D_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723D_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723D_2ANT_BT_STATUS_MAX
};
enum bt_8723d_2ant_coex_algo {
BT_8723D_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723D_2ANT_COEX_ALGO_SCO = 0x1,
BT_8723D_2ANT_COEX_ALGO_HID = 0x2,
BT_8723D_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723D_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723D_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723D_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723D_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8723D_2ANT_COEX_ALGO_MAX
};
enum bt_8723d_2ant_phase {
BT_8723D_2ANT_PHASE_COEX_INIT = 0x0,
BT_8723D_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8723D_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8723D_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8723D_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8723D_2ANT_PHASE_BTMPMODE = 0x5,
BT_8723D_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8723D_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8723D_2ANT_PHASE_MAX
};
enum bt_8723d_2ant_Scoreboard {
BT_8723D_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8723D_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8723D_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8723D_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8723D_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8723d_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
};
struct coex_sta_8723d_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
boolean wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
};
#define BT_8723D_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723D_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723D_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723d_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723d2ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723d2ant_power_on_setting(btcoexist)
#define ex_halbtc8723d2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723d2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723d2ant_init_coex_dm(btcoexist)
#define ex_halbtc8723d2ant_ips_notify(btcoexist, type)
#define ex_halbtc8723d2ant_lps_notify(btcoexist, type)
#define ex_halbtc8723d2ant_scan_notify(btcoexist, type)
#define ex_halbtc8723d2ant_connect_notify(btcoexist, type)
#define ex_halbtc8723d2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723d2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723d2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723d2ant_halt_notify(btcoexist)
#define ex_halbtc8723d2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723d2ant_periodical(btcoexist)
#define ex_halbtc8723d2ant_display_coex_info(btcoexist)
#define ex_halbtc8723d2ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723d2ant_display_ant_detection(btcoexist)
#define ex_halbtc8723d2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

3461
hal/btc/halbtc8812a1ant.c
View file

File diff suppressed because it is too large Load diff

230
hal/btc/halbtc8812a1ant.h
View file

@ -1,230 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8812A_SUPPORT == 1)
/* *******************************************
* The following is for 8812A 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1
#define BT_INFO_8812A_1ANT_B_FTP BIT(7)
#define BT_INFO_8812A_1ANT_B_A2DP BIT(6)
#define BT_INFO_8812A_1ANT_B_HID BIT(5)
#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8812A_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2
#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
enum bt_info_src_8812a_1ant {
BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8812A_1ANT_MAX
};
enum bt_8812a_1ant_bt_status {
BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8812A_1ANT_BT_STATUS_MAX
};
enum bt_8812a_1ant_wifi_status {
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8812A_1ANT_WIFI_STATUS_MAX
};
enum bt_8812a_1ant_coex_algo {
BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8812A_1ANT_COEX_ALGO_SCO = 0x1,
BT_8812A_1ANT_COEX_ALGO_HID = 0x2,
BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8812A_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8812a_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8812a_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8812A_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_MAX];
u32 bt_info_query_cnt;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
boolean cck_lock;
boolean pre_ccklock;
u8 coex_table_type;
boolean force_lps_on;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8812a1ant_power_on_setting(btcoexist)
#define ex_halbtc8812a1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8812a1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8812a1ant_init_coex_dm(btcoexist)
#define ex_halbtc8812a1ant_ips_notify(btcoexist, type)
#define ex_halbtc8812a1ant_lps_notify(btcoexist, type)
#define ex_halbtc8812a1ant_scan_notify(btcoexist, type)
#define ex_halbtc8812a1ant_connect_notify(btcoexist, type)
#define ex_halbtc8812a1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8812a1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8812a1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8812a1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8812a1ant_halt_notify(btcoexist)
#define ex_halbtc8812a1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8812a1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8812a1ant_periodical(btcoexist)
#define ex_halbtc8812a1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#define ex_halbtc8812a1ant_display_coex_info(btcoexist)
#endif
#endif

5624
hal/btc/halbtc8812a2ant.c
View file

File diff suppressed because it is too large Load diff

227
hal/btc/halbtc8812a2ant.h
View file

@ -1,227 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8812A_SUPPORT == 1)
/* *******************************************
* The following is for 8812A 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0
#define BT_INFO_8812A_2ANT_B_FTP BIT(7)
#define BT_INFO_8812A_2ANT_B_A2DP BIT(6)
#define BT_INFO_8812A_2ANT_B_HID BIT(5)
#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8812A_2ANT_B_CONNECTION BIT(0)
#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2
#define NOISY_AP_NUM_THRESH_8812A 50
enum bt_info_src_8812a_2ant {
BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8812A_2ANT_MAX
};
enum bt_8812a_2ant_bt_status {
BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8812A_2ANT_BT_STATUS_MAX
};
enum bt_8812a_2ant_coex_algo {
BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8812A_2ANT_COEX_ALGO_SCO = 0x1,
BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2,
BT_8812A_2ANT_COEX_ALGO_HID = 0x3,
BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4,
BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6,
BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7,
BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc,
BT_8812A_2ANT_COEX_ALGO_MAX = 0xd
};
struct coex_dm_8812a_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean auto_tdma_adjust_low_rssi;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 cur_ra_mask_type;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
boolean cur_enable_pta;
boolean pre_enable_pta;
};
struct coex_sta_8812a_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean acl_busy;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8812A_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_MAX];
u32 bt_info_query_cnt;
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
boolean pre_bt_disabled;
u32 pre_bt_info_c2h_cnt_bt_rsp;
u32 pre_bt_info_c2h_cnt_bt_send;
boolean force_lps_on;
u32 bt_coex_supported_version;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
void ex_halbtc8812a2ant_pta_off_on_notify(IN struct btc_coexist *btcoexist,
IN u8 bt_status);
#else
#define ex_halbtc8812a2ant_power_on_setting(btcoexist)
#define ex_halbtc8812a2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8812a2ant_init_coex_dm(btcoexist)
#define ex_halbtc8812a2ant_ips_notify(btcoexist, type)
#define ex_halbtc8812a2ant_lps_notify(btcoexist, type)
#define ex_halbtc8812a2ant_scan_notify(btcoexist, type)
#define ex_halbtc8812a2ant_connect_notify(btcoexist, type)
#define ex_halbtc8812a2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8812a2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8812a2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8812a2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8812a2ant_halt_notify(btcoexist)
#define ex_halbtc8812a2ant_periodical(btcoexist)
#define ex_halbtc8812a2ant_display_coex_info(btcoexist)
#define ex_halbtc8812a2ant_dbg_control(btcoexist, op_code, op_len, pdata)
#define ex_halbtc8812a2ant_pta_off_on_notify(btcoexist, bt_status)
#endif
#endif

3289
hal/btc/halbtc8821a1ant.c
View file

File diff suppressed because it is too large Load diff

214
hal/btc/halbtc8821a1ant.h
View file

@ -1,214 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821A_SUPPORT == 1)
/* *******************************************
* The following is for 8821A 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1
#define BT_INFO_8821A_1ANT_B_FTP BIT(7)
#define BT_INFO_8821A_1ANT_B_A2DP BIT(6)
#define BT_INFO_8821A_1ANT_B_HID BIT(5)
#define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821A_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821A_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT 2
enum bt_info_src_8821a_1ant {
BT_INFO_SRC_8821A_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821A_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821A_1ANT_MAX
};
enum bt_8821a_1ant_bt_status {
BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821A_1ANT_BT_STATUS_MAX
};
enum bt_8821a_1ant_wifi_status {
BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8821A_1ANT_WIFI_STATUS_MAX
};
enum bt_8821a_1ant_coex_algo {
BT_8821A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821A_1ANT_COEX_ALGO_SCO = 0x1,
BT_8821A_1ANT_COEX_ALGO_HID = 0x2,
BT_8821A_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821A_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821A_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821A_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8821a_1ant {
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8821a_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 cut_version;
u8 bt_rssi;
u8 scan_ap_num;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821A_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_1ANT_MAX];
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
boolean bt_whck_test; /* Add for ASUS WHQL TEST that enable wifi test bt */
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821a1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821a1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821a1ant_power_on_setting(btcoexist)
#define ex_halbtc8821a1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821a1ant_init_coex_dm(btcoexist)
#define ex_halbtc8821a1ant_ips_notify(btcoexist, type)
#define ex_halbtc8821a1ant_lps_notify(btcoexist, type)
#define ex_halbtc8821a1ant_scan_notify(btcoexist, type)
#define ex_halbtc8821a1ant_switchband_notify(btcoexist, type)
#define ex_halbtc8821a1ant_connect_notify(btcoexist, type)
#define ex_halbtc8821a1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821a1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821a1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821a1ant_halt_notify(btcoexist)
#define ex_halbtc8821a1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821a1ant_periodical(btcoexist)
#define ex_halbtc8821a1ant_display_coex_info(btcoexist)
#endif
#endif

4637
hal/btc/halbtc8821a2ant.c
View file

File diff suppressed because it is too large Load diff

211
hal/btc/halbtc8821a2ant.h
View file

@ -1,211 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821A_SUPPORT == 1)
/* *******************************************
* The following is for 8821A 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8821A_2ANT 1
#define BT_INFO_8821A_2ANT_B_FTP BIT(7)
#define BT_INFO_8821A_2ANT_B_A2DP BIT(6)
#define BT_INFO_8821A_2ANT_B_HID BIT(5)
#define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821A_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2
#define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
#define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
enum bt_info_src_8821a_2ant {
BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821A_2ANT_MAX
};
enum bt_8821a_2ant_bt_status {
BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821A_2ANT_BT_STATUS_MAX
};
enum bt_8821a_2ant_coex_algo {
BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821A_2ANT_COEX_ALGO_SCO = 0x1,
BT_8821A_2ANT_COEX_ALGO_HID = 0x2,
BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821A_2ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8821a_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
};
struct coex_sta_8821a_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 cut_version;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821a2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821a2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821a2ant_power_on_setting(btcoexist)
#define ex_halbtc8821a2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821a2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821a2ant_init_coex_dm(btcoexist)
#define ex_halbtc8821a2ant_ips_notify(btcoexist, type)
#define ex_halbtc8821a2ant_lps_notify(btcoexist, type)
#define ex_halbtc8821a2ant_scan_notify(btcoexist, type)
#define ex_halbtc8821a2ant_switchband_notify(btcoexist, type)
#define ex_halbtc8821a2ant_connect_notify(btcoexist, type)
#define ex_halbtc8821a2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821a2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821a2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821a2ant_halt_notify(btcoexist)
#define ex_halbtc8821a2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821a2ant_periodical(btcoexist)
#define ex_halbtc8821a2ant_display_coex_info(btcoexist)
#endif
#endif

6674
hal/btc/halbtc8821c1ant.c
View file

File diff suppressed because it is too large Load diff

473
hal/btc/halbtc8821c1ant.h
View file

@ -1,473 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821C_SUPPORT == 1)
/* *******************************************
* The following is for 8821C 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8821C_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8821C_1ANT 1
#define BT_INFO_8821C_1ANT_B_FTP BIT(7)
#define BT_INFO_8821C_1ANT_B_A2DP BIT(6)
#define BT_INFO_8821C_1ANT_B_HID BIT(5)
#define BT_INFO_8821C_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821C_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821C_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821C_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821C_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8821C_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8821C_1ANT 2
#define BT_8821C_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
#define BT_8821C_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8821C_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8821C_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8821C_1ANT_ANTDET_ENABLE 0
#define BT_8821C_1ANT_ANTDET_BTTXTIME 100
#define BT_8821C_1ANT_ANTDET_BTTXCHANNEL 39
#define BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8821C_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8821c_1ant_signal_state {
BT_8821C_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8821C_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8821C_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8821C_1ANT_SIG_STA_MAX
};
enum bt_8821c_1ant_path_ctrl_owner {
BT_8821C_1ANT_PCO_BTSIDE = 0x0,
BT_8821C_1ANT_PCO_WLSIDE = 0x1,
BT_8821C_1ANT_PCO_MAX
};
enum bt_8821c_1ant_gnt_ctrl_type {
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8821C_1ANT_GNT_TYPE_MAX
};
enum bt_8821c_1ant_gnt_ctrl_block {
BT_8821C_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8821C_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8821C_1ANT_GNT_BLOCK_BB = 0x2,
BT_8821C_1ANT_GNT_BLOCK_MAX
};
enum bt_8821c_1ant_lte_coex_table_type {
BT_8821C_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8821C_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8821C_1ANT_CTT_MAX
};
enum bt_8821c_1ant_lte_break_table_type {
BT_8821C_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8821C_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8821C_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8821C_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8821C_1ANT_LBTT_MAX
};
enum bt_info_src_8821c_1ant {
BT_INFO_SRC_8821C_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821C_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821C_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821C_1ANT_MAX
};
enum bt_8821c_1ant_bt_status {
BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821C_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821C_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821C_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821C_1ANT_BT_STATUS_MAX
};
enum bt_8821c_1ant_wifi_status {
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8821C_1ANT_WIFI_STATUS_MAX
};
enum bt_8821c_1ant_coex_algo {
BT_8821C_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821C_1ANT_COEX_ALGO_SCO = 0x1,
BT_8821C_1ANT_COEX_ALGO_HID = 0x2,
BT_8821C_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8821C_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821C_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821C_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8821C_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821C_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821C_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821C_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821C_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8821c_1ant_ext_ant_switch_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_1ant_ext_ant_switch_ctrl_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_1ant_ext_ant_switch_pos_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_MAX
};
enum bt_8821c_1ant_ext_band_switch_pos_type {
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8821c_1ant_int_block {
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8821c_1ant_phase {
BT_8821C_1ANT_PHASE_COEX_INIT = 0x0,
BT_8821C_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8821C_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8821C_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8821C_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8821C_1ANT_PHASE_BTMPMODE = 0x5,
BT_8821C_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8821C_1ANT_PHASE_COEX_POWERON = 0x7,
BT_8821C_1ANT_PHASE_MAX
};
enum bt_8821c_1ant_Scoreboard {
BT_8821C_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8821C_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8821C_1ANT_SCOREBOARD_SCAN = BIT(2)
};
struct coex_dm_8821c_1ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
u8 error_condition;
};
struct coex_sta_8821c_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821C_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u8 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
};
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8821c_1ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8821C_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8821C_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8821C_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8821c_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8821C_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8821C_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821c1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821c1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821c1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821c1ant_power_on_setting(btcoexist)
#define ex_halbtc8821c1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821c1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821c1ant_init_coex_dm(btcoexist)
#define ex_halbtc8821c1ant_ips_notify(btcoexist, type)
#define ex_halbtc8821c1ant_lps_notify(btcoexist, type)
#define ex_halbtc8821c1ant_scan_notify(btcoexist, type)
#define ex_halbtc8821c1ant_switchband_notify(btcoexist,type)
#define ex_halbtc8821c1ant_connect_notify(btcoexist, type)
#define ex_halbtc8821c1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821c1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821c1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8821c1ant_halt_notify(btcoexist)
#define ex_halbtc8821c1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821c1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8821c1ant_periodical(btcoexist)
#define ex_halbtc8821c1ant_display_coex_info(btcoexist)
#define ex_halbtc8821c1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_display_ant_detection(btcoexist)
#endif
#endif

6936
hal/btc/halbtc8821c2ant.c
View file

File diff suppressed because it is too large Load diff

478
hal/btc/halbtc8821c2ant.h
View file

@ -1,478 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821C_SUPPORT == 1)
/* *******************************************
* The following is for 8821C 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8821C_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8821C_2ANT 1
#define BT_INFO_8821C_2ANT_B_FTP BIT(7)
#define BT_INFO_8821C_2ANT_B_A2DP BIT(6)
#define BT_INFO_8821C_2ANT_B_HID BIT(5)
#define BT_INFO_8821C_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821C_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821C_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821C_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821C_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8821C_2ANT 2
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8821C_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8821C_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8821C_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8821C_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8821C_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8821C_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8821C_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8821C_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8821C_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8821C_2ANT_ANTDET_ENABLE 0
#define BT_8821C_2ANT_ANTDET_BTTXTIME 100
#define BT_8821C_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8821C_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8821c_2ant_signal_state {
BT_8821C_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8821C_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8821C_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8821C_2ANT_SIG_STA_MAX
};
enum bt_8821c_2ant_path_ctrl_owner {
BT_8821C_2ANT_PCO_BTSIDE = 0x0,
BT_8821C_2ANT_PCO_WLSIDE = 0x1,
BT_8821C_2ANT_PCO_MAX
};
enum bt_8821c_2ant_gnt_ctrl_type {
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8821C_2ANT_GNT_TYPE_MAX
};
enum bt_8821c_2ant_gnt_ctrl_block {
BT_8821C_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8821C_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8821C_2ANT_GNT_BLOCK_BB = 0x2,
BT_8821C_2ANT_GNT_BLOCK_MAX
};
enum bt_8821c_2ant_lte_coex_table_type {
BT_8821C_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8821C_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8821C_2ANT_CTT_MAX
};
enum bt_8821c_2ant_lte_break_table_type {
BT_8821C_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8821C_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8821C_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8821C_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8821C_2ANT_LBTT_MAX
};
enum bt_info_src_8821c_2ant {
BT_INFO_SRC_8821C_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821C_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821C_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821C_2ANT_MAX
};
enum bt_8821c_2ant_bt_status {
BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821C_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821C_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821C_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821C_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821C_2ANT_BT_STATUS_MAX
};
enum bt_8821c_2ant_coex_algo {
BT_8821C_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821C_2ANT_COEX_ALGO_SCO = 0x1,
BT_8821C_2ANT_COEX_ALGO_HID = 0x2,
BT_8821C_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8821C_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821C_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821C_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8821C_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821C_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821C_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821C_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821C_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8821C_2ANT_COEX_ALGO_MAX
};
enum bt_8821c_2ant_ext_ant_switch_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_2ant_ext_ant_switch_ctrl_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_2ant_ext_ant_switch_pos_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
};
enum bt_8821c_2ant_ext_band_switch_pos_type {
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8821c_2ant_int_block {
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8821c_2ant_phase {
BT_8821C_2ANT_PHASE_COEX_INIT = 0x0,
BT_8821C_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8821C_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8821C_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8821C_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8821C_2ANT_PHASE_BTMPMODE = 0x5,
BT_8821C_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8821C_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8821C_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
BT_8821C_2ANT_PHASE_MAX
};
enum bt_8821c_2ant_Scoreboard {
BT_8821C_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8821C_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8821C_2ANT_SCOREBOARD_SCAN = BIT(2)
};
struct coex_dm_8821c_2ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
};
struct coex_sta_8821c_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821C_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u8 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
};
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8821c_2ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8821C_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8821C_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8821C_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8821c_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8821C_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8821C_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821c2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821c2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821c2ant_power_on_setting(btcoexist)
#define ex_halbtc8821c2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821c2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821c2ant_init_coex_dm(btcoexist)
#define ex_halbtc8821c2ant_ips_notify(btcoexist, type)
#define ex_halbtc8821c2ant_lps_notify(btcoexist, type)
#define ex_halbtc8821c2ant_scan_notify(btcoexist, type)
#define ex_halbtc8821c2ant_switchband_notify(btcoexist,type)
#define ex_halbtc8821c2ant_connect_notify(btcoexist, type)
#define ex_halbtc8821c2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821c2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821c2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8821c2ant_halt_notify(btcoexist)
#define ex_halbtc8821c2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821c2ant_periodical(btcoexist)
#define ex_halbtc8821c2ant_display_coex_info(btcoexist)
#define ex_halbtc8821c2ant_display_ant_detection(btcoexist)
#define ex_halbtc8821c2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

186
hal/btc/halbtc8821cwifionly.c
View file

@ -1,186 +0,0 @@
#include "mp_precomp.h"
static struct rfe_type_8821c_wifi_only gl_rfe_type_8821c_1ant;
static struct rfe_type_8821c_wifi_only *rfe_type = &gl_rfe_type_8821c_1ant;
VOID hal8821c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
boolean switch_polatiry_inverse = false;
u8 regval_0xcb7 = 0;
u8 pos_type, ctrl_type;
if (!rfe_type->ext_ant_switch_exist)
return;
/* swap control polarity if use different switch control polarity*/
/* Normal switch polarity for DPDT, 0xcb4[29:28] = 2b'01 => BTG to Main, WLG to Aux, 0xcb4[29:28] = 2b'10 => BTG to Aux, WLG to Main */
/* Normal switch polarity for SPDT, 0xcb4[29:28] = 2b'01 => Ant to BTG, 0xcb4[29:28] = 2b'10 => Ant to WLG */
if (rfe_type->ext_ant_switch_ctrl_polarity)
switch_polatiry_inverse = !switch_polatiry_inverse;
/* swap control polarity if 1-Ant at Aux */
if (rfe_type->ant_at_main_port == false)
switch_polatiry_inverse = !switch_polatiry_inverse;
if (is_5g)
pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA;
else
pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG;
switch (pos_type) {
default:
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA:
break;
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG:
if (!rfe_type->wlg_Locate_at_btg)
switch_polatiry_inverse = !switch_polatiry_inverse;
break;
}
if (pwifionlycfg->haldata_info.ant_div_cfg)
ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV;
else
ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW;
switch (ctrl_type) {
default:
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW:
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff, 0x77);
regval_0xcb7 = (switch_polatiry_inverse == false ? 0x1 : 0x2);
/* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x30000000, regval_0xcb7);
break;
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV:
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff, 0x88);
/* no regval_0xcb7 setup required, because antenna switch control value by antenna diversity */
break;
}
}
VOID halbtc8821c_wifi_only_set_rfe_type(
IN struct wifi_only_cfg *pwifionlycfg
)
{
/* the following setup should be got from Efuse in the future */
rfe_type->rfe_module_type = (pwifionlycfg->haldata_info.rfe_type) & 0x1f;
rfe_type->ext_ant_switch_ctrl_polarity = 0;
switch (rfe_type->rfe_module_type) {
case 0:
default:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*2-Ant, DPDT, WLG*/
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 1:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT; /*1-Ant, Main, DPDT or SPDT, WLG */
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 2:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT; /*1-Ant, Main, DPDT or SPDT, BTG */
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = true;
break;
case 3:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*1-Ant, Aux, DPDT, WLG */
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = false;
break;
case 4:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*1-Ant, Aux, DPDT, BTG */
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = false;
break;
case 5:
rfe_type->ext_ant_switch_exist = false; /*2-Ant, no antenna switch, WLG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 6:
rfe_type->ext_ant_switch_exist = false; /*2-Ant, no antenna switch, WLG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 7:
rfe_type->ext_ant_switch_exist = true; /*2-Ant, DPDT, BTG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = true;
break;
}
}
VOID
ex_hal8821c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
halbtc8821c_wifi_only_set_rfe_type(pwifionlycfg);
/* set gnt_wl, gnt_bt control owner to WL*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0x400000, 0x1);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
}
VOID
ex_hal8821c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
ex_hal8821c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}

70
hal/btc/halbtc8821cwifionly.h
View file

@ -1,70 +0,0 @@
#ifndef __INC_HAL8821CWIFIONLYHWCFG_H
#define __INC_HAL8821CWIFIONLYHWCFG_H
struct rfe_type_8821c_wifi_only {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ant_at_main_port;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
enum bt_8821c_wifi_only_ext_ant_switch_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_wifi_only_ext_ant_switch_ctrl_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_wifi_only_ext_ant_switch_pos_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_MAX
};
VOID
hal8821c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
halbtc8821c_wifi_only_set_rfe_type(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8821c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8821c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8821c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

6840
hal/btc/halbtc8822b1ant.c
View file

File diff suppressed because it is too large Load diff

433
hal/btc/halbtc8822b1ant.h
View file

@ -1,433 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8822B_SUPPORT == 1)
/* *******************************************
* The following is for 8822B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8822B_1ANT 1
#define BT_INFO_8822B_1ANT_B_FTP BIT(7)
#define BT_INFO_8822B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8822B_1ANT_B_HID BIT(5)
#define BT_INFO_8822B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8822B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8822B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8822B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8822B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8822B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT 2
#define BT_8822B_1ANT_WIFI_NOISY_THRESH 150 /* max: 255 */
/* for Antenna detection */
#define BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8822B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8822B_1ANT_ANTDET_ENABLE 0
#define BT_8822B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
#define BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8822b_1ant_signal_state {
BT_8822B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8822B_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8822B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8822B_1ANT_SIG_STA_MAX
};
enum bt_8822b_1ant_path_ctrl_owner {
BT_8822B_1ANT_PCO_BTSIDE = 0x0,
BT_8822B_1ANT_PCO_WLSIDE = 0x1,
BT_8822B_1ANT_PCO_MAX
};
enum bt_8822b_1ant_gnt_ctrl_type {
BT_8822B_1ANT_GNT_CTRL_BY_PTA = 0x0,
BT_8822B_1ANT_GNT_CTRL_BY_SW = 0x1,
BT_8822B_1ANT_GNT_CTRL_MAX
};
enum bt_8822b_1ant_gnt_ctrl_block {
BT_8822B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8822B_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8822B_1ANT_GNT_BLOCK_BB = 0x2,
BT_8822B_1ANT_GNT_BLOCK_MAX
};
enum bt_8822b_1ant_lte_coex_table_type {
BT_8822B_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8822B_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8822B_1ANT_CTT_MAX
};
enum bt_8822b_1ant_lte_break_table_type {
BT_8822B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8822B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8822B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8822B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8822B_1ANT_LBTT_MAX
};
enum bt_info_src_8822b_1ant {
BT_INFO_SRC_8822B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8822B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8822B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8822B_1ANT_MAX
};
enum bt_8822b_1ant_bt_status {
BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8822B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8822B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8822B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8822B_1ANT_BT_STATUS_MAX
};
enum bt_8822b_1ant_wifi_status {
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8822B_1ANT_WIFI_STATUS_MAX
};
enum bt_8822b_1ant_coex_algo {
BT_8822B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8822B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8822B_1ANT_COEX_ALGO_HID = 0x2,
BT_8822B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8822B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8822B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8822B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8822B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8822B_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8822b_1ant_ext_ant_switch_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8822b_1ant_ext_ant_switch_ctrl_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8822b_1ant_ext_ant_switch_pos_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_MAX
};
enum bt_8822b_1ant_phase {
BT_8822B_1ANT_PHASE_COEX_INIT = 0x0,
BT_8822B_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8822B_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8822B_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8822B_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8822B_1ANT_PHASE_BTMPMODE = 0x5,
BT_8822B_1ANT_PHASE_MAX
};
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
enum bt_8822b_1ant_Scoreboard {
BT_8822B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8822B_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8822B_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8822B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8822B_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8822b_1ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 error_condition;
};
struct coex_sta_8822b_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
boolean concurrent_rx_mode_on;
u32 special_pkt_period_cnt;
u16 score_board;
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
boolean run_time_state;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
};
struct rfe_type_8822b_1ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type;
u8 ext_ant_switch_ctrl_polarity; /* iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 => Ant to BT/5G */
};
#define BT_8822B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8822B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8822B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8822b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8822B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8822B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_scan_notify_without_bt(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_switchband_notify_without_bt(IN struct btc_coexist
*btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8822b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
#else
#define ex_halbtc8822b1ant_power_on_setting(btcoexist)
#define ex_halbtc8822b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8822b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8822b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8822b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8822b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8822b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8822b1ant_scan_notify_without_bt(btcoexist, type)
#define ex_halbtc8822b1ant_switchband_notify(btcoexist, type)
#define ex_halbtc8822b1ant_switchband_notify_without_bt(btcoexist, type)
#define ex_halbtc8822b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8822b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8822b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8822b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8822b1ant_halt_notify(btcoexist)
#define ex_halbtc8822b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8822b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8822b1ant_periodical(btcoexist)
#define ex_halbtc8822b1ant_display_coex_info(btcoexist)
#define ex_halbtc8822b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_display_ant_detection(btcoexist)
#define ex_halbtc8822b1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#endif
#else
void ex_halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist
*btcoexist);
void ex_halbtc8822b1ant_switch_band_without_bt(IN struct btc_coexist *btcoexist,
IN boolean wifi_only_5g);
#endif

5543
hal/btc/halbtc8822b2ant.c
View file

File diff suppressed because it is too large Load diff

493
hal/btc/halbtc8822b2ant.h
View file

@ -1,493 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8822B_SUPPORT == 1)
/* *******************************************
* The following is for 8822B 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8822B_2ANT_COEX_DBG 1
#define BT_AUTO_REPORT_ONLY_8822B_2ANT 1
#define BT_INFO_8822B_2ANT_B_FTP BIT(7)
#define BT_INFO_8822B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8822B_2ANT_B_HID BIT(5)
#define BT_INFO_8822B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8822B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8822B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8822B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8822B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8822B_2ANT 2
#define BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 40 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES2 35 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8822B_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8822B_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8822B_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8822B_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8822B_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8822B_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8822B_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8822B_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8822B_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8822B_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8822B_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8822B_2ANT_ANTDET_ENABLE 0
#define BT_8822B_2ANT_ANTDET_BTTXTIME 100
#define BT_8822B_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8822b_2ant_signal_state {
BT_8822B_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8822B_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8822B_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8822B_2ANT_SIG_STA_MAX
};
enum bt_8822b_2ant_path_ctrl_owner {
BT_8822B_2ANT_PCO_BTSIDE = 0x0,
BT_8822B_2ANT_PCO_WLSIDE = 0x1,
BT_8822B_2ANT_PCO_MAX
};
enum bt_8822b_2ant_gnt_ctrl_type {
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8822B_2ANT_GNT_TYPE_MAX
};
enum bt_8822b_2ant_gnt_ctrl_block {
BT_8822B_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8822B_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8822B_2ANT_GNT_BLOCK_BB = 0x2,
BT_8822B_2ANT_GNT_BLOCK_MAX
};
enum bt_8822b_2ant_lte_coex_table_type {
BT_8822B_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8822B_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8822B_2ANT_CTT_MAX
};
enum bt_8822b_2ant_lte_break_table_type {
BT_8822B_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8822B_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8822B_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8822B_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8822B_2ANT_LBTT_MAX
};
enum bt_info_src_8822b_2ant {
BT_INFO_SRC_8822B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8822B_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8822B_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8822B_2ANT_MAX
};
enum bt_8822b_2ant_bt_status {
BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8822B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8822B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8822B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8822B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8822B_2ANT_BT_STATUS_MAX
};
enum bt_8822b_2ant_coex_algo {
BT_8822B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8822B_2ANT_COEX_ALGO_SCO = 0x1,
BT_8822B_2ANT_COEX_ALGO_HID = 0x2,
BT_8822B_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8822B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8822B_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8822B_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8822B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8822B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8822B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8822B_2ANT_COEX_ALGO_MAX
};
enum bt_8822b_2ant_ext_ant_switch_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8822b_2ant_ext_ant_switch_ctrl_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8822b_2ant_ext_ant_switch_pos_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
};
enum bt_8822b_2ant_ext_band_switch_pos_type {
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8822b_2ant_int_block {
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8822b_2ant_phase {
BT_8822B_2ANT_PHASE_COEX_INIT = 0x0,
BT_8822B_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8822B_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8822B_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8822B_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8822B_2ANT_PHASE_BTMPMODE = 0x5,
BT_8822B_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8822B_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
BT_8822B_2ANT_PHASE_MAX
};
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
enum bt_8822b_2ant_Scoreboard {
BT_8822B_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8822B_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8822B_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8822B_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8822B_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8822b_2ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
};
struct coex_sta_8822b_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8822B_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u8 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
};
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8822b_2ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8822B_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8822B_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8822B_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8822b_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8822B_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8822B_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8822b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8822b2ant_power_on_setting(btcoexist)
#define ex_halbtc8822b2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8822b2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8822b2ant_init_coex_dm(btcoexist)
#define ex_halbtc8822b2ant_ips_notify(btcoexist, type)
#define ex_halbtc8822b2ant_lps_notify(btcoexist, type)
#define ex_halbtc8822b2ant_scan_notify(btcoexist, type)
#define ex_halbtc8822b2ant_switchband_notify(btcoexist, type)
#define ex_halbtc8822b2ant_connect_notify(btcoexist, type)
#define ex_halbtc8822b2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8822b2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8822b2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8822b2ant_halt_notify(btcoexist)
#define ex_halbtc8822b2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8822b2ant_periodical(btcoexist)
#define ex_halbtc8822b2ant_display_coex_info(btcoexist)
#define ex_halbtc8822b2ant_display_ant_detection(btcoexist)
#define ex_halbtc8822b2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

54
hal/btc/halbtc8822bwifionly.c
View file

@ -1,54 +0,0 @@
#include "mp_precomp.h"
VOID
ex_hal8822b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
/*BB control*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/*SW control*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0xff, 0x77);
/*antenna mux switch */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x974, 0x300, 0x3);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1990, 0x300, 0x0);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x80000, 0x0);
/*switch to WL side controller and gnt_wl gnt_bt debug signal */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
}
VOID
ex_hal8822b_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
ex_hal8822b_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
if (is_5g)
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x1);
else
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x2);
}

22
hal/btc/halbtc8822bwifionly.h
View file

@ -1,22 +0,0 @@
#ifndef __INC_HAL8822BWIFIONLYHWCFG_H
#define __INC_HAL8822BWIFIONLYHWCFG_H
VOID
ex_hal8822b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8822b_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8822b_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

21
hal/btc/mp_precomp.h
View file

@ -61,26 +61,5 @@ extern u4Byte GLBtcDbgType[];
#endif
#include "halbtcoutsrc.h"
#include "halbtc8192e1ant.h"
#include "halbtc8192e2ant.h"
#include "halbtc8723b1ant.h"
#include "halbtc8723b2ant.h"
#include "halbtc8812a1ant.h"
#include "halbtc8812a2ant.h"
#include "halbtc8821a1ant.h"
#include "halbtc8821a2ant.h"
#include "halbtc8703b1ant.h"
#include "halbtc8723d1ant.h"
#include "halbtc8723d2ant.h"
#include "halbtc8822b1ant.h"
#include "halbtc8822b2ant.h"
#include "halbtc8821c1ant.h"
#include "halbtc8821c2ant.h"
/* for wifi only mode */
#include "hal_btcoex_wifionly.h"
#include "halbtc8723bwifionly.h"
#include "halbtc8822bwifionly.h"
#include "halbtc8821cwifionly.h"
#endif /* __MP_PRECOMP_H__ */

17
hal/hal_btcoex_wifionly.c
View file

@ -94,11 +94,6 @@ void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter)
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
}
void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
@ -108,23 +103,11 @@ void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
}
void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
{
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
if (IS_HARDWARE_TYPE_8723B(padapter))
ex_hal8723b_wifi_only_hw_config(pwifionlycfg);
else if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_hw_config(pwifionlycfg);
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_hw_config(pwifionlycfg);
}
void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter)

2635
hal/hal_halmac.c
View file

File diff suppressed because it is too large Load diff

121
hal/hal_halmac.h
View file

@ -1,121 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _HAL_HALMAC_H_
#define _HAL_HALMAC_H_
#include <drv_types.h> /* adapter_to_dvobj(), struct intf_hdl and etc. */
#include <hal_data.h> /* struct hal_spec_t */
#include "halmac/halmac_api.h" /* PHALMAC_ADAPTER and etc. */
/* HALMAC Definition for Driver */
#define RTW_HALMAC_H2C_MAX_SIZE HALMAC_H2C_CMD_ORIGINAL_SIZE_88XX
#define RTW_HALMAC_BA_SSN_RPT_SIZE 4
#define dvobj_set_halmac(d, mac) ((d)->halmac = (mac))
#define dvobj_to_halmac(d) ((PHALMAC_ADAPTER)((d)->halmac))
#define adapter_to_halmac(p) dvobj_to_halmac(adapter_to_dvobj(p))
/* for H2C cmd */
#define MAX_H2C_BOX_NUMS 4
#define MESSAGE_BOX_SIZE 4
#define EX_MESSAGE_BOX_SIZE 4
typedef enum _RTW_HALMAC_MODE {
RTW_HALMAC_MODE_NORMAL,
RTW_HALMAC_MODE_WIFI_TEST,
} RTW_HALMAC_MODE;
extern HALMAC_PLATFORM_API rtw_halmac_platform_api;
/* HALMAC API for Driver(HAL) */
u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
u16 rtw_halmac_read16(struct intf_hdl *, u32 addr);
u32 rtw_halmac_read32(struct intf_hdl *, u32 addr);
void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr);
u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr);
u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr);
#endif
int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
void rtw_dump_halmac_info(void *sel);
int rtw_halmac_init_adapter(struct dvobj_priv *, PHALMAC_PLATFORM_API);
int rtw_halmac_deinit_adapter(struct dvobj_priv *);
int rtw_halmac_poweron(struct dvobj_priv *);
int rtw_halmac_poweroff(struct dvobj_priv *);
int rtw_halmac_init_hal(struct dvobj_priv *);
int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize);
int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath);
int rtw_halmac_deinit_hal(struct dvobj_priv *);
int rtw_halmac_self_verify(struct dvobj_priv *);
int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size);
int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size);
int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_config_rx_info(struct dvobj_priv *, HALMAC_DRV_INFO);
int rtw_halmac_set_mac_address(struct dvobj_priv *, enum _hw_port, u8 *addr);
int rtw_halmac_set_bssid(struct dvobj_priv *, enum _hw_port hwport, u8 *addr);
int rtw_halmac_set_bandwidth(struct dvobj_priv *, u8 channel, u8 pri_ch_idx, u8 bw);
int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer);
int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
int rtw_halmac_get_hw_value(struct dvobj_priv *, HALMAC_HW_ID hw_id, VOID *pvalue);
int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);
int rtw_halmac_get_drv_info_sz(struct dvobj_priv *, u8 *sz);
int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg);
int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size);
int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *);
#ifdef CONFIG_SDIO_HCI
int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page);
u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size);
int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size);
u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq);
#endif /* CONFIG_SDIO_HCI */
#ifdef CONFIG_USB_HCI
u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size);
u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_SUPPORT_TRX_SHARED
void dump_trx_share_mode(void *sel, _adapter *adapter);
#endif
#endif /* _HAL_HALMAC_H_ */

3
hal/phydm/phydm_beamforming.h
View file

@ -8,9 +8,6 @@
/*Beamforming Related*/
#include "txbf/halcomtxbf.h"
#include "txbf/haltxbfjaguar.h"
#include "txbf/haltxbf8192e.h"
#include "txbf/haltxbf8814a.h"
#include "txbf/haltxbf8822b.h"
#include "txbf/haltxbfinterface.h"
#if (BEAMFORMING_SUPPORT == 1)

391
hal/phydm/txbf/haltxbf8192e.c
View file

@ -1,391 +0,0 @@
/* ************************************************************
* Description:
*
* This file is for 8192E TXBF mechanism
*
* ************************************************************ */
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (BEAMFORMING_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
void
hal_txbf_8192e_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
odm_write_1byte(p_dm_odm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW));
}
void
hal_txbf_8192e_rf_mode(
void *p_dm_void,
struct _RT_BEAMFORMING_INFO *p_beam_info
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
bool is_self_beamformer = false;
bool is_self_beamformee = false;
enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_dm_odm->rf_type == ODM_1T1R)
return;
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
if (p_beam_info->beamformee_su_cnt > 0) {
/*Path_A*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/
/*Path_B*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/
} else {
/*Path_A*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/
/*Path_B*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/
}
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
if (p_beam_info->beamformee_su_cnt > 0) {
odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x83321333);
odm_set_bb_reg(p_dm_odm, 0xa04, MASKBYTE3, 0xc1);
} else
odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x81121313);
}
void
hal_txbf_8192e_fw_txbf_cmd(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 idx, period0 = 0, period1 = 0;
u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
u8 u1_tx_bf_parm[3] = {0};
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
if (p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
if (idx == 0) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum0 = 0xFE;
else
PageNum0 = 0xFF; /* stop sounding */
period0 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
} else if (idx == 1) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum1 = 0xFE;
else
PageNum1 = 0xFF; /* stop sounding */
period1 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
}
}
}
u1_tx_bf_parm[0] = PageNum0;
u1_tx_bf_parm[1] = PageNum1;
u1_tx_bf_parm[2] = (period1 << 4) | period0;
odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
("[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1));
}
void
hal_txbf_8192e_download_ndpa(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 u1b_tmp = 0, tmp_reg422 = 0, head_page;
u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
bool is_send_beacon = false;
struct _ADAPTER *adapter = p_dm_odm->adapter;
u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;
/*default reseved 1 page for the IC type which is undefined.*/
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = true;
#endif
if (idx == 0)
head_page = 0xFE;
else
head_page = 0xFE;
phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8192E+1);
odm_write_1byte(p_dm_odm, REG_CR_8192E+1, (u1b_tmp | BIT(0)));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmp_reg422 = odm_read_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8192E+2);
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422 & (~BIT(6)));
if (tmp_reg422 & BIT(6)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s There is an adapter is sending beacon.\n", __func__));
is_send_beacon = true;
}
/*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+1, head_page);
do {
/*Clear beacon valid check bit.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2);
odm_write_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2, (bcn_valid_reg | BIT(0)));
/* download NDPA rsvd page. */
beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
u1b_tmp = odm_read_1byte(p_dm_odm, REG_MGQ_TXBD_NUM_8192E+3);
count = 0;
while ((count < 20) && (u1b_tmp & BIT(4))) {
count++;
ODM_delay_us(10);
u1b_tmp = odm_read_1byte(p_dm_odm, REG_MGQ_TXBD_NUM_8192E+3);
}
odm_write_1byte(p_dm_odm, REG_MGQ_TXBD_NUM_8192E+3, u1b_tmp | BIT(4));
#endif
/*check rsvd page download OK.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2);
count = 0;
while (!(bcn_valid_reg & BIT(0)) && count < 20) {
count++;
ODM_delay_us(10);
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2);
}
dl_bcn_count++;
} while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5);
if (!(bcn_valid_reg & BIT(0)))
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s Download RSVD page failed!\n", __func__));
/*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+1, tx_page_bndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (is_send_beacon)
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8192E+1);
odm_write_1byte(p_dm_odm, REG_CR_8192E+1, (u1b_tmp & (~BIT(0))));
p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = false;
#endif
}
void
hal_txbf_8192e_enter(
void *p_dm_void,
u8 bfer_bfee_idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
u8 bfee_idx = (bfer_bfee_idx & 0xF);
u32 csi_param;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
u16 sta_id = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
hal_txbf_8192e_rf_mode(p_dm_odm, p_beamforming_info);
if (p_dm_odm->rf_type == ODM_2T2R)
odm_write_4byte(p_dm_odm, 0xd80, 0x00000000); /*nc =2*/
if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
/*Sounding protocol control*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8192E, 0xCB);
/*MAC address/Partial AID of Beamformer*/
if (bfer_idx == 0) {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), beamformer_entry.mac_addr[i]);
} else {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), beamformer_entry.mac_addr[i]);
}
/*CSI report parameters of Beamformer Default use nc = 2*/
csi_param = 0x03090309;
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8192E, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8192E, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8192E, csi_param);
/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8192E+3, 0x50);
}
if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
sta_id = beamformee_entry.mac_id;
else
sta_id = beamformee_entry.p_aid;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], sta_id=0x%X\n", __func__, sta_id));
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
if (bfee_idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E, sta_id);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8192E+3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8192E+3) | BIT(4) | BIT(6) | BIT(7));
} else
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E+2, sta_id | BIT(12) | BIT(14) | BIT(15));
/*CSI report parameters of Beamformee*/
if (bfee_idx == 0) {
/*Get BIT24 & BIT25*/
u8 tmp = odm_read_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3;
odm_write_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E, sta_id | BIT(9));
} else {
/*Set BIT25*/
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, sta_id | 0xE200);
}
phydm_beamforming_notify(p_dm_odm);
}
}
void
hal_txbf_8192e_leave(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
hal_txbf_8192e_rf_mode(p_dm_odm, p_beam_info);
/* Clear P_AID of Beamformee
* Clear MAC addresss of Beamformer
* Clear Associated Bfmee Sel
*/
if (p_beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8192E, 0xC8);
if (idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E, 0);
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0);
} else {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E+2, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8192E+2) & 0xF000);
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, odm_read_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60);
}
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx %d\n", __func__, idx));
}
void
hal_txbf_8192e_status(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 beam_ctrl_val;
u32 beam_ctrl_reg;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamform_entry = p_beam_info->beamformee_entry[idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
beam_ctrl_val = beamform_entry.mac_id;
else
beam_ctrl_val = beamform_entry.p_aid;
if (idx == 0)
beam_ctrl_reg = REG_TXBF_CTRL_8192E;
else {
beam_ctrl_reg = REG_TXBF_CTRL_8192E+2;
beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
}
if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beam_info->apply_v_matrix == true)) {
if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
beam_ctrl_val |= BIT(9);
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
beam_ctrl_val |= BIT(10);
} else
beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
odm_write_2byte(p_dm_odm, beam_ctrl_reg, beam_ctrl_val);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__, idx, beam_ctrl_reg, beam_ctrl_val));
}
void
hal_txbf_8192e_fw_tx_bf(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
hal_txbf_8192e_download_ndpa(p_dm_odm, idx);
hal_txbf_8192e_fw_txbf_cmd(p_dm_odm);
}
#endif /* #if (RTL8192E_SUPPORT == 1)*/
#endif

60
hal/phydm/txbf/haltxbf8192e.h
View file

@ -1,60 +0,0 @@
#ifndef __HAL_TXBF_8192E_H__
#define __HAL_TXBF_8192E_H__
#if (RTL8192E_SUPPORT == 1)
#if (BEAMFORMING_SUPPORT == 1)
void
hal_txbf_8192e_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
);
void
hal_txbf_8192e_enter(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8192e_leave(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8192e_status(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8192e_fw_tx_bf(
void *p_dm_void,
u8 idx
);
#else
#define hal_txbf_8192e_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8192e_enter(p_dm_void, idx)
#define hal_txbf_8192e_leave(p_dm_void, idx)
#define hal_txbf_8192e_status(p_dm_void, idx)
#define hal_txbf_8192e_fw_tx_bf(p_dm_void, idx)
#endif
#else
#define hal_txbf_8192e_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8192e_enter(p_dm_void, idx)
#define hal_txbf_8192e_leave(p_dm_void, idx)
#define hal_txbf_8192e_status(p_dm_void, idx)
#define hal_txbf_8192e_fw_tx_bf(p_dm_void, idx)
#endif
#endif

700
hal/phydm/txbf/haltxbf8814a.c
View file

@ -1,700 +0,0 @@
/* ************************************************************
* Description:
*
* This file is for 8814A TXBF mechanism
*
* ************************************************************ */
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (BEAMFORMING_SUPPORT == 1)
#if (RTL8814A_SUPPORT == 1)
bool
phydm_beamforming_set_iqgen_8814A(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u16 counter = 0;
u32 rf_mode[4];
for (i = ODM_RF_PATH_A ; i < MAX_RF_PATH ; i++)
odm_set_rf_reg(p_dm_odm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
while (1) {
counter++;
for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
odm_set_rf_reg(p_dm_odm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/
ODM_delay_us(2);
for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
rf_mode[i] = odm_get_rf_reg(p_dm_odm, i, RF_RCK_OS, 0xfffff);
if ((rf_mode[0] == 0x18000) && (rf_mode[1] == 0x18000) && (rf_mode[2] == 0x18000) && (rf_mode[3] == 0x18000))
break;
else if (counter == 100) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("iqgen setting fail:8814A\n"));
return false;
}
}
for (i = ODM_RF_PATH_A ; i < MAX_RF_PATH ; i++) {
odm_set_rf_reg(p_dm_odm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/
}
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/
for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
odm_set_rf_reg(p_dm_odm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
return true;
}
void
hal_txbf_8814a_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
odm_write_1byte(p_dm_odm, REG_NDPA_OPT_CTRL_8814A, BW);
odm_write_1byte(p_dm_odm, REG_NDPA_RATE_8814A, (u8) rate);
}
#define PHYDM_MEMORY_MAP_BUF_READ 0x8000
#define PHYDM_CTRL_INFO_PAGE 0x660
void
phydm_data_rate_8814a(
struct PHY_DM_STRUCT *p_dm_odm,
u8 mac_id,
u32 *data,
u8 data_len
)
{
u8 i = 0;
u16 x_read_data_addr = 0;
odm_write_2byte(p_dm_odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE);
x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*Ctrl Info: 32Bytes for each macid(n)*/
if ((x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ) || (x_read_data_addr > 0x8FFF)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("x_read_data_addr(0x%x) is not correct!\n", x_read_data_addr));
return;
}
/* Read data */
for (i = 0; i < data_len; i++)
*(data + i) = odm_read_2byte(p_dm_odm, x_read_data_addr + i);
}
void
hal_txbf_8814a_get_tx_rate(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_entry;
u32 tx_rpt_data = 0;
u8 data_rate = 0xFF;
p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
phydm_data_rate_8814a(p_dm_odm, (u8)p_entry->mac_id, &tx_rpt_data, 1);
data_rate = (u8)tx_rpt_data;
data_rate &= 0x7f; /*Bit7 indicates SGI*/
p_dm_odm->tx_bf_data_rate = data_rate;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] p_dm_odm->tx_bf_data_rate = 0x%x\n", __func__, p_dm_odm->tx_bf_data_rate));
}
void
hal_txbf_8814a_reset_tx_path(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
#if DEV_BUS_TYPE == RT_USB_INTERFACE
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
u8 nr_index = 0, tx_ss = 0;
if (idx < BEAMFORMEE_ENTRY_NUM)
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
else
return;
if ((p_dm_odm->last_usb_hub) != (*p_dm_odm->hub_usb_mode)) {
nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), beamformee_entry.comp_steering_num_of_bfer);
if (*p_dm_odm->hub_usb_mode == 2) {
if (p_dm_odm->rf_type == ODM_4T4R)
tx_ss = 0xf;
else if (p_dm_odm->rf_type == ODM_3T3R)
tx_ss = 0xe;
else
tx_ss = 0x6;
} else if (*p_dm_odm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/
tx_ss = 0x6;
else
tx_ss = 0x6;
if (tx_ss == 0xf) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
} else if (tx_ss == 0xe) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
} else if (tx_ss == 0x6) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
}
if (idx == 0) {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
} else {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
}
p_dm_odm->last_usb_hub = *p_dm_odm->hub_usb_mode;
} else
return;
#endif
}
u8
hal_txbf_8814a_get_ntx(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 ntx = 0, tx_ss = 3;
#if DEV_BUS_TYPE == RT_USB_INTERFACE
tx_ss = *p_dm_odm->hub_usb_mode;
#endif
if (tx_ss == 3 || tx_ss == 2) {
if (p_dm_odm->rf_type == ODM_4T4R)
ntx = 3;
else if (p_dm_odm->rf_type == ODM_3T3R)
ntx = 2;
else
ntx = 1;
} else if (tx_ss == 1) /*USB 2.0 always 2Tx*/
ntx = 1;
else
ntx = 1;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ntx = %d\n", __func__, ntx));
return ntx;
}
u8
hal_txbf_8814a_get_nrx(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 nrx = 0;
if (p_dm_odm->rf_type == ODM_4T4R)
nrx = 3;
else if (p_dm_odm->rf_type == ODM_3T3R)
nrx = 2;
else if (p_dm_odm->rf_type == ODM_2T2R)
nrx = 1;
else if (p_dm_odm->rf_type == ODM_2T3R)
nrx = 2;
else if (p_dm_odm->rf_type == ODM_2T4R)
nrx = 3;
else if (p_dm_odm->rf_type == ODM_1T1R)
nrx = 0;
else if (p_dm_odm->rf_type == ODM_1T2R)
nrx = 1;
else
nrx = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] nrx = %d\n", __func__, nrx));
return nrx;
}
void
hal_txbf_8814a_rf_mode(
void *p_dm_void,
struct _RT_BEAMFORMING_INFO *p_beamforming_info,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i, nr_index = 0;
u8 tx_ss = 3; /*default use 3 Tx*/
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
if (idx < BEAMFORMEE_ENTRY_NUM)
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
else
return;
nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), beamformee_entry.comp_steering_num_of_bfer);
if (p_dm_odm->rf_type == ODM_1T1R)
return;
if (p_beamforming_info->beamformee_su_cnt > 0) {
#if DEV_BUS_TYPE == RT_USB_INTERFACE
p_dm_odm->last_usb_hub = *p_dm_odm->hub_usb_mode;
tx_ss = *p_dm_odm->hub_usb_mode;
#endif
if (tx_ss == 3 || tx_ss == 2) {
if (p_dm_odm->rf_type == ODM_4T4R)
tx_ss = 0xf;
else if (p_dm_odm->rf_type == ODM_3T3R)
tx_ss = 0xe;
else
tx_ss = 0x6;
} else if (tx_ss == 1) /*USB 2.0 always 2Tx*/
tx_ss = 0x6;
else
tx_ss = 0x6;
if (tx_ss == 0xf) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
} else if (tx_ss == 0xe) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
} else if (tx_ss == 0x6) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
}
/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2); /*enable BB TxBF ant mapping register*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1); /*if Nsts > Nc don't apply V matrix*/
if (idx == 0) {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
} else {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
}
}
if ((p_beamforming_info->beamformee_su_cnt == 0) && (p_beamforming_info->beamformer_su_cnt == 0)) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932); /*set tx_path selection for 8814a BFer bug refine*/
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e9360);
}
}
#if 0
void
hal_txbf_8814a_download_ndpa(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 u1b_tmp = 0, tmp_reg422 = 0;
u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
u16 head_page = 0x7FE;
bool is_send_beacon = false;
u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
struct _ADAPTER *adapter = p_dm_odm->adapter;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = true;
#endif
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8814A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8814A + 1, (u1b_tmp | BIT(0)));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmp_reg422 = odm_read_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8814A + 2);
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422 & (~BIT(6)));
if (tmp_reg422 & BIT(6)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: There is an adapter is sending beacon.\n", __func__));
is_send_beacon = true;
}
/*0x204[11:0] Beacon Head for TXDMA*/
odm_write_2byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A, head_page);
do {
/*Clear beacon valid check bit.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 1);
odm_write_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7)));
/*download NDPA rsvd page.*/
if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
beamforming_send_vht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
else
beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
/*check rsvd page download OK.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 1);
count = 0;
while (!(bcn_valid_reg & BIT(7)) && count < 20) {
count++;
ODM_delay_ms(10);
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 2);
}
dl_bcn_count++;
} while (!(bcn_valid_reg & BIT(7)) && dl_bcn_count < 5);
if (!(bcn_valid_reg & BIT(7)))
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));
/*0x204[11:0] Beacon Head for TXDMA*/
odm_write_2byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (is_send_beacon)
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8814A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0))));
p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = false;
#endif
}
void
hal_txbf_8814a_fw_txbf_cmd(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 idx, period = 0;
u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
u8 u1_tx_bf_parm[3] = {0};
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
if (p_beam_info->beamformee_entry[idx].is_sound) {
PageNum0 = 0xFE;
PageNum1 = 0x07;
period = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
} else if (PageNum0 == 0xFF) {
PageNum0 = 0xFF; /*stop sounding*/
PageNum1 = 0x0F;
}
}
}
u1_tx_bf_parm[0] = PageNum0;
u1_tx_bf_parm[1] = PageNum1;
u1_tx_bf_parm[2] = period;
odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
("[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__, PageNum0, PageNum1, period));
}
#endif
void
hal_txbf_8814a_enter(
void *p_dm_void,
u8 bfer_bfee_idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
u8 bfee_idx = (bfer_bfee_idx & 0xF);
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
u16 sta_id = 0, csi_param = 0;
u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_idx, bfee_idx));
odm_set_mac_reg(p_dm_odm, REG_SND_PTCL_CTRL_8814A, MASKBYTE1 | MASKBYTE2, 0x0202);
if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
/*Sounding protocol control*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8814A, 0xDB);
/*MAC address/Partial AID of Beamformer*/
if (bfer_idx == 0) {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), beamformer_entry.mac_addr[i]);
} else {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), beamformer_entry.mac_addr[i]);
}
/*CSI report parameters of Beamformer*/
nc_index = hal_txbf_8814a_get_nrx(p_dm_odm); /*for 8814A nrx = 3(4 ant), min=0(1 ant)*/
nr_index = beamformer_entry.num_of_sounding_dim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
grouping = 0;
/*for ac = 1, for n = 3*/
if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)
codebookinfo = 1;
else if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)
codebookinfo = 3;
coefficientsize = 3;
csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index));
if (bfer_idx == 0)
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A, csi_param);
else
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, csi_param);
/*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40);
}
if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
hal_txbf_8814a_rf_mode(p_dm_odm, p_beamforming_info, bfee_idx);
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
sta_id = beamformee_entry.mac_id;
else
sta_id = beamformee_entry.p_aid;
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
if (bfee_idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A, sta_id);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
} else
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A + 2, sta_id | BIT(14) | BIT(15) | BIT(12));
/*CSI report parameters of Beamformee*/
if (bfee_idx == 0) {
/*Get BIT24 & BIT25*/
u8 tmp = odm_read_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3;
odm_write_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A, sta_id | BIT(9));
} else
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200); /*Set BIT25*/
phydm_beamforming_notify(p_dm_odm);
}
}
void
hal_txbf_8814a_leave(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
if (idx < BEAMFORMER_ENTRY_NUM) {
beamformer_entry = p_beamforming_info->beamformer_entry[idx];
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
} else
return;
/*Clear P_AID of Beamformee*/
/*Clear MAC address of Beamformer*/
/*Clear Associated Bfmee Sel*/
if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8814A, 0xD8);
if (idx == 0) {
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A, 0);
} else {
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0);
}
}
if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
hal_txbf_8814a_rf_mode(p_dm_odm, p_beamforming_info, idx);
if (idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A, 0x0);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0);
} else {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT(14) | BIT(15) | BIT(12));
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, odm_read_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60);
}
}
}
void
hal_txbf_8814a_status(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 beam_ctrl_val, tmp_val;
u32 beam_ctrl_reg;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamform_entry;
if (idx < BEAMFORMEE_ENTRY_NUM)
beamform_entry = p_beamforming_info->beamformee_entry[idx];
else
return;
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
beam_ctrl_val = beamform_entry.mac_id;
else
beam_ctrl_val = beamform_entry.p_aid;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, beamform_entry.beamform_entry_state = %d", __func__, beamform_entry.beamform_entry_state));
if (idx == 0)
beam_ctrl_reg = REG_TXBF_CTRL_8814A;
else {
beam_ctrl_reg = REG_TXBF_CTRL_8814A + 2;
beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
}
if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beamforming_info->apply_v_matrix == true)) {
if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
beam_ctrl_val |= BIT(9);
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
beam_ctrl_val |= (BIT(9) | BIT(10));
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80)
beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11));
} else {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__));
beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
}
odm_write_2byte(p_dm_odm, beam_ctrl_reg, beam_ctrl_val);
/*disable NDP packet use beamforming */
tmp_val = odm_read_2byte(p_dm_odm, REG_TXBF_CTRL_8814A);
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A, tmp_val | BIT(15));
}
void
hal_txbf_8814a_fw_txbf(
void *p_dm_void,
u8 idx
)
{
#if 0
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
hal_txbf_8814a_download_ndpa(p_dm_odm, idx);
hal_txbf_8814a_fw_txbf_cmd(p_dm_odm);
#endif
}
#endif /* (RTL8814A_SUPPORT == 1)*/
#endif

89
hal/phydm/txbf/haltxbf8814a.h
View file

@ -1,89 +0,0 @@
#ifndef __HAL_TXBF_8814A_H__
#define __HAL_TXBF_8814A_H__
#if (RTL8814A_SUPPORT == 1)
#if (BEAMFORMING_SUPPORT == 1)
bool
phydm_beamforming_set_iqgen_8814A(
void *p_dm_void
);
void
hal_txbf_8814a_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
);
u8
hal_txbf_8814a_get_ntx(
void *p_dm_void
);
void
hal_txbf_8814a_enter(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_leave(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_status(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_reset_tx_path(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_get_tx_rate(
void *p_dm_void
);
void
hal_txbf_8814a_fw_txbf(
void *p_dm_void,
u8 idx
);
#else
#define hal_txbf_8814a_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8814a_get_ntx(p_dm_void) 0
#define hal_txbf_8814a_enter(p_dm_void, idx)
#define hal_txbf_8814a_leave(p_dm_void, idx)
#define hal_txbf_8814a_status(p_dm_void, idx)
#define hal_txbf_8814a_reset_tx_path(p_dm_void, idx)
#define hal_txbf_8814a_get_tx_rate(p_dm_void)
#define hal_txbf_8814a_fw_txbf(p_dm_void, idx)
#define phydm_beamforming_set_iqgen_8814A(p_dm_void) 0
#endif
#else
#define hal_txbf_8814a_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8814a_get_ntx(p_dm_void) 0
#define hal_txbf_8814a_enter(p_dm_void, idx)
#define hal_txbf_8814a_leave(p_dm_void, idx)
#define hal_txbf_8814a_status(p_dm_void, idx)
#define hal_txbf_8814a_reset_tx_path(p_dm_void, idx)
#define hal_txbf_8814a_get_tx_rate(p_dm_void)
#define hal_txbf_8814a_fw_txbf(p_dm_void, idx)
#define phydm_beamforming_set_iqgen_8814A(p_dm_void) 0
#endif
#endif

1099
hal/phydm/txbf/haltxbf8822b.c
View file

File diff suppressed because it is too large Load diff

79
hal/phydm/txbf/haltxbf8822b.h
View file

@ -1,79 +0,0 @@
#ifndef __HAL_TXBF_8822B_H__
#define __HAL_TXBF_8822B_H__
#if (RTL8822B_SUPPORT == 1)
#if (BEAMFORMING_SUPPORT == 1)
void
hal_txbf_8822b_enter(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8822b_leave(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8822b_status(
void *p_dm_void,
u8 beamform_idx
);
void
hal_txbf_8822b_config_gtab(
void *p_dm_void
);
void
hal_txbf_8822b_fw_txbf(
void *p_dm_void,
u8 idx
);
#else
#define hal_txbf_8822b_enter(p_dm_void, idx)
#define hal_txbf_8822b_leave(p_dm_void, idx)
#define hal_txbf_8822b_status(p_dm_void, idx)
#define hal_txbf_8822b_fw_txbf(p_dm_void, idx)
#define hal_txbf_8822b_config_gtab(p_dm_void)
#endif
#if (defined(CONFIG_BB_TXBF_API))
void
phydm_8822btxbf_rfmode(
void *p_dm_void,
u8 su_bfee_cnt,
u8 mu_bfee_cnt
);
void
phydm_8822b_sutxbfer_workaroud(
void *p_dm_void,
bool enable_su_bfer,
u8 nc,
u8 nr,
u8 ng,
u8 CB,
u8 BW,
bool is_vht
);
#else
#define phydm_8822btxbf_rfmode(p_dm_void, su_bfee_cnt, mu_bfee_cnt)
#define phydm_8822b_sutxbfer_workaroud(p_dm_void, enable_su_bfer, nc, nr, ng, CB, BW, is_vht)
#endif
#else
#define hal_txbf_8822b_enter(p_dm_void, idx)
#define hal_txbf_8822b_leave(p_dm_void, idx)
#define hal_txbf_8822b_status(p_dm_void, idx)
#define hal_txbf_8822b_fw_txbf(p_dm_void, idx)
#define hal_txbf_8822b_config_gtab(p_dm_void)
#endif
#endif

526
hal/phydm/txbf/haltxbfjaguar.c
View file

@ -1,526 +0,0 @@
/* ************************************************************
* Description:
*
* This file is for 8812/8821/8811 TXBF mechanism
*
* ************************************************************ */
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (BEAMFORMING_SUPPORT == 1)
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
void
hal_txbf_8812a_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
odm_write_1byte(p_dm_odm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW));
}
void
hal_txbf_jaguar_rf_mode(
void *p_dm_void,
struct _RT_BEAMFORMING_INFO *p_beam_info
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
if (p_dm_odm->rf_type == ODM_1T1R)
return;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__));
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); /*RF mode table write enable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); /*RF mode table write enable*/
if (p_beam_info->beamformee_su_cnt > 0) {
/* Paath_A */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
/* Path_B */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
} else {
/* Paath_A */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
/* Path_B */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
}
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); /*RF mode table write disable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); /*RF mode table write disable*/
if (p_beam_info->beamformee_su_cnt > 0)
odm_set_bb_reg(p_dm_odm, 0x80c, MASKBYTE1, 0x33);
else
odm_set_bb_reg(p_dm_odm, 0x80c, MASKBYTE1, 0x11);
}
void
hal_txbf_jaguar_download_ndpa(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 u1b_tmp = 0, tmp_reg422 = 0, head_page;
u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
bool is_send_beacon = false;
u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
struct _ADAPTER *adapter = p_dm_odm->adapter;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = true;
#endif
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (idx == 0)
head_page = 0xFE;
else
head_page = 0xFE;
phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8812A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8812A + 1, (u1b_tmp | BIT(0)));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmp_reg422 = odm_read_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8812A + 2);
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422 & (~BIT(6)));
if (tmp_reg422 & BIT(6)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n"));
is_send_beacon = true;
}
/*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_TDECTRL_8812A + 1, head_page);
do {
/*Clear beacon valid check bit.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_TDECTRL_8812A + 2);
odm_write_1byte(p_dm_odm, REG_TDECTRL_8812A + 2, (bcn_valid_reg | BIT(0)));
/*download NDPA rsvd page.*/
if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
beamforming_send_vht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE);
else
beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
/*check rsvd page download OK.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_TDECTRL_8812A + 2);
count = 0;
while (!(bcn_valid_reg & BIT(0)) && count < 20) {
count++;
ODM_delay_ms(10);
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_TDECTRL_8812A + 2);
}
dl_bcn_count++;
} while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5);
if (!(bcn_valid_reg & BIT(0)))
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));
/*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_TDECTRL_8812A + 1, tx_page_bndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (is_send_beacon)
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8812A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8812A + 1, (u1b_tmp & (~BIT(0))));
p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = false;
#endif
}
void
hal_txbf_jaguar_fw_txbf_cmd(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 idx, period0 = 0, period1 = 0;
u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
u8 u1_tx_bf_parm[3] = {0};
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
/*Modified by David*/
if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
if (idx == 0) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum0 = 0xFE;
else
PageNum0 = 0xFF; /*stop sounding*/
period0 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
} else if (idx == 1) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum1 = 0xFE;
else
PageNum1 = 0xFF; /*stop sounding*/
period1 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
}
}
}
u1_tx_bf_parm[0] = PageNum0;
u1_tx_bf_parm[1] = PageNum1;
u1_tx_bf_parm[2] = (period1 << 4) | period0;
odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
("[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1));
}
void
hal_txbf_jaguar_enter(
void *p_dm_void,
u8 bfer_bfee_idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
u8 bfee_idx = (bfer_bfee_idx & 0xF);
u32 csi_param;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
u16 sta_id = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__));
hal_txbf_jaguar_rf_mode(p_dm_odm, p_beamforming_info);
if (p_dm_odm->rf_type == ODM_2T2R)
odm_set_bb_reg(p_dm_odm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000); /*nc =2*/
else
odm_set_bb_reg(p_dm_odm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008); /*nc =1*/
if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
/*Sounding protocol control*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xCB);
/*MAC address/Partial AID of Beamformer*/
if (bfer_idx == 0) {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_BFMER0_INFO_8812A + i), beamformer_entry.mac_addr[i]);
/*CSI report use legacy ofdm so don't need to fill P_AID. */
/*platform_efio_write_2byte(adapter, REG_BFMER0_INFO_8812A+6, beamform_entry.P_AID); */
} else {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_BFMER1_INFO_8812A + i), beamformer_entry.mac_addr[i]);
/*CSI report use legacy ofdm so don't need to fill P_AID.*/
/*platform_efio_write_2byte(adapter, REG_BFMER1_INFO_8812A+6, beamform_entry.P_AID);*/
}
/*CSI report parameters of Beamformee*/
if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) {
if (p_dm_odm->rf_type == ODM_2T2R)
csi_param = 0x01090109;
else
csi_param = 0x01080108;
} else {
if (p_dm_odm->rf_type == ODM_2T2R)
csi_param = 0x03090309;
else
csi_param = 0x03080308;
}
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8812A, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8812A, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8812A, csi_param);
/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A + 3, 0x50);
}
if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
sta_id = beamformee_entry.mac_id;
else
sta_id = beamformee_entry.p_aid;
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
if (bfee_idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A, sta_id);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8812A + 3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8812A + 3) | BIT(4) | BIT(6) | BIT(7));
} else
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A + 2, sta_id | BIT(12) | BIT(14) | BIT(15));
/*CSI report parameters of Beamformee*/
if (bfee_idx == 0) {
/*Get BIT24 & BIT25*/
u8 tmp = odm_read_1byte(p_dm_odm, REG_BFMEE_SEL_8812A + 3) & 0x3;
odm_write_1byte(p_dm_odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60);
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A, sta_id | BIT(9));
} else {
/*Set BIT25*/
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A + 2, sta_id | 0xE200);
}
phydm_beamforming_notify(p_dm_odm);
}
}
void
hal_txbf_jaguar_leave(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
if (idx < BEAMFORMER_ENTRY_NUM) {
beamformer_entry = p_beamforming_info->beamformer_entry[idx];
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
} else
return;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, idx));
/*Clear P_AID of Beamformee*/
/*Clear MAC address of Beamformer*/
/*Clear Associated Bfmee Sel*/
if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xC8);
if (idx == 0) {
odm_write_4byte(p_dm_odm, REG_BFMER0_INFO_8812A, 0);
odm_write_2byte(p_dm_odm, REG_BFMER0_INFO_8812A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
} else {
odm_write_4byte(p_dm_odm, REG_BFMER1_INFO_8812A, 0);
odm_write_2byte(p_dm_odm, REG_BFMER1_INFO_8812A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
}
}
if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
hal_txbf_jaguar_rf_mode(p_dm_odm, p_beamforming_info);
if (idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A, 0x0);
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A, 0);
} else {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A + 2, odm_read_2byte(p_dm_odm, REG_TXBF_CTRL_8812A + 2) & 0xF000);
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A + 2, odm_read_2byte(p_dm_odm, REG_BFMEE_SEL_8812A + 2) & 0x60);
}
}
}
void
hal_txbf_jaguar_status(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 beam_ctrl_val;
u32 beam_ctrl_reg;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamform_entry = p_beam_info->beamformee_entry[idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
beam_ctrl_val = beamform_entry.mac_id;
else
beam_ctrl_val = beamform_entry.p_aid;
if (idx == 0)
beam_ctrl_reg = REG_TXBF_CTRL_8812A;
else {
beam_ctrl_reg = REG_TXBF_CTRL_8812A + 2;
beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
}
if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beam_info->apply_v_matrix == true)) {
if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
beam_ctrl_val |= BIT(9);
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
beam_ctrl_val |= (BIT(9) | BIT(10));
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80)
beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11));
} else
beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] beam_ctrl_val = 0x%x!\n", __func__, beam_ctrl_val));
odm_write_2byte(p_dm_odm, beam_ctrl_reg, beam_ctrl_val);
}
void
hal_txbf_jaguar_fw_txbf(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
hal_txbf_jaguar_download_ndpa(p_dm_odm, idx);
hal_txbf_jaguar_fw_txbf_cmd(p_dm_odm);
}
void
hal_txbf_jaguar_patch(
void *p_dm_void,
u8 operation
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
return;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if (operation == SCAN_OPT_BACKUP_BAND0)
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xC8);
else if (operation == SCAN_OPT_RESTORE)
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xCB);
#endif
}
void
hal_txbf_jaguar_clk_8812a(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 u2btmp;
u8 count = 0, u1btmp;
struct _ADAPTER *adapter = p_dm_odm->adapter;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (*(p_dm_odm->p_is_scan_in_process)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] return by Scan\n", __func__));
return;
}
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
/*Stop PCIe TxDMA*/
odm_write_1byte(p_dm_odm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE);
#endif
/*Stop Usb TxDMA*/
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
RT_DISABLE_FUNC(adapter, DF_TX_BIT);
PlatformReturnAllPendingTxPackets(adapter);
#else
rtw_write_port_cancel(adapter);
#endif
/*Wait TXFF empty*/
for (count = 0; count < 100; count++) {
u2btmp = odm_read_2byte(p_dm_odm, REG_TXPKT_EMPTY_8812A);
u2btmp = u2btmp & 0xfff;
if (u2btmp != 0xfff) {
ODM_delay_ms(10);
continue;
} else
break;
}
/*TX pause*/
odm_write_1byte(p_dm_odm, REG_TXPAUSE_8812A, 0xFF);
/*Wait TX state Machine OK*/
for (count = 0; count < 100; count++) {
if (odm_read_4byte(p_dm_odm, REG_SCH_TXCMD_8812A) != 0)
continue;
else
break;
}
/*Stop RX DMA path*/
u1btmp = odm_read_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A);
odm_write_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT(2));
for (count = 0; count < 100; count++) {
u1btmp = odm_read_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A);
if (u1btmp & BIT(1))
break;
else
ODM_delay_ms(10);
}
/*Disable clock*/
odm_write_1byte(p_dm_odm, REG_SYS_CLKR_8812A + 1, 0xf0);
/*Disable 320M*/
odm_write_1byte(p_dm_odm, REG_AFE_PLL_CTRL_8812A + 3, 0x8);
/*Enable 320M*/
odm_write_1byte(p_dm_odm, REG_AFE_PLL_CTRL_8812A + 3, 0xa);
/*Enable clock*/
odm_write_1byte(p_dm_odm, REG_SYS_CLKR_8812A + 1, 0xfc);
/*Release Tx pause*/
odm_write_1byte(p_dm_odm, REG_TXPAUSE_8812A, 0);
/*Enable RX DMA path*/
u1btmp = odm_read_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A);
odm_write_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT(2)));
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
/*Enable PCIe TxDMA*/
odm_write_1byte(p_dm_odm, REG_PCIE_CTRL_REG_8812A + 1, 0);
#endif
/*Start Usb TxDMA*/
RT_ENABLE_FUNC(adapter, DF_TX_BIT);
}
#endif
#endif

281
os_dep/custom_gpio_linux.c
View file

@ -1,281 +0,0 @@
/******************************************************************************
* Customer code to add GPIO control during WLAN start/stop
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "drv_types.h"
#ifdef CONFIG_PLATFORM_SPRD
/* gspi func & GPIO define */
#include <mach/gpio.h>/* 0915 */
#include <mach/board.h>
#if !(defined ANDROID_2X)
#include <mach/regulator.h>
#include <linux/regulator/consumer.h>
#ifndef GPIO_WIFI_POWER
#define GPIO_WIFI_POWER -1
#endif /* !GPIO_WIFI_POWER */
#ifndef GPIO_WIFI_RESET
#define GPIO_WIFI_RESET -1
#endif /* !GPIO_WIFI_RESET */
#ifndef GPIO_WIFI_PWDN
#define GPIO_WIFI_PWDN -1
#endif /* !GPIO_WIFI_RESET */
#ifdef CONFIG_GSPI_HCI
extern unsigned int oob_irq;
#endif /* CONFIG_GSPI_HCI */
#ifdef CONFIG_SDIO_HCI
extern int rtw_mp_mode;
#else /* !CONFIG_SDIO_HCI */
#endif /* !CONFIG_SDIO_HCI */
int rtw_wifi_gpio_init(void)
{
#ifdef CONFIG_GSPI_HCI
if (GPIO_WIFI_IRQ > 0) {
gpio_request(GPIO_WIFI_IRQ, "oob_irq");
gpio_direction_input(GPIO_WIFI_IRQ);
oob_irq = gpio_to_irq(GPIO_WIFI_IRQ);
RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq);
}
#endif
if (GPIO_WIFI_RESET > 0)
gpio_request(GPIO_WIFI_RESET , "wifi_rst");
if (GPIO_WIFI_POWER > 0)
gpio_request(GPIO_WIFI_POWER, "wifi_power");
return 0;
}
int rtw_wifi_gpio_deinit(void)
{
#ifdef CONFIG_GSPI_HCI
if (GPIO_WIFI_IRQ > 0)
gpio_free(GPIO_WIFI_IRQ);
#endif
if (GPIO_WIFI_RESET > 0)
gpio_free(GPIO_WIFI_RESET);
if (GPIO_WIFI_POWER > 0)
gpio_free(GPIO_WIFI_POWER);
return 0;
}
/* Customer function to control hw specific wlan gpios */
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
switch (onoff) {
case WLAN_PWDN_OFF:
RTW_INFO("%s: call customer specific GPIO(%d) to set wifi power down pin to 0\n",
__func__, GPIO_WIFI_RESET);
#ifndef CONFIG_DONT_BUS_SCAN
if (GPIO_WIFI_RESET > 0)
gpio_direction_output(GPIO_WIFI_RESET , 0);
#endif
break;
case WLAN_PWDN_ON:
RTW_INFO("%s: callc customer specific GPIO(%d) to set wifi power down pin to 1\n",
__func__, GPIO_WIFI_RESET);
if (GPIO_WIFI_RESET > 0)
gpio_direction_output(GPIO_WIFI_RESET , 1);
break;
case WLAN_POWER_OFF:
break;
case WLAN_POWER_ON:
break;
}
}
#else /* ANDROID_2X */
#include <mach/ldo.h>
extern int sprd_3rdparty_gpio_wifi_power;
extern int sprd_3rdparty_gpio_wifi_pwd;
int rtw_wifi_gpio_init(void)
{
return 0;
}
int rtw_wifi_gpio_deinit(void)
{
return 0;
}
/* Customer function to control hw specific wlan gpios */
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
switch (onoff) {
case WLAN_PWDN_OFF:
RTW_INFO("%s: call customer specific GPIO to set wifi power down pin to 0\n",
__func__);
if (sprd_3rdparty_gpio_wifi_pwd > 0)
gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 0);
if (sprd_3rdparty_gpio_wifi_pwd == 60) {
RTW_INFO("%s: turn off VSIM2 2.8V\n", __func__);
LDO_TurnOffLDO(LDO_LDO_SIM2);
}
break;
case WLAN_PWDN_ON:
RTW_INFO("%s: callc customer specific GPIO to set wifi power down pin to 1\n",
__func__);
if (sprd_3rdparty_gpio_wifi_pwd == 60) {
RTW_INFO("%s: turn on VSIM2 2.8V\n", __func__);
LDO_SetVoltLevel(LDO_LDO_SIM2, LDO_VOLT_LEVEL0);
LDO_TurnOnLDO(LDO_LDO_SIM2);
}
if (sprd_3rdparty_gpio_wifi_pwd > 0)
gpio_set_value(sprd_3rdparty_gpio_wifi_pwd, 1);
break;
case WLAN_POWER_OFF:
#ifdef CONFIG_WIF1_LDO
RTW_INFO("%s: turn off VDD-WIFI0 1.2V\n", __func__);
LDO_TurnOffLDO(LDO_LDO_WIF1);
#endif /* CONFIG_WIF1_LDO */
RTW_INFO("%s: turn off VDD-WIFI0 3.3V\n", __func__);
LDO_TurnOffLDO(LDO_LDO_WIF0);
RTW_INFO("%s: call customer specific GPIO(%d) to turn off wifi power\n",
__func__, sprd_3rdparty_gpio_wifi_power);
if (sprd_3rdparty_gpio_wifi_power != 65535)
gpio_set_value(sprd_3rdparty_gpio_wifi_power, 0);
break;
case WLAN_POWER_ON:
RTW_INFO("%s: call customer specific GPIO(%d) to turn on wifi power\n",
__func__, sprd_3rdparty_gpio_wifi_power);
if (sprd_3rdparty_gpio_wifi_power != 65535)
gpio_set_value(sprd_3rdparty_gpio_wifi_power, 1);
RTW_INFO("%s: turn on VDD-WIFI0 3.3V\n", __func__);
LDO_TurnOnLDO(LDO_LDO_WIF0);
LDO_SetVoltLevel(LDO_LDO_WIF0, LDO_VOLT_LEVEL1);
#ifdef CONFIG_WIF1_LDO
RTW_INFO("%s: turn on VDD-WIFI1 1.2V\n", __func__);
LDO_TurnOnLDO(LDO_LDO_WIF1);
LDO_SetVoltLevel(LDO_LDO_WIF1, LDO_VOLT_LEVEL3);
#endif /* CONFIG_WIF1_LDO */
break;
case WLAN_BT_PWDN_OFF:
RTW_INFO("%s: call customer specific GPIO to set bt power down pin to 0\n",
__func__);
break;
case WLAN_BT_PWDN_ON:
RTW_INFO("%s: callc customer specific GPIO to set bt power down pin to 1\n",
__func__);
break;
}
}
#endif /* ANDROID_2X */
#elif defined(CONFIG_PLATFORM_ARM_RK3066)
#include <mach/iomux.h>
#define GPIO_WIFI_IRQ RK30_PIN2_PC2
extern unsigned int oob_irq;
int rtw_wifi_gpio_init(void)
{
#ifdef CONFIG_GSPI_HCI
if (GPIO_WIFI_IRQ > 0) {
rk30_mux_api_set(GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME, GPIO2C_GPIO2C2);/* jacky_test */
gpio_request(GPIO_WIFI_IRQ, "oob_irq");
gpio_direction_input(GPIO_WIFI_IRQ);
oob_irq = gpio_to_irq(GPIO_WIFI_IRQ);
RTW_INFO("%s oob_irq:%d\n", __func__, oob_irq);
}
#endif
return 0;
}
int rtw_wifi_gpio_deinit(void)
{
#ifdef CONFIG_GSPI_HCI
if (GPIO_WIFI_IRQ > 0)
gpio_free(GPIO_WIFI_IRQ);
#endif
return 0;
}
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
}
#ifdef CONFIG_GPIO_API
/* this is a demo for extending GPIO pin[7] as interrupt mode */
struct net_device *rtl_net;
extern int rtw_register_gpio_interrupt(struct net_device *netdev, int gpio_num, void(*callback)(u8 level));
extern int rtw_disable_gpio_interrupt(struct net_device *netdev, int gpio_num);
void gpio_int(u8 is_high)
{
RTW_INFO("%s level=%d\n", __func__, is_high);
}
int register_net_gpio_init(void)
{
rtl_net = dev_get_by_name(&init_net, "wlan0");
if (!rtl_net) {
RTW_INFO("rtl_net init fail!\n");
return -1;
}
return rtw_register_gpio_interrupt(rtl_net, 7, gpio_int);
}
int unregister_net_gpio_init(void)
{
rtl_net = dev_get_by_name(&init_net, "wlan0");
if (!rtl_net) {
RTW_INFO("rtl_net init fail!\n");
return -1;
}
return rtw_disable_gpio_interrupt(rtl_net, 7);
}
#endif
#else
int rtw_wifi_gpio_init(void)
{
return 0;
}
void rtw_wifi_gpio_wlan_ctrl(int onoff)
{
}
#endif /* CONFIG_PLATFORM_SPRD */