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rtl8188eu: Simplify Makefile

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In addition, unused files are removed.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-11-03 14:51:32 -05:00
parent 22421e29fb
commit fec17178bc
58 changed files with 0 additions and 94528 deletions
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3417
hal/btc/halbtc8192e1ant.c
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hal/btc/halbtc8192e1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
/* *******************************************
* The following is for 8192E 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1
#define BT_INFO_8192E_1ANT_B_FTP BIT(7)
#define BT_INFO_8192E_1ANT_B_A2DP BIT(6)
#define BT_INFO_8192E_1ANT_B_HID BIT(5)
#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8192E_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2
#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
enum bt_info_src_8192e_1ant {
BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8192E_1ANT_MAX
};
enum bt_8192e_1ant_bt_status {
BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8192E_1ANT_BT_STATUS_MAX
};
enum bt_8192e_1ant_wifi_status {
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8192E_1ANT_WIFI_STATUS_MAX
};
enum bt_8192e_1ant_coex_algo {
BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8192E_1ANT_COEX_ALGO_SCO = 0x1,
BT_8192E_1ANT_COEX_ALGO_HID = 0x2,
BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8192E_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8192e_1ant {
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8192e_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8192E_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_1ANT_MAX];
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
boolean cck_lock;
boolean pre_ccklock;
u8 coex_table_type;
boolean force_lps_on;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
#else /* #if (RTL8192E_SUPPORT == 1) */
#define ex_halbtc8192e1ant_power_on_setting(btcoexist)
#define ex_halbtc8192e1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8192e1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8192e1ant_init_coex_dm(btcoexist)
#define ex_halbtc8192e1ant_ips_notify(btcoexist, type)
#define ex_halbtc8192e1ant_lps_notify(btcoexist, type)
#define ex_halbtc8192e1ant_scan_notify(btcoexist, type)
#define ex_halbtc8192e1ant_connect_notify(btcoexist, type)
#define ex_halbtc8192e1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8192e1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8192e1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8192e1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8192e1ant_halt_notify(btcoexist)
#define ex_halbtc8192e1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8192e1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8192e1ant_periodical(btcoexist)
#define ex_halbtc8192e1ant_display_coex_info(btcoexist)
#define ex_halbtc8192e1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#endif
#endif

4377
hal/btc/halbtc8192e2ant.c
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hal/btc/halbtc8192e2ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
/* *******************************************
* The following is for 8192E 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0
#define BT_INFO_8192E_2ANT_B_FTP BIT(7)
#define BT_INFO_8192E_2ANT_B_A2DP BIT(6)
#define BT_INFO_8192E_2ANT_B_HID BIT(5)
#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8192E_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2
#define NOISY_AP_NUM_THRESH_8192E 10
enum bt_info_src_8192e_2ant {
BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8192E_2ANT_MAX
};
enum bt_8192e_2ant_bt_status {
BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8192E_2ANT_BT_STATUS_MAX
};
enum bt_8192e_2ant_coex_algo {
BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8192E_2ANT_COEX_ALGO_SCO = 0x1,
BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2,
BT_8192E_2ANT_COEX_ALGO_HID = 0x3,
BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4,
BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6,
BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7,
BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb,
BT_8192E_2ANT_COEX_ALGO_MAX = 0xc
};
struct coex_dm_8192e_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean auto_tdma_adjust_low_rssi;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u8 pre_ss_type;
u8 cur_ss_type;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 cur_ra_mask_type;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
};
struct coex_sta_8192e_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_2ANT_MAX];
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
u32 bt_coex_supported_version;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else /* #if (RTL8192E_SUPPORT == 1) */
#define ex_halbtc8192e2ant_power_on_setting(btcoexist)
#define ex_halbtc8192e2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8192e2ant_init_coex_dm(btcoexist)
#define ex_halbtc8192e2ant_ips_notify(btcoexist, type)
#define ex_halbtc8192e2ant_lps_notify(btcoexist, type)
#define ex_halbtc8192e2ant_scan_notify(btcoexist, type)
#define ex_halbtc8192e2ant_connect_notify(btcoexist, type)
#define ex_halbtc8192e2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8192e2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8192e2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8192e2ant_halt_notify(btcoexist)
#define ex_halbtc8192e2ant_periodical(btcoexist)
#define ex_halbtc8192e2ant_display_coex_info(btcoexist)
#endif
#endif

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hal/btc/halbtc8703b1ant.c
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hal/btc/halbtc8703b1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8703B_SUPPORT == 1)
/* *******************************************
* The following is for 8703B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1
#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 0
#define BT_INFO_8703B_1ANT_B_FTP BIT(7)
#define BT_INFO_8703B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8703B_1ANT_B_HID BIT(5)
#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8703B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2
#define BT_8703B_1ANT_WIFI_NOISY_THRESH 50 /* max: 255 */
/* for Antenna detection */
#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
#define BT_8703B_1ANT_ANTDET_ENABLE 0
#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8703b_1ant_signal_state {
BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8703B_1ANT_SIG_STA_MAX
};
enum bt_8703b_1ant_path_ctrl_owner {
BT_8703B_1ANT_PCO_BTSIDE = 0x0,
BT_8703B_1ANT_PCO_WLSIDE = 0x1,
BT_8703B_1ANT_PCO_MAX
};
enum bt_8703b_1ant_gnt_ctrl_type {
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8703B_1ANT_GNT_TYPE_MAX
};
enum bt_8703b_1ant_gnt_ctrl_block {
BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8703B_1ANT_GNT_BLOCK_BB = 0x2,
BT_8703B_1ANT_GNT_BLOCK_MAX
};
enum bt_8703b_1ant_lte_coex_table_type {
BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8703B_1ANT_CTT_MAX
};
enum bt_8703b_1ant_lte_break_table_type {
BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8703B_1ANT_LBTT_MAX
};
enum bt_info_src_8703b_1ant {
BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8703B_1ANT_MAX
};
enum bt_8703b_1ant_bt_status {
BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8703B_1ANT_BT_STATUS_MAX
};
enum bt_8703b_1ant_wifi_status {
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8703B_1ANT_WIFI_STATUS_MAX
};
enum bt_8703b_1ant_coex_algo {
BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8703B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8703B_1ANT_COEX_ALGO_HID = 0x2,
BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8703B_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8703b_1ant_phase {
BT_8703B_1ANT_PHASE_COEX_INIT = 0x0,
BT_8703B_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8703B_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8703B_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8703B_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8703B_1ANT_PHASE_BTMPMODE = 0x5,
BT_8703B_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8703B_1ANT_PHASE_MAX
};
enum bt_8703b_1ant_Scoreboard {
BT_8703B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8703B_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8703B_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8703B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8703B_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8703b_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8703b_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
};
#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8703B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8703b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8703b1ant_power_on_setting(btcoexist)
#define ex_halbtc8703b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8703b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8703b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8703b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8703b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8703b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8703b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8703b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8703b1ant_halt_notify(btcoexist)
#define ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8703b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8703b1ant_periodical(btcoexist)
#define ex_halbtc8703b1ant_display_coex_info(btcoexist)
#define ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8703b1ant_display_ant_detection(btcoexist)
#endif
#endif

4970
hal/btc/halbtc8723b1ant.c
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293
hal/btc/halbtc8723b1ant.h
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@ -1,293 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723B_SUPPORT == 1)
/* *******************************************
* The following is for 8723B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1
#define BT_INFO_8723B_1ANT_B_FTP BIT(7)
#define BT_INFO_8723B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_1ANT_B_HID BIT(5)
#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2
#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 /* 30 /max: 255 */
/* for Antenna detection */
#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 48
#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 32
#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
#define BT_8723B_1ANT_ANTDET_ENABLE 1
#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 1
#define BT_8723B_1ANT_ANTDET_BTTXTIME 100
#define BT_8723B_1ANT_ANTDET_BTTXCHANNEL 39
enum bt_info_src_8723b_1ant {
BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723B_1ANT_MAX
};
enum bt_8723b_1ant_bt_status {
BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723B_1ANT_BT_STATUS_MAX
};
enum bt_8723b_1ant_wifi_status {
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8723B_1ANT_WIFI_STATUS_MAX
};
enum bt_8723b_1ant_coex_algo {
BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8723B_1ANT_COEX_ALGO_HID = 0x2,
BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723B_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8723b_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8723b_1ant {
boolean bt_disabled;
boolean bt_enable_disable_change;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean bt_abnormal_scan;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
u32 bt_coex_supported_version;
u8 a2dp_bit_pool;
u8 cut_version;
};
#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723b1ant_power_on_setting(btcoexist)
#define ex_halbtc8723b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8723b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8723b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8723b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8723b1ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8723b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723b1ant_halt_notify(btcoexist)
#define ex_halbtc8723b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8723b1ant_periodical(btcoexist)
#define ex_halbtc8723b1ant_display_coex_info(btcoexist)
#define ex_halbtc8723b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723b1ant_display_ant_detection(btcoexist)
#endif
#endif

4958
hal/btc/halbtc8723b2ant.c
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217
hal/btc/halbtc8723b2ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723B_SUPPORT == 1)
/* *******************************************
* The following is for 8723B 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1
#define BT_INFO_8723B_2ANT_B_FTP BIT(7)
#define BT_INFO_8723B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723B_2ANT_B_HID BIT(5)
#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2
#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
enum bt_info_src_8723b_2ant {
BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723B_2ANT_MAX
};
enum bt_8723b_2ant_bt_status {
BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723B_2ANT_BT_STATUS_MAX
};
enum bt_8723b_2ant_coex_algo {
BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723B_2ANT_COEX_ALGO_SCO = 0x1,
BT_8723B_2ANT_COEX_ALGO_HID = 0x2,
BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723B_2ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8723b_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
};
struct coex_sta_8723b_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_abnormal_scan;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723b2ant_power_on_setting(btcoexist)
#define ex_halbtc8723b2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723b2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723b2ant_init_coex_dm(btcoexist)
#define ex_halbtc8723b2ant_ips_notify(btcoexist, type)
#define ex_halbtc8723b2ant_lps_notify(btcoexist, type)
#define ex_halbtc8723b2ant_scan_notify(btcoexist, type)
#define ex_halbtc8723b2ant_connect_notify(btcoexist, type)
#define ex_halbtc8723b2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723b2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723b2ant_halt_notify(btcoexist)
#define ex_halbtc8723b2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723b2ant_periodical(btcoexist)
#define ex_halbtc8723b2ant_display_coex_info(btcoexist)
#endif
#endif

68
hal/btc/halbtc8723bwifionly.c
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#include "mp_precomp.h"
VOID
ex_hal8723b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
struct wifi_only_haldata *pwifionly_haldata = &pwifionlycfg->haldata_info;
halwifionly_write1byte(pwifionlycfg, 0x778, 0x3); /* Set pta for wifi first priority, 0x1 need to reference pta table to determine wifi and bt priority */
halwifionly_bitmaskwrite1byte(pwifionlycfg, 0x40, 0x20, 0x1);
/* Set Antenna path to Wifi */
halwifionly_write2byte(pwifionlycfg, 0x0765, 0x8); /* Set pta for wifi first priority, 0x0 need to reference pta table to determine wifi and bt priority */
halwifionly_write2byte(pwifionlycfg, 0x076e, 0xc);
halwifionly_write4byte(pwifionlycfg, 0x000006c0, 0xaaaaaaaa); /* pta table, 0xaaaaaaaa means wifi is higher priority than bt */
halwifionly_write4byte(pwifionlycfg, 0x000006c4, 0xaaaaaaaa);
halwifionly_bitmaskwrite1byte(pwifionlycfg, 0x67, 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */
/* 0x948 setting */
if (pwifionlycfg->chip_interface == WIFIONLY_INTF_PCI) {
/* HP Foxconn NGFF at S0
not sure HP pg correct or not(EEPROMBluetoothSingleAntPath), so here we just write
0x948=0x280 for HP HW id NIC. */
if (pwifionly_haldata->customer_id == CUSTOMER_HP_1) {
halwifionly_write4byte(pwifionlycfg, 0x948, 0x280);
halwifionly_phy_set_rf_reg(pwifionlycfg, 0, 0x1, 0xfffff, 0x0); /* WiFi TRx Mask off */
return;
}
}
if (pwifionly_haldata->efuse_pg_antnum == 2) {
halwifionly_write4byte(pwifionlycfg, 0x948, 0x0);
} else {
/* 3Attention !!! For 8723BU !!!!
For 8723BU single ant case: jira [USB-1237]
Because of 8723BU S1 has HW problem, we only can use S0 instead.
Whether Efuse 0xc3 [6] is 0 or 1, we should always use S0 and write 0x948 to 80/280
--------------------------------------------------
BT Team :
When in Single Ant case, Reg[0x948] has two case : 0x80 or 0x200
When in Two Ant case, Reg[0x948] has two case : 0x280 or 0x0
Efuse 0xc3 [6] Antenna Path
0xc3 [6] = 0 ==> S1 ==> 0x948 = 0/40/200
0xc3 [6] = 1 ==> S0 ==> 0x948 = 80/240/280 */
if (pwifionlycfg->chip_interface == WIFIONLY_INTF_USB)
halwifionly_write4byte(pwifionlycfg, 0x948, 0x80);
else {
if (pwifionly_haldata->efuse_pg_antpath == 0)
halwifionly_write4byte(pwifionlycfg, 0x948, 0x0);
else
halwifionly_write4byte(pwifionlycfg, 0x948, 0x280);
}
}
/* after 8723B F-cut, TRx Mask should be set when 0x948=0x0 or 0x280
PHY_SetRFReg(Adapter, 0, 0x1, 0xfffff, 0x780); WiFi TRx Mask on */
halwifionly_phy_set_rf_reg(pwifionlycfg, 0, 0x1, 0xfffff, 0x0); /*WiFi TRx Mask off */
}

8
hal/btc/halbtc8723bwifionly.h
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#ifndef __INC_HAL8723BWIFIONLYHWCFG_H
#define __INC_HAL8723BWIFIONLYHWCFG_H
VOID
ex_hal8723b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
#endif

6080
hal/btc/halbtc8723d1ant.c
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413
hal/btc/halbtc8723d1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723D_SUPPORT == 1)
/* *******************************************
* The following is for 8723D 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8723D_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8723D_1ANT 1
#define BT_INFO_8723D_1ANT_B_FTP BIT(7)
#define BT_INFO_8723D_1ANT_B_A2DP BIT(6)
#define BT_INFO_8723D_1ANT_B_HID BIT(5)
#define BT_INFO_8723D_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723D_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723D_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723D_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723D_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8723D_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT 2
#define BT_8723D_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
#define BT_8723D_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8723D_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8723D_1ANT_ANTDET_ENABLE 1
#define BT_8723D_1ANT_ANTDET_BTTXTIME 100
#define BT_8723D_1ANT_ANTDET_BTTXCHANNEL 39
#define BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8723D_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8723d_1ant_signal_state {
BT_8723D_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8723D_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8723D_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8723D_1ANT_SIG_STA_MAX
};
enum bt_8723d_1ant_path_ctrl_owner {
BT_8723D_1ANT_PCO_BTSIDE = 0x0,
BT_8723D_1ANT_PCO_WLSIDE = 0x1,
BT_8723D_1ANT_PCO_MAX
};
enum bt_8723d_1ant_gnt_ctrl_type {
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8723D_1ANT_GNT_TYPE_MAX
};
enum bt_8723d_1ant_gnt_ctrl_block {
BT_8723D_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8723D_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8723D_1ANT_GNT_BLOCK_BB = 0x2,
BT_8723D_1ANT_GNT_BLOCK_MAX
};
enum bt_8723d_1ant_lte_coex_table_type {
BT_8723D_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8723D_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8723D_1ANT_CTT_MAX
};
enum bt_8723d_1ant_lte_break_table_type {
BT_8723D_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8723D_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8723D_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8723D_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8723D_1ANT_LBTT_MAX
};
enum bt_info_src_8723d_1ant {
BT_INFO_SRC_8723D_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723D_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723D_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723D_1ANT_MAX
};
enum bt_8723d_1ant_bt_status {
BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723D_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723D_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723D_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723D_1ANT_BT_STATUS_MAX
};
enum bt_8723d_1ant_wifi_status {
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8723D_1ANT_WIFI_STATUS_MAX
};
enum bt_8723d_1ant_coex_algo {
BT_8723D_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723D_1ANT_COEX_ALGO_SCO = 0x1,
BT_8723D_1ANT_COEX_ALGO_HID = 0x2,
BT_8723D_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723D_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723D_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723D_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723D_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723D_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8723d_1ant_phase {
BT_8723D_1ANT_PHASE_COEX_INIT = 0x0,
BT_8723D_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8723D_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8723D_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8723D_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8723D_1ANT_PHASE_BTMPMODE = 0x5,
BT_8723D_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8723D_1ANT_PHASE_COEX_POWERON = 0x7,
BT_8723D_1ANT_PHASE_MAX
};
enum bt_8723d_1ant_Scoreboard {
BT_8723D_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8723D_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8723D_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8723D_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8723D_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8723d_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8723d_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
};
#define BT_8723D_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723D_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723D_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723d_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723d1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723d1ant_power_on_setting(btcoexist)
#define ex_halbtc8723d1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723d1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723d1ant_init_coex_dm(btcoexist)
#define ex_halbtc8723d1ant_ips_notify(btcoexist, type)
#define ex_halbtc8723d1ant_lps_notify(btcoexist, type)
#define ex_halbtc8723d1ant_scan_notify(btcoexist, type)
#define ex_halbtc8723d1ant_connect_notify(btcoexist, type)
#define ex_halbtc8723d1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723d1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723d1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723d1ant_halt_notify(btcoexist)
#define ex_halbtc8723d1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723d1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8723d1ant_periodical(btcoexist)
#define ex_halbtc8723d1ant_display_coex_info(btcoexist)
#define ex_halbtc8723d1ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723d1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8723d1ant_display_ant_detection(btcoexist)
#endif
#endif

6556
hal/btc/halbtc8723d2ant.c
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418
hal/btc/halbtc8723d2ant.h
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@ -1,418 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8723D_SUPPORT == 1)
/* *******************************************
* The following is for 8723D 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8723D_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8723D_2ANT 1
#define BT_INFO_8723D_2ANT_B_FTP BIT(7)
#define BT_INFO_8723D_2ANT_B_A2DP BIT(6)
#define BT_INFO_8723D_2ANT_B_HID BIT(5)
#define BT_INFO_8723D_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8723D_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8723D_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8723D_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8723D_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT 2
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8723D_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8723D_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8723D_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8723D_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8723D_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8723D_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8723D_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8723D_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8723D_2ANT_ANTDET_ENABLE 1
#define BT_8723D_2ANT_ANTDET_BTTXTIME 100
#define BT_8723D_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8723d_2ant_signal_state {
BT_8723D_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8723D_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8723D_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8723D_2ANT_SIG_STA_MAX
};
enum bt_8723d_2ant_path_ctrl_owner {
BT_8723D_2ANT_PCO_BTSIDE = 0x0,
BT_8723D_2ANT_PCO_WLSIDE = 0x1,
BT_8723D_2ANT_PCO_MAX
};
enum bt_8723d_2ant_gnt_ctrl_type {
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8723D_2ANT_GNT_TYPE_MAX
};
enum bt_8723d_2ant_gnt_ctrl_block {
BT_8723D_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8723D_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8723D_2ANT_GNT_BLOCK_BB = 0x2,
BT_8723D_2ANT_GNT_BLOCK_MAX
};
enum bt_8723d_2ant_lte_coex_table_type {
BT_8723D_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8723D_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8723D_2ANT_CTT_MAX
};
enum bt_8723d_2ant_lte_break_table_type {
BT_8723D_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8723D_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8723D_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8723D_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8723D_2ANT_LBTT_MAX
};
enum bt_info_src_8723d_2ant {
BT_INFO_SRC_8723D_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8723D_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8723D_2ANT_MAX
};
enum bt_8723d_2ant_bt_status {
BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8723D_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8723D_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8723D_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8723D_2ANT_BT_STATUS_MAX
};
enum bt_8723d_2ant_coex_algo {
BT_8723D_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8723D_2ANT_COEX_ALGO_SCO = 0x1,
BT_8723D_2ANT_COEX_ALGO_HID = 0x2,
BT_8723D_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8723D_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8723D_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8723D_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8723D_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8723D_2ANT_COEX_ALGO_MAX
};
enum bt_8723d_2ant_phase {
BT_8723D_2ANT_PHASE_COEX_INIT = 0x0,
BT_8723D_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8723D_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8723D_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8723D_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8723D_2ANT_PHASE_BTMPMODE = 0x5,
BT_8723D_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8723D_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8723D_2ANT_PHASE_MAX
};
enum bt_8723d_2ant_Scoreboard {
BT_8723D_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8723D_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8723D_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8723D_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8723D_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8723d_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
};
struct coex_sta_8723d_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
boolean is_hiPri_rx_overhead;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
u8 bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u32 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u32 cnt_RoleSwitch;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
boolean wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
boolean is_tdma_btautoslot;
boolean is_tdma_btautoslot_hang;
};
#define BT_8723D_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8723D_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8723D_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8723d_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8723d2ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8723d2ant_power_on_setting(btcoexist)
#define ex_halbtc8723d2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8723d2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8723d2ant_init_coex_dm(btcoexist)
#define ex_halbtc8723d2ant_ips_notify(btcoexist, type)
#define ex_halbtc8723d2ant_lps_notify(btcoexist, type)
#define ex_halbtc8723d2ant_scan_notify(btcoexist, type)
#define ex_halbtc8723d2ant_connect_notify(btcoexist, type)
#define ex_halbtc8723d2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8723d2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8723d2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8723d2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8723d2ant_halt_notify(btcoexist)
#define ex_halbtc8723d2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8723d2ant_periodical(btcoexist)
#define ex_halbtc8723d2ant_display_coex_info(btcoexist)
#define ex_halbtc8723d2ant_set_antenna_notify(btcoexist, type)
#define ex_halbtc8723d2ant_display_ant_detection(btcoexist)
#define ex_halbtc8723d2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

3461
hal/btc/halbtc8812a1ant.c
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hal/btc/halbtc8812a1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8812A_SUPPORT == 1)
/* *******************************************
* The following is for 8812A 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1
#define BT_INFO_8812A_1ANT_B_FTP BIT(7)
#define BT_INFO_8812A_1ANT_B_A2DP BIT(6)
#define BT_INFO_8812A_1ANT_B_HID BIT(5)
#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8812A_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2
#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
enum bt_info_src_8812a_1ant {
BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8812A_1ANT_MAX
};
enum bt_8812a_1ant_bt_status {
BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8812A_1ANT_BT_STATUS_MAX
};
enum bt_8812a_1ant_wifi_status {
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8812A_1ANT_WIFI_STATUS_MAX
};
enum bt_8812a_1ant_coex_algo {
BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8812A_1ANT_COEX_ALGO_SCO = 0x1,
BT_8812A_1ANT_COEX_ALGO_HID = 0x2,
BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8812A_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8812a_1ant {
/* hw setting */
u8 pre_ant_pos_type;
u8 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8812a_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8812A_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_MAX];
u32 bt_info_query_cnt;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
boolean cck_lock;
boolean pre_ccklock;
u8 coex_table_type;
boolean force_lps_on;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8812a1ant_power_on_setting(btcoexist)
#define ex_halbtc8812a1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8812a1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8812a1ant_init_coex_dm(btcoexist)
#define ex_halbtc8812a1ant_ips_notify(btcoexist, type)
#define ex_halbtc8812a1ant_lps_notify(btcoexist, type)
#define ex_halbtc8812a1ant_scan_notify(btcoexist, type)
#define ex_halbtc8812a1ant_connect_notify(btcoexist, type)
#define ex_halbtc8812a1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8812a1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8812a1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8812a1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8812a1ant_halt_notify(btcoexist)
#define ex_halbtc8812a1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8812a1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8812a1ant_periodical(btcoexist)
#define ex_halbtc8812a1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#define ex_halbtc8812a1ant_display_coex_info(btcoexist)
#endif
#endif

5624
hal/btc/halbtc8812a2ant.c
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hal/btc/halbtc8812a2ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8812A_SUPPORT == 1)
/* *******************************************
* The following is for 8812A 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0
#define BT_INFO_8812A_2ANT_B_FTP BIT(7)
#define BT_INFO_8812A_2ANT_B_A2DP BIT(6)
#define BT_INFO_8812A_2ANT_B_HID BIT(5)
#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8812A_2ANT_B_CONNECTION BIT(0)
#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2
#define NOISY_AP_NUM_THRESH_8812A 50
enum bt_info_src_8812a_2ant {
BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8812A_2ANT_MAX
};
enum bt_8812a_2ant_bt_status {
BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8812A_2ANT_BT_STATUS_MAX
};
enum bt_8812a_2ant_coex_algo {
BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8812A_2ANT_COEX_ALGO_SCO = 0x1,
BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2,
BT_8812A_2ANT_COEX_ALGO_HID = 0x3,
BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4,
BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6,
BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7,
BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb,
BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc,
BT_8812A_2ANT_COEX_ALGO_MAX = 0xd
};
struct coex_dm_8812a_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean auto_tdma_adjust_low_rssi;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 cur_ra_mask_type;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
boolean cur_enable_pta;
boolean pre_enable_pta;
};
struct coex_sta_8812a_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean acl_busy;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8812A_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_MAX];
u32 bt_info_query_cnt;
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
boolean pre_bt_disabled;
u32 pre_bt_info_c2h_cnt_bt_rsp;
u32 pre_bt_info_c2h_cnt_bt_send;
boolean force_lps_on;
u32 bt_coex_supported_version;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
void ex_halbtc8812a2ant_pta_off_on_notify(IN struct btc_coexist *btcoexist,
IN u8 bt_status);
#else
#define ex_halbtc8812a2ant_power_on_setting(btcoexist)
#define ex_halbtc8812a2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8812a2ant_init_coex_dm(btcoexist)
#define ex_halbtc8812a2ant_ips_notify(btcoexist, type)
#define ex_halbtc8812a2ant_lps_notify(btcoexist, type)
#define ex_halbtc8812a2ant_scan_notify(btcoexist, type)
#define ex_halbtc8812a2ant_connect_notify(btcoexist, type)
#define ex_halbtc8812a2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8812a2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8812a2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8812a2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8812a2ant_halt_notify(btcoexist)
#define ex_halbtc8812a2ant_periodical(btcoexist)
#define ex_halbtc8812a2ant_display_coex_info(btcoexist)
#define ex_halbtc8812a2ant_dbg_control(btcoexist, op_code, op_len, pdata)
#define ex_halbtc8812a2ant_pta_off_on_notify(btcoexist, bt_status)
#endif
#endif

3289
hal/btc/halbtc8821a1ant.c
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hal/btc/halbtc8821a1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821A_SUPPORT == 1)
/* *******************************************
* The following is for 8821A 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1
#define BT_INFO_8821A_1ANT_B_FTP BIT(7)
#define BT_INFO_8821A_1ANT_B_A2DP BIT(6)
#define BT_INFO_8821A_1ANT_B_HID BIT(5)
#define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821A_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821A_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT 2
enum bt_info_src_8821a_1ant {
BT_INFO_SRC_8821A_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821A_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821A_1ANT_MAX
};
enum bt_8821a_1ant_bt_status {
BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821A_1ANT_BT_STATUS_MAX
};
enum bt_8821a_1ant_wifi_status {
BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8821A_1ANT_WIFI_STATUS_MAX
};
enum bt_8821a_1ant_coex_algo {
BT_8821A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821A_1ANT_COEX_ALGO_SCO = 0x1,
BT_8821A_1ANT_COEX_ALGO_HID = 0x2,
BT_8821A_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821A_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821A_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821A_1ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8821a_1ant {
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u8 error_condition;
};
struct coex_sta_8821a_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 cut_version;
u8 bt_rssi;
u8 scan_ap_num;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821A_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_1ANT_MAX];
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
boolean bt_whck_test; /* Add for ASUS WHQL TEST that enable wifi test bt */
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821a1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821a1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821a1ant_power_on_setting(btcoexist)
#define ex_halbtc8821a1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821a1ant_init_coex_dm(btcoexist)
#define ex_halbtc8821a1ant_ips_notify(btcoexist, type)
#define ex_halbtc8821a1ant_lps_notify(btcoexist, type)
#define ex_halbtc8821a1ant_scan_notify(btcoexist, type)
#define ex_halbtc8821a1ant_switchband_notify(btcoexist, type)
#define ex_halbtc8821a1ant_connect_notify(btcoexist, type)
#define ex_halbtc8821a1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821a1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821a1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821a1ant_halt_notify(btcoexist)
#define ex_halbtc8821a1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821a1ant_periodical(btcoexist)
#define ex_halbtc8821a1ant_display_coex_info(btcoexist)
#endif
#endif

4637
hal/btc/halbtc8821a2ant.c
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hal/btc/halbtc8821a2ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821A_SUPPORT == 1)
/* *******************************************
* The following is for 8821A 2Ant BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8821A_2ANT 1
#define BT_INFO_8821A_2ANT_B_FTP BIT(7)
#define BT_INFO_8821A_2ANT_B_A2DP BIT(6)
#define BT_INFO_8821A_2ANT_B_HID BIT(5)
#define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821A_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2
#define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
#define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
enum bt_info_src_8821a_2ant {
BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821A_2ANT_MAX
};
enum bt_8821a_2ant_bt_status {
BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821A_2ANT_BT_STATUS_MAX
};
enum bt_8821a_2ant_coex_algo {
BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821A_2ANT_COEX_ALGO_SCO = 0x1,
BT_8821A_2ANT_COEX_ALGO_HID = 0x2,
BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821A_2ANT_COEX_ALGO_MAX = 0xb,
};
struct coex_dm_8821a_2ant {
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
};
struct coex_sta_8821a_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
u32 bt_coex_supported_version;
u8 cut_version;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821a2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821a2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821a2ant_power_on_setting(btcoexist)
#define ex_halbtc8821a2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821a2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821a2ant_init_coex_dm(btcoexist)
#define ex_halbtc8821a2ant_ips_notify(btcoexist, type)
#define ex_halbtc8821a2ant_lps_notify(btcoexist, type)
#define ex_halbtc8821a2ant_scan_notify(btcoexist, type)
#define ex_halbtc8821a2ant_switchband_notify(btcoexist, type)
#define ex_halbtc8821a2ant_connect_notify(btcoexist, type)
#define ex_halbtc8821a2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821a2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821a2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821a2ant_halt_notify(btcoexist)
#define ex_halbtc8821a2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821a2ant_periodical(btcoexist)
#define ex_halbtc8821a2ant_display_coex_info(btcoexist)
#endif
#endif

6674
hal/btc/halbtc8821c1ant.c
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hal/btc/halbtc8821c1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821C_SUPPORT == 1)
/* *******************************************
* The following is for 8821C 1ANT BT Co-exist definition
* ******************************************* */
#define BT_8821C_1ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8821C_1ANT 1
#define BT_INFO_8821C_1ANT_B_FTP BIT(7)
#define BT_INFO_8821C_1ANT_B_A2DP BIT(6)
#define BT_INFO_8821C_1ANT_B_HID BIT(5)
#define BT_INFO_8821C_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821C_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821C_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821C_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821C_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8821C_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8821C_1ANT 2
#define BT_8821C_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
#define BT_8821C_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
/* for Antenna detection */
#define BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8821C_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8821C_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8821C_1ANT_ANTDET_ENABLE 0
#define BT_8821C_1ANT_ANTDET_BTTXTIME 100
#define BT_8821C_1ANT_ANTDET_BTTXCHANNEL 39
#define BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8821C_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8821c_1ant_signal_state {
BT_8821C_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8821C_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8821C_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8821C_1ANT_SIG_STA_MAX
};
enum bt_8821c_1ant_path_ctrl_owner {
BT_8821C_1ANT_PCO_BTSIDE = 0x0,
BT_8821C_1ANT_PCO_WLSIDE = 0x1,
BT_8821C_1ANT_PCO_MAX
};
enum bt_8821c_1ant_gnt_ctrl_type {
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8821C_1ANT_GNT_TYPE_MAX
};
enum bt_8821c_1ant_gnt_ctrl_block {
BT_8821C_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8821C_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8821C_1ANT_GNT_BLOCK_BB = 0x2,
BT_8821C_1ANT_GNT_BLOCK_MAX
};
enum bt_8821c_1ant_lte_coex_table_type {
BT_8821C_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8821C_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8821C_1ANT_CTT_MAX
};
enum bt_8821c_1ant_lte_break_table_type {
BT_8821C_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8821C_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8821C_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8821C_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8821C_1ANT_LBTT_MAX
};
enum bt_info_src_8821c_1ant {
BT_INFO_SRC_8821C_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821C_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821C_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821C_1ANT_MAX
};
enum bt_8821c_1ant_bt_status {
BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821C_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821C_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821C_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821C_1ANT_BT_STATUS_MAX
};
enum bt_8821c_1ant_wifi_status {
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8821C_1ANT_WIFI_STATUS_MAX
};
enum bt_8821c_1ant_coex_algo {
BT_8821C_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821C_1ANT_COEX_ALGO_SCO = 0x1,
BT_8821C_1ANT_COEX_ALGO_HID = 0x2,
BT_8821C_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8821C_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821C_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821C_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8821C_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821C_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821C_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821C_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821C_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8821c_1ant_ext_ant_switch_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_1ant_ext_ant_switch_ctrl_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_1ant_ext_ant_switch_pos_type {
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_MAX
};
enum bt_8821c_1ant_ext_band_switch_pos_type {
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8821c_1ant_int_block {
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8821c_1ant_phase {
BT_8821C_1ANT_PHASE_COEX_INIT = 0x0,
BT_8821C_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8821C_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8821C_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8821C_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8821C_1ANT_PHASE_BTMPMODE = 0x5,
BT_8821C_1ANT_PHASE_ANTENNA_DET = 0x6,
BT_8821C_1ANT_PHASE_COEX_POWERON = 0x7,
BT_8821C_1ANT_PHASE_MAX
};
enum bt_8821c_1ant_Scoreboard {
BT_8821C_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8821C_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8821C_1ANT_SCOREBOARD_SCAN = BIT(2)
};
struct coex_dm_8821c_1ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
u8 error_condition;
};
struct coex_sta_8821c_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821C_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u8 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
};
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8821c_1ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8821C_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8821C_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8821C_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8821c_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8821C_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8821C_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8821C_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821c1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821c1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821c1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821c1ant_power_on_setting(btcoexist)
#define ex_halbtc8821c1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821c1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821c1ant_init_coex_dm(btcoexist)
#define ex_halbtc8821c1ant_ips_notify(btcoexist, type)
#define ex_halbtc8821c1ant_lps_notify(btcoexist, type)
#define ex_halbtc8821c1ant_scan_notify(btcoexist, type)
#define ex_halbtc8821c1ant_switchband_notify(btcoexist,type)
#define ex_halbtc8821c1ant_connect_notify(btcoexist, type)
#define ex_halbtc8821c1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821c1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821c1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8821c1ant_halt_notify(btcoexist)
#define ex_halbtc8821c1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821c1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8821c1ant_periodical(btcoexist)
#define ex_halbtc8821c1ant_display_coex_info(btcoexist)
#define ex_halbtc8821c1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8821c1ant_display_ant_detection(btcoexist)
#endif
#endif

6936
hal/btc/halbtc8821c2ant.c
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478
hal/btc/halbtc8821c2ant.h
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@ -1,478 +0,0 @@
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8821C_SUPPORT == 1)
/* *******************************************
* The following is for 8821C 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8821C_2ANT_COEX_DBG 0
#define BT_AUTO_REPORT_ONLY_8821C_2ANT 1
#define BT_INFO_8821C_2ANT_B_FTP BIT(7)
#define BT_INFO_8821C_2ANT_B_A2DP BIT(6)
#define BT_INFO_8821C_2ANT_B_HID BIT(5)
#define BT_INFO_8821C_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8821C_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8821C_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8821C_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8821C_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8821C_2ANT 2
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8821C_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8821C_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8821C_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8821C_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8821C_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8821C_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8821C_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8821C_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8821C_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8821C_2ANT_ANTDET_ENABLE 0
#define BT_8821C_2ANT_ANTDET_BTTXTIME 100
#define BT_8821C_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8821C_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8821c_2ant_signal_state {
BT_8821C_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8821C_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8821C_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8821C_2ANT_SIG_STA_MAX
};
enum bt_8821c_2ant_path_ctrl_owner {
BT_8821C_2ANT_PCO_BTSIDE = 0x0,
BT_8821C_2ANT_PCO_WLSIDE = 0x1,
BT_8821C_2ANT_PCO_MAX
};
enum bt_8821c_2ant_gnt_ctrl_type {
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8821C_2ANT_GNT_TYPE_MAX
};
enum bt_8821c_2ant_gnt_ctrl_block {
BT_8821C_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8821C_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8821C_2ANT_GNT_BLOCK_BB = 0x2,
BT_8821C_2ANT_GNT_BLOCK_MAX
};
enum bt_8821c_2ant_lte_coex_table_type {
BT_8821C_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8821C_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8821C_2ANT_CTT_MAX
};
enum bt_8821c_2ant_lte_break_table_type {
BT_8821C_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8821C_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8821C_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8821C_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8821C_2ANT_LBTT_MAX
};
enum bt_info_src_8821c_2ant {
BT_INFO_SRC_8821C_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8821C_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8821C_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8821C_2ANT_MAX
};
enum bt_8821c_2ant_bt_status {
BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8821C_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8821C_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8821C_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8821C_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8821C_2ANT_BT_STATUS_MAX
};
enum bt_8821c_2ant_coex_algo {
BT_8821C_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8821C_2ANT_COEX_ALGO_SCO = 0x1,
BT_8821C_2ANT_COEX_ALGO_HID = 0x2,
BT_8821C_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8821C_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8821C_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8821C_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8821C_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8821C_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8821C_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8821C_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8821C_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8821C_2ANT_COEX_ALGO_MAX
};
enum bt_8821c_2ant_ext_ant_switch_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_2ant_ext_ant_switch_ctrl_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_2ant_ext_ant_switch_pos_type {
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
};
enum bt_8821c_2ant_ext_band_switch_pos_type {
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8821c_2ant_int_block {
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8821c_2ant_phase {
BT_8821C_2ANT_PHASE_COEX_INIT = 0x0,
BT_8821C_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8821C_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8821C_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8821C_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8821C_2ANT_PHASE_BTMPMODE = 0x5,
BT_8821C_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8821C_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8821C_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
BT_8821C_2ANT_PHASE_MAX
};
enum bt_8821c_2ant_Scoreboard {
BT_8821C_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8821C_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8821C_2ANT_SCOREBOARD_SCAN = BIT(2)
};
struct coex_dm_8821c_2ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
};
struct coex_sta_8821c_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8821C_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u8 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
};
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8821c_2ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8821C_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8821C_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8821C_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8821c_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8821C_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8821C_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8821C_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8821c2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8821c2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8821c2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8821c2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8821c2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8821c2ant_power_on_setting(btcoexist)
#define ex_halbtc8821c2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8821c2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8821c2ant_init_coex_dm(btcoexist)
#define ex_halbtc8821c2ant_ips_notify(btcoexist, type)
#define ex_halbtc8821c2ant_lps_notify(btcoexist, type)
#define ex_halbtc8821c2ant_scan_notify(btcoexist, type)
#define ex_halbtc8821c2ant_switchband_notify(btcoexist,type)
#define ex_halbtc8821c2ant_connect_notify(btcoexist, type)
#define ex_halbtc8821c2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8821c2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8821c2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8821c2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8821c2ant_halt_notify(btcoexist)
#define ex_halbtc8821c2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8821c2ant_periodical(btcoexist)
#define ex_halbtc8821c2ant_display_coex_info(btcoexist)
#define ex_halbtc8821c2ant_display_ant_detection(btcoexist)
#define ex_halbtc8821c2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

186
hal/btc/halbtc8821cwifionly.c
View file

@ -1,186 +0,0 @@
#include "mp_precomp.h"
static struct rfe_type_8821c_wifi_only gl_rfe_type_8821c_1ant;
static struct rfe_type_8821c_wifi_only *rfe_type = &gl_rfe_type_8821c_1ant;
VOID hal8821c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
boolean switch_polatiry_inverse = false;
u8 regval_0xcb7 = 0;
u8 pos_type, ctrl_type;
if (!rfe_type->ext_ant_switch_exist)
return;
/* swap control polarity if use different switch control polarity*/
/* Normal switch polarity for DPDT, 0xcb4[29:28] = 2b'01 => BTG to Main, WLG to Aux, 0xcb4[29:28] = 2b'10 => BTG to Aux, WLG to Main */
/* Normal switch polarity for SPDT, 0xcb4[29:28] = 2b'01 => Ant to BTG, 0xcb4[29:28] = 2b'10 => Ant to WLG */
if (rfe_type->ext_ant_switch_ctrl_polarity)
switch_polatiry_inverse = !switch_polatiry_inverse;
/* swap control polarity if 1-Ant at Aux */
if (rfe_type->ant_at_main_port == false)
switch_polatiry_inverse = !switch_polatiry_inverse;
if (is_5g)
pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA;
else
pos_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG;
switch (pos_type) {
default:
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA:
break;
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG:
if (!rfe_type->wlg_Locate_at_btg)
switch_polatiry_inverse = !switch_polatiry_inverse;
break;
}
if (pwifionlycfg->haldata_info.ant_div_cfg)
ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV;
else
ctrl_type = BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW;
switch (ctrl_type) {
default:
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW:
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff, 0x77);
regval_0xcb7 = (switch_polatiry_inverse == false ? 0x1 : 0x2);
/* 0xcb4[29:28] = 2b'01 for no switch_polatiry_inverse, DPDT_SEL_N =1, DPDT_SEL_P =0 */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x30000000, regval_0xcb7);
break;
case BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV:
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/* BB SW, DPDT use RFE_ctrl8 and RFE_ctrl9 as control pin */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0x000000ff, 0x88);
/* no regval_0xcb7 setup required, because antenna switch control value by antenna diversity */
break;
}
}
VOID halbtc8821c_wifi_only_set_rfe_type(
IN struct wifi_only_cfg *pwifionlycfg
)
{
/* the following setup should be got from Efuse in the future */
rfe_type->rfe_module_type = (pwifionlycfg->haldata_info.rfe_type) & 0x1f;
rfe_type->ext_ant_switch_ctrl_polarity = 0;
switch (rfe_type->rfe_module_type) {
case 0:
default:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*2-Ant, DPDT, WLG*/
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 1:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT; /*1-Ant, Main, DPDT or SPDT, WLG */
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 2:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT; /*1-Ant, Main, DPDT or SPDT, BTG */
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = true;
break;
case 3:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*1-Ant, Aux, DPDT, WLG */
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = false;
break;
case 4:
rfe_type->ext_ant_switch_exist = true;
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT; /*1-Ant, Aux, DPDT, BTG */
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = false;
break;
case 5:
rfe_type->ext_ant_switch_exist = false; /*2-Ant, no antenna switch, WLG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 6:
rfe_type->ext_ant_switch_exist = false; /*2-Ant, no antenna switch, WLG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE;
rfe_type->wlg_Locate_at_btg = false;
rfe_type->ant_at_main_port = true;
break;
case 7:
rfe_type->ext_ant_switch_exist = true; /*2-Ant, DPDT, BTG*/
rfe_type->ext_ant_switch_type =
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT;
rfe_type->wlg_Locate_at_btg = true;
rfe_type->ant_at_main_port = true;
break;
}
}
VOID
ex_hal8821c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
halbtc8821c_wifi_only_set_rfe_type(pwifionlycfg);
/* set gnt_wl, gnt_bt control owner to WL*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0x400000, 0x1);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
}
VOID
ex_hal8821c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
ex_hal8821c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8821c_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}

70
hal/btc/halbtc8821cwifionly.h
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#ifndef __INC_HAL8821CWIFIONLYHWCFG_H
#define __INC_HAL8821CWIFIONLYHWCFG_H
struct rfe_type_8821c_wifi_only {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ant_at_main_port;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
enum bt_8821c_wifi_only_ext_ant_switch_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_NONE = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_MAX
};
enum bt_8821c_wifi_only_ext_ant_switch_ctrl_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8821c_wifi_only_ext_ant_switch_pos_type {
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8821C_WIFI_ONLY_EXT_ANT_SWITCH_TO_MAX
};
VOID
hal8821c_wifi_only_switch_antenna(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
halbtc8821c_wifi_only_set_rfe_type(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8821c_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8821c_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8821c_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

6840
hal/btc/halbtc8822b1ant.c
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hal/btc/halbtc8822b1ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8822B_SUPPORT == 1)
/* *******************************************
* The following is for 8822B 1ANT BT Co-exist definition
* ******************************************* */
#define BT_AUTO_REPORT_ONLY_8822B_1ANT 1
#define BT_INFO_8822B_1ANT_B_FTP BIT(7)
#define BT_INFO_8822B_1ANT_B_A2DP BIT(6)
#define BT_INFO_8822B_1ANT_B_HID BIT(5)
#define BT_INFO_8822B_1ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8822B_1ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8822B_1ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8822B_1ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8822B_1ANT_B_CONNECTION BIT(0)
#define BT_INFO_8822B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
#define BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT 2
#define BT_8822B_1ANT_WIFI_NOISY_THRESH 150 /* max: 255 */
/* for Antenna detection */
#define BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
#define BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT 35
#define BT_8822B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8822B_1ANT_ANTDET_ENABLE 0
#define BT_8822B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
#define BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8822b_1ant_signal_state {
BT_8822B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8822B_1ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8822B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8822B_1ANT_SIG_STA_MAX
};
enum bt_8822b_1ant_path_ctrl_owner {
BT_8822B_1ANT_PCO_BTSIDE = 0x0,
BT_8822B_1ANT_PCO_WLSIDE = 0x1,
BT_8822B_1ANT_PCO_MAX
};
enum bt_8822b_1ant_gnt_ctrl_type {
BT_8822B_1ANT_GNT_CTRL_BY_PTA = 0x0,
BT_8822B_1ANT_GNT_CTRL_BY_SW = 0x1,
BT_8822B_1ANT_GNT_CTRL_MAX
};
enum bt_8822b_1ant_gnt_ctrl_block {
BT_8822B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8822B_1ANT_GNT_BLOCK_RFC = 0x1,
BT_8822B_1ANT_GNT_BLOCK_BB = 0x2,
BT_8822B_1ANT_GNT_BLOCK_MAX
};
enum bt_8822b_1ant_lte_coex_table_type {
BT_8822B_1ANT_CTT_WL_VS_LTE = 0x0,
BT_8822B_1ANT_CTT_BT_VS_LTE = 0x1,
BT_8822B_1ANT_CTT_MAX
};
enum bt_8822b_1ant_lte_break_table_type {
BT_8822B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8822B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8822B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8822B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8822B_1ANT_LBTT_MAX
};
enum bt_info_src_8822b_1ant {
BT_INFO_SRC_8822B_1ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8822B_1ANT_BT_RSP = 0x1,
BT_INFO_SRC_8822B_1ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8822B_1ANT_MAX
};
enum bt_8822b_1ant_bt_status {
BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8822B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8822B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8822B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8822B_1ANT_BT_STATUS_MAX
};
enum bt_8822b_1ant_wifi_status {
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
BT_8822B_1ANT_WIFI_STATUS_MAX
};
enum bt_8822b_1ant_coex_algo {
BT_8822B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8822B_1ANT_COEX_ALGO_SCO = 0x1,
BT_8822B_1ANT_COEX_ALGO_HID = 0x2,
BT_8822B_1ANT_COEX_ALGO_A2DP = 0x3,
BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8822B_1ANT_COEX_ALGO_PANEDR = 0x5,
BT_8822B_1ANT_COEX_ALGO_PANHS = 0x6,
BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8822B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8822B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8822B_1ANT_COEX_ALGO_MAX = 0xb,
};
enum bt_8822b_1ant_ext_ant_switch_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8822b_1ant_ext_ant_switch_ctrl_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8822b_1ant_ext_ant_switch_pos_type {
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_MAX
};
enum bt_8822b_1ant_phase {
BT_8822B_1ANT_PHASE_COEX_INIT = 0x0,
BT_8822B_1ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8822B_1ANT_PHASE_WLAN_OFF = 0x2,
BT_8822B_1ANT_PHASE_2G_RUNTIME = 0x3,
BT_8822B_1ANT_PHASE_5G_RUNTIME = 0x4,
BT_8822B_1ANT_PHASE_BTMPMODE = 0x5,
BT_8822B_1ANT_PHASE_MAX
};
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
enum bt_8822b_1ant_Scoreboard {
BT_8822B_1ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8822B_1ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8822B_1ANT_SCOREBOARD_SCAN = BIT(2),
BT_8822B_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8822B_1ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8822b_1ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean auto_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
/* sw mechanism */
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
u16 backup_retry_limit;
u8 backup_ampdu_max_time;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
u32 pre_ra_mask;
u32 cur_ra_mask;
u8 pre_arfr_type;
u8 cur_arfr_type;
u8 pre_retry_limit_type;
u8 cur_retry_limit_type;
u8 pre_ampdu_time_type;
u8 cur_ampdu_time_type;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 error_condition;
};
struct coex_sta_8822b_1ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean bt_hi_pri_link_exist;
u8 num_of_profile;
boolean under_lps;
boolean under_ips;
u32 specific_pkt_period_cnt;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
s8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_page; /* Add for win8.1 page out issue */
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
u8 bt_retry_cnt;
u8 bt_info_ext;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u32 wrong_profile_notification;
boolean concurrent_rx_mode_on;
u32 special_pkt_period_cnt;
u16 score_board;
u8 a2dp_bit_pool;
u8 cut_version;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
boolean run_time_state;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
};
struct rfe_type_8822b_1ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type;
u8 ext_ant_switch_ctrl_polarity; /* iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 => Ant to BT/5G */
};
#define BT_8822B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8822B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8822B_1ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8822b_1ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8822B_1ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8822B_1ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_psd_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_scan_notify_without_bt(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_switchband_notify_without_bt(IN struct btc_coexist
*btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8822b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_psd_scan(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b1ant_dbg_control(IN struct btc_coexist *btcoexist,
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
#else
#define ex_halbtc8822b1ant_power_on_setting(btcoexist)
#define ex_halbtc8822b1ant_pre_load_firmware(btcoexist)
#define ex_halbtc8822b1ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8822b1ant_init_coex_dm(btcoexist)
#define ex_halbtc8822b1ant_ips_notify(btcoexist, type)
#define ex_halbtc8822b1ant_lps_notify(btcoexist, type)
#define ex_halbtc8822b1ant_scan_notify(btcoexist, type)
#define ex_halbtc8822b1ant_scan_notify_without_bt(btcoexist, type)
#define ex_halbtc8822b1ant_switchband_notify(btcoexist, type)
#define ex_halbtc8822b1ant_switchband_notify_without_bt(btcoexist, type)
#define ex_halbtc8822b1ant_connect_notify(btcoexist, type)
#define ex_halbtc8822b1ant_media_status_notify(btcoexist, type)
#define ex_halbtc8822b1ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8822b1ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8822b1ant_halt_notify(btcoexist)
#define ex_halbtc8822b1ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8822b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b1ant_coex_dm_reset(btcoexist)
#define ex_halbtc8822b1ant_periodical(btcoexist)
#define ex_halbtc8822b1ant_display_coex_info(btcoexist)
#define ex_halbtc8822b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
#define ex_halbtc8822b1ant_display_ant_detection(btcoexist)
#define ex_halbtc8822b1ant_dbg_control(btcoexist, op_code, op_len, pdata)
#endif
#else
void ex_halbtc8822b1ant_init_hw_config_without_bt(IN struct btc_coexist
*btcoexist);
void ex_halbtc8822b1ant_switch_band_without_bt(IN struct btc_coexist *btcoexist,
IN boolean wifi_only_5g);
#endif

5543
hal/btc/halbtc8822b2ant.c
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hal/btc/halbtc8822b2ant.h
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#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
#if (RTL8822B_SUPPORT == 1)
/* *******************************************
* The following is for 8822B 2Ant BT Co-exist definition
* ******************************************* */
#define BT_8822B_2ANT_COEX_DBG 1
#define BT_AUTO_REPORT_ONLY_8822B_2ANT 1
#define BT_INFO_8822B_2ANT_B_FTP BIT(7)
#define BT_INFO_8822B_2ANT_B_A2DP BIT(6)
#define BT_INFO_8822B_2ANT_B_HID BIT(5)
#define BT_INFO_8822B_2ANT_B_SCO_BUSY BIT(4)
#define BT_INFO_8822B_2ANT_B_ACL_BUSY BIT(3)
#define BT_INFO_8822B_2ANT_B_INQ_PAGE BIT(2)
#define BT_INFO_8822B_2ANT_B_SCO_ESCO BIT(1)
#define BT_INFO_8822B_2ANT_B_CONNECTION BIT(0)
#define BTC_RSSI_COEX_THRESH_TOL_8822B_2ANT 2
#define BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
#define BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
#define BT_8822B_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 40 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
#define BT_8822B_2ANT_BT_RSSI_COEXSWITCH_THRES2 35 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
#define BT_8822B_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
#define BT_8822B_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
#define BT_8822B_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
#define BT_8822B_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
#define BT_8822B_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
#define BT_8822B_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
#define BT_8822B_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
/* for Antenna detection */
#define BT_8822B_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
#define BT_8822B_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
#define BT_8822B_2ANT_ANTDET_PSDTHRES_1ANT 40
#define BT_8822B_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
#define BT_8822B_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
#define BT_8822B_2ANT_ANTDET_ENABLE 0
#define BT_8822B_2ANT_ANTDET_BTTXTIME 100
#define BT_8822B_2ANT_ANTDET_BTTXCHANNEL 39
#define BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
#define BT_8822B_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
enum bt_8822b_2ant_signal_state {
BT_8822B_2ANT_SIG_STA_SET_TO_LOW = 0x0,
BT_8822B_2ANT_SIG_STA_SET_BY_HW = 0x0,
BT_8822B_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
BT_8822B_2ANT_SIG_STA_MAX
};
enum bt_8822b_2ant_path_ctrl_owner {
BT_8822B_2ANT_PCO_BTSIDE = 0x0,
BT_8822B_2ANT_PCO_WLSIDE = 0x1,
BT_8822B_2ANT_PCO_MAX
};
enum bt_8822b_2ant_gnt_ctrl_type {
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
BT_8822B_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
BT_8822B_2ANT_GNT_TYPE_MAX
};
enum bt_8822b_2ant_gnt_ctrl_block {
BT_8822B_2ANT_GNT_BLOCK_RFC_BB = 0x0,
BT_8822B_2ANT_GNT_BLOCK_RFC = 0x1,
BT_8822B_2ANT_GNT_BLOCK_BB = 0x2,
BT_8822B_2ANT_GNT_BLOCK_MAX
};
enum bt_8822b_2ant_lte_coex_table_type {
BT_8822B_2ANT_CTT_WL_VS_LTE = 0x0,
BT_8822B_2ANT_CTT_BT_VS_LTE = 0x1,
BT_8822B_2ANT_CTT_MAX
};
enum bt_8822b_2ant_lte_break_table_type {
BT_8822B_2ANT_LBTT_WL_BREAK_LTE = 0x0,
BT_8822B_2ANT_LBTT_BT_BREAK_LTE = 0x1,
BT_8822B_2ANT_LBTT_LTE_BREAK_WL = 0x2,
BT_8822B_2ANT_LBTT_LTE_BREAK_BT = 0x3,
BT_8822B_2ANT_LBTT_MAX
};
enum bt_info_src_8822b_2ant {
BT_INFO_SRC_8822B_2ANT_WIFI_FW = 0x0,
BT_INFO_SRC_8822B_2ANT_BT_RSP = 0x1,
BT_INFO_SRC_8822B_2ANT_BT_ACTIVE_SEND = 0x2,
BT_INFO_SRC_8822B_2ANT_MAX
};
enum bt_8822b_2ant_bt_status {
BT_8822B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
BT_8822B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
BT_8822B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
BT_8822B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
BT_8822B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
BT_8822B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
BT_8822B_2ANT_BT_STATUS_MAX
};
enum bt_8822b_2ant_coex_algo {
BT_8822B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
BT_8822B_2ANT_COEX_ALGO_SCO = 0x1,
BT_8822B_2ANT_COEX_ALGO_HID = 0x2,
BT_8822B_2ANT_COEX_ALGO_A2DP = 0x3,
BT_8822B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
BT_8822B_2ANT_COEX_ALGO_PANEDR = 0x5,
BT_8822B_2ANT_COEX_ALGO_PANHS = 0x6,
BT_8822B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
BT_8822B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
BT_8822B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
BT_8822B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
BT_8822B_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
BT_8822B_2ANT_COEX_ALGO_MAX
};
enum bt_8822b_2ant_ext_ant_switch_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_NONE = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAX
};
enum bt_8822b_2ant_ext_ant_switch_ctrl_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
BT_8822B_2ANT_EXT_ANT_SWITCH_CTRL_MAX
};
enum bt_8822b_2ant_ext_ant_switch_pos_type {
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
BT_8822B_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
};
enum bt_8822b_2ant_ext_band_switch_pos_type {
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
BT_8822B_2ANT_EXT_BAND_SWITCH_TO_MAX
};
enum bt_8822b_2ant_int_block {
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
BT_8822B_2ANT_INT_BLOCK_SWITCH_TO_MAX
};
enum bt_8822b_2ant_phase {
BT_8822B_2ANT_PHASE_COEX_INIT = 0x0,
BT_8822B_2ANT_PHASE_WLANONLY_INIT = 0x1,
BT_8822B_2ANT_PHASE_WLAN_OFF = 0x2,
BT_8822B_2ANT_PHASE_2G_RUNTIME = 0x3,
BT_8822B_2ANT_PHASE_5G_RUNTIME = 0x4,
BT_8822B_2ANT_PHASE_BTMPMODE = 0x5,
BT_8822B_2ANT_PHASE_ANTENNA_DET = 0x6,
BT_8822B_2ANT_PHASE_COEX_POWERON = 0x7,
BT_8822B_2ANT_PHASE_2G_RUNTIME_CONCURRENT = 0x8,
BT_8822B_2ANT_PHASE_MAX
};
/*ADD SCOREBOARD TO FIX BT LPS 32K ISSUE WHILE WL BUSY*/
enum bt_8822b_2ant_Scoreboard {
BT_8822B_2ANT_SCOREBOARD_ACTIVE = BIT(0),
BT_8822B_2ANT_SCOREBOARD_ONOFF = BIT(1),
BT_8822B_2ANT_SCOREBOARD_SCAN = BIT(2),
BT_8822B_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
BT_8822B_2ANT_SCOREBOARD_WLBUSY = BIT(6)
};
struct coex_dm_8822b_2ant {
/* hw setting */
u32 pre_ant_pos_type;
u32 cur_ant_pos_type;
/* fw mechanism */
u8 pre_bt_dec_pwr_lvl;
u8 cur_bt_dec_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
boolean cur_ignore_wlan_act;
boolean pre_ignore_wlan_act;
u8 pre_ps_tdma;
u8 cur_ps_tdma;
u8 ps_tdma_para[5];
u8 ps_tdma_du_adj_type;
boolean reset_tdma_adjust;
boolean pre_ps_tdma_on;
boolean cur_ps_tdma_on;
boolean pre_bt_auto_report;
boolean cur_bt_auto_report;
/* sw mechanism */
boolean pre_rf_rx_lpf_shrink;
boolean cur_rf_rx_lpf_shrink;
u32 bt_rf_0x1e_backup;
boolean pre_low_penalty_ra;
boolean cur_low_penalty_ra;
boolean pre_dac_swing_on;
u32 pre_dac_swing_lvl;
boolean cur_dac_swing_on;
u32 cur_dac_swing_lvl;
boolean pre_adc_back_off;
boolean cur_adc_back_off;
boolean pre_agc_table_en;
boolean cur_agc_table_en;
u32 pre_val0x6c0;
u32 cur_val0x6c0;
u32 pre_val0x6c4;
u32 cur_val0x6c4;
u32 pre_val0x6c8;
u32 cur_val0x6c8;
u8 pre_val0x6cc;
u8 cur_val0x6cc;
boolean limited_dig;
/* algorithm related */
u8 pre_algorithm;
u8 cur_algorithm;
u8 bt_status;
u8 wifi_chnl_info[3];
boolean need_recover0x948;
u32 backup0x948;
u8 pre_lps;
u8 cur_lps;
u8 pre_rpwm;
u8 cur_rpwm;
boolean is_switch_to_1dot5_ant;
u8 switch_thres_offset;
u32 arp_cnt;
u32 pre_ext_ant_switch_status;
u32 cur_ext_ant_switch_status;
u8 pre_ext_band_switch_status;
u8 cur_ext_band_switch_status;
u8 pre_int_block_status;
u8 cur_int_block_status;
};
struct coex_sta_8822b_2ant {
boolean bt_disabled;
boolean bt_link_exist;
boolean sco_exist;
boolean a2dp_exist;
boolean hid_exist;
boolean pan_exist;
boolean under_lps;
boolean under_ips;
u32 high_priority_tx;
u32 high_priority_rx;
u32 low_priority_tx;
u32 low_priority_rx;
u8 bt_rssi;
boolean bt_tx_rx_mask;
u8 pre_bt_rssi_state;
u8 pre_wifi_rssi_state[4];
boolean c2h_bt_info_req_sent;
u8 bt_info_c2h[BT_INFO_SRC_8822B_2ANT_MAX][10];
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_2ANT_MAX];
boolean bt_whck_test;
boolean c2h_bt_inquiry_page;
boolean c2h_bt_remote_name_req;
u8 bt_retry_cnt;
u8 bt_info_ext;
u8 bt_info_ext2;
u32 pop_event_cnt;
u8 scan_ap_num;
u32 crc_ok_cck;
u32 crc_ok_11g;
u32 crc_ok_11n;
u32 crc_ok_11n_agg;
u32 crc_ok_11n_vht;
u32 crc_err_cck;
u32 crc_err_11g;
u32 crc_err_11n;
u32 crc_err_11n_agg;
u32 crc_err_11n_vht;
boolean cck_lock;
boolean pre_ccklock;
boolean cck_ever_lock;
u8 coex_table_type;
boolean force_lps_on;
u8 dis_ver_info_cnt;
u8 a2dp_bit_pool;
u8 cut_version;
boolean concurrent_rx_mode_on;
u16 score_board;
u8 isolation_btween_wb; /* 0~ 50 */
u8 wifi_coex_thres;
u8 bt_coex_thres;
u8 wifi_coex_thres2;
u8 bt_coex_thres2;
u8 num_of_profile;
boolean acl_busy;
boolean wl_rf_off_on_event;
boolean bt_create_connection;
boolean wifi_is_high_pri_task;
u32 specific_pkt_period_cnt;
u32 bt_coex_supported_feature;
u32 bt_coex_supported_version;
u8 bt_ble_scan_type;
u8 bt_ble_scan_para[3];
boolean run_time_state;
boolean freeze_coexrun_by_btinfo;
boolean is_A2DP_3M;
boolean voice_over_HOGP;
u8 bt_info;
boolean is_autoslot;
u8 forbidden_slot;
u8 hid_busy_num;
u8 hid_pair_cnt;
u32 cnt_RemoteNameReq;
u32 cnt_setupLink;
u32 cnt_ReInit;
u32 cnt_IgnWlanAct;
u32 cnt_Page;
u16 bt_reg_vendor_ac;
u16 bt_reg_vendor_ae;
boolean is_setupLink;
u8 wl_noisy_level;
u32 gnt_error_cnt;
u8 bt_afh_map[10];
u8 bt_relink_downcount;
};
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
#define BT_8822B_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
struct rfe_type_8822b_2ant {
u8 rfe_module_type;
boolean ext_ant_switch_exist;
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
boolean ext_band_switch_exist;
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
u8 ext_band_switch_ctrl_polarity;
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
boolean ext_ant_switch_diversity; /* If diversity on */
};
#define BT_8822B_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
#define BT_8822B_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
#define BT_8822B_2ANT_ANTDET_BUF_LEN 16
struct psdscan_sta_8822b_2ant {
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
u32 ant_det_bt_tx_time;
u32 ant_det_pre_psdscan_peak_val;
boolean ant_det_is_ant_det_available;
u32 ant_det_psd_scan_peak_val;
boolean ant_det_is_btreply_available;
u32 ant_det_psd_scan_peak_freq;
u8 ant_det_result;
u8 ant_det_peak_val[BT_8822B_2ANT_ANTDET_BUF_LEN];
u8 ant_det_peak_freq[BT_8822B_2ANT_ANTDET_BUF_LEN];
u32 ant_det_try_count;
u32 ant_det_fail_count;
u32 ant_det_inteval_count;
u32 ant_det_thres_offset;
u32 real_cent_freq;
s32 real_offset;
u32 real_span;
u32 psd_band_width; /* unit: Hz */
u32 psd_point; /* 128/256/512/1024 */
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
u32 psd_start_point;
u32 psd_stop_point;
u32 psd_max_value_point;
u32 psd_max_value;
u32 psd_max_value2;
u32 psd_avg_value; /* filter loop_max_value that below BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
u32 psd_loop_max_value[BT_8822B_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
u32 psd_start_base;
u32 psd_avg_num; /* 1/8/16/32 */
u32 psd_gen_count;
boolean is_AntDet_running;
boolean is_psd_show_max_only;
};
/* *******************************************
* The following is interface which will notify coex module.
* ******************************************* */
void ex_halbtc8822b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
IN boolean wifi_only);
void ex_halbtc8822b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_ips_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_lps_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_scan_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_switchband_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_connect_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
IN u8 *tmp_buf, IN u8 length);
void ex_halbtc8822b2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
IN u8 type);
void ex_halbtc8822b2ant_halt_notify(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
IN u8 pnp_state);
void ex_halbtc8822b2ant_periodical(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
void ex_halbtc8822b2ant_antenna_detection(IN struct btc_coexist *btcoexist,
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
void ex_halbtc8822b2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
#else
#define ex_halbtc8822b2ant_power_on_setting(btcoexist)
#define ex_halbtc8822b2ant_pre_load_firmware(btcoexist)
#define ex_halbtc8822b2ant_init_hw_config(btcoexist, wifi_only)
#define ex_halbtc8822b2ant_init_coex_dm(btcoexist)
#define ex_halbtc8822b2ant_ips_notify(btcoexist, type)
#define ex_halbtc8822b2ant_lps_notify(btcoexist, type)
#define ex_halbtc8822b2ant_scan_notify(btcoexist, type)
#define ex_halbtc8822b2ant_switchband_notify(btcoexist, type)
#define ex_halbtc8822b2ant_connect_notify(btcoexist, type)
#define ex_halbtc8822b2ant_media_status_notify(btcoexist, type)
#define ex_halbtc8822b2ant_specific_packet_notify(btcoexist, type)
#define ex_halbtc8822b2ant_bt_info_notify(btcoexist, tmp_buf, length)
#define ex_halbtc8822b2ant_rf_status_notify(btcoexist, type)
#define ex_halbtc8822b2ant_halt_notify(btcoexist)
#define ex_halbtc8822b2ant_pnp_notify(btcoexist, pnp_state)
#define ex_halbtc8822b2ant_periodical(btcoexist)
#define ex_halbtc8822b2ant_display_coex_info(btcoexist)
#define ex_halbtc8822b2ant_display_ant_detection(btcoexist)
#define ex_halbtc8822b2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
#endif
#endif

54
hal/btc/halbtc8822bwifionly.c
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@ -1,54 +0,0 @@
#include "mp_precomp.h"
VOID
ex_hal8822b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
)
{
/*BB control*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x4c, 0x01800000, 0x2);
/*SW control*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcb4, 0xff, 0x77);
/*antenna mux switch */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x974, 0x300, 0x3);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1990, 0x300, 0x0);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x80000, 0x0);
/*switch to WL side controller and gnt_wl gnt_bt debug signal */
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x70, 0xff000000, 0x0e);
/*gnt_wl=1 , gnt_bt=0*/
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1704, 0xffffffff, 0x7700);
halwifionly_phy_set_bb_reg(pwifionlycfg, 0x1700, 0xffffffff, 0xc00f0038);
}
VOID
ex_hal8822b_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
ex_hal8822b_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
hal8822b_wifi_only_switch_antenna(pwifionlycfg, is_5g);
}
VOID
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
)
{
if (is_5g)
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x1);
else
halwifionly_phy_set_bb_reg(pwifionlycfg, 0xcbc, 0x300, 0x2);
}

22
hal/btc/halbtc8822bwifionly.h
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@ -1,22 +0,0 @@
#ifndef __INC_HAL8822BWIFIONLYHWCFG_H
#define __INC_HAL8822BWIFIONLYHWCFG_H
VOID
ex_hal8822b_wifi_only_hw_config(
IN struct wifi_only_cfg *pwifionlycfg
);
VOID
ex_hal8822b_wifi_only_scannotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
ex_hal8822b_wifi_only_switchbandnotify(
IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
VOID
hal8822b_wifi_only_switch_antenna(IN struct wifi_only_cfg *pwifionlycfg,
IN u1Byte is_5g
);
#endif

21
hal/btc/mp_precomp.h
View file

@ -61,26 +61,5 @@ extern u4Byte GLBtcDbgType[];
#endif
#include "halbtcoutsrc.h"
#include "halbtc8192e1ant.h"
#include "halbtc8192e2ant.h"
#include "halbtc8723b1ant.h"
#include "halbtc8723b2ant.h"
#include "halbtc8812a1ant.h"
#include "halbtc8812a2ant.h"
#include "halbtc8821a1ant.h"
#include "halbtc8821a2ant.h"
#include "halbtc8703b1ant.h"
#include "halbtc8723d1ant.h"
#include "halbtc8723d2ant.h"
#include "halbtc8822b1ant.h"
#include "halbtc8822b2ant.h"
#include "halbtc8821c1ant.h"
#include "halbtc8821c2ant.h"
/* for wifi only mode */
#include "hal_btcoex_wifionly.h"
#include "halbtc8723bwifionly.h"
#include "halbtc8822bwifionly.h"
#include "halbtc8821cwifionly.h"
#endif /* __MP_PRECOMP_H__ */

17
hal/hal_btcoex_wifionly.c
View file

@ -94,11 +94,6 @@ void hal_btcoex_wifionly_switchband_notify(PADAPTER padapter)
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_switchbandnotify(&GLBtCoexistWifiOnly, is_5g);
}
void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
@ -108,23 +103,11 @@ void hal_btcoex_wifionly_scan_notify(PADAPTER padapter)
if (pHalData->current_band_type == BAND_ON_5G)
is_5g = _TRUE;
if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_scannotify(&GLBtCoexistWifiOnly, is_5g);
}
void hal_btcoex_wifionly_hw_config(PADAPTER padapter)
{
struct wifi_only_cfg *pwifionlycfg = &GLBtCoexistWifiOnly;
if (IS_HARDWARE_TYPE_8723B(padapter))
ex_hal8723b_wifi_only_hw_config(pwifionlycfg);
else if (IS_HARDWARE_TYPE_8822B(padapter))
ex_hal8822b_wifi_only_hw_config(pwifionlycfg);
else if (IS_HARDWARE_TYPE_8821C(padapter))
ex_hal8821c_wifi_only_hw_config(pwifionlycfg);
}
void hal_btcoex_wifionly_initlizevariables(PADAPTER padapter)

2635
hal/hal_halmac.c
View file

File diff suppressed because it is too large Load diff

121
hal/hal_halmac.h
View file

@ -1,121 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _HAL_HALMAC_H_
#define _HAL_HALMAC_H_
#include <drv_types.h> /* adapter_to_dvobj(), struct intf_hdl and etc. */
#include <hal_data.h> /* struct hal_spec_t */
#include "halmac/halmac_api.h" /* PHALMAC_ADAPTER and etc. */
/* HALMAC Definition for Driver */
#define RTW_HALMAC_H2C_MAX_SIZE HALMAC_H2C_CMD_ORIGINAL_SIZE_88XX
#define RTW_HALMAC_BA_SSN_RPT_SIZE 4
#define dvobj_set_halmac(d, mac) ((d)->halmac = (mac))
#define dvobj_to_halmac(d) ((PHALMAC_ADAPTER)((d)->halmac))
#define adapter_to_halmac(p) dvobj_to_halmac(adapter_to_dvobj(p))
/* for H2C cmd */
#define MAX_H2C_BOX_NUMS 4
#define MESSAGE_BOX_SIZE 4
#define EX_MESSAGE_BOX_SIZE 4
typedef enum _RTW_HALMAC_MODE {
RTW_HALMAC_MODE_NORMAL,
RTW_HALMAC_MODE_WIFI_TEST,
} RTW_HALMAC_MODE;
extern HALMAC_PLATFORM_API rtw_halmac_platform_api;
/* HALMAC API for Driver(HAL) */
u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
u16 rtw_halmac_read16(struct intf_hdl *, u32 addr);
u32 rtw_halmac_read32(struct intf_hdl *, u32 addr);
void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr);
u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr);
u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr);
#endif
int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
void rtw_dump_halmac_info(void *sel);
int rtw_halmac_init_adapter(struct dvobj_priv *, PHALMAC_PLATFORM_API);
int rtw_halmac_deinit_adapter(struct dvobj_priv *);
int rtw_halmac_poweron(struct dvobj_priv *);
int rtw_halmac_poweroff(struct dvobj_priv *);
int rtw_halmac_init_hal(struct dvobj_priv *);
int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize);
int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath);
int rtw_halmac_deinit_hal(struct dvobj_priv *);
int rtw_halmac_self_verify(struct dvobj_priv *);
int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
int rtw_halmac_get_available_efuse_size(struct dvobj_priv *d, u32 *size);
int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size);
int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size);
int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
int rtw_halmac_config_rx_info(struct dvobj_priv *, HALMAC_DRV_INFO);
int rtw_halmac_set_mac_address(struct dvobj_priv *, enum _hw_port, u8 *addr);
int rtw_halmac_set_bssid(struct dvobj_priv *, enum _hw_port hwport, u8 *addr);
int rtw_halmac_set_bandwidth(struct dvobj_priv *, u8 channel, u8 pri_ch_idx, u8 bw);
int rtw_halmac_dump_fifo(struct dvobj_priv *d, u8 fifo_sel, u32 addr, u32 size, u8 *buffer);
int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
int rtw_halmac_get_hw_value(struct dvobj_priv *, HALMAC_HW_ID hw_id, VOID *pvalue);
int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);
int rtw_halmac_get_drv_info_sz(struct dvobj_priv *, u8 *sz);
int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg);
int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size);
int rtw_halmac_fill_hal_spec(struct dvobj_priv *, struct hal_spec_t *);
#ifdef CONFIG_SDIO_HCI
int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page);
u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size);
int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size);
u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq);
#endif /* CONFIG_SDIO_HCI */
#ifdef CONFIG_USB_HCI
u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size);
u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_SUPPORT_TRX_SHARED
void dump_trx_share_mode(void *sel, _adapter *adapter);
#endif
#endif /* _HAL_HALMAC_H_ */

3
hal/phydm/phydm_beamforming.h
View file

@ -8,9 +8,6 @@
/*Beamforming Related*/
#include "txbf/halcomtxbf.h"
#include "txbf/haltxbfjaguar.h"
#include "txbf/haltxbf8192e.h"
#include "txbf/haltxbf8814a.h"
#include "txbf/haltxbf8822b.h"
#include "txbf/haltxbfinterface.h"
#if (BEAMFORMING_SUPPORT == 1)

391
hal/phydm/txbf/haltxbf8192e.c
View file

@ -1,391 +0,0 @@
/* ************************************************************
* Description:
*
* This file is for 8192E TXBF mechanism
*
* ************************************************************ */
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (BEAMFORMING_SUPPORT == 1)
#if (RTL8192E_SUPPORT == 1)
void
hal_txbf_8192e_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
odm_write_1byte(p_dm_odm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW));
}
void
hal_txbf_8192e_rf_mode(
void *p_dm_void,
struct _RT_BEAMFORMING_INFO *p_beam_info
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
bool is_self_beamformer = false;
bool is_self_beamformee = false;
enum beamforming_cap beamform_cap = BEAMFORMING_CAP_NONE;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_dm_odm->rf_type == ODM_1T1R)
return;
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
if (p_beam_info->beamformee_su_cnt > 0) {
/*Path_A*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/
/*Path_B*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/
} else {
/*Path_A*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/
/*Path_B*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0xfffff, 0x18000); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x0000f); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0x77f82); /*Disable TXIQGEN in RX mode*/
}
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
if (p_beam_info->beamformee_su_cnt > 0) {
odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x83321333);
odm_set_bb_reg(p_dm_odm, 0xa04, MASKBYTE3, 0xc1);
} else
odm_set_bb_reg(p_dm_odm, 0x90c, MASKDWORD, 0x81121313);
}
void
hal_txbf_8192e_fw_txbf_cmd(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 idx, period0 = 0, period1 = 0;
u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
u8 u1_tx_bf_parm[3] = {0};
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
if (p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
if (idx == 0) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum0 = 0xFE;
else
PageNum0 = 0xFF; /* stop sounding */
period0 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
} else if (idx == 1) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum1 = 0xFE;
else
PageNum1 = 0xFF; /* stop sounding */
period1 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
}
}
}
u1_tx_bf_parm[0] = PageNum0;
u1_tx_bf_parm[1] = PageNum1;
u1_tx_bf_parm[2] = (period1 << 4) | period0;
odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
("[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1));
}
void
hal_txbf_8192e_download_ndpa(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 u1b_tmp = 0, tmp_reg422 = 0, head_page;
u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
bool is_send_beacon = false;
struct _ADAPTER *adapter = p_dm_odm->adapter;
u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812;
/*default reseved 1 page for the IC type which is undefined.*/
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = true;
#endif
if (idx == 0)
head_page = 0xFE;
else
head_page = 0xFE;
phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8192E+1);
odm_write_1byte(p_dm_odm, REG_CR_8192E+1, (u1b_tmp | BIT(0)));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmp_reg422 = odm_read_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8192E+2);
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422 & (~BIT(6)));
if (tmp_reg422 & BIT(6)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s There is an adapter is sending beacon.\n", __func__));
is_send_beacon = true;
}
/*TDECTRL[15:8] 0x209[7:0] = 0xFE/0xFD NDPA Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+1, head_page);
do {
/*Clear beacon valid check bit.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2);
odm_write_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2, (bcn_valid_reg | BIT(0)));
/* download NDPA rsvd page. */
beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
u1b_tmp = odm_read_1byte(p_dm_odm, REG_MGQ_TXBD_NUM_8192E+3);
count = 0;
while ((count < 20) && (u1b_tmp & BIT(4))) {
count++;
ODM_delay_us(10);
u1b_tmp = odm_read_1byte(p_dm_odm, REG_MGQ_TXBD_NUM_8192E+3);
}
odm_write_1byte(p_dm_odm, REG_MGQ_TXBD_NUM_8192E+3, u1b_tmp | BIT(4));
#endif
/*check rsvd page download OK.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2);
count = 0;
while (!(bcn_valid_reg & BIT(0)) && count < 20) {
count++;
ODM_delay_us(10);
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+2);
}
dl_bcn_count++;
} while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5);
if (!(bcn_valid_reg & BIT(0)))
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_WARNING, ("%s Download RSVD page failed!\n", __func__));
/*TDECTRL[15:8] 0x209[7:0] = 0xF9 Beacon Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_DWBCN0_CTRL_8192E+1, tx_page_bndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (is_send_beacon)
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8192E+2, tmp_reg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8192E+1);
odm_write_1byte(p_dm_odm, REG_CR_8192E+1, (u1b_tmp & (~BIT(0))));
p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = false;
#endif
}
void
hal_txbf_8192e_enter(
void *p_dm_void,
u8 bfer_bfee_idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
u8 bfee_idx = (bfer_bfee_idx & 0xF);
u32 csi_param;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
u16 sta_id = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
hal_txbf_8192e_rf_mode(p_dm_odm, p_beamforming_info);
if (p_dm_odm->rf_type == ODM_2T2R)
odm_write_4byte(p_dm_odm, 0xd80, 0x00000000); /*nc =2*/
if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
/*Sounding protocol control*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8192E, 0xCB);
/*MAC address/Partial AID of Beamformer*/
if (bfer_idx == 0) {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8192E+i), beamformer_entry.mac_addr[i]);
} else {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER1_INFO_8192E+i), beamformer_entry.mac_addr[i]);
}
/*CSI report parameters of Beamformer Default use nc = 2*/
csi_param = 0x03090309;
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8192E, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8192E, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8192E, csi_param);
/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8192E+3, 0x50);
}
if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
sta_id = beamformee_entry.mac_id;
else
sta_id = beamformee_entry.p_aid;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s], sta_id=0x%X\n", __func__, sta_id));
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
if (bfee_idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E, sta_id);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8192E+3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8192E+3) | BIT(4) | BIT(6) | BIT(7));
} else
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E+2, sta_id | BIT(12) | BIT(14) | BIT(15));
/*CSI report parameters of Beamformee*/
if (bfee_idx == 0) {
/*Get BIT24 & BIT25*/
u8 tmp = odm_read_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3) & 0x3;
odm_write_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+3, tmp | 0x60);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E, sta_id | BIT(9));
} else {
/*Set BIT25*/
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, sta_id | 0xE200);
}
phydm_beamforming_notify(p_dm_odm);
}
}
void
hal_txbf_8192e_leave(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
hal_txbf_8192e_rf_mode(p_dm_odm, p_beam_info);
/* Clear P_AID of Beamformee
* Clear MAC addresss of Beamformer
* Clear Associated Bfmee Sel
*/
if (p_beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8192E, 0xC8);
if (idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E, 0);
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8192E, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8192E+4, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E, 0);
} else {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8192E+2, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8192E+2) & 0xF000);
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8192E, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8192E+4, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2, odm_read_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8192E+2) & 0x60);
}
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx %d\n", __func__, idx));
}
void
hal_txbf_8192e_status(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 beam_ctrl_val;
u32 beam_ctrl_reg;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamform_entry = p_beam_info->beamformee_entry[idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
beam_ctrl_val = beamform_entry.mac_id;
else
beam_ctrl_val = beamform_entry.p_aid;
if (idx == 0)
beam_ctrl_reg = REG_TXBF_CTRL_8192E;
else {
beam_ctrl_reg = REG_TXBF_CTRL_8192E+2;
beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
}
if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beam_info->apply_v_matrix == true)) {
if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
beam_ctrl_val |= BIT(9);
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
beam_ctrl_val |= BIT(10);
} else
beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
odm_write_2byte(p_dm_odm, beam_ctrl_reg, beam_ctrl_val);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] idx %d beam_ctrl_reg %x beam_ctrl_val %x\n", __func__, idx, beam_ctrl_reg, beam_ctrl_val));
}
void
hal_txbf_8192e_fw_tx_bf(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
hal_txbf_8192e_download_ndpa(p_dm_odm, idx);
hal_txbf_8192e_fw_txbf_cmd(p_dm_odm);
}
#endif /* #if (RTL8192E_SUPPORT == 1)*/
#endif

60
hal/phydm/txbf/haltxbf8192e.h
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@ -1,60 +0,0 @@
#ifndef __HAL_TXBF_8192E_H__
#define __HAL_TXBF_8192E_H__
#if (RTL8192E_SUPPORT == 1)
#if (BEAMFORMING_SUPPORT == 1)
void
hal_txbf_8192e_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
);
void
hal_txbf_8192e_enter(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8192e_leave(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8192e_status(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8192e_fw_tx_bf(
void *p_dm_void,
u8 idx
);
#else
#define hal_txbf_8192e_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8192e_enter(p_dm_void, idx)
#define hal_txbf_8192e_leave(p_dm_void, idx)
#define hal_txbf_8192e_status(p_dm_void, idx)
#define hal_txbf_8192e_fw_tx_bf(p_dm_void, idx)
#endif
#else
#define hal_txbf_8192e_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8192e_enter(p_dm_void, idx)
#define hal_txbf_8192e_leave(p_dm_void, idx)
#define hal_txbf_8192e_status(p_dm_void, idx)
#define hal_txbf_8192e_fw_tx_bf(p_dm_void, idx)
#endif
#endif

700
hal/phydm/txbf/haltxbf8814a.c
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@ -1,700 +0,0 @@
/* ************************************************************
* Description:
*
* This file is for 8814A TXBF mechanism
*
* ************************************************************ */
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (BEAMFORMING_SUPPORT == 1)
#if (RTL8814A_SUPPORT == 1)
bool
phydm_beamforming_set_iqgen_8814A(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u16 counter = 0;
u32 rf_mode[4];
for (i = ODM_RF_PATH_A ; i < MAX_RF_PATH ; i++)
odm_set_rf_reg(p_dm_odm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/
while (1) {
counter++;
for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
odm_set_rf_reg(p_dm_odm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/
ODM_delay_us(2);
for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
rf_mode[i] = odm_get_rf_reg(p_dm_odm, i, RF_RCK_OS, 0xfffff);
if ((rf_mode[0] == 0x18000) && (rf_mode[1] == 0x18000) && (rf_mode[2] == 0x18000) && (rf_mode[3] == 0x18000))
break;
else if (counter == 100) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("iqgen setting fail:8814A\n"));
return false;
}
}
for (i = ODM_RF_PATH_A ; i < MAX_RF_PATH ; i++) {
odm_set_rf_reg(p_dm_odm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/
}
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/
for (i = ODM_RF_PATH_A; i < MAX_RF_PATH; i++)
odm_set_rf_reg(p_dm_odm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/
return true;
}
void
hal_txbf_8814a_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
odm_write_1byte(p_dm_odm, REG_NDPA_OPT_CTRL_8814A, BW);
odm_write_1byte(p_dm_odm, REG_NDPA_RATE_8814A, (u8) rate);
}
#define PHYDM_MEMORY_MAP_BUF_READ 0x8000
#define PHYDM_CTRL_INFO_PAGE 0x660
void
phydm_data_rate_8814a(
struct PHY_DM_STRUCT *p_dm_odm,
u8 mac_id,
u32 *data,
u8 data_len
)
{
u8 i = 0;
u16 x_read_data_addr = 0;
odm_write_2byte(p_dm_odm, REG_PKTBUF_DBG_CTRL_8814A, PHYDM_CTRL_INFO_PAGE);
x_read_data_addr = PHYDM_MEMORY_MAP_BUF_READ + mac_id * 32; /*Ctrl Info: 32Bytes for each macid(n)*/
if ((x_read_data_addr < PHYDM_MEMORY_MAP_BUF_READ) || (x_read_data_addr > 0x8FFF)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("x_read_data_addr(0x%x) is not correct!\n", x_read_data_addr));
return;
}
/* Read data */
for (i = 0; i < data_len; i++)
*(data + i) = odm_read_2byte(p_dm_odm, x_read_data_addr + i);
}
void
hal_txbf_8814a_get_tx_rate(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_entry;
u32 tx_rpt_data = 0;
u8 data_rate = 0xFF;
p_entry = &(p_beam_info->beamformee_entry[p_beam_info->beamformee_cur_idx]);
phydm_data_rate_8814a(p_dm_odm, (u8)p_entry->mac_id, &tx_rpt_data, 1);
data_rate = (u8)tx_rpt_data;
data_rate &= 0x7f; /*Bit7 indicates SGI*/
p_dm_odm->tx_bf_data_rate = data_rate;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] p_dm_odm->tx_bf_data_rate = 0x%x\n", __func__, p_dm_odm->tx_bf_data_rate));
}
void
hal_txbf_8814a_reset_tx_path(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
#if DEV_BUS_TYPE == RT_USB_INTERFACE
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
u8 nr_index = 0, tx_ss = 0;
if (idx < BEAMFORMEE_ENTRY_NUM)
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
else
return;
if ((p_dm_odm->last_usb_hub) != (*p_dm_odm->hub_usb_mode)) {
nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), beamformee_entry.comp_steering_num_of_bfer);
if (*p_dm_odm->hub_usb_mode == 2) {
if (p_dm_odm->rf_type == ODM_4T4R)
tx_ss = 0xf;
else if (p_dm_odm->rf_type == ODM_3T3R)
tx_ss = 0xe;
else
tx_ss = 0x6;
} else if (*p_dm_odm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/
tx_ss = 0x6;
else
tx_ss = 0x6;
if (tx_ss == 0xf) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
} else if (tx_ss == 0xe) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
} else if (tx_ss == 0x6) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
}
if (idx == 0) {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
} else {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
}
p_dm_odm->last_usb_hub = *p_dm_odm->hub_usb_mode;
} else
return;
#endif
}
u8
hal_txbf_8814a_get_ntx(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 ntx = 0, tx_ss = 3;
#if DEV_BUS_TYPE == RT_USB_INTERFACE
tx_ss = *p_dm_odm->hub_usb_mode;
#endif
if (tx_ss == 3 || tx_ss == 2) {
if (p_dm_odm->rf_type == ODM_4T4R)
ntx = 3;
else if (p_dm_odm->rf_type == ODM_3T3R)
ntx = 2;
else
ntx = 1;
} else if (tx_ss == 1) /*USB 2.0 always 2Tx*/
ntx = 1;
else
ntx = 1;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] ntx = %d\n", __func__, ntx));
return ntx;
}
u8
hal_txbf_8814a_get_nrx(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 nrx = 0;
if (p_dm_odm->rf_type == ODM_4T4R)
nrx = 3;
else if (p_dm_odm->rf_type == ODM_3T3R)
nrx = 2;
else if (p_dm_odm->rf_type == ODM_2T2R)
nrx = 1;
else if (p_dm_odm->rf_type == ODM_2T3R)
nrx = 2;
else if (p_dm_odm->rf_type == ODM_2T4R)
nrx = 3;
else if (p_dm_odm->rf_type == ODM_1T1R)
nrx = 0;
else if (p_dm_odm->rf_type == ODM_1T2R)
nrx = 1;
else
nrx = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] nrx = %d\n", __func__, nrx));
return nrx;
}
void
hal_txbf_8814a_rf_mode(
void *p_dm_void,
struct _RT_BEAMFORMING_INFO *p_beamforming_info,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i, nr_index = 0;
u8 tx_ss = 3; /*default use 3 Tx*/
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
if (idx < BEAMFORMEE_ENTRY_NUM)
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
else
return;
nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), beamformee_entry.comp_steering_num_of_bfer);
if (p_dm_odm->rf_type == ODM_1T1R)
return;
if (p_beamforming_info->beamformee_su_cnt > 0) {
#if DEV_BUS_TYPE == RT_USB_INTERFACE
p_dm_odm->last_usb_hub = *p_dm_odm->hub_usb_mode;
tx_ss = *p_dm_odm->hub_usb_mode;
#endif
if (tx_ss == 3 || tx_ss == 2) {
if (p_dm_odm->rf_type == ODM_4T4R)
tx_ss = 0xf;
else if (p_dm_odm->rf_type == ODM_3T3R)
tx_ss = 0xe;
else
tx_ss = 0x6;
} else if (tx_ss == 1) /*USB 2.0 always 2Tx*/
tx_ss = 0x6;
else
tx_ss = 0x6;
if (tx_ss == 0xf) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93f);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKDWORD, 0x93f93f0);
} else if (tx_ss == 0xe) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x93e);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e93e0);
} else if (tx_ss == 0x6) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x936);
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKLWORD, 0x9360);
}
/*for 8814 19ac(idx 1), 19b4(idx 0), different Tx ant setting*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT(28) | BIT29, 0x2); /*enable BB TxBF ant mapping register*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, BIT30, 0x1); /*if Nsts > Nc don't apply V matrix*/
if (idx == 0) {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF0_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
} else {
switch (nr_index) {
case 0:
break;
case 1: /*Nsts = 2 BC*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x9366); /*tx2path, BC*/
break;
case 2: /*Nsts = 3 BCD*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93e93ee); /*tx3path, BCD*/
break;
default: /*nr>3, same as Case 3*/
odm_set_bb_reg(p_dm_odm, REG_BB_TXBF_ANT_SET_BF1_8814A, MASKBYTE3LOWNIBBLE | MASKL3BYTES, 0x93f93ff); /*tx4path, ABCD*/
break;
}
}
}
if ((p_beamforming_info->beamformee_su_cnt == 0) && (p_beamforming_info->beamformer_su_cnt == 0)) {
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_1_8814A, MASKBYTE3 | MASKBYTE2HIGHNIBBLE, 0x932); /*set tx_path selection for 8814a BFer bug refine*/
odm_set_bb_reg(p_dm_odm, REG_BB_TX_PATH_SEL_2_8814A, MASKDWORD, 0x93e9360);
}
}
#if 0
void
hal_txbf_8814a_download_ndpa(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 u1b_tmp = 0, tmp_reg422 = 0;
u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
u16 head_page = 0x7FE;
bool is_send_beacon = false;
u16 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; /*default reseved 1 page for the IC type which is undefined.*/
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
struct _ADAPTER *adapter = p_dm_odm->adapter;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = true;
#endif
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&tx_page_bndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8814A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8814A + 1, (u1b_tmp | BIT(0)));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmp_reg422 = odm_read_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8814A + 2);
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422 & (~BIT(6)));
if (tmp_reg422 & BIT(6)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s: There is an adapter is sending beacon.\n", __func__));
is_send_beacon = true;
}
/*0x204[11:0] Beacon Head for TXDMA*/
odm_write_2byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A, head_page);
do {
/*Clear beacon valid check bit.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 1);
odm_write_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 1, (bcn_valid_reg | BIT(7)));
/*download NDPA rsvd page.*/
if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
beamforming_send_vht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->AID, p_beam_entry->sound_bw, BEACON_QUEUE);
else
beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
/*check rsvd page download OK.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 1);
count = 0;
while (!(bcn_valid_reg & BIT(7)) && count < 20) {
count++;
ODM_delay_ms(10);
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A + 2);
}
dl_bcn_count++;
} while (!(bcn_valid_reg & BIT(7)) && dl_bcn_count < 5);
if (!(bcn_valid_reg & BIT(7)))
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));
/*0x204[11:0] Beacon Head for TXDMA*/
odm_write_2byte(p_dm_odm, REG_FIFOPAGE_CTRL_2_8814A, tx_page_bndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause */
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (is_send_beacon)
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8814A + 2, tmp_reg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8814A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8814A + 1, (u1b_tmp & (~BIT(0))));
p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = false;
#endif
}
void
hal_txbf_8814a_fw_txbf_cmd(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 idx, period = 0;
u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
u8 u1_tx_bf_parm[3] = {0};
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
if (p_beam_info->beamformee_entry[idx].is_sound) {
PageNum0 = 0xFE;
PageNum1 = 0x07;
period = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
} else if (PageNum0 == 0xFF) {
PageNum0 = 0xFF; /*stop sounding*/
PageNum1 = 0x0F;
}
}
}
u1_tx_bf_parm[0] = PageNum0;
u1_tx_bf_parm[1] = PageNum1;
u1_tx_bf_parm[2] = period;
odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
("[%s] PageNum0 = %d, PageNum1 = %d period = %d\n", __func__, PageNum0, PageNum1, period));
}
#endif
void
hal_txbf_8814a_enter(
void *p_dm_void,
u8 bfer_bfee_idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
u8 bfee_idx = (bfer_bfee_idx & 0xF);
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
u16 sta_id = 0, csi_param = 0;
u8 nc_index = 0, nr_index = 0, grouping = 0, codebookinfo = 0, coefficientsize = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] bfer_idx=%d, bfee_idx=%d\n", __func__, bfer_idx, bfee_idx));
odm_set_mac_reg(p_dm_odm, REG_SND_PTCL_CTRL_8814A, MASKBYTE1 | MASKBYTE2, 0x0202);
if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
/*Sounding protocol control*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8814A, 0xDB);
/*MAC address/Partial AID of Beamformer*/
if (bfer_idx == 0) {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER0_INFO_8814A + i), beamformer_entry.mac_addr[i]);
} else {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_ASSOCIATED_BFMER1_INFO_8814A + i), beamformer_entry.mac_addr[i]);
}
/*CSI report parameters of Beamformer*/
nc_index = hal_txbf_8814a_get_nrx(p_dm_odm); /*for 8814A nrx = 3(4 ant), min=0(1 ant)*/
nr_index = beamformer_entry.num_of_sounding_dim; /*0x718[7] = 1 use Nsts, 0x718[7] = 0 use reg setting. as Bfee, we use Nsts, so nr_index don't care*/
grouping = 0;
/*for ac = 1, for n = 3*/
if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU)
codebookinfo = 1;
else if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_HT_EXPLICIT)
codebookinfo = 3;
coefficientsize = 3;
csi_param = (u16)((coefficientsize << 10) | (codebookinfo << 8) | (grouping << 6) | (nr_index << 3) | (nc_index));
if (bfer_idx == 0)
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A, csi_param);
else
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, csi_param);
/*ndp_rx_standby_timer, 8814 need > 0x56, suggest from Dvaid*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8814A + 3, 0x40);
}
if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
hal_txbf_8814a_rf_mode(p_dm_odm, p_beamforming_info, bfee_idx);
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
sta_id = beamformee_entry.mac_id;
else
sta_id = beamformee_entry.p_aid;
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
if (bfee_idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A, sta_id);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
} else
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A + 2, sta_id | BIT(14) | BIT(15) | BIT(12));
/*CSI report parameters of Beamformee*/
if (bfee_idx == 0) {
/*Get BIT24 & BIT25*/
u8 tmp = odm_read_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3) & 0x3;
odm_write_1byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 3, tmp | 0x60);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A, sta_id | BIT(9));
} else
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, sta_id | 0xE200); /*Set BIT25*/
phydm_beamforming_notify(p_dm_odm);
}
}
void
hal_txbf_8814a_leave(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
if (idx < BEAMFORMER_ENTRY_NUM) {
beamformer_entry = p_beamforming_info->beamformer_entry[idx];
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
} else
return;
/*Clear P_AID of Beamformee*/
/*Clear MAC address of Beamformer*/
/*Clear Associated Bfmee Sel*/
if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8814A, 0xD8);
if (idx == 0) {
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8814A, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER0_INFO_8814A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A, 0);
} else {
odm_write_4byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8814A, 0);
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMER1_INFO_8814A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8814A + 2, 0);
}
}
if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
hal_txbf_8814a_rf_mode(p_dm_odm, p_beamforming_info, idx);
if (idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A, 0x0);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8814A + 3) | BIT(4) | BIT(6) | BIT(7));
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A, 0);
} else {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A + 2, 0x0 | BIT(14) | BIT(15) | BIT(12));
odm_write_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2, odm_read_2byte(p_dm_odm, REG_ASSOCIATED_BFMEE_SEL_8814A + 2) & 0x60);
}
}
}
void
hal_txbf_8814a_status(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 beam_ctrl_val, tmp_val;
u32 beam_ctrl_reg;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamform_entry;
if (idx < BEAMFORMEE_ENTRY_NUM)
beamform_entry = p_beamforming_info->beamformee_entry[idx];
else
return;
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
beam_ctrl_val = beamform_entry.mac_id;
else
beam_ctrl_val = beamform_entry.p_aid;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, beamform_entry.beamform_entry_state = %d", __func__, beamform_entry.beamform_entry_state));
if (idx == 0)
beam_ctrl_reg = REG_TXBF_CTRL_8814A;
else {
beam_ctrl_reg = REG_TXBF_CTRL_8814A + 2;
beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
}
if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beamforming_info->apply_v_matrix == true)) {
if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
beam_ctrl_val |= BIT(9);
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
beam_ctrl_val |= (BIT(9) | BIT(10));
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80)
beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11));
} else {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("@%s, Don't apply Vmatrix", __func__));
beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
}
odm_write_2byte(p_dm_odm, beam_ctrl_reg, beam_ctrl_val);
/*disable NDP packet use beamforming */
tmp_val = odm_read_2byte(p_dm_odm, REG_TXBF_CTRL_8814A);
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8814A, tmp_val | BIT(15));
}
void
hal_txbf_8814a_fw_txbf(
void *p_dm_void,
u8 idx
)
{
#if 0
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
hal_txbf_8814a_download_ndpa(p_dm_odm, idx);
hal_txbf_8814a_fw_txbf_cmd(p_dm_odm);
#endif
}
#endif /* (RTL8814A_SUPPORT == 1)*/
#endif

89
hal/phydm/txbf/haltxbf8814a.h
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@ -1,89 +0,0 @@
#ifndef __HAL_TXBF_8814A_H__
#define __HAL_TXBF_8814A_H__
#if (RTL8814A_SUPPORT == 1)
#if (BEAMFORMING_SUPPORT == 1)
bool
phydm_beamforming_set_iqgen_8814A(
void *p_dm_void
);
void
hal_txbf_8814a_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
);
u8
hal_txbf_8814a_get_ntx(
void *p_dm_void
);
void
hal_txbf_8814a_enter(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_leave(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_status(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_reset_tx_path(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8814a_get_tx_rate(
void *p_dm_void
);
void
hal_txbf_8814a_fw_txbf(
void *p_dm_void,
u8 idx
);
#else
#define hal_txbf_8814a_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8814a_get_ntx(p_dm_void) 0
#define hal_txbf_8814a_enter(p_dm_void, idx)
#define hal_txbf_8814a_leave(p_dm_void, idx)
#define hal_txbf_8814a_status(p_dm_void, idx)
#define hal_txbf_8814a_reset_tx_path(p_dm_void, idx)
#define hal_txbf_8814a_get_tx_rate(p_dm_void)
#define hal_txbf_8814a_fw_txbf(p_dm_void, idx)
#define phydm_beamforming_set_iqgen_8814A(p_dm_void) 0
#endif
#else
#define hal_txbf_8814a_set_ndpa_rate(p_dm_void, BW, rate)
#define hal_txbf_8814a_get_ntx(p_dm_void) 0
#define hal_txbf_8814a_enter(p_dm_void, idx)
#define hal_txbf_8814a_leave(p_dm_void, idx)
#define hal_txbf_8814a_status(p_dm_void, idx)
#define hal_txbf_8814a_reset_tx_path(p_dm_void, idx)
#define hal_txbf_8814a_get_tx_rate(p_dm_void)
#define hal_txbf_8814a_fw_txbf(p_dm_void, idx)
#define phydm_beamforming_set_iqgen_8814A(p_dm_void) 0
#endif
#endif

1099
hal/phydm/txbf/haltxbf8822b.c
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File diff suppressed because it is too large Load diff

79
hal/phydm/txbf/haltxbf8822b.h
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@ -1,79 +0,0 @@
#ifndef __HAL_TXBF_8822B_H__
#define __HAL_TXBF_8822B_H__
#if (RTL8822B_SUPPORT == 1)
#if (BEAMFORMING_SUPPORT == 1)
void
hal_txbf_8822b_enter(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8822b_leave(
void *p_dm_void,
u8 idx
);
void
hal_txbf_8822b_status(
void *p_dm_void,
u8 beamform_idx
);
void
hal_txbf_8822b_config_gtab(
void *p_dm_void
);
void
hal_txbf_8822b_fw_txbf(
void *p_dm_void,
u8 idx
);
#else
#define hal_txbf_8822b_enter(p_dm_void, idx)
#define hal_txbf_8822b_leave(p_dm_void, idx)
#define hal_txbf_8822b_status(p_dm_void, idx)
#define hal_txbf_8822b_fw_txbf(p_dm_void, idx)
#define hal_txbf_8822b_config_gtab(p_dm_void)
#endif
#if (defined(CONFIG_BB_TXBF_API))
void
phydm_8822btxbf_rfmode(
void *p_dm_void,
u8 su_bfee_cnt,
u8 mu_bfee_cnt
);
void
phydm_8822b_sutxbfer_workaroud(
void *p_dm_void,
bool enable_su_bfer,
u8 nc,
u8 nr,
u8 ng,
u8 CB,
u8 BW,
bool is_vht
);
#else
#define phydm_8822btxbf_rfmode(p_dm_void, su_bfee_cnt, mu_bfee_cnt)
#define phydm_8822b_sutxbfer_workaroud(p_dm_void, enable_su_bfer, nc, nr, ng, CB, BW, is_vht)
#endif
#else
#define hal_txbf_8822b_enter(p_dm_void, idx)
#define hal_txbf_8822b_leave(p_dm_void, idx)
#define hal_txbf_8822b_status(p_dm_void, idx)
#define hal_txbf_8822b_fw_txbf(p_dm_void, idx)
#define hal_txbf_8822b_config_gtab(p_dm_void)
#endif
#endif

526
hal/phydm/txbf/haltxbfjaguar.c
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@ -1,526 +0,0 @@
/* ************************************************************
* Description:
*
* This file is for 8812/8821/8811 TXBF mechanism
*
* ************************************************************ */
#include "mp_precomp.h"
#include "../phydm_precomp.h"
#if (BEAMFORMING_SUPPORT == 1)
#if ((RTL8812A_SUPPORT == 1) || (RTL8821A_SUPPORT == 1))
void
hal_txbf_8812a_set_ndpa_rate(
void *p_dm_void,
u8 BW,
u8 rate
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
odm_write_1byte(p_dm_odm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW));
}
void
hal_txbf_jaguar_rf_mode(
void *p_dm_void,
struct _RT_BEAMFORMING_INFO *p_beam_info
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
if (p_dm_odm->rf_type == ODM_1T1R)
return;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] set TxIQGen\n", __func__));
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x1); /*RF mode table write enable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x1); /*RF mode table write enable*/
if (p_beam_info->beamformee_su_cnt > 0) {
/* Paath_A */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
/* Path_B */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/
} else {
/* Paath_A */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x32, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
/* Path_B */
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x30, 0x78000, 0x3); /*Select RX mode*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0x32, 0xfffff, 0xC26BF); /*Disable TXIQGEN in RX mode*/
}
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xef, 0x80000, 0x0); /*RF mode table write disable*/
odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_B, 0xef, 0x80000, 0x0); /*RF mode table write disable*/
if (p_beam_info->beamformee_su_cnt > 0)
odm_set_bb_reg(p_dm_odm, 0x80c, MASKBYTE1, 0x33);
else
odm_set_bb_reg(p_dm_odm, 0x80c, MASKBYTE1, 0x11);
}
void
hal_txbf_jaguar_download_ndpa(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 u1b_tmp = 0, tmp_reg422 = 0, head_page;
u8 bcn_valid_reg = 0, count = 0, dl_bcn_count = 0;
bool is_send_beacon = false;
u8 tx_page_bndy = LAST_ENTRY_OF_TX_PKT_BUFFER_8812; /*default reseved 1 page for the IC type which is undefined.*/
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
struct _ADAPTER *adapter = p_dm_odm->adapter;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = true;
#endif
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (idx == 0)
head_page = 0xFE;
else
head_page = 0xFE;
phydm_get_hal_def_var_handler_interface(p_dm_odm, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&tx_page_bndy);
/*Set REG_CR bit 8. DMA beacon by SW.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8812A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8812A + 1, (u1b_tmp | BIT(0)));
/*Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame.*/
tmp_reg422 = odm_read_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8812A + 2);
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422 & (~BIT(6)));
if (tmp_reg422 & BIT(6)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("SetBeamformDownloadNDPA_8812(): There is an adapter is sending beacon.\n"));
is_send_beacon = true;
}
/*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_TDECTRL_8812A + 1, head_page);
do {
/*Clear beacon valid check bit.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_TDECTRL_8812A + 2);
odm_write_1byte(p_dm_odm, REG_TDECTRL_8812A + 2, (bcn_valid_reg | BIT(0)));
/*download NDPA rsvd page.*/
if (p_beam_entry->beamform_entry_cap & BEAMFORMER_CAP_VHT_SU)
beamforming_send_vht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->aid, p_beam_entry->sound_bw, BEACON_QUEUE);
else
beamforming_send_ht_ndpa_packet(p_dm_odm, p_beam_entry->mac_addr, p_beam_entry->sound_bw, BEACON_QUEUE);
/*check rsvd page download OK.*/
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_TDECTRL_8812A + 2);
count = 0;
while (!(bcn_valid_reg & BIT(0)) && count < 20) {
count++;
ODM_delay_ms(10);
bcn_valid_reg = odm_read_1byte(p_dm_odm, REG_TDECTRL_8812A + 2);
}
dl_bcn_count++;
} while (!(bcn_valid_reg & BIT(0)) && dl_bcn_count < 5);
if (!(bcn_valid_reg & BIT(0)))
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("%s Download RSVD page failed!\n", __func__));
/*TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA*/
odm_write_1byte(p_dm_odm, REG_TDECTRL_8812A + 1, tx_page_bndy);
/*To make sure that if there exists an adapter which would like to send beacon.*/
/*If exists, the origianl value of 0x422[6] will be 1, we should check this to*/
/*prevent from setting 0x422[6] to 0 after download reserved page, or it will cause*/
/*the beacon cannot be sent by HW.*/
/*2010.06.23. Added by tynli.*/
if (is_send_beacon)
odm_write_1byte(p_dm_odm, REG_FWHW_TXQ_CTRL_8812A + 2, tmp_reg422);
/*Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli.*/
/*Clear CR[8] or beacon packet will not be send to TxBuf anymore.*/
u1b_tmp = odm_read_1byte(p_dm_odm, REG_CR_8812A + 1);
odm_write_1byte(p_dm_odm, REG_CR_8812A + 1, (u1b_tmp & (~BIT(0))));
p_beam_entry->beamform_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
*p_dm_odm->p_is_fw_dw_rsvd_page_in_progress = false;
#endif
}
void
hal_txbf_jaguar_fw_txbf_cmd(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 idx, period0 = 0, period1 = 0;
u8 PageNum0 = 0xFF, PageNum1 = 0xFF;
u8 u1_tx_bf_parm[3] = {0};
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
for (idx = 0; idx < BEAMFORMEE_ENTRY_NUM; idx++) {
/*Modified by David*/
if (p_beam_info->beamformee_entry[idx].is_used && p_beam_info->beamformee_entry[idx].beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) {
if (idx == 0) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum0 = 0xFE;
else
PageNum0 = 0xFF; /*stop sounding*/
period0 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
} else if (idx == 1) {
if (p_beam_info->beamformee_entry[idx].is_sound)
PageNum1 = 0xFE;
else
PageNum1 = 0xFF; /*stop sounding*/
period1 = (u8)(p_beam_info->beamformee_entry[idx].sound_period);
}
}
}
u1_tx_bf_parm[0] = PageNum0;
u1_tx_bf_parm[1] = PageNum1;
u1_tx_bf_parm[2] = (period1 << 4) | period0;
odm_fill_h2c_cmd(p_dm_odm, PHYDM_H2C_TXBF, 3, u1_tx_bf_parm);
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD,
("[%s] PageNum0 = %d period0 = %d, PageNum1 = %d period1 %d\n", __func__, PageNum0, period0, PageNum1, period1));
}
void
hal_txbf_jaguar_enter(
void *p_dm_void,
u8 bfer_bfee_idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u8 i = 0;
u8 bfer_idx = (bfer_bfee_idx & 0xF0) >> 4;
u8 bfee_idx = (bfer_bfee_idx & 0xF);
u32 csi_param;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
u16 sta_id = 0;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!\n", __func__));
hal_txbf_jaguar_rf_mode(p_dm_odm, p_beamforming_info);
if (p_dm_odm->rf_type == ODM_2T2R)
odm_set_bb_reg(p_dm_odm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x00000000); /*nc =2*/
else
odm_set_bb_reg(p_dm_odm, ODM_REG_CSI_CONTENT_VALUE, MASKDWORD, 0x01081008); /*nc =1*/
if ((p_beamforming_info->beamformer_su_cnt > 0) && (bfer_idx < BEAMFORMER_ENTRY_NUM)) {
beamformer_entry = p_beamforming_info->beamformer_entry[bfer_idx];
/*Sounding protocol control*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xCB);
/*MAC address/Partial AID of Beamformer*/
if (bfer_idx == 0) {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_BFMER0_INFO_8812A + i), beamformer_entry.mac_addr[i]);
/*CSI report use legacy ofdm so don't need to fill P_AID. */
/*platform_efio_write_2byte(adapter, REG_BFMER0_INFO_8812A+6, beamform_entry.P_AID); */
} else {
for (i = 0; i < 6 ; i++)
odm_write_1byte(p_dm_odm, (REG_BFMER1_INFO_8812A + i), beamformer_entry.mac_addr[i]);
/*CSI report use legacy ofdm so don't need to fill P_AID.*/
/*platform_efio_write_2byte(adapter, REG_BFMER1_INFO_8812A+6, beamform_entry.P_AID);*/
}
/*CSI report parameters of Beamformee*/
if (beamformer_entry.beamform_entry_cap & BEAMFORMEE_CAP_VHT_SU) {
if (p_dm_odm->rf_type == ODM_2T2R)
csi_param = 0x01090109;
else
csi_param = 0x01080108;
} else {
if (p_dm_odm->rf_type == ODM_2T2R)
csi_param = 0x03090309;
else
csi_param = 0x03080308;
}
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8812A, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8812A, csi_param);
odm_write_4byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8812A, csi_param);
/*Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip)*/
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A + 3, 0x50);
}
if ((p_beamforming_info->beamformee_su_cnt > 0) && (bfee_idx < BEAMFORMEE_ENTRY_NUM)) {
beamformee_entry = p_beamforming_info->beamformee_entry[bfee_idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
sta_id = beamformee_entry.mac_id;
else
sta_id = beamformee_entry.p_aid;
/*P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt*/
if (bfee_idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A, sta_id);
odm_write_1byte(p_dm_odm, REG_TXBF_CTRL_8812A + 3, odm_read_1byte(p_dm_odm, REG_TXBF_CTRL_8812A + 3) | BIT(4) | BIT(6) | BIT(7));
} else
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A + 2, sta_id | BIT(12) | BIT(14) | BIT(15));
/*CSI report parameters of Beamformee*/
if (bfee_idx == 0) {
/*Get BIT24 & BIT25*/
u8 tmp = odm_read_1byte(p_dm_odm, REG_BFMEE_SEL_8812A + 3) & 0x3;
odm_write_1byte(p_dm_odm, REG_BFMEE_SEL_8812A + 3, tmp | 0x60);
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A, sta_id | BIT(9));
} else {
/*Set BIT25*/
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A + 2, sta_id | 0xE200);
}
phydm_beamforming_notify(p_dm_odm);
}
}
void
hal_txbf_jaguar_leave(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beamforming_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMER_ENTRY beamformer_entry;
struct _RT_BEAMFORMEE_ENTRY beamformee_entry;
if (idx < BEAMFORMER_ENTRY_NUM) {
beamformer_entry = p_beamforming_info->beamformer_entry[idx];
beamformee_entry = p_beamforming_info->beamformee_entry[idx];
} else
return;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s]Start!, IDx = %d\n", __func__, idx));
/*Clear P_AID of Beamformee*/
/*Clear MAC address of Beamformer*/
/*Clear Associated Bfmee Sel*/
if (beamformer_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xC8);
if (idx == 0) {
odm_write_4byte(p_dm_odm, REG_BFMER0_INFO_8812A, 0);
odm_write_2byte(p_dm_odm, REG_BFMER0_INFO_8812A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
} else {
odm_write_4byte(p_dm_odm, REG_BFMER1_INFO_8812A, 0);
odm_write_2byte(p_dm_odm, REG_BFMER1_INFO_8812A + 4, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW20_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW40_8812A, 0);
odm_write_2byte(p_dm_odm, REG_CSI_RPT_PARAM_BW80_8812A, 0);
}
}
if (beamformee_entry.beamform_entry_cap == BEAMFORMING_CAP_NONE) {
hal_txbf_jaguar_rf_mode(p_dm_odm, p_beamforming_info);
if (idx == 0) {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A, 0x0);
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A, 0);
} else {
odm_write_2byte(p_dm_odm, REG_TXBF_CTRL_8812A + 2, odm_read_2byte(p_dm_odm, REG_TXBF_CTRL_8812A + 2) & 0xF000);
odm_write_2byte(p_dm_odm, REG_BFMEE_SEL_8812A + 2, odm_read_2byte(p_dm_odm, REG_BFMEE_SEL_8812A + 2) & 0x60);
}
}
}
void
hal_txbf_jaguar_status(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 beam_ctrl_val;
u32 beam_ctrl_reg;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY beamform_entry = p_beam_info->beamformee_entry[idx];
if (phydm_acting_determine(p_dm_odm, phydm_acting_as_ibss))
beam_ctrl_val = beamform_entry.mac_id;
else
beam_ctrl_val = beamform_entry.p_aid;
if (idx == 0)
beam_ctrl_reg = REG_TXBF_CTRL_8812A;
else {
beam_ctrl_reg = REG_TXBF_CTRL_8812A + 2;
beam_ctrl_val |= BIT(12) | BIT(14) | BIT(15);
}
if ((beamform_entry.beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) && (p_beam_info->apply_v_matrix == true)) {
if (beamform_entry.sound_bw == CHANNEL_WIDTH_20)
beam_ctrl_val |= BIT(9);
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_40)
beam_ctrl_val |= (BIT(9) | BIT(10));
else if (beamform_entry.sound_bw == CHANNEL_WIDTH_80)
beam_ctrl_val |= (BIT(9) | BIT(10) | BIT(11));
} else
beam_ctrl_val &= ~(BIT(9) | BIT(10) | BIT(11));
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] beam_ctrl_val = 0x%x!\n", __func__, beam_ctrl_val));
odm_write_2byte(p_dm_odm, beam_ctrl_reg, beam_ctrl_val);
}
void
hal_txbf_jaguar_fw_txbf(
void *p_dm_void,
u8 idx
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
struct _RT_BEAMFORMEE_ENTRY *p_beam_entry = p_beam_info->beamformee_entry + idx;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_entry->beamform_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING)
hal_txbf_jaguar_download_ndpa(p_dm_odm, idx);
hal_txbf_jaguar_fw_txbf_cmd(p_dm_odm);
}
void
hal_txbf_jaguar_patch(
void *p_dm_void,
u8 operation
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
struct _RT_BEAMFORMING_INFO *p_beam_info = &p_dm_odm->beamforming_info;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (p_beam_info->beamform_cap == BEAMFORMING_CAP_NONE)
return;
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
if (operation == SCAN_OPT_BACKUP_BAND0)
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xC8);
else if (operation == SCAN_OPT_RESTORE)
odm_write_1byte(p_dm_odm, REG_SND_PTCL_CTRL_8812A, 0xCB);
#endif
}
void
hal_txbf_jaguar_clk_8812a(
void *p_dm_void
)
{
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
u16 u2btmp;
u8 count = 0, u1btmp;
struct _ADAPTER *adapter = p_dm_odm->adapter;
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] Start!\n", __func__));
if (*(p_dm_odm->p_is_scan_in_process)) {
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_LOUD, ("[%s] return by Scan\n", __func__));
return;
}
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
/*Stop PCIe TxDMA*/
odm_write_1byte(p_dm_odm, REG_PCIE_CTRL_REG_8812A + 1, 0xFE);
#endif
/*Stop Usb TxDMA*/
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
RT_DISABLE_FUNC(adapter, DF_TX_BIT);
PlatformReturnAllPendingTxPackets(adapter);
#else
rtw_write_port_cancel(adapter);
#endif
/*Wait TXFF empty*/
for (count = 0; count < 100; count++) {
u2btmp = odm_read_2byte(p_dm_odm, REG_TXPKT_EMPTY_8812A);
u2btmp = u2btmp & 0xfff;
if (u2btmp != 0xfff) {
ODM_delay_ms(10);
continue;
} else
break;
}
/*TX pause*/
odm_write_1byte(p_dm_odm, REG_TXPAUSE_8812A, 0xFF);
/*Wait TX state Machine OK*/
for (count = 0; count < 100; count++) {
if (odm_read_4byte(p_dm_odm, REG_SCH_TXCMD_8812A) != 0)
continue;
else
break;
}
/*Stop RX DMA path*/
u1btmp = odm_read_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A);
odm_write_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A, u1btmp | BIT(2));
for (count = 0; count < 100; count++) {
u1btmp = odm_read_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A);
if (u1btmp & BIT(1))
break;
else
ODM_delay_ms(10);
}
/*Disable clock*/
odm_write_1byte(p_dm_odm, REG_SYS_CLKR_8812A + 1, 0xf0);
/*Disable 320M*/
odm_write_1byte(p_dm_odm, REG_AFE_PLL_CTRL_8812A + 3, 0x8);
/*Enable 320M*/
odm_write_1byte(p_dm_odm, REG_AFE_PLL_CTRL_8812A + 3, 0xa);
/*Enable clock*/
odm_write_1byte(p_dm_odm, REG_SYS_CLKR_8812A + 1, 0xfc);
/*Release Tx pause*/
odm_write_1byte(p_dm_odm, REG_TXPAUSE_8812A, 0);
/*Enable RX DMA path*/
u1btmp = odm_read_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A);
odm_write_1byte(p_dm_odm, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT(2)));
#if DEV_BUS_TYPE == RT_PCI_INTERFACE
/*Enable PCIe TxDMA*/
odm_write_1byte(p_dm_odm, REG_PCIE_CTRL_REG_8812A + 1, 0);
#endif
/*Start Usb TxDMA*/
RT_ENABLE_FUNC(adapter, DF_TX_BIT);
}
#endif
#endif