mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Fix some sparse warnings
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
c589c7a0c2
commit
ff8b540826
2 changed files with 144 additions and 212 deletions
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@ -69,12 +69,12 @@ static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = {{5, 4, 3, 2, 0, 3}, /* 92 ,
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{49, 16, 16, 0, 0, 48}
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{49, 16, 16, 0, 0, 48}
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};/* 3 */ /* 3, idx=0x16 */
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};/* 3 */ /* 3, idx=0x16 */
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static u8 RETRY_PENALTY_UP[RETRYSIZE + 1] = {49, 44, 16, 16, 0, 48}; /* 12% for rate up */
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static u8 RETRY_PENALTY_UP[RETRYSIZE + 1] = {49, 44, 16, 16, 0, 48}; /* 12% for rate up */
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static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32};
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static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32};
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#if 0
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#if 0
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
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4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
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5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
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5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
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@ -89,7 +89,7 @@ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
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#if (DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
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4, 4, 4, 4, 0x0d, 0x0d, 0x0f, 0x0f,
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4, 4, 4, 4, 0x0d, 0x0d, 0x0f, 0x0f,
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@ -105,12 +105,12 @@ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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}
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}
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};
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};
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static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x14, /* SS>TH */
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static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x14, /* SS>TH */
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0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15,
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0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15,
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0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15
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0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15
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};
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};
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static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0,
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static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0,
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0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
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0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
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0x17, 0x1a, 0x1c, 0x1f, 0x23, 0x28, 0x2a, 0x2c,
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0x17, 0x1a, 0x1c, 0x1f, 0x23, 0x28, 0x2a, 0x2c,
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0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c
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0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c
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@ -119,7 +119,7 @@ static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0,
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/* wilson modify */
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/* wilson modify */
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#if 0
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#if 0
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
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4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
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5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
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5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
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@ -132,7 +132,7 @@ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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};
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};
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#endif
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#endif
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 5, 4, 4, 5, 7, 7, 7, 8, 0x0a, /* SS>TH */
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4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
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4, 4, 4, 4, 6, 0x0a, 0x0b, 0x0d,
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5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
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5, 5, 7, 7, 8, 0x0b, 0x0d, 0x0f
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@ -144,12 +144,12 @@ static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {{
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}
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}
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};
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};
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static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e, 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */
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static u8 RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c, 0x0d, 0x0d, 0x0f, 0x0d, 0x0e, 0x0f, 0x0f, 0x10, 0x12, 0x13, 0x14, /* SS>TH */
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0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15,
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0x0f, 0x10, 0x10, 0x12, 0x12, 0x13, 0x14, 0x15,
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0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15
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0x11, 0x11, 0x12, 0x13, 0x13, 0x13, 0x14, 0x15
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};
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};
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static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0,
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static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0,
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0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
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0, 0, 0, 0, 0, 0x24, 0x26, 0x2a,
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0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a,
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0x18, 0x1a, 0x1d, 0x1f, 0x21, 0x27, 0x29, 0x2a,
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0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c
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0, 0, 0, 0x1f, 0x23, 0x28, 0x2a, 0x2c
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@ -157,42 +157,42 @@ static u8 RSSI_THRESHOLD[RATESIZE] = {0, 0, 0, 0,
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#endif
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#endif
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/*static u8 RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
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/*static u8 RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
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0,0,0,0,0,0x24,0x26,0x2a,
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0,0,0,0,0,0x24,0x26,0x2a,
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0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d,
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0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d,
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0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/
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0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/
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/*static u16 N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16,
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/*static u16 N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16,
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24,36,48,72,96,144,192,216,
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24,36,48,72,96,144,192,216,
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60,80,100,160,240,400,560,640,
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60,80,100,160,240,400,560,640,
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300,320,480,720,1000,1200,1600,2000};
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300,320,480,720,1000,1200,1600,2000};
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static u16 N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
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static u16 N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
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12,18,24,36,48,72,96,108,
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12,18,24,36,48,72,96,108,
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30,40,50,80,120,200,280,320,
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30,40,50,80,120,200,280,320,
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150,160,240,360,500,600,800,1000};*/
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150,160,240,360,500,600,800,1000};*/
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static u16 N_THRESHOLD_HIGH[RATESIZE] = {4, 4, 8, 16,
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static u16 N_THRESHOLD_HIGH[RATESIZE] = {4, 4, 8, 16,
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24, 36, 48, 72, 96, 144, 192, 216,
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24, 36, 48, 72, 96, 144, 192, 216,
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60, 80, 100, 160, 240, 400, 600, 800,
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60, 80, 100, 160, 240, 400, 600, 800,
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300, 320, 480, 720, 1000, 1200, 1600, 2000
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300, 320, 480, 720, 1000, 1200, 1600, 2000
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};
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};
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static u16 N_THRESHOLD_LOW[RATESIZE] = {2, 2, 4, 8,
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static u16 N_THRESHOLD_LOW[RATESIZE] = {2, 2, 4, 8,
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12, 18, 24, 36, 48, 72, 96, 108,
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12, 18, 24, 36, 48, 72, 96, 108,
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30, 40, 50, 80, 120, 200, 300, 400,
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30, 40, 50, 80, 120, 200, 300, 400,
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150, 160, 240, 360, 500, 600, 800, 1000
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150, 160, 240, 360, 500, 600, 800, 1000
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};
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};
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static u8 TRYING_NECESSARY[RATESIZE] = {2, 2, 2, 2,
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static u8 TRYING_NECESSARY[RATESIZE] = {2, 2, 2, 2,
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2, 2, 3, 3, 4, 4, 5, 7,
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2, 2, 3, 3, 4, 4, 5, 7,
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4, 4, 7, 10, 10, 12, 12, 18,
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4, 4, 7, 10, 10, 12, 12, 18,
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5, 7, 7, 8, 11, 18, 36, 60
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5, 7, 7, 8, 11, 18, 36, 60
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}; /* 0329 */ /* 1207 */
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}; /* 0329 */ /* 1207 */
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#if 0
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#if 0
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static u8 POOL_RETRY_TH[RATESIZE] = {30, 30, 30, 30,
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static u8 POOL_RETRY_TH[RATESIZE] = {30, 30, 30, 30,
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30, 30, 25, 25, 20, 15, 15, 10,
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30, 30, 25, 25, 20, 15, 15, 10,
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30, 25, 25, 20, 15, 10, 10, 10,
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30, 25, 25, 20, 15, 10, 10, 10,
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30, 25, 25, 20, 15, 10, 10, 10
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30, 25, 25, 20, 15, 10, 10, 10
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};
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};
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#endif
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#endif
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static u8 DROPING_NECESSARY[RATESIZE] = {1, 1, 1, 1,
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static u8 DROPING_NECESSARY[RATESIZE] = {1, 1, 1, 1,
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1, 2, 3, 4, 5, 6, 7, 8,
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1, 2, 3, 4, 5, 6, 7, 8,
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1, 2, 3, 4, 5, 6, 7, 8,
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1, 2, 3, 4, 5, 6, 7, 8,
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5, 6, 7, 8, 9, 10, 11, 12
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5, 6, 7, 8, 9, 10, 11, 12
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@ -226,7 +226,7 @@ static u16 dynamic_tx_rpt_timing[6] = {0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0
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((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
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((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))
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static int
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static int
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odm_ra_learn_bounding(
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odm_ra_learn_bounding(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info
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struct _odm_ra_info_ *p_ra_info
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)
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)
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{
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{
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@ -291,9 +291,9 @@ odm_ra_learn_bounding(
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static void
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static void
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odm_set_tx_rpt_timing_8188e(
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odm_set_tx_rpt_timing_8188e(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info,
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struct _odm_ra_info_ *p_ra_info,
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u8 extend
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u8 extend
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)
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)
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{
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{
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u8 idx = 0;
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u8 idx = 0;
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@ -319,7 +319,7 @@ odm_set_tx_rpt_timing_8188e(
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static int
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static int
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odm_rate_down_8188e(
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odm_rate_down_8188e(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info
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struct _odm_ra_info_ *p_ra_info
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)
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)
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{
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{
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@ -412,7 +412,7 @@ rate_down_finish:
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static int
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static int
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odm_rate_up_8188e(
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odm_rate_up_8188e(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info
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struct _odm_ra_info_ *p_ra_info
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)
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)
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{
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{
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@ -501,7 +501,7 @@ static void odm_reset_ra_counter_8188e(struct _odm_ra_info_ *p_ra_info)
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static void
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static void
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odm_rate_decision_8188e(
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odm_rate_decision_8188e(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info
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struct _odm_ra_info_ *p_ra_info
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)
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)
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{
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{
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@ -624,7 +624,7 @@ odm_rate_decision_8188e(
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static int
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static int
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odm_arfb_refresh_8188e(
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odm_arfb_refresh_8188e(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info
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struct _odm_ra_info_ *p_ra_info
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)
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)
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{
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{
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@ -718,7 +718,7 @@ odm_arfb_refresh_8188e(
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#if POWER_TRAINING_ACTIVE == 1
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#if POWER_TRAINING_ACTIVE == 1
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static void
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static void
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odm_pt_try_state_8188e(
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odm_pt_try_state_8188e(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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struct _odm_ra_info_ *p_ra_info
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struct _odm_ra_info_ *p_ra_info
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)
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)
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{
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{
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@ -824,8 +824,8 @@ odm_pt_decision_8188e(
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static void
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static void
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odm_ra_tx_rpt_timer_setting(
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odm_ra_tx_rpt_timer_setting(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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u16 min_rpt_time
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u16 min_rpt_time
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)
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)
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{
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{
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_ra_tx_rpt_timer_setting()\n"));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_ra_tx_rpt_timer_setting()\n"));
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@ -847,7 +847,7 @@ odm_ra_tx_rpt_timer_setting(
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void
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void
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odm_ra_support_init(
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odm_ra_support_init(
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struct PHY_DM_STRUCT *p_dm_odm
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struct PHY_DM_STRUCT *p_dm_odm
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)
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)
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{
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{
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>odm_ra_support_init()\n"));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>odm_ra_support_init()\n"));
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@ -862,7 +862,7 @@ odm_ra_support_init(
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int
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int
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odm_ra_info_init(
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odm_ra_info_init(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 mac_id
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u32 mac_id
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)
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)
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{
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{
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@ -943,7 +943,7 @@ odm_ra_info_init(
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int
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int
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odm_ra_info_init_all(
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odm_ra_info_init_all(
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struct PHY_DM_STRUCT *p_dm_odm
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struct PHY_DM_STRUCT *p_dm_odm
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)
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)
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{
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{
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u32 mac_id = 0;
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u32 mac_id = 0;
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||||||
|
@ -1026,7 +1026,7 @@ odm_ra_info_init_all(
|
||||||
} else if (adapter->MgntInfo.RegRALvl == 2) {
|
} else if (adapter->MgntInfo.RegRALvl == 2) {
|
||||||
/* Compile flag default is lvl2, we need not to update. */
|
/* Compile flag default is lvl2, we need not to update. */
|
||||||
} else if (adapter->MgntInfo.RegRALvl >= 0x80) {
|
} else if (adapter->MgntInfo.RegRALvl >= 0x80) {
|
||||||
u8 index = 0, offset = adapter->MgntInfo.RegRALvl - 0x80;
|
u8 index = 0, offset = adapter->MgntInfo.RegRALvl - 0x80;
|
||||||
|
|
||||||
/* Reset to default rate adaptive value. */
|
/* Reset to default rate adaptive value. */
|
||||||
RETRY_PENALTY_UP_IDX[11] = 0x14;
|
RETRY_PENALTY_UP_IDX[11] = 0x14;
|
||||||
|
@ -1061,8 +1061,8 @@ odm_ra_info_init_all(
|
||||||
|
|
||||||
u8
|
u8
|
||||||
odm_ra_get_sgi_8188e(
|
odm_ra_get_sgi_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id
|
u8 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
if ((NULL == p_dm_odm) || (mac_id >= ASSOCIATE_ENTRY_NUM))
|
if ((NULL == p_dm_odm) || (mac_id >= ASSOCIATE_ENTRY_NUM))
|
||||||
|
@ -1074,13 +1074,13 @@ odm_ra_get_sgi_8188e(
|
||||||
|
|
||||||
u8
|
u8
|
||||||
odm_ra_get_decision_rate_8188e(
|
odm_ra_get_decision_rate_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id
|
u8 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
u8 decision_rate = 0;
|
u8 decision_rate = 0;
|
||||||
struct _rate_adaptive_table_ *p_ra_table = &p_dm_odm->dm_ra_table;
|
struct _rate_adaptive_table_ *p_ra_table = &p_dm_odm->dm_ra_table;
|
||||||
u8 cmd_buf[3];
|
u8 cmd_buf[3];
|
||||||
|
|
||||||
if ((NULL == p_dm_odm) || (mac_id >= ASSOCIATE_ENTRY_NUM))
|
if ((NULL == p_dm_odm) || (mac_id >= ASSOCIATE_ENTRY_NUM))
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -1100,8 +1100,8 @@ odm_ra_get_decision_rate_8188e(
|
||||||
|
|
||||||
u8
|
u8
|
||||||
odm_ra_get_hw_pwr_status_8188e(
|
odm_ra_get_hw_pwr_status_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id
|
u8 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
u8 pt_stage = 5;
|
u8 pt_stage = 5;
|
||||||
|
@ -1139,9 +1139,9 @@ odm_ra_update_rate_info_8188e(
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_ra_set_rssi_8188e(
|
odm_ra_set_rssi_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id,
|
u8 mac_id,
|
||||||
u8 rssi
|
u8 rssi
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
struct _odm_ra_info_ *p_ra_info = NULL;
|
struct _odm_ra_info_ *p_ra_info = NULL;
|
||||||
|
@ -1157,8 +1157,8 @@ odm_ra_set_rssi_8188e(
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_ra_set_tx_rpt_time(
|
odm_ra_set_tx_rpt_time(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u16 min_rpt_time
|
u16 min_rpt_time
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||||
|
@ -1176,20 +1176,16 @@ odm_ra_set_tx_rpt_time(
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void
|
void odm_ra_tx_rpt2_handle_8188e(struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
odm_ra_tx_rpt2_handle_8188e(
|
u8 *tx_rpt_buf, u16 tx_rpt_len,
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
u32 mac_id_valid_entry0,
|
||||||
u8 *tx_rpt_buf,
|
u32 mac_id_valid_entry1)
|
||||||
u16 tx_rpt_len,
|
|
||||||
u32 mac_id_valid_entry0,
|
|
||||||
u32 mac_id_valid_entry1
|
|
||||||
)
|
|
||||||
{
|
{
|
||||||
struct _odm_ra_info_ *p_ra_info = NULL;
|
struct _odm_ra_info_ *p_ra_info = NULL;
|
||||||
u8 mac_id = 0;
|
u8 mac_id = 0;
|
||||||
u8 *p_buffer = NULL;
|
u8 *p_buffer = NULL;
|
||||||
u32 valid = 0, item_num = 0;
|
u32 valid = 0, item_num = 0;
|
||||||
u16 min_rpt_time = 0x927c;
|
u16 min_rpt_time = 0x927c;
|
||||||
|
|
||||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>odm_ra_tx_rpt2_handle_8188e(): valid0=%d valid1=%d BufferLength=%d\n",
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>odm_ra_tx_rpt2_handle_8188e(): valid0=%d valid1=%d BufferLength=%d\n",
|
||||||
mac_id_valid_entry0, mac_id_valid_entry1, tx_rpt_len));
|
mac_id_valid_entry0, mac_id_valid_entry1, tx_rpt_len));
|
||||||
|
@ -1273,7 +1269,7 @@ odm_ra_tx_rpt2_handle_8188e(
|
||||||
extern void rtl8188e_set_station_tx_rate_info(struct PHY_DM_STRUCT *, struct _odm_ra_info_ *, int);
|
extern void rtl8188e_set_station_tx_rate_info(struct PHY_DM_STRUCT *, struct _odm_ra_info_ *, int);
|
||||||
rtl8188e_set_station_tx_rate_info(p_dm_odm, p_ra_info, mac_id);
|
rtl8188e_set_station_tx_rate_info(p_dm_odm, p_ra_info, mac_id);
|
||||||
#ifdef DETECT_STA_EXISTANCE
|
#ifdef DETECT_STA_EXISTANCE
|
||||||
void rtl8188e_detect_sta_existance(struct PHY_DM_STRUCT *p_dm_odm, struct _odm_ra_info_ *p_ra_info, int mac_id);
|
void rtl8188e_detect_sta_existance(struct PHY_DM_STRUCT *p_dm_odm, struct _odm_ra_info_ *p_ra_info, int mac_id);
|
||||||
rtl8188e_detect_sta_existance(p_dm_odm, p_ra_info, mac_id);
|
rtl8188e_detect_sta_existance(p_dm_odm, p_ra_info, mac_id);
|
||||||
#endif
|
#endif
|
||||||
#endif
|
#endif
|
||||||
|
@ -1311,8 +1307,8 @@ odm_ra_tx_rpt2_handle_8188e(
|
||||||
|
|
||||||
static void
|
static void
|
||||||
odm_ra_tx_rpt_timer_setting(
|
odm_ra_tx_rpt_timer_setting(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u16 min_rpt_time
|
u16 min_rpt_time
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
|
@ -1321,7 +1317,7 @@ odm_ra_tx_rpt_timer_setting(
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_ra_support_init(
|
odm_ra_support_init(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
|
@ -1329,7 +1325,7 @@ odm_ra_support_init(
|
||||||
|
|
||||||
int
|
int
|
||||||
odm_ra_info_init(
|
odm_ra_info_init(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u32 mac_id
|
u32 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
|
@ -1338,7 +1334,7 @@ odm_ra_info_init(
|
||||||
|
|
||||||
int
|
int
|
||||||
odm_ra_info_init_all(
|
odm_ra_info_init_all(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -1346,8 +1342,8 @@ odm_ra_info_init_all(
|
||||||
|
|
||||||
u8
|
u8
|
||||||
odm_ra_get_sgi_8188e(
|
odm_ra_get_sgi_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id
|
u8 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -1355,16 +1351,16 @@ odm_ra_get_sgi_8188e(
|
||||||
|
|
||||||
u8
|
u8
|
||||||
odm_ra_get_decision_rate_8188e(
|
odm_ra_get_decision_rate_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id
|
u8 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
u8
|
u8
|
||||||
odm_ra_get_hw_pwr_status_8188e(
|
odm_ra_get_hw_pwr_status_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id
|
u8 mac_id
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -1384,9 +1380,9 @@ odm_ra_update_rate_info_8188e(
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_ra_set_rssi_8188e(
|
odm_ra_set_rssi_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 mac_id,
|
u8 mac_id,
|
||||||
u8 rssi
|
u8 rssi
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
|
@ -1394,8 +1390,8 @@ odm_ra_set_rssi_8188e(
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_ra_set_tx_rpt_time(
|
odm_ra_set_tx_rpt_time(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u16 min_rpt_time
|
u16 min_rpt_time
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
return;
|
return;
|
||||||
|
@ -1403,9 +1399,9 @@ odm_ra_set_tx_rpt_time(
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_ra_tx_rpt2_handle_8188e(
|
odm_ra_tx_rpt2_handle_8188e(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm,
|
struct PHY_DM_STRUCT *p_dm_odm,
|
||||||
u8 *tx_rpt_buf,
|
u8 *tx_rpt_buf,
|
||||||
u16 tx_rpt_len,
|
u16 tx_rpt_len,
|
||||||
u32 mac_id_valid_entry0,
|
u32 mac_id_valid_entry0,
|
||||||
u32 mac_id_valid_entry1
|
u32 mac_id_valid_entry1
|
||||||
)
|
)
|
||||||
|
|
|
@ -119,7 +119,7 @@ check_negative(
|
||||||
* RadioA.TXT
|
* RadioA.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
u32 array_mp_8188e_radioa[] = {
|
static u32 array_mp_8188e_radioa[] = {
|
||||||
0x000, 0x00030000,
|
0x000, 0x00030000,
|
||||||
0x008, 0x00084000,
|
0x008, 0x00084000,
|
||||||
0x018, 0x00000407,
|
0x018, 0x00000407,
|
||||||
|
@ -852,34 +852,34 @@ odm_read_and_config_mp_8188e_txpowertrack_pcie(
|
||||||
* TxPowerTrack_PCIE_ICUT.TXT
|
* TxPowerTrack_PCIE_ICUT.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
static u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
static u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_read_and_config_mp_8188e_txpowertrack_pcie_icut(
|
odm_read_and_config_mp_8188e_txpowertrack_pcie_icut(
|
||||||
|
@ -907,101 +907,45 @@ odm_read_and_config_mp_8188e_txpowertrack_pcie_icut(
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_icut_8188e, DELTA_SWINGIDX_SIZE * 3);
|
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_icut_8188e, DELTA_SWINGIDX_SIZE * 3);
|
||||||
}
|
}
|
||||||
|
|
||||||
/******************************************************************************
|
|
||||||
* TxPowerTrack_SDIO.TXT
|
|
||||||
******************************************************************************/
|
|
||||||
|
|
||||||
#if DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8188e[][DELTA_SWINGIDX_SIZE] = {
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
|
||||||
};
|
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8188e[][DELTA_SWINGIDX_SIZE] = {
|
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
|
||||||
};
|
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8188e[][DELTA_SWINGIDX_SIZE] = {
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
|
||||||
};
|
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8188e[][DELTA_SWINGIDX_SIZE] = {
|
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
|
||||||
};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_read_and_config_mp_8188e_txpowertrack_sdio(
|
odm_read_and_config_mp_8188e_txpowertrack_sdio(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
#if DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
|
||||||
struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
|
|
||||||
|
|
||||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n"));
|
|
||||||
|
|
||||||
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE);
|
|
||||||
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE * 3);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE * 3);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE * 3);
|
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8188e, DELTA_SWINGIDX_SIZE * 3);
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
* TxPowerTrack_SDIO_ICUT.TXT
|
* TxPowerTrack_SDIO_ICUT.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
static u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
static u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_read_and_config_mp_8188e_txpowertrack_sdio_icut(
|
odm_read_and_config_mp_8188e_txpowertrack_sdio_icut(
|
||||||
|
@ -1033,43 +977,40 @@ odm_read_and_config_mp_8188e_txpowertrack_sdio_icut(
|
||||||
* TxPowerTrack_USB.TXT
|
* TxPowerTrack_USB.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
static u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
|
static u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8188e[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
|
static u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 7, 8, 8, 8, 8};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9};
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8188e[] = {0, 0, 0, 0, 0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 6, 6, 6, 6, 7, 7};
|
||||||
#endif
|
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_read_and_config_mp_8188e_txpowertrack_usb(
|
odm_read_and_config_mp_8188e_txpowertrack_usb(
|
||||||
struct PHY_DM_STRUCT *p_dm_odm
|
struct PHY_DM_STRUCT *p_dm_odm
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
|
||||||
struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
|
struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
|
||||||
|
|
||||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n"));
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ReadAndConfig_MP_MP_8188E\n"));
|
||||||
|
@ -1089,41 +1030,60 @@ odm_read_and_config_mp_8188e_txpowertrack_usb(
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE * 3);
|
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE * 3);
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE * 3);
|
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE * 3);
|
||||||
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE * 3);
|
odm_move_memory(p_dm_odm, p_rf_calibrate_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8188e, DELTA_SWINGIDX_SIZE * 3);
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
* TxPowerTrack_USB_ICUT.TXT
|
* TxPowerTrack_USB_ICUT.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
{0, 1, 2, 3, 3, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 18, 18, 18},
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
static u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_icut_8188e[][DELTA_SWINGIDX_SIZE] = {
|
||||||
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15,
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15,
|
||||||
|
15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
|
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 15, 15, 15, 15,
|
||||||
|
15, 15, 15, 15, 15, 15, 15, 15, 15, 15},
|
||||||
|
};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9,
|
||||||
|
9, 9, 9, 9, 9, 9, 9};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9,
|
||||||
|
9, 10, 11, 11, 11, 11, 11};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9,
|
||||||
|
9, 9, 9, 9, 9, 9, 9};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9,
|
||||||
|
9, 10, 11, 11, 11, 11, 11};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8,
|
||||||
|
8, 8, 8, 8, 8, 8, 8};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9,
|
||||||
|
10, 10, 11, 12, 12, 12, 12};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8,
|
||||||
|
8, 8, 8, 8, 8, 8, 8};
|
||||||
|
static u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_icut_8188e[] = {
|
||||||
|
0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9,
|
||||||
|
10, 10, 11, 12, 12, 12, 12
|
||||||
};
|
};
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_icut_8188e[] = {0, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_icut_8188e[] = {0, 0, 0, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 9, 10, 11, 11, 11, 11, 11};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_icut_8188e[] = {0, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
|
|
||||||
u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_icut_8188e[] = {0, 0, 0, 1, 1, 1, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 8, 8, 8, 9, 9, 10, 10, 11, 12, 12, 12, 12};
|
|
||||||
|
|
||||||
void
|
void
|
||||||
odm_read_and_config_mp_8188e_txpowertrack_usb_icut(
|
odm_read_and_config_mp_8188e_txpowertrack_usb_icut(
|
||||||
|
@ -1155,7 +1115,7 @@ odm_read_and_config_mp_8188e_txpowertrack_usb_icut(
|
||||||
* TXPWR_LMT.TXT
|
* TXPWR_LMT.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
const char *array_mp_8188e_txpwr_lmt[] = {
|
static const char *array_mp_8188e_txpwr_lmt[] = {
|
||||||
"FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
|
"FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
|
||||||
"ETSI", "2.4G", "20M", "CCK", "1T", "01", "26",
|
"ETSI", "2.4G", "20M", "CCK", "1T", "01", "26",
|
||||||
"MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
|
"MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
|
||||||
|
@ -1731,14 +1691,6 @@ odm_read_and_config_mp_8188e_txpwr_lmt(
|
||||||
u32 array_len = sizeof(array_mp_8188e_txpwr_lmt) / sizeof(u8 *);
|
u32 array_len = sizeof(array_mp_8188e_txpwr_lmt) / sizeof(u8 *);
|
||||||
u8 **array = (u8 **)array_mp_8188e_txpwr_lmt;
|
u8 **array = (u8 **)array_mp_8188e_txpwr_lmt;
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
|
||||||
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
|
|
||||||
|
|
||||||
PlatformZeroMemory(p_hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
|
|
||||||
p_hal_data->nLinesReadPwrLmt = array_len / 7;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_read_and_config_mp_8188e_txpwr_lmt\n"));
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_read_and_config_mp_8188e_txpwr_lmt\n"));
|
||||||
|
|
||||||
for (i = 0; i < array_len; i += 7) {
|
for (i = 0; i < array_len; i += 7) {
|
||||||
|
@ -1751,10 +1703,6 @@ odm_read_and_config_mp_8188e_txpwr_lmt(
|
||||||
u8 *val = array[i + 6];
|
u8 *val = array[i + 6];
|
||||||
|
|
||||||
odm_config_bb_txpwr_lmt_8188e(p_dm_odm, regulation, band, bandwidth, rate, rf_path, chnl, val);
|
odm_config_bb_txpwr_lmt_8188e(p_dm_odm, regulation, band, bandwidth, rate, rf_path, chnl, val);
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
rsprintf((char *)p_hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",",
|
|
||||||
regulation, band, bandwidth, rate, rf_path, chnl, val);
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
@ -1763,7 +1711,7 @@ odm_read_and_config_mp_8188e_txpwr_lmt(
|
||||||
* TXPWR_LMT_88EE_M2_for_MSI.TXT
|
* TXPWR_LMT_88EE_M2_for_MSI.TXT
|
||||||
******************************************************************************/
|
******************************************************************************/
|
||||||
|
|
||||||
const char *array_mp_8188e_txpwr_lmt_88ee_m2_for_msi[] = {
|
static const char *array_mp_8188e_txpwr_lmt_88ee_m2_for_msi[] = {
|
||||||
"FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
|
"FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
|
||||||
"ETSI", "2.4G", "20M", "CCK", "1T", "01", "28",
|
"ETSI", "2.4G", "20M", "CCK", "1T", "01", "28",
|
||||||
"MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
|
"MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
|
||||||
|
@ -2339,14 +2287,6 @@ odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi(
|
||||||
u32 array_len = sizeof(array_mp_8188e_txpwr_lmt_88ee_m2_for_msi) / sizeof(u8 *);
|
u32 array_len = sizeof(array_mp_8188e_txpwr_lmt_88ee_m2_for_msi) / sizeof(u8 *);
|
||||||
u8 **array = (u8 **)array_mp_8188e_txpwr_lmt_88ee_m2_for_msi;
|
u8 **array = (u8 **)array_mp_8188e_txpwr_lmt_88ee_m2_for_msi;
|
||||||
|
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
|
||||||
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
|
|
||||||
|
|
||||||
PlatformZeroMemory(p_hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT);
|
|
||||||
p_hal_data->nLinesReadPwrLmt = array_len / 7;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi\n"));
|
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi\n"));
|
||||||
|
|
||||||
for (i = 0; i < array_len; i += 7) {
|
for (i = 0; i < array_len; i += 7) {
|
||||||
|
@ -2359,10 +2299,6 @@ odm_read_and_config_mp_8188e_txpwr_lmt_88e_e_m2_for_msi(
|
||||||
u8 *val = array[i + 6];
|
u8 *val = array[i + 6];
|
||||||
|
|
||||||
odm_config_bb_txpwr_lmt_8188e(p_dm_odm, regulation, band, bandwidth, rate, rf_path, chnl, val);
|
odm_config_bb_txpwr_lmt_8188e(p_dm_odm, regulation, band, bandwidth, rate, rf_path, chnl, val);
|
||||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
|
||||||
rsprintf((char *)p_hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",",
|
|
||||||
regulation, band, bandwidth, rate, rf_path, chnl, val);
|
|
||||||
#endif
|
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in a new issue