mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-10 07:29:40 +00:00
2db42a3fbf
These include changing s1Byte to s8, etc. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
512 lines
15 KiB
C
512 lines
15 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef _RTW_MP_H_
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#define _RTW_MP_H_
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/* 00 - Success */
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/* 11 - Error */
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#define STATUS_SUCCESS (0x00000000L)
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#define STATUS_PENDING (0x00000103L)
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#define STATUS_UNSUCCESSFUL (0xC0000001L)
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#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
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#define STATUS_NOT_SUPPORTED (0xC00000BBL)
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#define NDIS_STATUS_SUCCESS ((int)STATUS_SUCCESS)
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#define NDIS_STATUS_PENDING ((int)STATUS_PENDING)
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#define NDIS_STATUS_NOT_RECOGNIZED ((int)0x00010001L)
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#define NDIS_STATUS_NOT_COPIED ((int)0x00010002L)
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#define NDIS_STATUS_NOT_ACCEPTED ((int)0x00010003L)
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#define NDIS_STATUS_CALL_ACTIVE ((int)0x00010007L)
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#define NDIS_STATUS_FAILURE ((int)STATUS_UNSUCCESSFUL)
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#define NDIS_STATUS_RESOURCES ((int)STATUS_INSUFFICIENT_RESOURCES)
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#define NDIS_STATUS_CLOSING ((int)0xC0010002L)
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#define NDIS_STATUS_BAD_VERSION ((int)0xC0010004L)
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#define NDIS_STATUS_BAD_CHARACTERISTICS ((int)0xC0010005L)
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#define NDIS_STATUS_ADAPTER_NOT_FOUND ((int)0xC0010006L)
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#define NDIS_STATUS_OPEN_FAILED ((int)0xC0010007L)
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#define NDIS_STATUS_DEVICE_FAILED ((int)0xC0010008L)
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#define NDIS_STATUS_MULTICAST_FULL ((int)0xC0010009L)
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#define NDIS_STATUS_MULTICAST_EXISTS ((int)0xC001000AL)
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#define NDIS_STATUS_MULTICAST_NOT_FOUND ((int)0xC001000BL)
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#define NDIS_STATUS_REQUEST_ABORTED ((int)0xC001000CL)
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#define NDIS_STATUS_RESET_IN_PROGRESS ((int)0xC001000DL)
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#define NDIS_STATUS_CLOSING_INDICATING ((int)0xC001000EL)
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#define NDIS_STATUS_NOT_SUPPORTED ((int)STATUS_NOT_SUPPORTED)
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#define NDIS_STATUS_INVALID_PACKET ((int)0xC001000FL)
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#define NDIS_STATUS_OPEN_LIST_FULL ((int)0xC0010010L)
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#define NDIS_STATUS_ADAPTER_NOT_READY ((int)0xC0010011L)
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#define NDIS_STATUS_ADAPTER_NOT_OPEN ((int)0xC0010012L)
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#define NDIS_STATUS_NOT_INDICATING ((int)0xC0010013L)
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#define NDIS_STATUS_INVALID_LENGTH ((int)0xC0010014L)
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#define NDIS_STATUS_INVALID_DATA ((int)0xC0010015L)
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#define NDIS_STATUS_BUFFER_TOO_SHORT ((int)0xC0010016L)
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#define NDIS_STATUS_INVALID_OID ((int)0xC0010017L)
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#define NDIS_STATUS_ADAPTER_REMOVED ((int)0xC0010018L)
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#define NDIS_STATUS_UNSUPPORTED_MEDIA ((int)0xC0010019L)
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#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((int)0xC001001AL)
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#define NDIS_STATUS_FILE_NOT_FOUND ((int)0xC001001BL)
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#define NDIS_STATUS_ERROR_READING_FILE ((int)0xC001001CL)
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#define NDIS_STATUS_ALREADY_MAPPED ((int)0xC001001DL)
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#define NDIS_STATUS_RESOURCE_CONFLICT ((int)0xC001001EL)
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#define NDIS_STATUS_NO_CABLE ((int)0xC001001FL)
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#define NDIS_STATUS_INVALID_SAP ((int)0xC0010020L)
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#define NDIS_STATUS_SAP_IN_USE ((int)0xC0010021L)
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#define NDIS_STATUS_INVALID_ADDRESS ((int)0xC0010022L)
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#define NDIS_STATUS_VC_NOT_ACTIVATED ((int)0xC0010023L)
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#define NDIS_STATUS_DEST_OUT_OF_ORDER ((int)0xC0010024L) /* cause 27 */
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#define NDIS_STATUS_VC_NOT_AVAILABLE ((int)0xC0010025L) /* cause 35,45 */
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#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((int)0xC0010026L) /* cause 37 */
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#define NDIS_STATUS_INCOMPATABLE_QOS ((int)0xC0010027L) /* cause 49 */
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#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((int)0xC0010028L) /* cause 93 */
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#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((int)0xC0010029L) /* cause 3 */
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enum antenna_path {
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ANTENNA_NONE = 0x00,
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ANTENNA_D,
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ANTENNA_C,
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ANTENNA_CD,
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ANTENNA_B,
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ANTENNA_BD,
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ANTENNA_BC,
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ANTENNA_BCD,
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ANTENNA_A,
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ANTENNA_AD,
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ANTENNA_AC,
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ANTENNA_ACD,
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ANTENNA_AB,
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ANTENNA_ABD,
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ANTENNA_ABC,
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ANTENNA_ABCD
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};
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#define MAX_MP_XMITBUF_SZ 2048
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#define NR_MP_XMITFRAME 8
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struct mp_xmit_frame {
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struct list_head list;
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struct pkt_attrib attrib;
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struct sk_buff *pkt;
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int frame_tag;
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struct adapter *padapter;
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struct urb *pxmit_urb[8];
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/* insert urb, irp, and irpcnt info below... */
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u8 *mem_addr;
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u32 sz[8];
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u8 bpending[8];
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int ac_tag[8];
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int last[8];
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uint irpcnt;
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uint fragcnt;
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uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
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};
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struct mp_wiparam {
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u32 bcompleted;
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u32 act_type;
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u32 io_offset;
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u32 io_value;
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};
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typedef void(*wi_act_func)(void *padapter);
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struct mp_tx {
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u8 stop;
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u32 count, sended;
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u8 payload;
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struct pkt_attrib attrib;
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struct tx_desc desc;
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u8 *pallocated_buf;
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u8 *buf;
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u32 buf_size, write_size;
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void *PktTxThread;
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};
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#include <Hal8188EPhyCfg.h>
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#define MP_MAX_LINES 1000
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#define MP_MAX_LINES_BYTES 256
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typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
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struct mpt_context {
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/* Indicate if we have started Mass Production Test. */
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bool bMassProdTest;
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/* Indicate if the driver is unloading or unloaded. */
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bool bMptDrvUnload;
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struct semaphore MPh2c_Sema;
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struct timer_list MPh2c_timeout_timer;
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/* Event used to sync H2c for BT control */
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bool MptH2cRspEvent;
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bool MptBtC2hEvent;
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bool bMPh2c_timeout;
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/* 8190 PCI does not support NDIS_WORK_ITEM. */
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/* Work Item for Mass Production Test. */
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/* Event used to sync the case unloading driver and MptWorkItem is still in progress. */
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/* Indicate a MptWorkItem is scheduled and not yet finished. */
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bool bMptWorkItemInProgress;
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/* An instance which implements function and context of MptWorkItem. */
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MPT_WORK_ITEM_HANDLER CurrMptAct;
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/* 1=Start, 0=Stop from UI. */
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u32 MptTestStart;
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/* _TEST_MODE, defined in MPT_Req2.h */
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u32 MptTestItem;
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/* Variable needed in each implementation of CurrMptAct. */
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u32 MptActType; /* Type of action performed in CurrMptAct. */
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/* The Offset of IO operation is depend of MptActType. */
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u32 MptIoOffset;
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/* The Value of IO operation is depend of MptActType. */
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u32 MptIoValue;
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/* The RfPath of IO operation is depend of MptActType. */
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u32 MptRfPath;
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enum wireless_mode MptWirelessModeToSw; /* Wireless mode to switch. */
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u8 MptChannelToSw; /* Channel to switch. */
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u8 MptInitGainToSet; /* Initial gain to set. */
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u32 MptBandWidth; /* bandwidth to switch. */
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u32 MptRateIndex; /* rate index. */
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/* Register value kept for Single Carrier Tx test. */
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u8 btMpCckTxPower;
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/* Register value kept for Single Carrier Tx test. */
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u8 btMpOfdmTxPower;
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/* For MP Tx Power index */
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u8 TxPwrLevel[2]; /* rf-A, rf-B */
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/* Content of RCR Regsiter for Mass Production Test. */
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u32 MptRCR;
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/* true if we only receive packets with specific pattern. */
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bool bMptFilterPattern;
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/* Rx OK count, statistics used in Mass Production Test. */
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u32 MptRxOkCnt;
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/* Rx CRC32 error count, statistics used in Mass Production Test. */
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u32 MptRxCrcErrCnt;
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bool bCckContTx; /* true if we are in CCK Continuous Tx test. */
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bool bOfdmContTx; /* true if we are in OFDM Continuous Tx test. */
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bool bStartContTx; /* true if we have start Continuous Tx test. */
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/* true if we are in Single Carrier Tx test. */
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bool bSingleCarrier;
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/* true if we are in Carrier Suppression Tx Test. */
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bool bCarrierSuppression;
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/* true if we are in Single Tone Tx test. */
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bool bSingleTone;
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/* ACK counter asked by K.Y.. */
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bool bMptEnableAckCounter;
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u32 MptAckCounter;
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/* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */
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/* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */
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/* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */
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/* s32 RfReadLine[2]; */
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u8 APK_bound[2]; /* for APK path A/path B */
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bool bMptIndexEven;
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u8 backup0xc50;
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u8 backup0xc58;
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u8 backup0xc30;
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u8 backup0x52_RF_A;
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u8 backup0x52_RF_B;
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u8 h2cReqNum;
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u8 c2hBuf[20];
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u8 btInBuf[100];
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u32 mptOutLen;
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u8 mptOutBuf[100];
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};
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enum {
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WRITE_REG = 1,
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READ_REG,
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WRITE_RF,
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READ_RF,
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MP_START,
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MP_STOP,
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MP_RATE,
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MP_CHANNEL,
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MP_BANDWIDTH,
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MP_TXPOWER,
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MP_ANT_TX,
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MP_ANT_RX,
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MP_CTX,
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MP_QUERY,
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MP_ARX,
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MP_PSD,
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MP_PWRTRK,
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MP_THER,
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MP_IOCTL,
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EFUSE_GET,
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EFUSE_SET,
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MP_RESET_STATS,
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MP_DUMP,
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MP_PHYPARA,
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MP_SetRFPathSwh,
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MP_QueryDrvStats,
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MP_SetBT,
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CTA_TEST,
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MP_NULL,
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};
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struct mp_priv
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{
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struct adapter *papdater;
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/* Testing Flag */
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u32 mode;/* 0 for normal type packet, 1 for loopback packet (16bytes TXCMD) */
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u32 prev_fw_state;
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/* OID cmd handler */
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struct mp_wiparam workparam;
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/* u8 act_in_progress; */
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/* Tx Section */
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u8 TID;
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u32 tx_pktcount;
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struct mp_tx tx;
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/* Rx Section */
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u32 rx_pktcount;
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u32 rx_crcerrpktcount;
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u32 rx_pktloss;
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struct recv_stat rxstat;
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/* RF/BB relative */
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u8 channel;
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u8 bandwidth;
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u8 prime_channel_offset;
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u8 txpoweridx;
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u8 txpoweridx_b;
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u8 rateidx;
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u32 preamble;
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u32 CrystalCap;
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u16 antenna_tx;
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u16 antenna_rx;
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u8 check_mp_pkt;
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u8 bSetTxPower;
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struct wlan_network mp_network;
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unsigned char network_macaddr[ETH_ALEN];
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u8 *pallocated_mp_xmitframe_buf;
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u8 *pmp_xmtframe_buf;
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struct __queue free_mp_xmitqueue;
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u32 free_mp_xmitframe_cnt;
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struct mpt_context MptCtx;
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};
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struct iocmd_struct {
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u8 cmdclass;
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u16 value;
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u8 index;
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};
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struct rf_reg_param {
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u32 path;
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u32 offset;
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u32 value;
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};
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struct bb_reg_param {
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u32 offset;
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u32 value;
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};
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/* */
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#define LOWER true
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#define RAISE false
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/* Hardware Registers */
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#define BB_REG_BASE_ADDR 0x800
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/* MP variables */
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enum mp_mode_{
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MP_OFF,
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MP_ON,
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MP_ERR,
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MP_CONTINUOUS_TX,
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MP_SINGLE_CARRIER_TX,
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MP_CARRIER_SUPPRISSION_TX,
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MP_SINGLE_TONE_TX,
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MP_PACKET_TX,
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MP_PACKET_RX
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};
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#define MAX_RF_PATH_NUMS RF_PATH_MAX
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extern u8 mpdatarate[NumRates];
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/* MP set force data rate base on the definition. */
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enum mpt_rate_index {
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/* CCK rate. */
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MPT_RATE_1M, /* 0 */
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MPT_RATE_2M,
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MPT_RATE_55M,
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MPT_RATE_11M, /* 3 */
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/* OFDM rate. */
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MPT_RATE_6M, /* 4 */
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MPT_RATE_9M,
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MPT_RATE_12M,
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MPT_RATE_18M,
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MPT_RATE_24M,
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MPT_RATE_36M,
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MPT_RATE_48M,
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MPT_RATE_54M, /* 11 */
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/* HT rate. */
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MPT_RATE_MCS0, /* 12 */
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MPT_RATE_MCS1,
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MPT_RATE_MCS2,
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MPT_RATE_MCS3,
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MPT_RATE_MCS4,
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MPT_RATE_MCS5,
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MPT_RATE_MCS6,
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MPT_RATE_MCS7, /* 19 */
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MPT_RATE_MCS8,
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MPT_RATE_MCS9,
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MPT_RATE_MCS10,
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MPT_RATE_MCS11,
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MPT_RATE_MCS12,
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MPT_RATE_MCS13,
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MPT_RATE_MCS14,
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MPT_RATE_MCS15, /* 27 */
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MPT_RATE_LAST
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};
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#define MAX_TX_PWR_INDEX_N_MODE 64 /* 0x3F */
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enum power_mode {
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POWER_LOW = 0,
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POWER_NORMAL
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};
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#define RX_PKT_BROADCAST 1
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#define RX_PKT_DEST_ADDR 2
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#define RX_PKT_PHY_MATCH 3
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enum encry_ctrl_state {
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HW_CONTROL, /* hw encryption& decryption */
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SW_CONTROL, /* sw encryption& decryption */
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HW_ENCRY_SW_DECRY, /* hw encryption & sw decryption */
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SW_ENCRY_HW_DECRY /* sw encryption & hw decryption */
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};
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/* */
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/* extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); */
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/* extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); */
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extern s32 init_mp_priv(struct adapter * padapter);
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extern void free_mp_priv(struct mp_priv *pmp_priv);
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extern s32 MPT_InitializeAdapter(struct adapter * padapter, u8 Channel);
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extern void MPT_DeInitAdapter(struct adapter * padapter);
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extern s32 mp_start_test(struct adapter * padapter);
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extern void mp_stop_test(struct adapter * padapter);
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/* */
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extern u32 _read_rfreg(struct adapter * padapter, u8 rfpath, u32 addr, u32 bitmask);
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extern void _write_rfreg(struct adapter * padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
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extern u32 read_macreg(struct adapter *padapter, u32 addr, u32 sz);
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extern void write_macreg(struct adapter *padapter, u32 addr, u32 val, u32 sz);
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extern u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask);
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extern void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val);
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extern u32 read_rfreg(struct adapter * padapter, u8 rfpath, u32 addr);
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extern void write_rfreg(struct adapter * padapter, u8 rfpath, u32 addr, u32 val);
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extern void SetChannel(struct adapter * pAdapter);
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extern void SetBandwidth(struct adapter * pAdapter);
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extern void SetTxPower(struct adapter * pAdapter);
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extern void SetAntennaPathPower(struct adapter * pAdapter);
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extern void SetDataRate(struct adapter * pAdapter);
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extern void SetAntenna(struct adapter * pAdapter);
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extern s32 SetThermalMeter(struct adapter * pAdapter, u8 target_ther);
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extern void GetThermalMeter(struct adapter * pAdapter, u8 *value);
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extern void SetContinuousTx(struct adapter * pAdapter, u8 bStart);
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extern void SetSingleCarrierTx(struct adapter * pAdapter, u8 bStart);
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extern void SetSingleToneTx(struct adapter * pAdapter, u8 bStart);
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extern void SetCarrierSuppressionTx(struct adapter * pAdapter, u8 bStart);
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extern void PhySetTxPowerLevel(struct adapter * pAdapter);
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extern void fill_txdesc_for_mp(struct adapter * padapter, struct tx_desc *ptxdesc);
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extern void SetPacketTx(struct adapter * padapter);
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extern void SetPacketRx(struct adapter * pAdapter, u8 bStartRx);
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extern void ResetPhyRxPktCount(struct adapter * pAdapter);
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extern u32 GetPhyRxPktReceived(struct adapter * pAdapter);
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extern u32 GetPhyRxPktCRC32Error(struct adapter * pAdapter);
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extern s32 SetPowerTracking(struct adapter * padapter, u8 enable);
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extern void GetPowerTracking(struct adapter * padapter, u8 *enable);
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extern u32 mp_query_psd(struct adapter * pAdapter, u8 *data);
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extern void Hal_SetAntenna(struct adapter * pAdapter);
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extern void Hal_SetBandwidth(struct adapter * pAdapter);
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extern void Hal_SetTxPower(struct adapter * pAdapter);
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extern void Hal_SetCarrierSuppressionTx(struct adapter * pAdapter, u8 bStart);
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extern void Hal_SetSingleToneTx ( struct adapter * pAdapter , u8 bStart );
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extern void Hal_SetSingleCarrierTx (struct adapter * pAdapter, u8 bStart);
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extern void Hal_SetContinuousTx (struct adapter * pAdapter, u8 bStart);
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extern void Hal_SetBandwidth(struct adapter * pAdapter);
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extern void Hal_SetDataRate(struct adapter * pAdapter);
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extern void Hal_SetChannel(struct adapter * pAdapter);
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extern void Hal_SetAntennaPathPower(struct adapter * pAdapter);
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extern s32 Hal_SetThermalMeter(struct adapter * pAdapter, u8 target_ther);
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extern s32 Hal_SetPowerTracking(struct adapter * padapter, u8 enable);
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extern void Hal_GetPowerTracking(struct adapter * padapter, u8 * enable);
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extern void Hal_GetThermalMeter(struct adapter * pAdapter, u8 *value);
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extern void Hal_mpt_SwitchRfSetting(struct adapter * pAdapter);
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extern void Hal_MPT_CCKTxPowerAdjust(struct adapter * Adapter, bool bInCH14);
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extern void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter * pAdapter, bool beven);
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extern void Hal_SetCCKTxPower(struct adapter * pAdapter, u8 * TxPower);
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extern void Hal_SetOFDMTxPower(struct adapter * pAdapter, u8 * TxPower);
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extern void Hal_TriggerRFThermalMeter(struct adapter * pAdapter);
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extern u8 Hal_ReadRFThermalMeter(struct adapter * pAdapter);
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extern void Hal_SetCCKContinuousTx(struct adapter * pAdapter, u8 bStart);
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extern void Hal_SetOFDMContinuousTx(struct adapter * pAdapter, u8 bStart);
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extern void Hal_ProSetCrystalCap (struct adapter * pAdapter , u32 CrystalCapVal);
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extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
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extern void MP_PHY_SetRFPathSwitch(struct adapter * pAdapter ,bool bMain);
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#endif /* _RTW_MP_H_ */
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