mirror of
https://github.com/lwfinger/rtl8188eu.git
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275 lines
6.3 KiB
C
275 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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/* ************************************************************
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* Description:
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*
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* This file is for 92CE/92CU dynamic mechanism only
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*
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*
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* ************************************************************ */
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#define _RTL8188E_DM_C_
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/* ************************************************************
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* include files
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* ************************************************************ */
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#include <drv_types.h>
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#include <rtl8188e_hal.h>
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/* ************************************************************
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* Global var
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* ************************************************************ */
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static void
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dm_CheckProtection(
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PADAPTER Adapter
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)
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{
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}
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static void
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dm_CheckStatistics(
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PADAPTER Adapter
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)
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{
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}
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#ifdef CONFIG_SUPPORT_HW_WPS_PBC
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static void dm_CheckPbcGPIO(_adapter *padapter)
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{
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u8 tmp1byte;
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u8 bPbcPressed = false;
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if (!padapter->registrypriv.hw_wps_pbc)
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return;
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
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tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
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tmp1byte = rtw_read8(padapter, GPIO_IN);
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if (tmp1byte == 0xff)
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return ;
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if (tmp1byte & HAL_8188E_HW_GPIO_WPS_BIT)
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bPbcPressed = true;
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if (bPbcPressed) {
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/* Here we only set bPbcPressed to true */
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/* After trigger PBC, the variable will be set to false */
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RTW_INFO("CheckPbcGPIO - PBC is pressed\n");
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rtw_request_wps_pbc_event(padapter);
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}
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}
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#endif/* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */
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/* Initialize GPIO setting registers */
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static void
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dm_InitGPIOSetting(
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PADAPTER Adapter
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)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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u8 tmp1byte;
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tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
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tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
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rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
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}
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/* ************************************************************
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* functions
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* ************************************************************ */
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static void Init_ODM_ComInfo_88E(PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
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u32 SupportAbility = 0;
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u8 cut_ver, fab_ver;
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Init_ODM_ComInfo(Adapter);
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fab_ver = ODM_TSMC;
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cut_ver = ODM_CUT_A;
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if (IS_VENDOR_8188E_I_CUT_SERIES(Adapter))
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cut_ver = ODM_CUT_I;
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odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_FAB_VER, fab_ver);
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odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_CUT_VER, cut_ver);
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#ifdef CONFIG_DISABLE_ODM
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SupportAbility = 0;
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#else
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SupportAbility = ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK
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;
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#endif
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odm_cmn_info_update(pDM_Odm, ODM_CMNINFO_ABILITY, SupportAbility);
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}
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static void Update_ODM_ComInfo_88E(PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
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u32 SupportAbility = 0;
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int i;
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SupportAbility = 0
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| ODM_BB_DIG
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| ODM_BB_RA_MASK
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| ODM_BB_DYNAMIC_TXPWR
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| ODM_BB_FA_CNT
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| ODM_BB_RSSI_MONITOR
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| ODM_BB_CCK_PD
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/* | ODM_BB_PWR_SAVE */
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| ODM_BB_CFO_TRACKING
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| ODM_RF_CALIBRATION
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| ODM_RF_TX_PWR_TRACK
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| ODM_BB_NHM_CNT
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| ODM_BB_PRIMARY_CCA
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/* | ODM_BB_PWR_TRAIN */
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;
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if (rtw_odm_adaptivity_needed(Adapter) == true) {
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rtw_odm_adaptivity_config_msg(RTW_DBGDUMP, Adapter);
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SupportAbility |= ODM_BB_ADAPTIVITY;
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}
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if (!Adapter->registrypriv.qos_opt_enable)
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SupportAbility |= ODM_MAC_EDCA_TURBO;
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#ifdef CONFIG_ANTENNA_DIVERSITY
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if (pHalData->AntDivCfg)
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SupportAbility |= ODM_BB_ANT_DIV;
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#endif
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#if (MP_DRIVER == 1)
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if (Adapter->registrypriv.mp_mode == 1) {
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SupportAbility = 0
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| ODM_RF_CALIBRATION
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| ODM_RF_TX_PWR_TRACK
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;
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}
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#endif/* (MP_DRIVER==1) */
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#ifdef CONFIG_DISABLE_ODM
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SupportAbility = 0;
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#endif/* CONFIG_DISABLE_ODM */
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odm_cmn_info_update(pDM_Odm, ODM_CMNINFO_ABILITY, SupportAbility);
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}
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void
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rtl8188e_InitHalDm(
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PADAPTER Adapter
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)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
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u8 i;
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dm_InitGPIOSetting(Adapter);
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pHalData->DM_Type = dm_type_by_driver;
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Update_ODM_ComInfo_88E(Adapter);
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odm_dm_init(pDM_Odm);
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}
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void
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rtl8188e_HalDmWatchDog(
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PADAPTER Adapter
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)
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{
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bool bFwCurrentInPSMode = false;
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bool bFwPSAwake = true;
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct PHY_DM_STRUCT *pDM_Odm = &(pHalData->odmpriv);
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if (!rtw_is_hw_init_completed(Adapter))
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goto skip_dm;
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#ifdef CONFIG_LPS
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bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode;
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rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake));
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#endif
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#ifdef CONFIG_P2P_PS
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/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
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/* modifed by thomas. 2011.06.11. */
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if (Adapter->wdinfo.p2p_ps_mode)
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bFwPSAwake = false;
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#endif /* CONFIG_P2P_PS */
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if ((rtw_is_hw_init_completed(Adapter))
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&& ((!bFwCurrentInPSMode) && bFwPSAwake)) {
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/* Calculate Tx/Rx statistics. */
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dm_CheckStatistics(Adapter);
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rtw_hal_check_rxfifo_full(Adapter);
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}
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/* ODM */
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if (rtw_is_hw_init_completed(Adapter)) {
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u8 bLinked = false;
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u8 bsta_state = false;
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#ifdef CONFIG_DISABLE_ODM
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pHalData->odmpriv.support_ability = 0;
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#endif
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if (rtw_mi_check_status(Adapter, MI_ASSOC)) {
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bLinked = true;
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if (rtw_mi_check_status(Adapter, MI_STA_LINKED))
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bsta_state = true;
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}
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odm_cmn_info_update(&pHalData->odmpriv , ODM_CMNINFO_LINK, bLinked);
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odm_cmn_info_update(&pHalData->odmpriv , ODM_CMNINFO_STATION_STATE, bsta_state);
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odm_dm_watchdog(&pHalData->odmpriv);
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}
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skip_dm:
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#ifdef CONFIG_SUPPORT_HW_WPS_PBC
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/* Check GPIO to determine current Pbc status. */
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dm_CheckPbcGPIO(Adapter);
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#endif
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return;
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}
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void rtl8188e_init_dm_priv(PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
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/* spin_lock_init(&(pHalData->odm_stainfo_lock)); */
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Init_ODM_ComInfo_88E(Adapter);
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odm_init_all_timers(podmpriv);
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}
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void rtl8188e_deinit_dm_priv(PADAPTER Adapter)
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{
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct PHY_DM_STRUCT *podmpriv = &pHalData->odmpriv;
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odm_cancel_all_timers(podmpriv);
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}
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