mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-30 07:53:39 +00:00
272 lines
7.2 KiB
C
272 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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/*Image2HeaderVersion: 2.18*/
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#include "mp_precomp.h"
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#include "phydm_precomp.h"
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#if (RTL8188E_SUPPORT == 1)
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static bool
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check_positive(
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struct PHY_DM_STRUCT *p_dm_odm,
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const u32 condition1,
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const u32 condition2,
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const u32 condition3,
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const u32 condition4
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)
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{
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u8 _board_type = ((p_dm_odm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/
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((p_dm_odm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/
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((p_dm_odm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/
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((p_dm_odm->board_type & BIT(6)) >> 6) << 3 | /* _APA */
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((p_dm_odm->board_type & BIT(2)) >> 2) << 4; /* _BT*/
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u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4;
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u32 driver1 = p_dm_odm->cut_version << 24 |
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(p_dm_odm->support_interface & 0xF0) << 16 |
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p_dm_odm->support_platform << 16 |
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p_dm_odm->package_type << 12 |
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(p_dm_odm->support_interface & 0x0F) << 8 |
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_board_type;
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u32 driver2 = (p_dm_odm->type_glna & 0xFF) << 0 |
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(p_dm_odm->type_gpa & 0xFF) << 8 |
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(p_dm_odm->type_alna & 0xFF) << 16 |
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(p_dm_odm->type_apa & 0xFF) << 24;
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u32 driver3 = 0;
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u32 driver4 = (p_dm_odm->type_glna & 0xFF00) >> 8 |
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(p_dm_odm->type_gpa & 0xFF00) |
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(p_dm_odm->type_alna & 0xFF00) << 8 |
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(p_dm_odm->type_apa & 0xFF00) << 16;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
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("===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
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("===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
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(" (Platform, Interface) = (0x%X, 0x%X)\n", p_dm_odm->support_platform, p_dm_odm->support_interface));
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE,
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(" (Board, Package) = (0x%X, 0x%X)\n", p_dm_odm->board_type, p_dm_odm->package_type));
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/*============== value Defined Check ===============*/
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/*QFN type [15:12] and cut version [27:24] need to do value check*/
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if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000)))
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return false;
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if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000)))
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return false;
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/*=============== Bit Defined Check ================*/
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/* We don't care [31:28] */
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cond1 &= 0x00FF0FFF;
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driver1 &= 0x00FF0FFF;
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if ((cond1 & driver1) == cond1) {
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u32 bit_mask = 0;
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if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/
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return true;
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if ((cond1 & BIT(0)) != 0) /*GLNA*/
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bit_mask |= 0x000000FF;
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if ((cond1 & BIT(1)) != 0) /*GPA*/
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bit_mask |= 0x0000FF00;
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if ((cond1 & BIT(2)) != 0) /*ALNA*/
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bit_mask |= 0x00FF0000;
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if ((cond1 & BIT(3)) != 0) /*APA*/
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bit_mask |= 0xFF000000;
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if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/
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return true;
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else
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return false;
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} else
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return false;
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}
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static bool
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check_negative(
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struct PHY_DM_STRUCT *p_dm_odm,
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const u32 condition1,
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const u32 condition2
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)
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{
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return true;
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}
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/******************************************************************************
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* MAC_REG.TXT
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******************************************************************************/
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static u32 array_mp_8188e_mac_reg[] = {
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0x026, 0x00000041,
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0x027, 0x00000035,
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0x80000002, 0x00000000, 0x40000000, 0x00000000,
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0x040, 0x0000000C,
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0x90000001, 0x00000000, 0x40000000, 0x00000000,
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0x040, 0x0000000C,
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0x90000001, 0x00000001, 0x40000000, 0x00000000,
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0x040, 0x0000000C,
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0x90000001, 0x00000002, 0x40000000, 0x00000000,
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0x040, 0x0000000C,
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0xA0000000, 0x00000000,
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0x040, 0x00000000,
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0xB0000000, 0x00000000,
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0x421, 0x0000000F,
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0x428, 0x0000000A,
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0x429, 0x00000010,
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0x430, 0x00000000,
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0x431, 0x00000001,
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0x432, 0x00000002,
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0x433, 0x00000004,
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0x434, 0x00000005,
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0x435, 0x00000006,
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0x436, 0x00000007,
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0x437, 0x00000008,
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0x438, 0x00000000,
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0x439, 0x00000000,
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0x43A, 0x00000001,
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0x43B, 0x00000002,
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0x43C, 0x00000004,
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0x43D, 0x00000005,
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0x43E, 0x00000006,
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0x43F, 0x00000007,
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0x440, 0x0000005D,
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0x441, 0x00000001,
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0x442, 0x00000000,
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0x444, 0x00000015,
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0x445, 0x000000F0,
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0x446, 0x0000000F,
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0x447, 0x00000000,
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0x458, 0x00000041,
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0x459, 0x000000A8,
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0x45A, 0x00000072,
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0x45B, 0x000000B9,
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0x460, 0x00000066,
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0x461, 0x00000066,
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0x480, 0x00000008,
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0x4C8, 0x000000FF,
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0x4C9, 0x00000008,
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0x4CC, 0x000000FF,
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0x4CD, 0x000000FF,
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0x4CE, 0x00000001,
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0x4D3, 0x00000001,
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0x500, 0x00000026,
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0x501, 0x000000A2,
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0x502, 0x0000002F,
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0x503, 0x00000000,
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0x504, 0x00000028,
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0x505, 0x000000A3,
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0x506, 0x0000005E,
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0x507, 0x00000000,
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0x508, 0x0000002B,
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0x509, 0x000000A4,
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0x50A, 0x0000005E,
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0x50B, 0x00000000,
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0x50C, 0x0000004F,
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0x50D, 0x000000A4,
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0x50E, 0x00000000,
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0x50F, 0x00000000,
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0x512, 0x0000001C,
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0x514, 0x0000000A,
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0x516, 0x0000000A,
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0x525, 0x0000004F,
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0x550, 0x00000010,
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0x551, 0x00000010,
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0x559, 0x00000002,
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0x55D, 0x000000FF,
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0x605, 0x00000030,
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0x608, 0x0000000E,
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0x609, 0x0000002A,
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0x620, 0x000000FF,
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0x621, 0x000000FF,
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0x622, 0x000000FF,
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0x623, 0x000000FF,
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0x624, 0x000000FF,
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0x625, 0x000000FF,
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0x626, 0x000000FF,
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0x627, 0x000000FF,
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0x63C, 0x00000008,
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0x63D, 0x00000008,
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0x63E, 0x0000000C,
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0x63F, 0x0000000C,
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0x640, 0x00000040,
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0x652, 0x00000020,
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0x66E, 0x00000005,
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0x700, 0x00000021,
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0x701, 0x00000043,
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0x702, 0x00000065,
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0x703, 0x00000087,
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0x708, 0x00000021,
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0x709, 0x00000043,
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0x70A, 0x00000065,
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0x70B, 0x00000087,
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};
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void
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odm_read_and_config_mp_8188e_mac_reg(
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struct PHY_DM_STRUCT *p_dm_odm
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)
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{
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u32 i = 0;
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u8 c_cond;
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bool is_matched = true, is_skipped = false;
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u32 array_len = sizeof(array_mp_8188e_mac_reg) / sizeof(u32);
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u32 *array = array_mp_8188e_mac_reg;
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u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_read_and_config_mp_8188e_mac_reg\n"));
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while ((i + 1) < array_len) {
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v1 = array[i];
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v2 = array[i + 1];
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if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/
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if (v1 & BIT(31)) {/* positive condition*/
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c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
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if (c_cond == COND_ENDIF) {/*end*/
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is_matched = true;
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is_skipped = false;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ENDIF\n"));
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} else if (c_cond == COND_ELSE) { /*else*/
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is_matched = is_skipped ? false : true;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ELSE\n"));
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} else {/*if , else if*/
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pre_v1 = v1;
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pre_v2 = v2;
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ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("IF or ELSE IF\n"));
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}
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} else if (v1 & BIT(30)) { /*negative condition*/
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if (is_skipped == false) {
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if (check_positive(p_dm_odm, pre_v1, pre_v2, v1, v2)) {
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is_matched = true;
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is_skipped = true;
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} else {
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is_matched = false;
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is_skipped = false;
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}
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} else
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is_matched = false;
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}
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} else {
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if (is_matched)
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odm_config_mac_8188e(p_dm_odm, v1, (u8)v2);
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}
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i = i + 2;
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}
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}
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u32
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odm_get_version_mp_8188e_mac_reg(void)
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{
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return 70;
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}
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#endif /* end of HWIMG_SUPPORT*/
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