mirror of
https://github.com/lwfinger/rtl8188eu.git
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81aeb84017
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
473 lines
12 KiB
C
473 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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/*
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The purpose of rtw_io.c
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a. provides the API
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b. provides the protocol engine
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c. provides the software interface between caller and the hardware interface
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Compiler Flag Option:
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2. CONFIG_USB_HCI:
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a. USE_ASYNC_IRP: Both sync/async operations are provided.
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Only sync read/rtw_write_mem operations are provided.
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jackson@realtek.com.tw
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*/
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#define _RTW_IO_C_
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#include <drv_types.h>
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#include <hal_data.h>
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#define rtw_le16_to_cpu(val) le16_to_cpu(val)
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#define rtw_le32_to_cpu(val) le32_to_cpu(val)
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#define rtw_cpu_to_le16(val) cpu_to_le16(val)
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#define rtw_cpu_to_le32(val) cpu_to_le32(val)
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u8 _rtw_read8(_adapter *adapter, u32 addr)
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{
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u8 r_val;
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr);
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_read8 = pintfhdl->io_ops._read8;
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r_val = _read8(pintfhdl, addr);
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return r_val;
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}
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u16 _rtw_read16(_adapter *adapter, u32 addr)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr);
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_read16 = pintfhdl->io_ops._read16;
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return _read16(pintfhdl, addr);
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}
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u32 _rtw_read32(_adapter *adapter, u32 addr)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr);
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_read32 = pintfhdl->io_ops._read32;
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return _read32(pintfhdl, addr);
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}
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int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
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int ret;
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_write8 = pintfhdl->io_ops._write8;
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ret = _write8(pintfhdl, addr, val);
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, __le16 val);
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int ret;
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__le16 outval;
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_write16 = pintfhdl->io_ops._write16;
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outval = rtw_cpu_to_le16(val);
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ret = _write16(pintfhdl, addr, outval);
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, __le32 val);
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int ret;
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__le32 outval;
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_write32 = pintfhdl->io_ops._write32;
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outval = rtw_cpu_to_le32(val);
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ret = _write32(pintfhdl, addr, outval);
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *pdata)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf));
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int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
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int ret;
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_writeN = pintfhdl->io_ops._writeN;
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ret = _writeN(pintfhdl, addr, length, pdata);
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
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int ret;
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_write8_async = pintfhdl->io_ops._write8_async;
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ret = _write8_async(pintfhdl, addr, val);
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, __le16 val);
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int ret;
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__le16 outval;
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_write16_async = pintfhdl->io_ops._write16_async;
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outval = rtw_cpu_to_le16(val);
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ret = _write16_async(pintfhdl, addr, outval);
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return RTW_STATUS_CODE(ret);
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}
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int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
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{
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, __le32 val);
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int ret;
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__le32 outval;
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_write32_async = pintfhdl->io_ops._write32_async;
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outval = rtw_cpu_to_le32(val);
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ret = _write32_async(pintfhdl, addr, outval);
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return RTW_STATUS_CODE(ret);
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}
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void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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if (RTW_CANNOT_RUN(adapter)) {
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return;
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}
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_read_mem = pintfhdl->io_ops._read_mem;
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_read_mem(pintfhdl, addr, cnt, pmem);
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}
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void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_write_mem = pintfhdl->io_ops._write_mem;
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_write_mem(pintfhdl, addr, cnt, pmem);
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}
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void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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if (RTW_CANNOT_RUN(adapter)) {
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return;
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}
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_read_port = pintfhdl->io_ops._read_port;
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_read_port(pintfhdl, addr, cnt, pmem);
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}
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void _rtw_read_port_cancel(_adapter *adapter)
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{
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void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
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RTW_DISABLE_FUNC(adapter, DF_RX_BIT);
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if (_read_port_cancel)
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_read_port_cancel(pintfhdl);
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}
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u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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{
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u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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u32 ret = _SUCCESS;
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_write_port = pintfhdl->io_ops._write_port;
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ret = _write_port(pintfhdl, addr, cnt, pmem);
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return ret;
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}
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u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
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{
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int ret = _SUCCESS;
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struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
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struct submit_ctx sctx;
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rtw_sctx_init(&sctx, timeout_ms);
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pxmitbuf->sctx = &sctx;
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ret = _rtw_write_port(adapter, addr, cnt, pmem);
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if (ret == _SUCCESS)
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ret = rtw_sctx_wait(&sctx, __func__);
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return ret;
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}
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void _rtw_write_port_cancel(_adapter *adapter)
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{
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void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
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RTW_DISABLE_FUNC(adapter, DF_TX_BIT);
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if (_write_port_cancel)
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_write_port_cancel(pintfhdl);
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}
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int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops))
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{
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struct io_priv *piopriv = &padapter->iopriv;
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struct intf_hdl *pintf = &piopriv->intf;
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if (set_intf_ops == NULL)
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return _FAIL;
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piopriv->padapter = padapter;
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pintf->padapter = padapter;
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pintf->pintf_dev = adapter_to_dvobj(padapter);
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set_intf_ops(padapter, &pintf->io_ops);
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return _SUCCESS;
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}
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/*
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* Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR
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* @return true:
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* @return false:
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*/
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int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj)
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{
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int ret = false;
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int value;
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value = ATOMIC_INC_RETURN(&dvobj->continual_io_error);
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if (value > MAX_CONTINUAL_IO_ERR) {
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RTW_INFO("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR);
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ret = true;
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} else {
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/* RTW_INFO("[dvobj:%p] continual_io_error:%d\n", dvobj, value); */
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}
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return ret;
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}
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/*
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* Set the continual_io_error of this @param dvobjprive to 0
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*/
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void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
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{
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ATOMIC_SET(&dvobj->continual_io_error, 0);
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}
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#ifdef DBG_IO
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u32 read_sniff_ranges[][2] = {
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/* {0x520, 0x523}, */
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};
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u32 write_sniff_ranges[][2] = {
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/* {0x520, 0x523}, */
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/* {0x4c, 0x4c}, */
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};
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int read_sniff_num = sizeof(read_sniff_ranges) / sizeof(u32) / 2;
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int write_sniff_num = sizeof(write_sniff_ranges) / sizeof(u32) / 2;
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bool match_read_sniff_ranges(u32 addr, u16 len)
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{
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int i;
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for (i = 0; i < read_sniff_num; i++) {
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if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
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return true;
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}
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return false;
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}
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bool match_write_sniff_ranges(u32 addr, u16 len)
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{
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int i;
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for (i = 0; i < write_sniff_num; i++) {
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if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
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return true;
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}
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return false;
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}
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struct rf_sniff_ent {
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u8 path;
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u16 reg;
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u32 mask;
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};
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struct rf_sniff_ent rf_read_sniff_ranges[] = {
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/* example for all path addr 0x55 with all RF Reg mask */
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/* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
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};
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struct rf_sniff_ent rf_write_sniff_ranges[] = {
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/* example for all path addr 0x55 with all RF Reg mask */
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/* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
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};
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int rf_read_sniff_num = sizeof(rf_read_sniff_ranges) / sizeof(struct rf_sniff_ent);
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int rf_write_sniff_num = sizeof(rf_write_sniff_ranges) / sizeof(struct rf_sniff_ent);
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bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask)
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{
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int i;
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for (i = 0; i < rf_read_sniff_num; i++) {
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if (rf_read_sniff_ranges[i].path == MAX_RF_PATH || rf_read_sniff_ranges[i].path == path)
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if (addr == rf_read_sniff_ranges[i].reg && (mask & rf_read_sniff_ranges[i].mask))
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return true;
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}
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return false;
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}
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bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask)
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{
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int i;
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for (i = 0; i < rf_write_sniff_num; i++) {
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if (rf_write_sniff_ranges[i].path == MAX_RF_PATH || rf_write_sniff_ranges[i].path == path)
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if (addr == rf_write_sniff_ranges[i].reg && (mask & rf_write_sniff_ranges[i].mask))
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return true;
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}
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return false;
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}
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u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
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{
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u8 val = _rtw_read8(adapter, addr);
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if (match_read_sniff_ranges(addr, 1))
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RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
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return val;
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}
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u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
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{
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u16 val = _rtw_read16(adapter, addr);
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if (match_read_sniff_ranges(addr, 2))
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RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
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return val;
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}
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u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
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{
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u32 val = _rtw_read32(adapter, addr);
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if (match_read_sniff_ranges(addr, 4))
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RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
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return val;
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}
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int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
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{
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if (match_write_sniff_ranges(addr, 1))
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RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
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return _rtw_write8(adapter, addr, val);
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}
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int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
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{
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if (match_write_sniff_ranges(addr, 2))
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RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
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return _rtw_write16(adapter, addr, val);
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}
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int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
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{
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if (match_write_sniff_ranges(addr, 4))
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RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
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return _rtw_write32(adapter, addr, val);
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}
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int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line)
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{
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if (match_write_sniff_ranges(addr, length))
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RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
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return _rtw_writeN(adapter, addr, length, data);
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}
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#endif
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