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https://github.com/lwfinger/rtl8188eu.git
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49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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#ifndef __PHYDMEDCATURBOCHECK_H__
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#define __PHYDMEDCATURBOCHECK_H__
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#if PHYDM_SUPPORT_EDCA
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/*#define EDCATURBO_VERSION "2.1"*/
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#define EDCATURBO_VERSION "2.3" /*2015.07.29 by YuChen*/
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struct _EDCA_TURBO_ {
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bool is_current_turbo_edca;
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bool is_cur_rdl_state;
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u32 prv_traffic_idx; /* edca turbo */
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};
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static u32 edca_setting_UL[HT_IOT_PEER_MAX] =
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/* UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx) */
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{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322};
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static u32 edca_setting_DL[HT_IOT_PEER_MAX] =
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/* UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx) */
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{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b};
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static u32 edca_setting_dl_g_mode[HT_IOT_PEER_MAX] =
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/* UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP */
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{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
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void
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odm_edca_turbo_check(
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void *p_dm_void
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);
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void
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odm_edca_turbo_init(
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void *p_dm_void
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);
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void
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odm_edca_turbo_check_ce(
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void *p_dm_void
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);
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#endif /*PHYDM_SUPPORT_EDCA*/
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#endif
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