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https://github.com/lwfinger/rtl8188eu.git
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19db43ecbd
This driver was added to the kernel with version 3.12. The changes in that version are now brought back to the GitHub repo. Essentually all of the code is updated. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
146 lines
3.7 KiB
C
146 lines
3.7 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTW_RF_H_
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#define __RTW_RF_H_
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#include <rtw_cmd.h>
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#define OFDM_PHY 1
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#define MIXED_PHY 2
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#define CCK_PHY 3
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#define NumRates (13)
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/* slot time for 11g */
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#define SHORT_SLOT_TIME 9
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#define NON_SHORT_SLOT_TIME 20
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#define RTL8711_RF_MAX_SENS 6
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#define RTL8711_RF_DEF_SENS 4
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/* We now define the following channels as the max channels in each
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* channel plan. */
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/* 2G, total 14 chnls */
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/* {1,2,3,4,5,6,7,8,9,10,11,12,13,14} */
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#define MAX_CHANNEL_NUM_2G 14
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#define MAX_CHANNEL_NUM 14 /* 2.4 GHz only */
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#define NUM_REGULATORYS 1
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/* Country codes */
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#define USA 0x555320
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#define EUROPE 0x1 /* temp, should be provided later */
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#define JAPAN 0x2 /* temp, should be provided later */
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struct regulatory_class {
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u32 starting_freq; /* MHz, */
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u8 channel_set[MAX_CHANNEL_NUM];
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u8 channel_cck_power[MAX_CHANNEL_NUM]; /* dbm */
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u8 channel_ofdm_power[MAX_CHANNEL_NUM]; /* dbm */
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u8 txpower_limit; /* dbm */
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u8 channel_spacing; /* MHz */
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u8 modem;
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};
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enum capability {
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cESS = 0x0001,
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cIBSS = 0x0002,
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cPollable = 0x0004,
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cPollReq = 0x0008,
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cPrivacy = 0x0010,
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cShortPreamble = 0x0020,
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cPBCC = 0x0040,
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cChannelAgility = 0x0080,
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cSpectrumMgnt = 0x0100,
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cQos = 0x0200, /* For HCCA, use with CF-Pollable
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* and CF-PollReq */
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cShortSlotTime = 0x0400,
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cAPSD = 0x0800,
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cRM = 0x1000, /* RRM (Radio Request Measurement) */
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cDSSS_OFDM = 0x2000,
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cDelayedBA = 0x4000,
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cImmediateBA = 0x8000,
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};
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enum _REG_PREAMBLE_MODE {
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PREAMBLE_LONG = 1,
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PREAMBLE_AUTO = 2,
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PREAMBLE_SHORT = 3,
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};
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enum _RTL8712_RF_MIMO_CONFIG_ {
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RTL8712_RFCONFIG_1T = 0x10,
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RTL8712_RFCONFIG_2T = 0x20,
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RTL8712_RFCONFIG_1R = 0x01,
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RTL8712_RFCONFIG_2R = 0x02,
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RTL8712_RFCONFIG_1T1R = 0x11,
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RTL8712_RFCONFIG_1T2R = 0x12,
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RTL8712_RFCONFIG_TURBO = 0x92,
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RTL8712_RFCONFIG_2T2R = 0x22
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};
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enum rf90_radio_path {
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RF90_PATH_A = 0, /* Radio Path A */
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RF90_PATH_B = 1, /* Radio Path B */
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RF90_PATH_C = 2, /* Radio Path C */
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RF90_PATH_D = 3 /* Radio Path D */
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};
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/* Bandwidth Offset */
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#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
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#define HAL_PRIME_CHNL_OFFSET_LOWER 1
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#define HAL_PRIME_CHNL_OFFSET_UPPER 2
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/* Represent Channel Width in HT Capabilities */
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/* */
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enum ht_channel_width {
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HT_CHANNEL_WIDTH_20 = 0,
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HT_CHANNEL_WIDTH_40 = 1,
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HT_CHANNEL_WIDTH_80 = 2,
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HT_CHANNEL_WIDTH_160 = 3,
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HT_CHANNEL_WIDTH_10 = 4,
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};
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/* */
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/* Represent Extention Channel Offset in HT Capabilities */
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/* This is available only in 40Mhz mode. */
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/* */
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enum ht_extchnl_offset {
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HT_EXTCHNL_OFFSET_NO_EXT = 0,
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HT_EXTCHNL_OFFSET_UPPER = 1,
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HT_EXTCHNL_OFFSET_NO_DEF = 2,
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HT_EXTCHNL_OFFSET_LOWER = 3,
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};
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/* 2007/11/15 MH Define different RF type. */
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enum rt_rf_type_def {
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RF_1T2R = 0,
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RF_2T4R = 1,
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RF_2T2R = 2,
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RF_1T1R = 3,
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RF_2T2R_GREEN = 4,
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RF_819X_MAX_TYPE = 5,
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};
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u32 rtw_ch2freq(u32 ch);
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u32 rtw_freq2ch(u32 freq);
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#endif /* _RTL8711_RF_H_ */
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