mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-10 15:39:38 +00:00
0b5c6eb35b
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
527 lines
17 KiB
C
Executable file
527 lines
17 KiB
C
Executable file
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8188E_HAL_H__
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#define __RTL8188E_HAL_H__
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//include HAL Related header after HAL Related compiling flags
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#include "rtl8188e_spec.h"
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#include "Hal8188EPhyReg.h"
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#include "Hal8188EPhyCfg.h"
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#include "rtl8188e_rf.h"
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#include "rtl8188e_dm.h"
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#include "rtl8188e_recv.h"
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#include "rtl8188e_xmit.h"
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#include "rtl8188e_cmd.h"
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#include "Hal8188EPwrSeq.h"
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#ifdef DBG_CONFIG_ERROR_DETECT
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#include "rtl8188e_sreset.h"
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#endif
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#include "rtw_efuse.h"
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#include "../hal/odm_precomp.h"
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// Fw Array
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#define Rtl8188E_FwImageArray Rtl8188EFwImgArray
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#define Rtl8188E_FWImgArrayLength Rtl8188EFWImgArrayLength
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#define RTL8188E_FW_UMC_IMG "rtl8188E\\rtl8188efw.bin"
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#define RTL8188E_PHY_REG "rtl8188E\\PHY_REG_1T.txt"
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#define RTL8188E_PHY_RADIO_A "rtl8188E\\radio_a_1T.txt"
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#define RTL8188E_PHY_RADIO_B "rtl8188E\\radio_b_1T.txt"
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#define RTL8188E_AGC_TAB "rtl8188E\\AGC_TAB_1T.txt"
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#define RTL8188E_PHY_MACREG "rtl8188E\\MAC_REG.txt"
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#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
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#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
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//---------------------------------------------------------------------
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// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
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//---------------------------------------------------------------------
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#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow
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#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow
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#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow
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#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow
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#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow
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#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow
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#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow
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#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow
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#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow
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#define DRVINFO_SZ 4 // unit is 8bytes
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#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
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#if 1 // download firmware related data structure
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#define FW_8188E_SIZE 0x4000 //16384,16k
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#define FW_8188E_START_ADDRESS 0x1000
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#define FW_8188E_END_ADDRESS 0x1FFF //0x5FFF
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#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes
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#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
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(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
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(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 ||\
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(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0)
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typedef enum _FIRMWARE_SOURCE {
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FW_SOURCE_IMG_FILE = 0,
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FW_SOURCE_HEADER_FILE = 1, //from header file
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} FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
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typedef struct _RT_FIRMWARE {
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FIRMWARE_SOURCE eFWSource;
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#ifdef CONFIG_EMBEDDED_FWIMG
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u8* szFwBuffer;
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#else
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u8 szFwBuffer[FW_8188E_SIZE];
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#endif
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u32 ulFwLength;
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} RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E;
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//
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// This structure must be cared byte-ordering
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//
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typedef struct _RT_8188E_FIRMWARE_HDR
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{
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// 8-byte alinment required
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//--- LONG WORD 0 ----
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__le16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
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u8 Category; // AP/NIC and USB/PCI
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u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
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__le16 Version; // FW Version
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u8 Subversion; // FW Subversion, default 0x00
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u16 Rsvd1;
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//--- LONG WORD 1 ----
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u8 Month; // Release time Month field
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u8 Date; // Release time Date field
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u8 Hour; // Release time Hour field
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u8 Minute; // Release time Minute field
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__le16 RamCodeSize; // The size of RAM code
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u8 Foundry;
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u8 Rsvd2;
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//--- LONG WORD 2 ----
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__le32 SvnIdx; // The SVN entry index
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u32 Rsvd3;
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//--- LONG WORD 3 ----
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u32 Rsvd4;
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u32 Rsvd5;
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}RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR;
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#endif // download firmware related data structure
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#define DRIVER_EARLY_INT_TIME 0x05
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#define BCN_DMA_ATIME_INT_TIME 0x02
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typedef enum _USB_RX_AGG_MODE{
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USB_RX_AGG_DISABLE,
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USB_RX_AGG_DMA,
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USB_RX_AGG_USB,
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USB_RX_AGG_MIX
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}USB_RX_AGG_MODE;
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#define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 //9k for 88E nornal chip , //MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24))
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#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 // 1k
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// BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
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#define MAX_TX_QUEUE 9
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#define TX_SELE_HQ BIT(0) // High Queue
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#define TX_SELE_LQ BIT(1) // Low Queue
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#define TX_SELE_NQ BIT(2) // Normal Queue
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// Note: We will divide number of page equally for each queue other than public queue!
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// 22k = 22528 bytes = 176 pages (@page = 128 bytes)
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// must reserved about 7 pages for LPS => 176-7 = 169 (0xA9)
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// 2*BCN / 1*ps-poll / 1*null-data /1*prob_rsp /1*QOS null-data /1*BT QOS null-data
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#define TX_TOTAL_PAGE_NUMBER_88E 0xA9// 169 (21632=> 21k)
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#ifdef RTL8188ES_MAC_LOOPBACK
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#define TX_PAGE_BOUNDARY_88E 0x48 //72
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#else //TX_PAGE_BOUNDARY_LOOPBACK_MODE
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#define TX_PAGE_BOUNDARY_88E (TX_TOTAL_PAGE_NUMBER_88E + 1)
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#endif
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//Note: For Normal Chip Setting ,modify later
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#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER TX_TOTAL_PAGE_NUMBER_88E //0xA9 , 0xb0=>176=>22k
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#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER + 1) //0xA9
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//-------------------------------------------------------------------------
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// Chip specific
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//-------------------------------------------------------------------------
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#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
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#define CHIP_BONDING_92C_1T2R 0x1
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#define CHIP_BONDING_88C_USB_MCARD 0x2
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#define CHIP_BONDING_88C_USB_HP 0x1
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#include "HalVerDef.h"
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#include "hal_com.h"
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//-------------------------------------------------------------------------
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// Channel Plan
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//-------------------------------------------------------------------------
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enum ChannelPlan
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{
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CHPL_FCC = 0,
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CHPL_IC = 1,
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CHPL_ETSI = 2,
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CHPL_SPAIN = 3,
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CHPL_FRANCE = 4,
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CHPL_MKK = 5,
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CHPL_MKK1 = 6,
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CHPL_ISRAEL = 7,
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CHPL_TELEC = 8,
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CHPL_GLOBAL = 9,
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CHPL_WORLD = 10,
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};
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typedef struct _TxPowerInfo
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{
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u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX_88E];
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u8 TSSI_A[3];
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u8 TSSI_B[3];
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u8 TSSI_A_5G[3]; //5GL/5GM/5GH
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u8 TSSI_B_5G[3];
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} TxPowerInfo, *PTxPowerInfo;
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typedef struct _TxPowerInfo24G{
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u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
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u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
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//If only one tx, only BW20 and OFDM are used.
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s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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}TxPowerInfo24G, *PTxPowerInfo24G;
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#define EFUSE_REAL_CONTENT_LEN 512
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#define EFUSE_MAP_LEN 128
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#define EFUSE_MAX_SECTION 16
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#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
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#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN)
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//
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// <Roger_Notes>
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// To prevent out of boundary programming case,
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// leave 1byte and program full section
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// 9bytes + 1byt + 5bytes and pre 1byte.
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// For worst case:
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// | 1byte|----8bytes----|1byte|--5bytes--|
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// | | Reserved(14bytes) |
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//
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#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte.
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#define HWSET_MAX_SIZE_88E 512
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#define EFUSE_REAL_CONTENT_LEN_88E 256
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#define EFUSE_MAP_LEN_88E 512
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#define EFUSE_MAX_SECTION_88E 64
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#define EFUSE_MAX_WORD_UNIT_88E 4
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#define EFUSE_IC_ID_OFFSET_88E 506 //For some inferiority IC purpose. added by Roger, 2009.09.02.
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#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E)
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// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
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// 9bytes + 1byt + 5bytes and pre 1byte.
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// For worst case:
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// | 2byte|----8bytes----|1byte|--7bytes--| //92D
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#define EFUSE_OOB_PROTECT_BYTES_88E 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.
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#define EFUSE_PROTECT_BYTES_BANK_88E 16
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//========================================================
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// EFUSE for BT definition
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//========================================================
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#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3
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#define EFUSE_BT_MAP_LEN 1024 // 1k bytes
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#define EFUSE_BT_MAX_SECTION 128 // 1024/8
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#define EFUSE_PROTECT_BYTES_BANK 16
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//
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// <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06.
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//
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typedef enum _RT_MULTI_FUNC {
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RT_MULTI_FUNC_NONE = 0x00,
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RT_MULTI_FUNC_WIFI = 0x01,
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RT_MULTI_FUNC_BT = 0x02,
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RT_MULTI_FUNC_GPS = 0x04,
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} RT_MULTI_FUNC, *PRT_MULTI_FUNC;
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//
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// <Roger_Notes> For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08.
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//
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typedef enum _RT_POLARITY_CTL {
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RT_POLARITY_LOW_ACT = 0,
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RT_POLARITY_HIGH_ACT = 1,
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} RT_POLARITY_CTL, *PRT_POLARITY_CTL;
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// For RTL8723 regulator mode. by tynli. 2011.01.14.
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typedef enum _RT_REGULATOR_MODE {
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RT_SWITCHING_REGULATOR = 0,
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RT_LDO_REGULATOR = 1,
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} RT_REGULATOR_MODE, *PRT_REGULATOR_MODE;
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typedef struct hal_data_8188e
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{
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HAL_VERSION VersionID;
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RT_MULTI_FUNC MultiFunc; // For multi-function consideration.
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RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control.
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RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO
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u16 CustomerID;
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u16 FirmwareVersion;
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u16 FirmwareVersionRev;
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u16 FirmwareSubVersion;
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u16 FirmwareSignature;
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u8 PGMaxGroup;
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//current WIFI_PHY values
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u32 ReceiveConfig;
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WIRELESS_MODE CurrentWirelessMode;
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HT_CHANNEL_WIDTH CurrentChannelBW;
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u8 CurrentChannel;
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u8 nCur40MhzPrimeSC;// Control channel sub-carrier
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u16 BasicRateSet;
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//rf_ctrl
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u8 rf_chip;
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u8 rf_type;
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u8 NumTotalRFPath;
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u8 BoardType;
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//
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// EEPROM setting.
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//
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u16 EEPROMVID;
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u16 EEPROMPID;
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u16 EEPROMSVID;
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u16 EEPROMSDID;
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u8 EEPROMCustomerID;
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u8 EEPROMSubCustomerID;
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u8 EEPROMVersion;
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u8 EEPROMRegulatory;
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u8 bTXPowerDataReadFromEEPORM;
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u8 EEPROMThermalMeter;
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u8 bAPKThermalMeterIgnore;
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bool EepromOrEfuse;
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u8 EfuseMap[2][HWSET_MAX_SIZE_512]; //92C:256bytes, 88E:512bytes, we use union set (512bytes)
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u8 EfuseUsedPercentage;
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EFUSE_HAL EfuseHal;
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//u8 bIQKInitialized;
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u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
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u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
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//If only one tx, only BW20 and OFDM are used.
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s8 CCK_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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s8 OFDM_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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s8 BW20_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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s8 BW40_24G_Diff[MAX_RF_PATH][MAX_TX_COUNT];
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u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
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u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
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u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
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u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
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u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
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// For power group
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u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
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u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
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u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
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// The current Tx Power Level
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u8 CurrentCckTxPwrIdx;
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u8 CurrentOfdm24GTxPwrIdx;
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u8 CurrentBW2024GTxPwrIdx;
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u8 CurrentBW4024GTxPwrIdx;
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// Read/write are allow for following hardware information variables
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u8 framesync;
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u32 framesyncC34;
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u8 framesyncMonitor;
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u8 DefaultInitialGain[4];
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u8 pwrGroupCnt;
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u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
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u32 CCKTxPowerLevelOriginalOffset;
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u8 CrystalCap;
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u32 AntennaTxPath; // Antenna path Tx
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u32 AntennaRxPath; // Antenna path Rx
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u8 BluetoothCoexist;
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u8 ExternalPA;
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u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16.
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//u32 LedControlNum;
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//u32 LedControlMode;
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//u32 TxPowerTrackControl;
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u8 b1x1RecvCombine; // for 1T1R receive combining
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//u8 bCurrentTurboEDCA;
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u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
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BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
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u32 RfRegChnlVal[2];
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//RDG enable
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bool bRDGEnable;
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//for host message to fw
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u8 LastHMEBoxNum;
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u8 fw_ractrl;
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u8 RegTxPause;
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// Beacon function related global variable.
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u32 RegBcnCtrlVal;
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u8 RegFwHwTxQCtrl;
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u8 RegReg542;
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u8 RegCR_1;
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struct dm_priv dmpriv;
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DM_ODM_T odmpriv;
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//_lock odm_stainfo_lock;
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#ifdef DBG_CONFIG_ERROR_DETECT
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struct sreset_priv srestpriv;
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#endif
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#ifdef CONFIG_BT_COEXIST
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struct btcoexist_priv bt_coexist;
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#endif
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u8 CurAntenna;
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u8 AntDivCfg;
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u8 TRxAntDivType;
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u8 bDumpRxPkt;//for debug
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u8 bDumpTxPkt;//for debug
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u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
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// 2010/08/09 MH Add CU power down mode.
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bool pwrdown;
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// Add for dual MAC 0--Mac0 1--Mac1
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u32 interfaceIndex;
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u8 OutEpQueueSel;
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u8 OutEpNumber;
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// 2010/12/10 MH Add for USB aggreation mode dynamic shceme.
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bool UsbRxHighSpeedMode;
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// 2010/11/22 MH Add for slim combo debug mode selective.
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// This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock.
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bool SlimComboDbg;
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u16 EfuseUsedBytes;
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#ifdef CONFIG_P2P
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struct P2P_PS_Offload_t p2p_ps_offload;
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#endif
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// Auto FSM to Turn On, include clock, isolation, power control for MAC only
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u8 bMacPwrCtrlOn;
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u32 UsbBulkOutSize;
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// Interrupt relatd register information.
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u32 IntArray[3];//HISR0,HISR1,HSISR
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u32 IntrMask[3];
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u8 C2hArray[16];
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u8 UsbTxAggMode;
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u8 UsbTxAggDescNum;
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u16 HwRxPageSize; // Hardware setting
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u32 MaxUsbRxAggBlock;
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USB_RX_AGG_MODE UsbRxAggMode;
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u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
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u8 UsbRxAggBlockTimeout;
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u8 UsbRxAggPageCount; // 8192C DMA page count
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u8 UsbRxAggPageTimeout;
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} HAL_DATA_8188E, *PHAL_DATA_8188E;
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typedef struct hal_data_8188e HAL_DATA_TYPE, *PHAL_DATA_TYPE;
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#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData))
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#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
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#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT)
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#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
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// rtl8188e_hal_init.c
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s32 rtl8188e_FirmwareDownload(struct adapter *padapter);
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void _8051Reset88E(struct adapter *padapter);
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void rtl8188e_InitializeFirmwareVars(struct adapter *padapter);
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s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy);
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void Read_LLT_Tab(struct adapter *padapter);
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// EFuse
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u8 GetEEPROMSize8188E(struct adapter *padapter);
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void Hal_InitPGData88E(struct adapter *padapter);
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void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo);
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void Hal_ReadTxPowerInfo88E(struct adapter *padapter,u8* hwinfo,bool AutoLoadFail);
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void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
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void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
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void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo, bool AutoLoadFail);
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void Hal_ReadAntennaDiversity88E (struct adapter *pAdapter,u8*PROMContent,bool AutoLoadFail);
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void Hal_ReadThermalMeter_88E(struct adapter *Adapter,u8* PROMContent,bool AutoloadFail);
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void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter,u8* hwinfo,bool AutoLoadFail);
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void Hal_EfuseParseBoardType88E(struct adapter *pAdapter,u8* hwinfo,bool AutoLoadFail);
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void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter,u8* hwinfo,bool AutoLoadFail);
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bool HalDetectPwrDownMode88E(struct adapter *Adapter);
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void Hal_InitChannelPlan(struct adapter *padapter);
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void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
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// register
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void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
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void rtl8188e_start_thread(struct adapter *padapter);
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void rtl8188e_stop_thread(struct adapter *padapter);
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void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter,int data_len);
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s32 rtl8188e_iol_efuse_patch(struct adapter *padapter);
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#endif //__RTL8188E_HAL_H__
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