mirror of
https://github.com/lwfinger/rtl8188eu.git
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367 lines
6.6 KiB
C
367 lines
6.6 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __ODM_INTERFACE_H__
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#define __ODM_INTERFACE_H__
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#define INTERFACE_VERSION "1.1" /*2015.07.29 YuChen*/
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/*
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* =========== Constant/Structure/Enum/... Define
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* */
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/*
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* =========== Macro Define
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* */
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#define _reg_all(_name) ODM_##_name
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#define _reg_ic(_name, _ic) ODM_##_name##_ic
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#define _bit_all(_name) BIT_##_name
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#define _bit_ic(_name, _ic) BIT_##_name##_ic
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/* _cat: implemented by Token-Passing Operator. */
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/*===================================
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#define ODM_REG_DIG_11N 0xC50
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#define ODM_REG_DIG_11AC 0xDDD
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ODM_REG(DIG, _pdm_odm)
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=====================================*/
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#define _reg_11N(_name) ODM_REG_##_name##_11N
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#define _reg_11AC(_name) ODM_REG_##_name##_11AC
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#define _bit_11N(_name) ODM_BIT_##_name##_11N
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#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
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#ifdef __ECOS
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#define _rtk_cat(_name, _ic_type, _func) \
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(\
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((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
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_func##_11AC(_name) \
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)
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#else
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#define _cat(_name, _ic_type, _func) \
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(\
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((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
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_func##_11AC(_name) \
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)
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#endif
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/*
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* only sample code
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*#define _cat(_name, _ic_type, _func) \
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* ( \
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* ((_ic_type) & ODM_RTL8188E) ? _func##_ic(_name, _8188E) : \
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* _func##_ic(_name, _8195) \
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* )
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*/
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/* _name: name of register or bit.
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* Example: "ODM_REG(R_A_AGC_CORE1, p_dm_odm)"
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* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C", depends on support_ic_type. */
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#ifdef __ECOS
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#define ODM_REG(_name, _pdm_odm) _rtk_cat(_name, _pdm_odm->support_ic_type, _reg)
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#define ODM_BIT(_name, _pdm_odm) _rtk_cat(_name, _pdm_odm->support_ic_type, _bit)
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#else
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#define ODM_REG(_name, _pdm_odm) _cat(_name, _pdm_odm->support_ic_type, _reg)
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#define ODM_BIT(_name, _pdm_odm) _cat(_name, _pdm_odm->support_ic_type, _bit)
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#endif
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enum phydm_h2c_cmd {
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PHYDM_H2C_TXBF = 0x41,
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ODM_H2C_RSSI_REPORT = 0x42,
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ODM_H2C_IQ_CALIBRATION = 0x45,
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ODM_H2C_RA_PARA_ADJUST = 0x47,
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PHYDM_H2C_DYNAMIC_TX_PATH = 0x48,
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PHYDM_H2C_FW_TRACE_EN = 0x49,
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ODM_H2C_WIFI_CALIBRATION = 0x6d,
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PHYDM_H2C_MU = 0x4a,
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ODM_MAX_H2CCMD
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};
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enum phydm_c2h_evt {
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PHYDM_C2H_DBG = 0,
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PHYDM_C2H_LB = 1,
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PHYDM_C2H_XBF = 2,
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PHYDM_C2H_TX_REPORT = 3,
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PHYDM_C2H_INFO = 9,
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PHYDM_C2H_BT_MP = 11,
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PHYDM_C2H_RA_RPT = 12,
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PHYDM_C2H_RA_PARA_RPT = 14,
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PHYDM_C2H_DYNAMIC_TX_PATH_RPT = 15,
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PHYDM_C2H_IQK_FINISH = 17, /*0x11*/
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PHYDM_C2H_DBG_CODE = 0xFE,
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PHYDM_C2H_EXTEND = 0xFF,
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};
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enum phydm_extend_c2h_evt {
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PHYDM_EXTEND_C2H_DBG_PRINT = 0
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};
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/*
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* =========== Extern Variable ??? It should be forbidden.
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* */
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/*
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* =========== EXtern Function Prototype
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* */
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u8
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odm_read_1byte(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr
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);
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u16
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odm_read_2byte(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr
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);
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u32
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odm_read_4byte(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr
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);
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void
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odm_write_1byte(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u8 data
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);
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void
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odm_write_2byte(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u16 data
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);
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void
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odm_write_4byte(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u32 data
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);
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void
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odm_set_mac_reg(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u32 bit_mask,
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u32 data
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);
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u32
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odm_get_mac_reg(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u32 bit_mask
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);
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void
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odm_set_bb_reg(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u32 bit_mask,
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u32 data
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);
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u32
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odm_get_bb_reg(
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struct PHY_DM_STRUCT *p_dm_odm,
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u32 reg_addr,
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u32 bit_mask
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);
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void
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odm_set_rf_reg(
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struct PHY_DM_STRUCT *p_dm_odm,
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enum odm_rf_radio_path_e e_rf_path,
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u32 reg_addr,
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u32 bit_mask,
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u32 data
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);
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u32
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odm_get_rf_reg(
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struct PHY_DM_STRUCT *p_dm_odm,
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enum odm_rf_radio_path_e e_rf_path,
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u32 reg_addr,
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u32 bit_mask
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);
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/*
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* Memory Relative Function.
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* */
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void
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odm_allocate_memory(
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struct PHY_DM_STRUCT *p_dm_odm,
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void **p_ptr,
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u32 length
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);
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void
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odm_free_memory(
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struct PHY_DM_STRUCT *p_dm_odm,
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void *p_ptr,
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u32 length
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);
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void
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odm_move_memory(
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struct PHY_DM_STRUCT *p_dm_odm,
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void *p_dest,
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void *p_src,
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u32 length
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);
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s32 odm_compare_memory(
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struct PHY_DM_STRUCT *p_dm_odm,
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void *p_buf1,
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void *p_buf2,
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u32 length
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);
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void odm_memory_set
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(struct PHY_DM_STRUCT *p_dm_odm,
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void *pbuf,
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s8 value,
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u32 length);
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/*
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* ODM MISC-spin lock relative API.
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* */
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void
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odm_acquire_spin_lock(
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struct PHY_DM_STRUCT *p_dm_odm,
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enum rt_spinlock_type type
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);
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void
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odm_release_spin_lock(
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struct PHY_DM_STRUCT *p_dm_odm,
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enum rt_spinlock_type type
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);
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/*
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* ODM Timer relative API.
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* */
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void
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odm_stall_execution(
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u32 us_delay
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);
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void
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ODM_delay_ms(u32 ms);
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void
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ODM_delay_us(u32 us);
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void
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ODM_sleep_ms(u32 ms);
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void
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ODM_sleep_us(u32 us);
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void
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odm_set_timer(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct timer_list *p_timer,
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u32 ms_delay
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);
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void
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odm_initialize_timer(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct timer_list *p_timer,
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void *call_back_func,
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void *p_context,
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const char *sz_id
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);
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void
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odm_cancel_timer(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct timer_list *p_timer
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);
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void
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odm_release_timer(
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struct PHY_DM_STRUCT *p_dm_odm,
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struct timer_list *p_timer
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);
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/*
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* ODM FW relative API.
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* */
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void
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odm_fill_h2c_cmd(
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struct PHY_DM_STRUCT *p_dm_odm,
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u8 element_id,
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u32 cmd_len,
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u8 *p_cmd_buffer
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);
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u8
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phydm_c2H_content_parsing(
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void *p_dm_void,
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u8 c2h_cmd_id,
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u8 c2h_cmd_len,
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u8 *tmp_buf
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);
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u64
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odm_get_current_time(
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struct PHY_DM_STRUCT *p_dm_odm
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);
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u64
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odm_get_progressing_time(
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struct PHY_DM_STRUCT *p_dm_odm,
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u64 start_time
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);
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void
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phydm_set_hw_reg_handler_interface (
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struct PHY_DM_STRUCT *p_dm_odm,
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u8 reg_Name,
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u8 *val
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);
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void
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phydm_get_hal_def_var_handler_interface (
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struct PHY_DM_STRUCT *p_dm_odm,
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enum _HAL_DEF_VARIABLE e_variable,
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void *p_value
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);
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#endif /* __ODM_INTERFACE_H__ */
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