mirror of
https://github.com/lwfinger/rtl8188eu.git
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9c3c9ddc8c
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
327 lines
10 KiB
C
327 lines
10 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/* */
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/* Description: */
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/* */
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/* This file is for 92CE/92CU dynamic mechanism only */
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/* */
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/* */
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/* */
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#define _RTL8188E_DM_C_
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <rtl8188e_hal.h>
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static void dm_CheckProtection(struct adapter *Adapter)
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{
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}
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static void dm_CheckStatistics(struct adapter *Adapter)
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{
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}
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static void dm_CheckPbcGPIO(struct adapter *padapter)
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{
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u8 tmp1byte;
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u8 bPbcPressed = false;
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if (!padapter->registrypriv.hw_wps_pbc)
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return;
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
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tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
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tmp1byte = rtw_read8(padapter, GPIO_IN);
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if (tmp1byte == 0xff)
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return;
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if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)
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bPbcPressed = true;
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if (bPbcPressed) {
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/* Here we only set bPbcPressed to true */
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/* After trigger PBC, the variable will be set to false */
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DBG_88E("CheckPbcGPIO - PBC is pressed\n");
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if (padapter->pid[0] == 0) {
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/* 0 is the default value and it means the application
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* monitors the HW PBC doesn't privde its pid to driver. */
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return;
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}
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rtw_signal_process(padapter->pid[0], SIGUSR1);
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}
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}
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/* */
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/* Initialize GPIO setting registers */
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/* */
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static void dm_InitGPIOSetting(struct adapter *Adapter)
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{
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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u8 tmp1byte;
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tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
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tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
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#ifdef CONFIG_BT_COEXIST
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/* UMB-B cut bug. We need to support the modification. */
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if (IS_81xxC_VENDOR_UMC_B_CUT(hal_data->VersionID) &&
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hal_data->bt_coexist.BT_Coexist)
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tmp1byte |= BIT5;
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#endif
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rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
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}
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/* */
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/* functions */
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/* */
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static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
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{
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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struct dm_priv *pdmpriv = &hal_data->dmpriv;
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struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
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u8 cut_ver, fab_ver;
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/* Init Value */
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_rtw_memset(dm_odm, 0, sizeof(dm_odm));
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dm_odm->Adapter = Adapter;
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE);
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if (Adapter->interface_type == RTW_GSPI)
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
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else
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E);
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fab_ver = ODM_TSMC;
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cut_ver = ODM_CUT_A;
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_FAB_VER, fab_ver);
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_CUT_VER, cut_ver);
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PATCH_ID, hal_data->CustomerID);
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
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if (hal_data->rf_type == RF_1T1R)
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ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
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else if (hal_data->rf_type == RF_2T2R)
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ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
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else if (hal_data->rf_type == RF_1T2R)
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ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
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pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK;
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ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
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}
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static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
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{
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struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
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struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
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struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
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struct dm_priv *pdmpriv = &hal_data->dmpriv;
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int i;
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pdmpriv->InitODMFlag = ODM_BB_DIG |
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ODM_BB_RA_MASK |
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ODM_BB_DYNAMIC_TXPWR |
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ODM_BB_FA_CNT |
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ODM_BB_RSSI_MONITOR |
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ODM_BB_CCK_PD |
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ODM_BB_PWR_SAVE |
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ODM_MAC_EDCA_TURBO |
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ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK;
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if (hal_data->AntDivCfg)
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pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
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if (Adapter->registrypriv.mp_mode == 1) {
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pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK;
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}
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ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_TX_UNI, &(Adapter->xmitpriv.tx_bytes));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_RX_UNI, &(Adapter->recvpriv.rx_bytes));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(hal_data->nCur40MhzPrimeSC));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_MODE, &(Adapter->securitypriv.dot11PrivacyAlgrthm));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &(hal_data->CurrentChannelBW));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &(hal_data->CurrentChannel));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_NET_CLOSED, &(Adapter->net_closed));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_MP_MODE, &(Adapter->registrypriv.mp_mode));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
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ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &(pwrctrlpriv->bpower_saving));
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ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
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for (i = 0; i < NUM_STA; i++)
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ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i, NULL);
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}
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void rtl8188e_InitHalDm(struct adapter *Adapter)
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{
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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struct dm_priv *pdmpriv = &hal_data->dmpriv;
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struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
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u8 i;
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dm_InitGPIOSetting(Adapter);
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pdmpriv->DM_Type = DM_Type_ByDriver;
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pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
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Update_ODM_ComInfo_88E(Adapter);
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ODM_DMInit(dm_odm);
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Adapter->fix_rate = 0xFF;
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}
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void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
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{
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bool fw_cur_in_ps = false;
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bool fw_ps_awake = true;
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u8 hw_init_completed = false;
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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struct dm_priv *pdmpriv = &hal_data->dmpriv;
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struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
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_func_enter_;
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hw_init_completed = Adapter->hw_init_completed;
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if (!hw_init_completed)
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goto skip_dm;
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fw_cur_in_ps = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
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rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&fw_ps_awake));
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/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
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/* modifed by thomas. 2011.06.11. */
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if (Adapter->wdinfo.p2p_ps_mode)
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fw_ps_awake = false;
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if (hw_init_completed && ((!fw_cur_in_ps) && fw_ps_awake)) {
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/* Calculate Tx/Rx statistics. */
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dm_CheckStatistics(Adapter);
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_record_initrate:
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_func_exit_;
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}
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/* ODM */
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if (hw_init_completed) {
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struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
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u8 bLinked = false;
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if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
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(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) {
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if (Adapter->stapriv.asoc_sta_count > 2)
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bLinked = true;
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} else {/* Station mode */
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if (check_fwstate(pmlmepriv, _FW_LINKED))
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bLinked = true;
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}
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ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
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ODM_DMWatchdog(&hal_data->odmpriv);
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}
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skip_dm:
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/* Check GPIO to determine current RF on/off and Pbc status. */
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/* Check Hardware Radio ON/OFF or not */
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return;
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}
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void rtl8188e_init_dm_priv(struct adapter *Adapter)
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{
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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struct dm_priv *pdmpriv = &hal_data->dmpriv;
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struct odm_dm_struct *podmpriv = &hal_data->odmpriv;
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_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv));
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Init_ODM_ComInfo_88E(Adapter);
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ODM_InitDebugSetting(podmpriv);
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}
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void rtl8188e_deinit_dm_priv(struct adapter *Adapter)
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{
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}
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/* Add new function to reset the state of antenna diversity before link. */
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/* Compare RSSI for deciding antenna */
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void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src)
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{
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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if (0 != hal_data->AntDivCfg) {
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/* select optimum_antenna for before linked =>For antenna diversity */
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if (dst->Rssi >= src->Rssi) {/* keep org parameter */
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src->Rssi = dst->Rssi;
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src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
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}
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}
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}
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/* Add new function to reset the state of antenna diversity before link. */
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u8 AntDivBeforeLink8188E(struct adapter *Adapter)
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{
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struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
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struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
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struct sw_ant_switch *dm_swat_tbl = &dm_odm->DM_SWAT_Table;
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struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
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/* Condition that does not need to use antenna diversity. */
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if (hal_data->AntDivCfg == 0)
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return false;
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if (check_fwstate(pmlmepriv, _FW_LINKED))
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return false;
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if (dm_swat_tbl->SWAS_NoLink_State == 0) {
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/* switch channel */
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dm_swat_tbl->SWAS_NoLink_State = 1;
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dm_swat_tbl->CurAntenna = (dm_swat_tbl->CurAntenna == Antenna_A) ? Antenna_B : Antenna_A;
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rtw_antenna_select_cmd(Adapter, dm_swat_tbl->CurAntenna, false);
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return true;
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} else {
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dm_swat_tbl->SWAS_NoLink_State = 0;
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return false;
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}
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}
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