mirror of
https://github.com/lwfinger/rtl8188eu.git
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142 lines
3.8 KiB
C
142 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2007 - 2016 Realtek Corporation. All rights reserved. */
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#ifndef __ODM_TYPES_H__
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#define __ODM_TYPES_H__
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/*Define Different SW team support*/
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#define ODM_AP 0x01 /*BIT0*/
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#define ODM_CE 0x04 /*BIT2*/
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#define ODM_WIN 0x08 /*BIT3*/
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#define ODM_ADSL 0x10 /*BIT4*/
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#define ODM_IOT 0x20 /*BIT5*/
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/*Deifne HW endian support*/
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#define ODM_ENDIAN_BIG 0
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#define ODM_ENDIAN_LITTLE 1
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#define GET_PDM_ODM(__padapter) ((struct PHY_DM_STRUCT*)(&((GET_HAL_DATA(__padapter))->odmpriv)))
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#define RT_PCI_INTERFACE 1
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#define RT_USB_INTERFACE 2
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#define RT_SDIO_INTERFACE 3
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enum hal_status {
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HAL_STATUS_SUCCESS,
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HAL_STATUS_FAILURE,
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/*RT_STATUS_PENDING,
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RT_STATUS_RESOURCE,
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RT_STATUS_INVALID_CONTEXT,
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RT_STATUS_INVALID_PARAMETER,
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RT_STATUS_NOT_SUPPORT,
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RT_STATUS_OS_API_FAILED,*/
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};
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#define VISTA_USB_RX_REVISE 0
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/*
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* Declare for ODM spin lock defintion temporarily fro compile pass.
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* */
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enum rt_spinlock_type {
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RT_TX_SPINLOCK = 1,
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RT_RX_SPINLOCK = 2,
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RT_RM_SPINLOCK = 3,
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RT_CAM_SPINLOCK = 4,
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RT_SCAN_SPINLOCK = 5,
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RT_LOG_SPINLOCK = 7,
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RT_BW_SPINLOCK = 8,
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RT_CHNLOP_SPINLOCK = 9,
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RT_RF_OPERATE_SPINLOCK = 10,
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RT_INITIAL_SPINLOCK = 11,
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RT_RF_STATE_SPINLOCK = 12, /* For RF state. Added by Bruce, 2007-10-30. */
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#if VISTA_USB_RX_REVISE
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RT_USBRX_CONTEXT_SPINLOCK = 13,
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RT_USBRX_POSTPROC_SPINLOCK = 14, /* protect data of adapter->IndicateW/ IndicateR */
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#endif
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/* Shall we define Ndis 6.2 SpinLock Here ? */
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RT_PORT_SPINLOCK = 16,
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RT_VNIC_SPINLOCK = 17,
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RT_HVL_SPINLOCK = 18,
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RT_H2C_SPINLOCK = 20, /* For H2C cmd. Added by tynli. 2009.11.09. */
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rt_bt_data_spinlock = 25,
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RT_WAPI_OPTION_SPINLOCK = 26,
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RT_WAPI_RX_SPINLOCK = 27,
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/* add for 92D CCK control issue */
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RT_CCK_PAGEA_SPINLOCK = 28,
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RT_BUFFER_SPINLOCK = 29,
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RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
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RT_GEN_TEMP_BUF_SPINLOCK = 31,
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RT_AWB_SPINLOCK = 32,
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RT_FW_PS_SPINLOCK = 33,
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RT_HW_TIMER_SPIN_LOCK = 34,
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RT_MPT_WI_SPINLOCK = 35,
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RT_P2P_SPIN_LOCK = 36, /* Protect P2P context */
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RT_DBG_SPIN_LOCK = 37,
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RT_IQK_SPINLOCK = 38,
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RT_PENDED_OID_SPINLOCK = 39,
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RT_CHNLLIST_SPINLOCK = 40,
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RT_INDIC_SPINLOCK = 41, /* protect indication */
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RT_RFD_SPINLOCK = 42,
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RT_SYNC_IO_CNT_SPINLOCK = 43,
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RT_LAST_SPINLOCK,
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};
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#include <drv_types.h>
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#define DEV_BUS_TYPE RT_USB_INTERFACE
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#if defined(__LITTLE_ENDIAN)
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#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
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#elif defined (__BIG_ENDIAN)
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#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
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#endif
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#define SET_TX_DESC_ANTSEL_A_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+8, 24, 1, __value)
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#define SET_TX_DESC_ANTSEL_B_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+8, 25, 1, __value)
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#define SET_TX_DESC_ANTSEL_C_88E(__ptx_desc, __value) SET_BITS_TO_LE_4BYTE(__ptx_desc+28, 29, 1, __value)
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/* define useless flag to avoid compile warning */
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#define USE_WORKITEM 0
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#define FOR_BRAZIL_PRETEST 0
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#define FPGA_TWO_MAC_VERIFICATION 0
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#define RTL8881A_SUPPORT 0
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#if (defined(TESTCHIP_SUPPORT))
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#define PHYDM_TESTCHIP_SUPPORT 1
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#else
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#define PHYDM_TESTCHIP_SUPPORT 0
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#endif
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#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= array_len) break; i += 2; v1 = array[i]; v2 = array[i+1]; } while (0)
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#define COND_ELSE 2
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#define COND_ENDIF 3
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#define MASKBYTE0 0xff
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#define MASKBYTE1 0xff00
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#define MASKBYTE2 0xff0000
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#define MASKBYTE3 0xff000000
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#define MASKHWORD 0xffff0000
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#define MASKLWORD 0x0000ffff
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#define MASKDWORD 0xffffffff
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#define MASK7BITS 0x7f
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#define MASK12BITS 0xfff
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#define MASKH4BITS 0xf0000000
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#define MASK20BITS 0xfffff
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#define MASKOFDM_D 0xffc00000
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#define MASKCCK 0x3f3f3f3f
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#define RFREGOFFSETMASK 0xfffff
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#define MASKH3BYTES 0xffffff00
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#define MASKL3BYTES 0x00ffffff
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#define MASKBYTE2HIGHNIBBLE 0x00f00000
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#define MASKBYTE3LOWNIBBLE 0x0f000000
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#define MASKL3BYTES 0x00ffffff
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#define RFREGOFFSETMASK 0xfffff
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#include "phydm_features.h"
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#endif /* __ODM_TYPES_H__ */
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