mirror of
https://github.com/lwfinger/rtl8188eu.git
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183 lines
5.1 KiB
C
183 lines
5.1 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8192D_DM_H__
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#define __RTL8192D_DM_H__
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//============================================================
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// Description:
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//
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// This file is for 92CE/92CU dynamic mechanism only
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//
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//
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//============================================================
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enum{
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UP_LINK,
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DOWN_LINK,
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};
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/*------------------------Export global variable----------------------------*/
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/*------------------------Export global variable----------------------------*/
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/*------------------------Export Marco Definition---------------------------*/
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//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
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//============================================================
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// structure and define
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//============================================================
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//###### duplicate code,will move to ODM #########
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#define IQK_MAC_REG_NUM 4
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#define IQK_ADDA_REG_NUM 16
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#define IQK_BB_REG_NUM 10
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#define IQK_BB_REG_NUM_92C 9
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#define IQK_BB_REG_NUM_92D 10
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#define IQK_BB_REG_NUM_test 6
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#define index_mapping_NUM 13
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#define Rx_index_mapping_NUM 15
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#define AVG_THERMAL_NUM 8
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#define IQK_Matrix_REG_NUM 8
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#define IQK_Matrix_Settings_NUM 1+24+21
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//###### duplicate code,will move to ODM #########
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struct dm_priv
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{
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u8 DM_Type;
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u8 DMFlag;
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u8 InitDMFlag;
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u32 InitODMFlag;
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//* Upper and Lower Signal threshold for Rate Adaptive*/
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int UndecoratedSmoothedPWDB;
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int EntryMinUndecoratedSmoothedPWDB;
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int EntryMaxUndecoratedSmoothedPWDB;
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int MinUndecoratedPWDBForDM;
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int LastMinUndecoratedPWDBForDM;
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//###### duplicate code,will move to ODM #########
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/*
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//for DIG
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u8 bDMInitialGainEnable;
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//u8 binitialized; // for dm_initial_gain_Multi_STA use.
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DIG_T DM_DigTable;
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PS_T DM_PSTable;
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FALSE_ALARM_STATISTICS FalseAlmCnt;
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//for rate adaptive, in fact, 88c/92c fw will handle this
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u8 bUseRAMask;
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RATE_ADAPTIVE RateAdaptive;
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*/
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//for High Power
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u8 bDynamicTxPowerEnable;
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u8 LastDTPLvl;
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u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
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//for tx power tracking
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u8 bTXPowerTracking;
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u8 TXPowercount;
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u8 bTXPowerTrackingInit;
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u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
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u8 TM_Trigger;
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u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
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u8 ThermalValue;
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u8 ThermalValue_LCK;
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u8 ThermalValue_IQK;
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u8 ThermalValue_AVG[AVG_THERMAL_NUM];
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u8 ThermalValue_AVG_index;
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u8 ThermalValue_RxGain;
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u8 ThermalValue_Crystal;
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u8 Delta_IQK;
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u8 Delta_LCK;
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u8 bRfPiEnable;
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u8 bReloadtxpowerindex;
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u8 bDoneTxpower;
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//for APK
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u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a
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u8 bAPKdone;
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u8 bAPKThermalMeterIgnore;
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u32 RegA24;
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//for IQK
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u32 Reg874;
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u32 RegC08;
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u32 Reg88C;
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u8 Reg522;
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u8 Reg550;
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u8 Reg551;
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u32 Reg870;
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u32 ADDA_backup[IQK_ADDA_REG_NUM];
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u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
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u32 IQK_BB_backup[IQK_BB_REG_NUM];
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u8 bCCKinCH14;
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char CCK_index;
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//u8 Record_CCK_20Mindex;
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//u8 Record_CCK_40Mindex;
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char OFDM_index[2];
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BOOLEAN bDPKdone[2];
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u8 PowerIndex_backup[6];
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//for Antenna diversity
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//#ifdef CONFIG_ANTENNA_DIVERSITY
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//SWAT_T DM_SWAT_Table;
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//#endif
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//Neil Chen----2011--06--23-----
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//3 Path Diversity
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BOOLEAN bPathDiv_Enable; //For 92D Non-interrupt Antenna Diversity by Neil ,add by wl.2011.07.19
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BOOLEAN RSSI_test;
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s32 RSSI_sum_A;
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s32 RSSI_cnt_A;
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s32 RSSI_sum_B;
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s32 RSSI_cnt_B;
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struct sta_info *RSSI_target;
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_timer PathDivSwitchTimer;
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//for TxPwrTracking
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int RegE94;
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int RegE9C;
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int RegEB4;
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int RegEBC;
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#if MP_DRIVER == 1
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u8 RegC04_MP;
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u32 RegD04_MP;
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#endif
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u32 TXPowerTrackingCallbackCnt; //cosa add for debug
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u32 prv_traffic_idx; // edca turbo
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u32 RegRF3C[2]; //pathA / pathB
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//###### duplicate code,will move to ODM #########
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// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
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u8 INIDATA_RATE[32];
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};
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//============================================================
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// function prototype
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//============================================================
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void rtl8192d_init_dm_priv(IN PADAPTER Adapter);
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void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter);
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void rtl8192d_InitHalDm(IN PADAPTER Adapter);
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void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter);
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#endif //__HAL8190PCIDM_H__
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