2013-05-08 21:45:39 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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2013-05-19 04:28:07 +00:00
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*
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2013-05-08 21:45:39 +00:00
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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//***** temporarily flag *******
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//for FPGA VERIFICATION config
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2013-05-27 22:32:24 +00:00
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#define RTL8188E_FPGA_true_PHY_VERIFICATION 0
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2013-05-08 21:45:39 +00:00
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//***** temporarily flag *******
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/*
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* Public General Config
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*/
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#define AUTOCONF_INCLUDED
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#define RTL871X_MODULE_NAME "88EU"
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#define DRV_NAME "rtl8188eu"
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2013-05-19 04:28:07 +00:00
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#define CONFIG_RTL8188E
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2013-05-08 21:45:39 +00:00
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#ifdef CONFIG_IOCTL_CFG80211
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#define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER
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#define CONFIG_SET_SCAN_DENY_TIMER
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#endif
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/*
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* Internal General Config
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*/
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2013-05-19 04:28:07 +00:00
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#define CONFIG_EMBEDDED_FWIMG
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2013-05-08 21:45:39 +00:00
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2013-05-19 04:28:07 +00:00
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#define CONFIG_80211N_HT
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2013-05-08 21:45:39 +00:00
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2013-07-18 17:32:58 +00:00
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#define CONFIG_SUPPORT_USB_INT
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2013-05-08 21:45:39 +00:00
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2013-07-14 16:21:05 +00:00
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#define CONFIG_IPS
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#define SUPPORT_HW_RFOFF_DETECTED
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2013-05-08 21:45:39 +00:00
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2013-07-14 16:21:05 +00:00
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#define CONFIG_LPS
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2013-05-08 21:45:39 +00:00
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2013-07-14 16:21:05 +00:00
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#ifdef CONFIG_LPS_LCLK
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#define CONFIG_XMIT_THREAD_MODE
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#endif
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2013-05-08 21:45:39 +00:00
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2013-05-19 04:28:07 +00:00
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#define CONFIG_AP_MODE
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2013-05-08 21:45:39 +00:00
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#ifdef CONFIG_AP_MODE
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#ifdef CONFIG_INTERRUPT_BASED_TXBCN
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2013-07-13 03:22:57 +00:00
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#define CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
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2013-05-08 21:45:39 +00:00
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#endif
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2013-05-19 04:28:07 +00:00
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2013-05-08 21:45:39 +00:00
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#define CONFIG_NATIVEAP_MLME
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2013-05-19 04:28:07 +00:00
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#define CONFIG_FIND_BEST_CHANNEL
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2013-05-08 21:45:39 +00:00
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#endif
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2013-05-19 04:28:07 +00:00
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#define CONFIG_P2P
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2013-05-08 21:45:39 +00:00
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#ifdef CONFIG_P2P
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2013-05-19 04:28:07 +00:00
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2013-05-08 21:45:39 +00:00
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#ifndef CONFIG_WIFI_TEST
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#define CONFIG_P2P_REMOVE_GROUP_INFO
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#endif
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#define CONFIG_P2P_PS
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#endif
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#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */
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#define CONFIG_BR_EXT_BRNAME "br0"
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2013-05-19 04:28:07 +00:00
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/*
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* Interface Related Config
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2013-05-08 21:45:39 +00:00
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*/
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2013-05-19 04:28:07 +00:00
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#define CONFIG_PREALLOC_RECV_SKB
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2013-05-08 21:45:39 +00:00
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2013-05-19 04:28:07 +00:00
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/*
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2013-05-08 21:45:39 +00:00
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* USB VENDOR REQ BUFFER ALLOCATION METHOD
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* if not set we'll use function local variable (stack memory)
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*/
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#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC
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#define CONFIG_USB_VENDOR_REQ_MUTEX
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#define CONFIG_VENDOR_REQ_RETRY
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/*
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* HAL Related Config
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*/
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#define RTL8188E_RX_PACKET_INCLUDE_CRC 0
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#define SUPPORTED_BLOCK_IO
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//#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0
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#define CONFIG_OUT_EP_WIFI_MODE 0
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#define ENABLE_USB_DROP_INCORRECT_OUT 0
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2013-05-19 04:28:07 +00:00
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//#define RTL8192CU_ADHOC_WORKAROUND_SETTING
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2013-05-08 21:45:39 +00:00
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#define DISABLE_BB_RF 0
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//#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0
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#ifdef CONFIG_MP_INCLUDED
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#define MP_DRIVER 1
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#define CONFIG_MP_IWPRIV_SUPPORT
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2013-05-08 21:45:39 +00:00
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#else
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#define MP_DRIVER 0
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#endif
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/*
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* Platform Related Config
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*/
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/*
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* Outsource Related Config
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*/
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2013-05-19 04:28:07 +00:00
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#define RTL8192CE_SUPPORT 0
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#define RTL8192CU_SUPPORT 0
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#define RTL8192C_SUPPORT (RTL8192CE_SUPPORT|RTL8192CU_SUPPORT)
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2013-05-08 21:45:39 +00:00
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2013-05-19 04:28:07 +00:00
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#define RTL8192DE_SUPPORT 0
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#define RTL8192DU_SUPPORT 0
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#define RTL8192D_SUPPORT (RTL8192DE_SUPPORT|RTL8192DU_SUPPORT)
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2013-05-08 21:45:39 +00:00
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2013-05-19 04:28:07 +00:00
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#define RTL8723AU_SUPPORT 0
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#define RTL8723AS_SUPPORT 0
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#define RTL8723AE_SUPPORT 0
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#define RTL8723A_SUPPORT (RTL8723AU_SUPPORT|RTL8723AS_SUPPORT|RTL8723AE_SUPPORT)
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2013-05-08 21:45:39 +00:00
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2013-05-19 04:28:07 +00:00
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#define RTL8723_FPGA_VERIFICATION 0
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2013-05-08 21:45:39 +00:00
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#define RTL8188EE_SUPPORT 0
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#define RTL8188EU_SUPPORT 1
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#define RTL8188ES_SUPPORT 0
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#define RTL8188E_SUPPORT (RTL8188EE_SUPPORT|RTL8188EU_SUPPORT|RTL8188ES_SUPPORT)
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#define RTL8188E_FOR_TEST_CHIP 0
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//#if (RTL8188E_SUPPORT==1)
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2013-05-19 04:28:07 +00:00
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#define RATE_ADAPTIVE_SUPPORT 1
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2013-05-08 21:45:39 +00:00
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#define POWER_TRAINING_ACTIVE 1
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//#endif
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#ifdef CONFIG_TX_EARLY_MODE
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#define RTL8188E_EARLY_MODE_PKT_NUM_10 0
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#endif
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#define CONFIG_80211D
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/*
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* Debug Related Config
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*/
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#define DBG 1
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2013-05-25 23:35:42 +00:00
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//#define CONFIG_DEBUG /* DBG_88E, etc... */
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2013-05-08 21:45:39 +00:00
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//#define CONFIG_DEBUG_RTL871X /* RT_TRACE, RT_PRINT_DATA, _func_enter_, _func_exit_ */
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#define CONFIG_PROC_DEBUG
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#define DBG_CONFIG_ERROR_DETECT
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//#define DBG_CONFIG_ERROR_DETECT_INT
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//#define DBG_CONFIG_ERROR_RESET
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//#define DBG_IO
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//#define DBG_DELAY_OS
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//#define DBG_MEM_ALLOC
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//#define DBG_IOCTL
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//#define DBG_TX
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//#define DBG_XMIT_BUF
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//#define DBG_XMIT_BUF_EXT
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//#define DBG_TX_DROP_FRAME
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//#define DBG_RX_DROP_FRAME
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//#define DBG_RX_SEQ
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//#define DBG_RX_SIGNAL_DISPLAY_PROCESSING
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//#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap"
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//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE
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//#define DBG_ROAMING_TEST
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//#define DBG_HAL_INIT_PROFILING
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//TX use 1 urb
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//#define CONFIG_SINGLE_XMIT_BUF
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//RX use 1 urb
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//#define CONFIG_SINGLE_RECV_BUF
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