2013-05-08 21:45:39 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/*
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The purpose of rtw_io.c
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a. provides the API
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b. provides the protocol engine
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c. provides the software interface between caller and the hardware interface
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2014-12-11 21:15:04 +00:00
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2013-05-08 21:45:39 +00:00
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Compiler Flag Option:
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a. USE_ASYNC_IRP: Both sync/async operations are provided.
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Only sync read/rtw_write_mem operations are provided.
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jackson@realtek.com.tw
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*/
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#define _RTW_IO_C_
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2014-12-11 21:15:04 +00:00
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#include <drv_conf.h>
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2013-05-08 21:45:39 +00:00
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <rtw_io.h>
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#include <osdep_intf.h>
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2014-12-11 21:15:04 +00:00
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#include <usb_ops.h>
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2014-12-28 17:13:03 +00:00
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2014-12-17 23:13:53 +00:00
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u8 _rtw_read8(struct adapter *adapter, u32 addr)
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2013-05-08 21:45:39 +00:00
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{
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u8 r_val;
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2015-02-19 21:34:32 +00:00
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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2013-05-08 21:45:39 +00:00
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struct io_priv *pio_priv = &adapter->iopriv;
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2014-12-11 21:15:04 +00:00
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2013-05-08 21:45:39 +00:00
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u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
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_read8 = pintfhdl->io_ops._read8;
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2014-12-11 21:15:04 +00:00
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2013-05-08 21:45:39 +00:00
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r_val = _read8(pintfhdl, addr);
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return r_val;
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}
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2014-12-17 23:13:53 +00:00
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u16 _rtw_read16(struct adapter *adapter, u32 addr)
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2013-05-08 21:45:39 +00:00
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{
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2013-07-09 22:38:46 +00:00
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u16 r_val;
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2013-05-08 21:45:39 +00:00
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2014-12-19 06:59:46 +00:00
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u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
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2013-05-08 21:45:39 +00:00
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_read16 = pintfhdl->io_ops._read16;
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r_val = _read16(pintfhdl, addr);
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2015-01-28 05:14:58 +00:00
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return r_val;
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2013-05-08 21:45:39 +00:00
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}
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2014-12-17 23:13:53 +00:00
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u32 _rtw_read32(struct adapter *adapter, u32 addr)
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2013-05-08 21:45:39 +00:00
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{
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2013-07-09 22:38:46 +00:00
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u32 r_val;
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2013-05-08 21:45:39 +00:00
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2014-12-19 06:59:46 +00:00
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u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
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2013-05-08 21:45:39 +00:00
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_read32 = pintfhdl->io_ops._read32;
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r_val = _read32(pintfhdl, addr);
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2015-01-28 05:14:58 +00:00
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return r_val;
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2013-05-08 21:45:39 +00:00
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}
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2014-12-17 23:13:53 +00:00
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int _rtw_write8(struct adapter *adapter, u32 addr, u8 val)
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2013-05-08 21:45:39 +00:00
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{
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2015-02-19 21:34:32 +00:00
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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2013-05-08 21:45:39 +00:00
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
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int ret;
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_write8 = pintfhdl->io_ops._write8;
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ret = _write8(pintfhdl, addr, val);
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2014-12-19 06:59:46 +00:00
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2013-05-08 21:45:39 +00:00
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return RTW_STATUS_CODE(ret);
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}
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2015-01-27 02:52:43 +00:00
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2014-12-17 23:13:53 +00:00
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int _rtw_write16(struct adapter *adapter, u32 addr, u16 val)
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2013-05-08 21:45:39 +00:00
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{
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2013-07-09 22:38:46 +00:00
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int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
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2013-05-08 21:45:39 +00:00
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int ret;
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2015-01-27 02:52:43 +00:00
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2013-05-08 21:45:39 +00:00
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_write16 = pintfhdl->io_ops._write16;
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2013-07-09 22:38:46 +00:00
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ret = _write16(pintfhdl, addr, val);
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2013-05-08 21:45:39 +00:00
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return RTW_STATUS_CODE(ret);
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}
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2014-12-17 23:13:53 +00:00
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int _rtw_write32(struct adapter *adapter, u32 addr, u32 val)
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2013-05-08 21:45:39 +00:00
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{
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2015-02-19 21:34:32 +00:00
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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2013-05-08 21:45:39 +00:00
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2013-07-09 22:38:46 +00:00
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int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
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2013-05-08 21:45:39 +00:00
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int ret;
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_write32 = pintfhdl->io_ops._write32;
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2014-12-19 06:59:46 +00:00
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2014-12-11 21:15:04 +00:00
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ret = _write32(pintfhdl, addr, val);
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2013-05-08 21:45:39 +00:00
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return RTW_STATUS_CODE(ret);
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}
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2015-08-15 18:19:16 +00:00
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int _rtw_writeN(struct adapter *adapter, u32 addr , u32 length , u8 *pdata)
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2013-05-08 21:45:39 +00:00
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{
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2015-02-19 21:34:32 +00:00
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/* struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; */
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2013-05-08 21:45:39 +00:00
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struct io_priv *pio_priv = &adapter->iopriv;
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2014-12-11 21:15:04 +00:00
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struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf));
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2015-08-15 18:19:16 +00:00
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int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
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2013-05-08 21:45:39 +00:00
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int ret;
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_writeN = pintfhdl->io_ops._writeN;
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2015-08-15 18:19:16 +00:00
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ret = _writeN(pintfhdl, addr, length, pdata);
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2013-05-08 21:45:39 +00:00
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return RTW_STATUS_CODE(ret);
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}
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2015-01-27 02:52:43 +00:00
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2014-12-17 23:13:53 +00:00
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int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val)
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2013-05-08 21:45:39 +00:00
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{
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
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int ret;
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_write8_async = pintfhdl->io_ops._write8_async;
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ret = _write8_async(pintfhdl, addr, val);
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return RTW_STATUS_CODE(ret);
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}
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2015-01-27 02:52:43 +00:00
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2014-12-17 23:13:53 +00:00
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int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val)
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2013-05-08 21:45:39 +00:00
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{
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2013-07-09 22:38:46 +00:00
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int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
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2013-05-08 21:45:39 +00:00
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int ret;
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2015-01-27 02:52:43 +00:00
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2013-05-08 21:45:39 +00:00
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_write16_async = pintfhdl->io_ops._write16_async;
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2013-07-09 22:38:46 +00:00
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ret = _write16_async(pintfhdl, addr, val);
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2014-12-01 22:31:15 +00:00
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2013-05-08 21:45:39 +00:00
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return RTW_STATUS_CODE(ret);
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}
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2015-01-27 02:52:43 +00:00
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2014-12-17 23:13:53 +00:00
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int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val)
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2013-05-08 21:45:39 +00:00
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{
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2013-07-09 22:38:46 +00:00
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int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
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2013-05-08 21:45:39 +00:00
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int ret;
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2015-01-27 02:52:43 +00:00
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2013-05-08 21:45:39 +00:00
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_write32_async = pintfhdl->io_ops._write32_async;
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2013-07-09 22:38:46 +00:00
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ret = _write32_async(pintfhdl, addr, val);
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2014-12-01 22:31:15 +00:00
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2013-05-08 21:45:39 +00:00
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return RTW_STATUS_CODE(ret);
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}
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2014-12-17 23:13:53 +00:00
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void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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2013-05-08 21:45:39 +00:00
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{
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void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2014-12-11 21:15:04 +00:00
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2015-01-27 02:52:43 +00:00
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if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
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RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
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("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
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adapter->bDriverStopped, adapter->bSurpriseRemoved));
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2015-03-10 16:18:03 +00:00
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return;
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2013-05-08 21:45:39 +00:00
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}
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2014-12-11 21:15:04 +00:00
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2013-05-08 21:45:39 +00:00
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_read_mem = pintfhdl->io_ops._read_mem;
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2014-12-11 21:15:04 +00:00
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2013-05-08 21:45:39 +00:00
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_read_mem(pintfhdl, addr, cnt, pmem);
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}
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2014-12-17 23:13:53 +00:00
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void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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2013-05-08 21:45:39 +00:00
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{
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void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_write_mem = pintfhdl->io_ops._write_mem;
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_write_mem(pintfhdl, addr, cnt, pmem);
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}
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2014-12-17 23:13:53 +00:00
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void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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2013-05-08 21:45:39 +00:00
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{
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u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2015-08-15 18:02:34 +00:00
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if ( (adapter->bDriverStopped) || (adapter->bSurpriseRemoved)) {
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2015-01-27 02:52:43 +00:00
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RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
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("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
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adapter->bDriverStopped, adapter->bSurpriseRemoved));
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return;
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2013-05-08 21:45:39 +00:00
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}
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_read_port = pintfhdl->io_ops._read_port;
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_read_port(pintfhdl, addr, cnt, pmem);
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}
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2014-12-17 23:13:53 +00:00
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void _rtw_read_port_cancel(struct adapter *adapter)
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2013-05-08 21:45:39 +00:00
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{
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void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
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struct io_priv *pio_priv = &adapter->iopriv;
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
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2015-08-15 18:02:34 +00:00
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if (_read_port_cancel)
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2013-05-08 21:45:39 +00:00
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_read_port_cancel(pintfhdl);
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2014-12-11 21:15:04 +00:00
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2013-05-08 21:45:39 +00:00
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}
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2014-12-17 23:13:53 +00:00
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u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
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2013-05-08 21:45:39 +00:00
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{
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u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
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struct io_priv *pio_priv = &adapter->iopriv;
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2015-01-27 02:52:43 +00:00
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struct intf_hdl *pintfhdl = &(pio_priv->intf);
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2013-05-08 21:45:39 +00:00
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_write_port = pintfhdl->io_ops._write_port;
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2014-12-19 06:59:46 +00:00
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2015-01-27 02:52:43 +00:00
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return _write_port(pintfhdl, addr, cnt, pmem);
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2013-05-08 21:45:39 +00:00
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}
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2014-12-17 23:13:53 +00:00
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u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
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2013-05-08 21:45:39 +00:00
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{
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int ret = _SUCCESS;
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struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
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struct submit_ctx sctx;
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rtw_sctx_init(&sctx, timeout_ms);
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pxmitbuf->sctx = &sctx;
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ret = _rtw_write_port(adapter, addr, cnt, pmem);
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if (ret == _SUCCESS)
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ret = rtw_sctx_wait(&sctx);
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2015-03-10 16:18:03 +00:00
|
|
|
return ret;
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
void _rtw_write_port_cancel(struct adapter *adapter)
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
|
|
|
|
struct io_priv *pio_priv = &adapter->iopriv;
|
|
|
|
struct intf_hdl *pintfhdl = &(pio_priv->intf);
|
|
|
|
|
|
|
|
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
|
|
|
|
|
2015-08-15 18:02:34 +00:00
|
|
|
if (_write_port_cancel)
|
2013-05-08 21:45:39 +00:00
|
|
|
_write_port_cancel(pintfhdl);
|
2014-12-11 21:15:04 +00:00
|
|
|
|
2013-05-08 21:45:39 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
int rtw_init_io_priv(struct adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops))
|
2013-05-08 21:45:39 +00:00
|
|
|
{
|
|
|
|
struct io_priv *piopriv = &padapter->iopriv;
|
|
|
|
struct intf_hdl *pintf = &piopriv->intf;
|
|
|
|
|
|
|
|
if (set_intf_ops == NULL)
|
|
|
|
return _FAIL;
|
|
|
|
|
|
|
|
piopriv->padapter = padapter;
|
|
|
|
pintf->padapter = padapter;
|
|
|
|
pintf->pintf_dev = adapter_to_dvobj(padapter);
|
|
|
|
|
|
|
|
set_intf_ops(&pintf->io_ops);
|
|
|
|
|
|
|
|
return _SUCCESS;
|
|
|
|
}
|
2014-12-11 21:15:04 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR
|
2014-12-29 02:13:24 +00:00
|
|
|
* @return true:
|
|
|
|
* @return false:
|
2014-12-11 21:15:04 +00:00
|
|
|
*/
|
|
|
|
int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj)
|
|
|
|
{
|
2014-12-29 02:13:24 +00:00
|
|
|
int ret = false;
|
2014-12-11 21:15:04 +00:00
|
|
|
int value;
|
2015-08-15 18:19:16 +00:00
|
|
|
if ( (value =ATOMIC_INC_RETURN(&dvobj->continual_io_error)) > MAX_CONTINUAL_IO_ERR) {
|
2014-12-11 21:15:04 +00:00
|
|
|
DBG_871X("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR);
|
2014-12-29 02:13:24 +00:00
|
|
|
ret = true;
|
2014-12-11 21:15:04 +00:00
|
|
|
} else {
|
2015-02-19 21:34:32 +00:00
|
|
|
/* DBG_871X("[dvobj:%p] continual_io_error:%d\n", dvobj, value); */
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set the continual_io_error of this @param dvobjprive to 0
|
|
|
|
*/
|
|
|
|
void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
|
|
|
|
{
|
2014-12-19 06:59:46 +00:00
|
|
|
ATOMIC_SET(&dvobj->continual_io_error, 0);
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef DBG_IO
|
|
|
|
|
|
|
|
u16 read_sniff_ranges[][2] = {
|
2015-02-19 21:34:32 +00:00
|
|
|
/* 0x550, 0x551}, */
|
2014-12-19 06:59:46 +00:00
|
|
|
};
|
2014-12-11 21:15:04 +00:00
|
|
|
|
|
|
|
u16 write_sniff_ranges[][2] = {
|
2015-02-19 21:34:32 +00:00
|
|
|
/* 0x550, 0x551}, */
|
|
|
|
/* 0x4c, 0x4c}, */
|
2014-12-19 06:59:46 +00:00
|
|
|
};
|
2014-12-11 21:15:04 +00:00
|
|
|
|
|
|
|
int read_sniff_num = sizeof(read_sniff_ranges)/sizeof(u16)/2;
|
|
|
|
int write_sniff_num = sizeof(write_sniff_ranges)/sizeof(u16)/2;
|
|
|
|
|
|
|
|
bool match_read_sniff_ranges(u16 addr, u16 len)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 0; i<read_sniff_num; i++) {
|
|
|
|
if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
|
2014-12-29 02:13:24 +00:00
|
|
|
return true;
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
return false;
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool match_write_sniff_ranges(u16 addr, u16 len)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
for (i = 0; i<write_sniff_num; i++) {
|
|
|
|
if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
|
2014-12-29 02:13:24 +00:00
|
|
|
return true;
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-29 02:13:24 +00:00
|
|
|
return false;
|
2014-12-11 21:15:04 +00:00
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
u8 dbg_rtw_read8(struct adapter *adapter, u32 addr, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
u8 val = _rtw_read8(adapter, addr);
|
|
|
|
|
|
|
|
if (match_read_sniff_ranges(addr, 1))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
u16 dbg_rtw_read16(struct adapter *adapter, u32 addr, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
u16 val = _rtw_read16(adapter, addr);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
if (match_read_sniff_ranges(addr, 2))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
u32 dbg_rtw_read32(struct adapter *adapter, u32 addr, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
u32 val = _rtw_read32(adapter, addr);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
if (match_read_sniff_ranges(addr, 4))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
|
|
|
|
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2014-12-17 23:13:53 +00:00
|
|
|
int dbg_rtw_write8(struct adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
if (match_write_sniff_ranges(addr, 1))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
return _rtw_write8(adapter, addr, val);
|
|
|
|
}
|
2014-12-17 23:13:53 +00:00
|
|
|
int dbg_rtw_write16(struct adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
if (match_write_sniff_ranges(addr, 2))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
return _rtw_write16(adapter, addr, val);
|
|
|
|
}
|
2014-12-17 23:13:53 +00:00
|
|
|
int dbg_rtw_write32(struct adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
if (match_write_sniff_ranges(addr, 4))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
|
2014-12-19 06:59:46 +00:00
|
|
|
|
2014-12-11 21:15:04 +00:00
|
|
|
return _rtw_write32(adapter, addr, val);
|
|
|
|
}
|
2015-08-15 18:19:16 +00:00
|
|
|
int dbg_rtw_writeN(struct adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line)
|
2014-12-11 21:15:04 +00:00
|
|
|
{
|
|
|
|
if (match_write_sniff_ranges(addr, length))
|
|
|
|
DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
|
|
|
|
|
|
|
|
return _rtw_writeN(adapter, addr, length, data);
|
|
|
|
}
|
|
|
|
#endif
|