mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-26 06:23:38 +00:00
rtl8188eu: Remove code for chips other than RTL8188EU
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
3a518f1886
commit
007b33ebde
13 changed files with 11 additions and 1008 deletions
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@ -24,7 +24,6 @@
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#include <rtw_iol.h>
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#include <rtw_iol.h>
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#endif
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#endif
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#if (RTL8188E_SUPPORT == 1)
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static BOOLEAN
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static BOOLEAN
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CheckCondition(
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CheckCondition(
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const u4Byte Condition,
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const u4Byte Condition,
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@ -1441,7 +1440,3 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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}
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}
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}
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}
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#endif // end of HWIMG_SUPPORT
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@ -18,7 +18,6 @@
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*
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*
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******************************************************************************/
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******************************************************************************/
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#if (RTL8188E_SUPPORT == 1)
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#ifndef __INC_BB_8188E_HW_IMG_H
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#ifndef __INC_BB_8188E_HW_IMG_H
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#define __INC_BB_8188E_HW_IMG_H
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#define __INC_BB_8188E_HW_IMG_H
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@ -66,6 +65,4 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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IN PDM_ODM_T pDM_Odm
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IN PDM_ODM_T pDM_Odm
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);
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);
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#endif
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#endif // end of HWIMG_SUPPORT
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#endif // end of HWIMG_SUPPORT
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@ -22,7 +22,6 @@
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#ifdef CONFIG_IOL_IOREG_CFG
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#ifdef CONFIG_IOL_IOREG_CFG
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#include <rtw_iol.h>
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#include <rtw_iol.h>
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#endif
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#endif
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#if (RTL8188E_SUPPORT == 1)
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static BOOLEAN
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static BOOLEAN
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CheckCondition(
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CheckCondition(
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const u4Byte Condition,
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const u4Byte Condition,
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@ -497,5 +496,3 @@ ODM_ReadAndConfig_MAC_REG_ICUT_8188E(
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}
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}
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}
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}
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#endif // end of HWIMG_SUPPORT
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@ -18,7 +18,6 @@
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*
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*
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******************************************************************************/
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******************************************************************************/
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#if (RTL8188E_SUPPORT == 1)
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#ifndef __INC_MAC_8188E_HW_IMG_H
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#ifndef __INC_MAC_8188E_HW_IMG_H
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#define __INC_MAC_8188E_HW_IMG_H
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#define __INC_MAC_8188E_HW_IMG_H
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@ -43,5 +42,3 @@ ODM_ReadAndConfig_MAC_REG_ICUT_8188E( // TC: Test Chip, MP: MP Chip
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);
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);
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#endif
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#endif
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#endif // end of HWIMG_SUPPORT
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@ -24,7 +24,6 @@
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#include <rtw_iol.h>
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#include <rtw_iol.h>
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#endif
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#endif
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#if (RTL8188E_SUPPORT == 1)
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static BOOLEAN
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static BOOLEAN
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CheckCondition(
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CheckCondition(
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const u4Byte Condition,
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const u4Byte Condition,
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@ -563,6 +562,3 @@ ODM_ReadAndConfig_RadioA_1T_ICUT_8188E(
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}
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}
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}
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}
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#endif // end of HWIMG_SUPPORT
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@ -18,7 +18,6 @@
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*
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*
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******************************************************************************/
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******************************************************************************/
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#if (RTL8188E_SUPPORT == 1)
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#ifndef __INC_RF_8188E_HW_IMG_H
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#ifndef __INC_RF_8188E_HW_IMG_H
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#define __INC_RF_8188E_HW_IMG_H
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#define __INC_RF_8188E_HW_IMG_H
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@ -40,6 +39,5 @@ void
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ODM_ReadAndConfig_RadioA_1T_ICUT_8188E( // TC: Test Chip, MP: MP Chip
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ODM_ReadAndConfig_RadioA_1T_ICUT_8188E( // TC: Test Chip, MP: MP Chip
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IN PDM_ODM_T pDM_Odm
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IN PDM_ODM_T pDM_Odm
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);
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);
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#endif
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#endif // end of HWIMG_SUPPORT
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#endif
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@ -630,21 +630,7 @@ odm_Process_RSSIForDM(
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pDM_Odm->RxRate = pPktinfo->Rate;
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pDM_Odm->RxRate = pPktinfo->Rate;
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#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
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#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
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#if ((RTL8192C_SUPPORT == 1) ||(RTL8192D_SUPPORT == 1))
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if(pDM_Odm->SupportICType & ODM_RTL8192C|ODM_RTL8192D)
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{
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if(pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
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{
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//if(pPktinfo->bPacketBeacon)
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//{
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// DbgPrint("This is beacon, isCCKrate=%d\n", isCCKrate);
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//}
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ODM_AntselStatistics_88C(pDM_Odm, pPktinfo->StationID, pPhyInfo->RxPWDBAll, isCCKrate);
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}
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}
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#endif
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//-----------------Smart Antenna Debug Message------------------//
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//-----------------Smart Antenna Debug Message------------------//
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#if (RTL8188E_SUPPORT == 1)
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if(pDM_Odm->SupportICType == ODM_RTL8188E)
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if(pDM_Odm->SupportICType == ODM_RTL8188E)
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{
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{
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u1Byte antsel_tr_mux;
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u1Byte antsel_tr_mux;
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@ -679,7 +665,6 @@ odm_Process_RSSIForDM(
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}
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}
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}
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}
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#endif
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#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
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#endif //#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))
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//-----------------Smart Antenna Debug Message------------------//
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//-----------------Smart Antenna Debug Message------------------//
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@ -896,20 +881,6 @@ ODM_ConfigRFWithHeaderFile(
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
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#if (RTL8723A_SUPPORT == 1)
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if (pDM_Odm->SupportICType == ODM_RTL8723A)
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{
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if(eRFPath == ODM_RF_PATH_A)
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READ_AND_CONFIG_MP(8723A,_RadioA_1T_);
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8723RadioA_1TArray\n"));
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8723RadioB_1TArray\n"));
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}
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath));
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//rtStatus = RT_STATUS_SUCCESS;
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#endif
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#if (RTL8188E_SUPPORT == 1)
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if (pDM_Odm->SupportICType == ODM_RTL8188E)
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if (pDM_Odm->SupportICType == ODM_RTL8188E)
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{
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{
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if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter))
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if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter))
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@ -924,7 +895,6 @@ ODM_ConfigRFWithHeaderFile(
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath));
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ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", eRFPath));
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//rtStatus = RT_STATUS_SUCCESS;
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//rtStatus = RT_STATUS_SUCCESS;
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#endif
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return HAL_STATUS_SUCCESS;
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return HAL_STATUS_SUCCESS;
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}
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}
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@ -935,24 +905,6 @@ ODM_ConfigBBWithHeaderFile(
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IN ODM_BB_Config_Type ConfigType
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IN ODM_BB_Config_Type ConfigType
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)
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)
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{
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{
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#if (RTL8723A_SUPPORT == 1)
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if(pDM_Odm->SupportICType == ODM_RTL8723A)
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{
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if(ConfigType == CONFIG_BB_PHY_REG)
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{
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READ_AND_CONFIG_MP(8723A,_PHY_REG_1T_);
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}
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else if(ConfigType == CONFIG_BB_AGC_TAB)
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{
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READ_AND_CONFIG_MP(8723A,_AGC_TAB_1T_);
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}
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() phy:Rtl8723AGCTAB_1TArray\n"));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8723PHY_REG_1TArray\n"));
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}
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#endif
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#if (RTL8188E_SUPPORT == 1)
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if(pDM_Odm->SupportICType == ODM_RTL8188E)
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if(pDM_Odm->SupportICType == ODM_RTL8188E)
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{
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{
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@ -976,8 +928,6 @@ ODM_ConfigBBWithHeaderFile(
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
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}
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}
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}
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}
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#endif
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return HAL_STATUS_SUCCESS;
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return HAL_STATUS_SUCCESS;
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}
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}
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@ -987,13 +937,6 @@ ODM_ConfigMACWithHeaderFile(
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)
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)
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{
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{
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u1Byte result = HAL_STATUS_SUCCESS;
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u1Byte result = HAL_STATUS_SUCCESS;
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#if (RTL8723A_SUPPORT == 1)
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if (pDM_Odm->SupportICType == ODM_RTL8723A)
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{
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READ_AND_CONFIG_MP(8723A,_MAC_REG_);
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}
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#endif
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#if (RTL8188E_SUPPORT == 1)
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if (pDM_Odm->SupportICType == ODM_RTL8188E)
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if (pDM_Odm->SupportICType == ODM_RTL8188E)
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{
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{
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if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter))
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if(IS_VENDOR_8188E_I_CUT_SERIES(pDM_Odm->Adapter))
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@ -1001,7 +944,5 @@ ODM_ConfigMACWithHeaderFile(
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else
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else
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result =READ_AND_CONFIG(8188E,_MAC_REG_);
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result =READ_AND_CONFIG(8188E,_MAC_REG_);
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}
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}
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#endif
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return result;
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return result;
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}
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}
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#include "odm_precomp.h"
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#include "odm_precomp.h"
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#if (RTL8188E_SUPPORT == 1)
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void
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void
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ODM_DIG_LowerBound_88E(
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ODM_DIG_LowerBound_88E(
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IN PDM_ODM_T pDM_Odm
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IN PDM_ODM_T pDM_Odm
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@ -609,29 +607,5 @@ odm_DynamicPrimaryCCA(
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u1Byte SecCHOffset;
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u1Byte SecCHOffset;
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u1Byte i;
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u1Byte i;
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return;
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return;
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}
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}
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#else //#if (RTL8188E_SUPPORT == 1)
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void
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ODM_UpdateRxIdleAnt_88E(IN PDM_ODM_T pDM_Odm, IN u1Byte Ant)
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{
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}
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void
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odm_PrimaryCCA_Init(
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IN PDM_ODM_T pDM_Odm)
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{
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}
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void
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odm_DynamicPrimaryCCA(
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IN PDM_ODM_T pDM_Odm
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)
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{
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}
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BOOLEAN
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ODM_DynamicPrimaryCCA_DupRTS(
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IN PDM_ODM_T pDM_Odm
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)
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{
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return FALSE;
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}
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#endif //#if (RTL8188E_SUPPORT == 1)
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#include "odm_precomp.h"
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#include "odm_precomp.h"
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#if (RTL8188E_SUPPORT == 1)
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void
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void
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odm_ConfigRFReg_8188E(
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odm_ConfigRFReg_8188E(
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IN PDM_ODM_T pDM_Odm,
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IN PDM_ODM_T pDM_Odm,
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
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ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
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}
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}
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}
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}
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#endif
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#ifndef __INC_ODM_REGCONFIG_H_8188E
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#ifndef __INC_ODM_REGCONFIG_H_8188E
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#define __INC_ODM_REGCONFIG_H_8188E
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#define __INC_ODM_REGCONFIG_H_8188E
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#if (RTL8188E_SUPPORT == 1)
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void
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void
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odm_ConfigRFReg_8188E(
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odm_ConfigRFReg_8188E(
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IN PDM_ODM_T pDM_Odm,
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IN PDM_ODM_T pDM_Odm,
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@ -75,6 +73,6 @@ odm_ConfigBB_PHY_8188E(
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IN u4Byte Bitmask,
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IN u4Byte Bitmask,
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IN u4Byte Data
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IN u4Byte Data
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);
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);
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#endif
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#endif // end of SUPPORT
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#endif // end of SUPPORT
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//2 Hardware Parameter Files
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//2 Hardware Parameter Files
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#if(RTL8192CE_SUPPORT ==1)
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#include "Hal8188EFWImg_CE.h"
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#include "rtl8192c/Hal8192CEFWImg_CE.h"
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#include "rtl8192c/Hal8192CEPHYImg_CE.h"
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#include "rtl8192c/Hal8192CEMACImg_CE.h"
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#elif(RTL8192CU_SUPPORT ==1)
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#include "rtl8192c/Hal8192CUFWImg_CE.h"
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#include "rtl8192c/Hal8192CUPHYImg_CE.h"
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#include "rtl8192c/Hal8192CUMACImg_CE.h"
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#elif(RTL8192DE_SUPPORT ==1)
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#include "rtl8192d/Hal8192DEFWImg_CE.h"
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#include "rtl8192d/Hal8192DEPHYImg_CE.h"
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#include "rtl8192d/Hal8192DEMACImg_CE.h"
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#elif(RTL8192DU_SUPPORT ==1)
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#include "rtl8192d/Hal8192DUFWImg_CE.h"
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#include "rtl8192d/Hal8192DUPHYImg_CE.h"
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#include "rtl8192d/Hal8192DUMACImg_CE.h"
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#elif(RTL8723AS_SUPPORT==1)
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#include "rtl8723a/Hal8723SHWImg_CE.h"
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#elif(RTL8723AU_SUPPORT==1)
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#include "rtl8723a/Hal8723UHWImg_CE.h"
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#elif(RTL8188E_SUPPORT==1)
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#include "Hal8188EFWImg_CE.h"
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#endif
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//2 OutSrc Header Files
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//2 OutSrc Header Files
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#include "odm_RegDefine11AC.h"
|
#include "odm_RegDefine11AC.h"
|
||||||
#include "odm_RegDefine11N.h"
|
#include "odm_RegDefine11N.h"
|
||||||
|
|
||||||
#include "HalPhyRf.h"
|
#include "HalPhyRf.h"
|
||||||
#if (RTL8192C_SUPPORT==1)
|
#include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
|
||||||
#ifdef CONFIG_INTEL_PROXIM
|
#include "Hal8188ERateAdaptive.h"//for RA,Power training
|
||||||
#include "../proxim/intel_proxim.h"
|
#include "rtl8188e_hal.h"
|
||||||
#endif
|
|
||||||
#include "rtl8192c/HalDMOutSrc8192C_CE.h"
|
|
||||||
#include <rtl8192c_hal.h>
|
|
||||||
#elif (RTL8192D_SUPPORT==1)
|
|
||||||
#include "rtl8192d/HalDMOutSrc8192D_CE.h"
|
|
||||||
#include "rtl8192d_hal.h"
|
|
||||||
#elif (RTL8723A_SUPPORT==1)
|
|
||||||
#include "rtl8192c/HalDMOutSrc8192C_CE.h" //for IQK,LCK,Power-tracking
|
|
||||||
#include "rtl8723a_hal.h"
|
|
||||||
#elif (RTL8188E_SUPPORT==1)
|
|
||||||
#include "HalPhyRf_8188e.h"//for IQK,LCK,Power-tracking
|
|
||||||
#include "Hal8188ERateAdaptive.h"//for RA,Power training
|
|
||||||
#include "rtl8188e_hal.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#include "odm_interface.h"
|
#include "odm_interface.h"
|
||||||
#include "odm_reg.h"
|
#include "odm_reg.h"
|
||||||
|
@ -102,9 +66,7 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_WOWLAN
|
#ifdef CONFIG_WOWLAN
|
||||||
#if (RTL8188E_SUPPORT==1)
|
|
||||||
#include "HalHWImg8188E_FW.h"
|
#include "HalHWImg8188E_FW.h"
|
||||||
#endif
|
|
||||||
#endif //CONFIG_WOWLAN
|
#endif //CONFIG_WOWLAN
|
||||||
|
|
||||||
#include "odm_RegConfig8188E.h"
|
#include "odm_RegConfig8188E.h"
|
||||||
|
|
|
@ -147,9 +147,7 @@ sic_Read4Byte(
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
u32 u4ret=0xffffffff;
|
u32 u4ret=0xffffffff;
|
||||||
#if RTL8188E_SUPPORT == 1
|
|
||||||
u8 retry = 0;
|
u8 retry = 0;
|
||||||
#endif
|
|
||||||
|
|
||||||
//RTPRINT(FPHY, PHY_SICR, ("[SIC], sic_Read4Byte(): read offset(%#x)\n", offset));
|
//RTPRINT(FPHY, PHY_SICR, ("[SIC], sic_Read4Byte(): read offset(%#x)\n", offset));
|
||||||
|
|
||||||
|
@ -170,17 +168,11 @@ sic_Read4Byte(
|
||||||
//PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ);
|
//PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_READ);
|
||||||
//RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ));
|
//RTPRINT(FPHY, PHY_SICR, ("write cmdreg 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_READ));
|
||||||
|
|
||||||
#if RTL8188E_SUPPORT == 1
|
|
||||||
retry = 4;
|
retry = 4;
|
||||||
while(retry--){
|
while(retry--){
|
||||||
rtw_udelay_os(50);
|
rtw_udelay_os(50);
|
||||||
//PlatformStallExecution(50);
|
//PlatformStallExecution(50);
|
||||||
}
|
}
|
||||||
#else
|
|
||||||
rtw_udelay_os(200);
|
|
||||||
//PlatformStallExecution(200);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if(sic_IsSICReady(Adapter))
|
if(sic_IsSICReady(Adapter))
|
||||||
{
|
{
|
||||||
u4ret = rtw_read32(Adapter, SIC_DATA_REG);
|
u4ret = rtw_read32(Adapter, SIC_DATA_REG);
|
||||||
|
@ -200,40 +192,20 @@ sic_Write4Byte(
|
||||||
u32 data
|
u32 data
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
#if RTL8188E_SUPPORT == 1
|
|
||||||
u8 retry = 6;
|
u8 retry = 6;
|
||||||
#endif
|
|
||||||
//DbgPrint("=>Write 0x%x = 0x%x\n", offset, data);
|
|
||||||
//RTPRINT(FPHY, PHY_SICW, ("[SIC], sic_Write4Byte(): write offset(%#x)=0x%x\n", offset, data));
|
|
||||||
if(sic_IsSICReady(Adapter))
|
if(sic_IsSICReady(Adapter))
|
||||||
{
|
{
|
||||||
#if(SIC_HW_SUPPORT == 1)
|
#if(SIC_HW_SUPPORT == 1)
|
||||||
rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE);
|
rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE);
|
||||||
//PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_PREWRITE);
|
|
||||||
//RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_PREWRITE));
|
|
||||||
#endif
|
#endif
|
||||||
rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff));
|
rtw_write8(Adapter, SIC_ADDR_REG, (u8)(offset&0xff));
|
||||||
//PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG, (u1Byte)(offset&0xff));
|
|
||||||
//RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", SIC_ADDR_REG, (u1Byte)(offset&0xff)));
|
|
||||||
rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8));
|
rtw_write8(Adapter, SIC_ADDR_REG+1, (u8)((offset&0xff00)>>8));
|
||||||
//PlatformEFIOWrite1Byte(Adapter, SIC_ADDR_REG+1, (u1Byte)((offset&0xff00)>>8));
|
|
||||||
//RTPRINT(FPHY, PHY_SICW, ("write 0x%x=0x%x\n", (SIC_ADDR_REG+1), (u1Byte)((offset&0xff00)>>8)));
|
|
||||||
rtw_write32(Adapter, SIC_DATA_REG, (u32)data);
|
rtw_write32(Adapter, SIC_DATA_REG, (u32)data);
|
||||||
//PlatformEFIOWrite4Byte(Adapter, SIC_DATA_REG, (u4Byte)data);
|
|
||||||
//RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_DATA_REG, data));
|
|
||||||
rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE);
|
rtw_write8(Adapter, SIC_CMD_REG, SIC_CMD_WRITE);
|
||||||
//PlatformEFIOWrite1Byte(Adapter, SIC_CMD_REG, SIC_CMD_WRITE);
|
|
||||||
//RTPRINT(FPHY, PHY_SICW, ("write data 0x%x = 0x%x\n", SIC_CMD_REG, SIC_CMD_WRITE));
|
|
||||||
#if RTL8188E_SUPPORT == 1
|
|
||||||
while(retry--){
|
while(retry--){
|
||||||
rtw_udelay_os(50);
|
rtw_udelay_os(50);
|
||||||
//PlatformStallExecution(50);
|
|
||||||
}
|
}
|
||||||
#else
|
|
||||||
rtw_udelay_os(150);
|
|
||||||
//PlatformStallExecution(150);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
//============================================================
|
//============================================================
|
||||||
|
|
Loading…
Reference in a new issue