skyfall/rtl8188eu
1
0
Fork 0
mirror of https://github.com/lwfinger/rtl8188eu.git synced 2024-11-22 12:33:40 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

rtl8188eu: Remove remainder of code that depends on DM_ODM_SUPPORT_TYPE

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2014-12-30 13:48:00 -06:00
parent 78015aef77
commit 3a518f1886
12 changed files with 152 additions and 9400 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

184
hal/Hal8188ERateAdaptive.c
View file

@ -15,128 +15,88 @@ Major Change History:
--*/
#include "odm_precomp.h"
//#if( DM_ODM_SUPPORT_TYPE == ODM_MP)
//#include "Mp_Precomp.h"
//#endif
#if (RATE_ADAPTIVE_SUPPORT == 1)
// Rate adaptive parameters
static u1Byte RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {{5,4,3,2,0,3},//92 , idx=0
{6,5,4,3,0,4},//86 , idx=1
{6,5,4,2,0,4},//81 , idx=2
{8,7,6,4,0,6},//75 , idx=3
{10,9,8,6,0,8},//71 , idx=4
{10,9,8,4,0,8},//66 , idx=5
{10,9,8,2,0,8},//62 , idx=6
{10,9,8,0,0,8},//59 , idx=7
{18,17,16,8,0,16},//53 , idx=8
{26,25,24,16,0,24},//50 , idx=9
{34,33,32,24,0,32},//47 , idx=0x0a
//{34,33,32,16,0,32},//43 , idx=0x0b
//{34,33,32,8,0,32},//40 , idx=0x0c
//{34,33,28,8,0,32},//37 , idx=0x0d
//{34,33,20,8,0,32},//32 , idx=0x0e
//{34,32,24,8,0,32},//26 , idx=0x0f
//{49,48,32,16,0,48},//20 , idx=0x10
//{49,48,24,0,0,48},//17 , idx=0x11
//{49,47,16,16,0,48},//15 , idx=0x12
//{49,44,16,16,0,48},//12 , idx=0x13
//{49,40,16,0,0,48},//9 , idx=0x14
{34,31,28,20,0,32},//43 , idx=0x0b
{34,31,27,18,0,32},//40 , idx=0x0c
{34,31,26,16,0,32},//37 , idx=0x0d
{34,30,22,16,0,32},//32 , idx=0x0e
{34,30,24,16,0,32},//26 , idx=0x0f
{49,46,40,16,0,48},//20 , idx=0x10
{49,45,32,0,0,48},//17 , idx=0x11
{49,45,22,18,0,48},//15 , idx=0x12
{49,40,24,16,0,48},//12 , idx=0x13
{49,32,18,12,0,48},//9 , idx=0x14
{49,22,18,14,0,48},//6 , idx=0x15
{49,16,16,0,0,48}};//3 //3, idx=0x16
{6,5,4,3,0,4},//86 , idx=1
{6,5,4,2,0,4},//81 , idx=2
{8,7,6,4,0,6},//75 , idx=3
{10,9,8,6,0,8},//71 , idx=4
{10,9,8,4,0,8},//66 , idx=5
{10,9,8,2,0,8},//62 , idx=6
{10,9,8,0,0,8},//59 , idx=7
{18,17,16,8,0,16},//53 , idx=8
{26,25,24,16,0,24},//50 , idx=9
{34,33,32,24,0,32},//47 , idx=0x0a
{34,31,28,20,0,32},//43 , idx=0x0b
{34,31,27,18,0,32},//40 , idx=0x0c
{34,31,26,16,0,32},//37 , idx=0x0d
{34,30,22,16,0,32},//32 , idx=0x0e
{34,30,24,16,0,32},//26 , idx=0x0f
{49,46,40,16,0,48},//20 , idx=0x10
{49,45,32,0,0,48},//17 , idx=0x11
{49,45,22,18,0,48},//15 , idx=0x12
{49,40,24,16,0,48},//12 , idx=0x13
{49,32,18,12,0,48},//9 , idx=0x14
{49,22,18,14,0,48},//6 , idx=0x15
{49,16,16,0,0,48}};//3 //3, idx=0x16
static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48}; // 12% for rate up
static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32};
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH
4,4,4,4,6,0x0a,0x0b,0x0d,
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
{0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, // SS<TH
0x0e,0x0f,0x10,0x10,0x11,0x14,0x14,0x15,
9,9,9,9,0x0c,0x0e,0x11,0x13}};
static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x10,0x10,0x10,0x10,0x11,0x11,0x12,0x12,0x12,0x13,0x13,0x14, // SS>TH
0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15,
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
#else
// wilson modify
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH
4,4,4,4,6,0x0a,0x0b,0x0d,
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
{0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SS<TH
0x0b,0x0c,0x0d,0x0e,0x0f,0x11,0x13,0x15,
9,9,9,9,0x0c,0x0e,0x11,0x13}};
4,4,4,4,6,0x0a,0x0b,0x0d,
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
{0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SS<TH
0x0b,0x0c,0x0d,0x0e,0x0f,0x11,0x13,0x15,
9,9,9,9,0x0c,0x0e,0x11,0x13}};
static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x14, // SS>TH
0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15,
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15,
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
0,0,0,0,0,0x24,0x26,0x2a,
0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
#endif
/*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
0x1a,0x1c,0x1e,0x21,0x24,0x2a,0x2b,0x2d,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};*/
static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16,
24,36,48,72,96,144,192,216,
60,80,100,160,240,400,560,640,
300,320,480,720,1000,1200,1600,2000};
24,36,48,72,96,144,192,216,
60,80,100,160,240,400,560,640,
300,320,480,720,1000,1200,1600,2000};
static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
12,18,24,36,48,72,96,108,
30,40,50,80,120,200,280,320,
150,160,240,360,500,600,800,1000};
12,18,24,36,48,72,96,108,
30,40,50,80,120,200,280,320,
150,160,240,360,500,600,800,1000};
static u1Byte TRYING_NECESSARY[RATESIZE] = {2,2,2,2,
2,2,3,3,4,4,5,7,
4,4,7,10,10,12,12,18,
5,7,7,8,11,18,36,60}; // 0329 // 1207
2,2,3,3,4,4,5,7,
4,4,7,10,10,12,12,18,
5,7,7,8,11,18,36,60}; // 0329 // 1207
static u1Byte DROPING_NECESSARY[RATESIZE] = {1,1,1,1,
1,2,3,4,5,6,7,8,
1,2,3,4,5,6,7,8,
5,6,7,8,9,10,11,12};
1,2,3,4,5,6,7,8,
1,2,3,4,5,6,7,8,
5,6,7,8,9,10,11,12};
static u4Byte INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015, // 0: 40M BGN mode
0x0f8ff010, // 1: 40M GN mode
0x0f8ff005, // 2: BN mode/ 40M BGN mode
0x0f8ff000, // 3: N mode
0x00000ff5, // 4: BG mode
0x00000ff0, // 5: G mode
0x0000000d, // 6: B mode
0, // 7:
0, // 8:
0, // 9:
0, // 10:
0, // 11:
0, // 12:
0, // 13:
0, // 14:
0, // 15:
0x0f8ff010, // 1: 40M GN mode
0x0f8ff005, // 2: BN mode/ 40M BGN mode
0x0f8ff000, // 3: N mode
0x00000ff5, // 4: BG mode
0x00000ff0, // 5: G mode
0x0000000d, // 6: B mode
0, // 7:
0, // 8:
0, // 9:
0, // 10:
0, // 11:
0, // 12:
0, // 13:
0, // 14:
0, // 15:
};
static u1Byte PendingForRateUpFail[5]={2,10,24,40,60};
static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms-1200ms
@ -631,11 +591,7 @@ odm_RATxRPTTimerSetting(
if(pDM_Odm->CurrminRptTime != minRptTime){
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
(" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime));
#if(DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP))
ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime);
#else
rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime);
#endif
pDM_Odm->CurrminRptTime = minRptTime;
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n"));
@ -838,9 +794,6 @@ ODM_RA_Set_TxRPT_Time(
IN u2Byte minRptTime
)
{
#if(DM_ODM_SUPPORT_TYPE & (ODM_AP))
if (minRptTime != 0xffff)
#endif
ODM_Write2Byte(pDM_Odm, REG_TX_RPT_TIME, minRptTime);
}
@ -879,7 +832,6 @@ ODM_RA_TxRPT2Handle_8188E(
if(valid)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pRAInfo->RTY[0] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
pRAInfo->RTY[1] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
pRAInfo->RTY[2] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
@ -887,15 +839,6 @@ ODM_RA_TxRPT2Handle_8188E(
pRAInfo->RTY[4] = (u2Byte)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
pRAInfo->DROP = (u2Byte)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
pRAInfo->DROP1= (u2Byte)GET_TX_REPORT_TYPE1_DROP_1(pBuffer);
#else
pRAInfo->RTY[0] = (unsigned short)(pBuffer[1] << 8 | pBuffer[0]);
pRAInfo->RTY[1] = pBuffer[2];
pRAInfo->RTY[2] = pBuffer[3];
pRAInfo->RTY[3] = pBuffer[4];
pRAInfo->RTY[4] = pBuffer[5];
pRAInfo->DROP = pBuffer[6];
pRAInfo->DROP1= pBuffer[7];
#endif
pRAInfo->TOTAL = pRAInfo->RTY[0] + \
pRAInfo->RTY[1] + \
pRAInfo->RTY[2] + \
@ -941,15 +884,6 @@ ODM_RA_TxRPT2Handle_8188E(
odm_RateDecision_8188E(pDM_Odm, pRAInfo);
#endif
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
extern void RTL8188E_SetStationTxRateInfo(PDM_ODM_T, PODM_RA_INFO_T, int);
RTL8188E_SetStationTxRateInfo(pDM_Odm, pRAInfo, MacId);
#ifdef DETECT_STA_EXISTANCE
void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID);
RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId);
#endif
#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n",
MacId,

2
hal/Hal8188ERateAdaptive.h
View file

@ -21,7 +21,6 @@ Major Change History:
#define RATESIZE 28
#define TX_RPT2_ITEM_SIZE 8
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
//
// TX report 2 format in Rx desc
//
@ -36,7 +35,6 @@ Major Change History:
#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+1, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+2, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) LE_BITS_TO_1BYTE( __pAddr+4+3, 0, 8)
#endif
// End rate adaptive define

1476
hal/HalPhyRf.c
View file

File diff suppressed because it is too large Load diff

48
hal/HalPhyRf.h
View file

@ -18,53 +18,13 @@
*
******************************************************************************/
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#if(DM_ODM_SUPPORT_TYPE & ODM_MP)
#define MAX_TOLERANCE 5
#define IQK_DELAY_TIME 1 //ms
//
// BB/MAC/RF other monitor API
//
void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter,
IN BOOLEAN bEnableMonitorMode );
//
// IQ calibrate
//
void
PHY_IQCalibrate_8192C( IN PADAPTER pAdapter,
IN BOOLEAN bReCovery);
//
// LC calibrate
//
void
PHY_LCCalibrate_8192C( IN PADAPTER pAdapter);
//
// AP calibrate
//
void
PHY_APCalibrate_8192C( IN PADAPTER pAdapter,
IN s1Byte delta);
#endif
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void
ODM_ResetIQKResult(
IN PDM_ODM_T pDM_Odm
);
u1Byte
ODM_GetRightChnlPlaceforIQK(
IN u1Byte chnl
);
void ODM_ResetIQKResult(PDM_ODM_T pDM_Odm );
u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl);
#endif // #ifndef __HAL_PHY_RF_H__

774
hal/HalPhyRf_8188e.c
View file

File diff suppressed because it is too large Load diff

37
hal/HalPhyRf_8188e.h
View file

@ -44,11 +44,7 @@ ODM_TxPwrTrackAdjust88E(
void
odm_TXPowerTrackingCallback_ThermalMeter_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm
#else
IN struct adapter * Adapter
#endif
);
@ -56,12 +52,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
void
PHY_IQCalibrate_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN struct adapter * Adapter,
#endif
IN BOOLEAN bReCovery);
IN BOOLEAN bReCovery);
//
@ -69,11 +61,7 @@ PHY_IQCalibrate_8188E(
//
void
PHY_LCCalibrate_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm
#else
IN struct adapter * pAdapter
#endif
);
//
@ -81,23 +69,16 @@ PHY_LCCalibrate_8188E(
//
void
PHY_APCalibrate_8188E(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN struct adapter * pAdapter,
#endif
IN s1Byte delta);
IN s1Byte delta);
void
PHY_DigitalPredistortion_8188E( IN struct adapter * pAdapter);
void
_PHY_SaveADDARegisters(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN struct adapter * pAdapter,
#endif
IN pu4Byte ADDAReg,
IN pu4Byte ADDABackup,
IN u4Byte RegisterNum
@ -105,11 +86,7 @@ _PHY_SaveADDARegisters(
void
_PHY_PathADDAOn(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN struct adapter * pAdapter,
#endif
IN pu4Byte ADDAReg,
IN BOOLEAN isPathAOn,
IN BOOLEAN is2T
@ -117,11 +94,7 @@ _PHY_PathADDAOn(
void
_PHY_MACSettingCalibration(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm,
#else
IN struct adapter * pAdapter,
#endif
IN pu4Byte MACReg,
IN pu4Byte MACBackup
);
@ -129,11 +102,7 @@ _PHY_MACSettingCalibration(
void
_PHY_PathAStandBy(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm
#else
IN struct adapter * pAdapter
#endif
);

6758
hal/odm.c
View file

File diff suppressed because it is too large Load diff

158
hal/odm_HWConfig.c
View file

@ -71,52 +71,6 @@ odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
)
{
s4Byte RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
//if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
// Step 1. Scale mapping.
// 20100611 Joseph: Re-tunning RSSI presentation for Lenovo.
// 20100426 Joseph: Modify Signal strength mapping.
// This modification makes the RSSI indication similar to Intel solution.
// 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE.
if(CurrSig >= 54 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig>=42 && CurrSig <= 53 )
{
RetSig = 95;
}
else if(CurrSig>=36 && CurrSig <= 41 )
{
RetSig = 74 + ((CurrSig - 36) *20)/6;
}
else if(CurrSig>=33 && CurrSig <= 35 )
{
RetSig = 65 + ((CurrSig - 33) *8)/2;
}
else if(CurrSig>=18 && CurrSig <= 32 )
{
RetSig = 62 + ((CurrSig - 18) *2)/15;
}
else if(CurrSig>=15 && CurrSig <= 17 )
{
RetSig = 33 + ((CurrSig - 15) *28)/2;
}
else if(CurrSig>=10 && CurrSig <= 14 )
{
RetSig = 39;
}
else if(CurrSig>=8 && CurrSig <= 9 )
{
RetSig = 33;
}
else if(CurrSig <= 8 )
{
RetSig = 19;
}
}
#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP)
return RetSig;
}
@ -127,56 +81,6 @@ odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
)
{
s4Byte RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
//if(pDM_Odm->SupportInterface == ODM_ITRF_USB)
{
// Netcore request this modification because 2009.04.13 SU driver use it.
if(CurrSig >= 31 && CurrSig <= 100)
{
RetSig = 100;
}
else if(CurrSig >= 21 && CurrSig <= 30)
{
RetSig = 90 + ((CurrSig - 20) / 1);
}
else if(CurrSig >= 11 && CurrSig <= 20)
{
RetSig = 80 + ((CurrSig - 10) / 1);
}
else if(CurrSig >= 7 && CurrSig <= 10)
{
RetSig = 69 + (CurrSig - 7);
}
else if(CurrSig == 6)
{
RetSig = 54;
}
else if(CurrSig == 5)
{
RetSig = 45;
}
else if(CurrSig == 4)
{
RetSig = 36;
}
else if(CurrSig == 3)
{
RetSig = 27;
}
else if(CurrSig == 2)
{
RetSig = 18;
}
else if(CurrSig == 1)
{
RetSig = 9;
}
else
{
RetSig = CurrSig;
}
}
#endif //ENDIF (DM_ODM_SUPPORT_TYPE == ODM_MP)
return RetSig;
}
@ -308,39 +212,6 @@ static u1Byte odm_SQ_process_patch_RT_CID_819x_Lenovo(
)
{
u1Byte SQ;
#if (DM_ODM_SUPPORT_TYPE & ODM_MP)
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
if(isCCKrate){
// in vista.
if(PWDB_ALL >= 50)
SQ = 100;
else if(PWDB_ALL >= 35 && PWDB_ALL < 50)
SQ = 80;
else if(PWDB_ALL >= 22 && PWDB_ALL < 35)
SQ = 60;
else if(PWDB_ALL >= 18 && PWDB_ALL < 22)
SQ = 40;
else
SQ = 20;
}
else{//OFDM rate
// mapping to 5 bars for vista signal strength
// signal quality in driver will be displayed to signal strength
// in vista.
if(RSSI >= 50)
SQ = 100;
else if(RSSI >= 35 && RSSI < 50)
SQ = 80;
else if(RSSI >= 22 && RSSI < 35)
SQ = 60;
else if(RSSI >= 18 && RSSI < 22)
SQ = 40;
else
SQ = 20;
}
#endif
return SQ;
}
@ -554,10 +425,8 @@ odm_RxPhyStatus92CSeries_Parsing(
}
pPhyInfo->RxPWDBAll = PWDB_ALL;
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
pPhyInfo->RecvSignalPower = rx_pwr_all;
#endif
//
// (3) Get Signal Quality (EVM)
//
@ -607,9 +476,7 @@ odm_RxPhyStatus92CSeries_Parsing(
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain& 0x3F)*2) - 110;
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pPhyInfo->RxPwr[i] = rx_pwr[i];
#endif
/* Translate DBM to percentage. */
RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
@ -630,10 +497,8 @@ odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->RxMIMOSignalStrength[i] =(u1Byte) RSSI;
#if (DM_ODM_SUPPORT_TYPE & (/*ODM_MP|*/ODM_CE|ODM_AP|ODM_ADSL))
//Get Rx snr value in DB
pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);
#endif
/* Record Signal Strength for next packet */
if(pPktinfo->bPacketMatchBSSID)
@ -653,23 +518,17 @@ odm_RxPhyStatus92CSeries_Parsing(
// (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive)
//
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1 )& 0x7f) -110;
//RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n", PWDB_ALL));
PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
//RTPRINT(FRX, RX_PHY_SS, ("PWDB_ALL=%d\n",PWDB_ALL));
pPhyInfo->RxPWDBAll = PWDB_ALL;
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI=%d\n",pPhyInfo->RxPWDBAll));
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
pPhyInfo->RxPower = rx_pwr_all;
pPhyInfo->RecvSignalPower = rx_pwr_all;
#endif
if((pDM_Odm->SupportPlatform == ODM_MP) &&(pDM_Odm->PatchID==19)){
//do nothing
}
else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo
} else{//pMgntInfo->CustomerID != RT_CID_819x_Lenovo
//
// (3)EVM of HT rate
//
@ -678,8 +537,7 @@ odm_RxPhyStatus92CSeries_Parsing(
else
Max_spatial_stream = 1; //only spatial stream 1 makes sense
for(i=0; i<Max_spatial_stream; i++)
{
for(i=0; i<Max_spatial_stream; i++) {
// Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment
// fill most significant bit to "zero" when doing shifting operation which may change a negative
// value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore.
@ -700,31 +558,19 @@ odm_RxPhyStatus92CSeries_Parsing(
}
}
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_CE))
//UI BSS List signal strength(in percentage), make it good looking, from 0~100.
//It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp().
if(isCCKrate)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
// 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, PWDB_ALL));//PWDB_ALL;
#else
pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));//PWDB_ALL;
#endif
}
else
{
if (rf_rx_num != 0)
{
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
// 2012/01/12 MH Use customeris signal strength from HalComRxdDesc.c/
pPhyInfo->SignalStrength = (u1Byte)(SignalScaleMapping(pDM_Odm->Adapter, total_rssi/=rf_rx_num));//PWDB_ALL;
#else
pPhyInfo->SignalStrength = (u1Byte)(odm_SignalScaleMapping(pDM_Odm, total_rssi/=rf_rx_num));
#endif
}
}
#endif
//For 92C/92D HW (Hybrid) Antenna Diversity
#if(defined(CONFIG_HW_ANTENNA_DIVERSITY))

20
hal/odm_RegConfig8188E.c
View file

@ -139,28 +139,20 @@ odm_ConfigBB_PHY_REG_PG_8188E(
#else
ODM_delay_ms(50);
#endif
}
else if (Addr == 0xfd){
} else if (Addr == 0xfd){
ODM_delay_ms(5);
}
else if (Addr == 0xfc){
} else if (Addr == 0xfc){
ODM_delay_ms(1);
}
else if (Addr == 0xfb){
} else if (Addr == 0xfb){
ODM_delay_us(50);
}
else if (Addr == 0xfa){
} else if (Addr == 0xfa){
ODM_delay_us(5);
}
else if (Addr == 0xf9){
} else if (Addr == 0xf9){
ODM_delay_us(1);
}
else{
} else{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data));
#if !(DM_ODM_SUPPORT_TYPE&ODM_AP)
storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
#endif
}
}

8
hal/odm_debug.h
View file

@ -96,16 +96,8 @@
#define ODM_COMP_INIT BIT31
/*------------------------Export Marco Definition---------------------------*/
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
#define RT_PRINTK DbgPrint
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#define DbgPrint printk
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args);
#else
#define DbgPrint panic_printk
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args);
#endif
#ifndef ASSERT
#define ASSERT(expr)
#endif

85
hal/odm_precomp.h
View file

@ -23,82 +23,19 @@
#include "odm_types.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
#include "Precomp.h" // We need to include mp_precomp.h due to batch file setting.
#else
#define TEST_FALG___ 1
#endif
//2 Config Flags and Structs - defined by each ODM Type
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#include "../8192cd_cfg.h"
#include "../odm_inc.h"
#include "../8192cd.h"
#include "../8192cd_util.h"
#ifdef _BIG_ENDIAN_
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
#else
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
#ifdef AP_BUILD_WORKAROUND
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
// Flags
#include "../8192cd_cfg.h" // OUTSRC needs ADSL config flags.
#include "../odm_inc.h" // OUTSRC needs some extra flags.
// Data Structure
#include "../common_types.h" // OUTSRC and rtl8192cd both needs basic type such as UINT8 and BIT0.
#include "../8192cd.h" // OUTSRC needs basic ADSL struct definition.
#include "../8192cd_util.h" // OUTSRC needs basic I/O function.
#ifdef _BIG_ENDIAN_
#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
#else
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
#ifdef ADSL_AP_BUILD_WORKAROUND
// NESTED_INC: Functions defined outside should not be included!! Marked by Annie, 2011-10-14.
#include "../8192cd_headers.h"
#include "../8192cd_debug.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE ==ODM_CE)
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_byteorder.h>
#include <hal_intf.h>
#elif (DM_ODM_SUPPORT_TYPE == ODM_MP)
#include "Mp_Precomp.h"
#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
#endif
//2 Hardware Parameter Files
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
#include "rtl8192c/Hal8192CEFWImg_AP.h"
#include "rtl8192c/Hal8192CEPHYImg_AP.h"
#include "rtl8192c/Hal8192CEMACImg_AP.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
#include "rtl8192c/Hal8192CEFWImg_ADSL.h"
#include "rtl8192c/Hal8192CEPHYImg_ADSL.h"
#include "rtl8192c/Hal8192CEMACImg_ADSL.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#if(RTL8192CE_SUPPORT ==1)
#include "rtl8192c/Hal8192CEFWImg_CE.h"
#include "rtl8192c/Hal8192CEPHYImg_CE.h"
@ -122,10 +59,6 @@
#elif(RTL8188E_SUPPORT==1)
#include "Hal8188EFWImg_CE.h"
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_MP)
#endif
//2 OutSrc Header Files
@ -135,18 +68,6 @@
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
#if (RTL8192C_SUPPORT==1)
#include "rtl8192c/HalDMOutSrc8192C_AP.h"
#endif
#if (RTL8188E_SUPPORT==1)
#include "rtl8188e/Hal8188ERateAdaptive.h"//for RA,Power training
#endif
#elif (DM_ODM_SUPPORT_TYPE == ODM_ADSL)
#include "rtl8192c/HalDMOutSrc8192C_ADSL.h"
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#include "HalPhyRf.h"
#if (RTL8192C_SUPPORT==1)
#ifdef CONFIG_INTEL_PROXIM
@ -166,8 +87,6 @@
#include "rtl8188e_hal.h"
#endif
#endif
#include "odm_interface.h"
#include "odm_reg.h"
@ -176,10 +95,6 @@
#include "HalHWImg8188E_BB.h"
#include "Hal8188EReg.h"
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
#include "HalPhyRf_8188e.h"
#endif
#if (RTL8188E_FOR_TEST_CHIP >= 1)
#include "HalHWImg8188E_TestChip_MAC.h"
#include "HalHWImg8188E_TestChip_RF.h"

2
hal/odm_types.h
View file

@ -28,8 +28,6 @@
#define ODM_CE 0x04 //BIT2
#define ODM_MP 0x08 //BIT3
#define DM_ODM_SUPPORT_TYPE ODM_CE
// Deifne HW endian support
#define ODM_ENDIAN_BIG 0
#define ODM_ENDIAN_LITTLE 1