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rtl8188eu: Replace sNByte with appropriate s value

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2014-12-30 17:58:53 -06:00
parent c8a4d4ba06
commit 1038ee1874
15 changed files with 88 additions and 123 deletions
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4
core/rtw_security.c
View file

@ -294,7 +294,7 @@ _func_exit_;
//3 =====TKIP related===== //3 =====TKIP related=====
static u32 secmicgetuint32( u8 * p ) static u32 secmicgetuint32( u8 * p )
// Convert from Byte[] to Us4Byte32 in a portable way // Convert from Byte[] to Us3232 in a portable way
{ {
s32 i; s32 i;
u32 res = 0; u32 res = 0;
@ -308,7 +308,7 @@ _func_exit_;
} }
static void secmicputuint32( u8 * p, u32 val ) static void secmicputuint32( u8 * p, u32 val )
// Convert from Us4Byte32 to Byte[] in a portable way // Convert from Us3232 to Byte[] in a portable way
{ {
long i; long i;
_func_enter_; _func_enter_;

2
hal/Hal8188ERateAdaptive.c
View file

@ -379,7 +379,7 @@ odm_ARFBRefresh_8188E(
) )
{ // Wilson 2011/10/26 { // Wilson 2011/10/26
u32 MaskFromReg; u32 MaskFromReg;
s1Byte i; s8 i;
switch(pRaInfo->RateID){ switch(pRaInfo->RateID){
case RATR_INX_WIRELESS_NGB: case RATR_INX_WIRELESS_NGB:

42
hal/HalPhyRf_8188e.c
View file

@ -49,11 +49,11 @@ void setIqkMatrix(
PDM_ODM_T pDM_Odm, PDM_ODM_T pDM_Odm,
u8 OFDM_index, u8 OFDM_index,
u8 RFPath, u8 RFPath,
s4Byte IqkResult_X, s32 IqkResult_X,
s4Byte IqkResult_Y s32 IqkResult_Y
) )
{ {
s4Byte ele_A=0, ele_D, ele_C=0, TempCCk, value32; s32 ele_A=0, ele_D, ele_C=0, TempCCk, value32;
//printk("%s==> OFDM_index:%d \n",__FUNCTION__,OFDM_index); //printk("%s==> OFDM_index:%d \n",__FUNCTION__,OFDM_index);
@ -348,10 +348,10 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset;
u8 ThermalValue_AVG_count = 0; u8 ThermalValue_AVG_count = 0;
u32 ThermalValue_AVG = 0; u32 ThermalValue_AVG = 0;
s4Byte ele_A=0, ele_D, TempCCk, X, value32; s32 ele_A=0, ele_D, TempCCk, X, value32;
s4Byte Y, ele_C=0; s32 Y, ele_C=0;
s1Byte OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index; s8 OFDM_index[2], CCK_index=0, OFDM_index_old[2]={0,0}, CCK_index_old=0, index;
s1Byte deltaPowerIndex = 0; s8 deltaPowerIndex = 0;
u32 i = 0, j = 0; u32 i = 0, j = 0;
BOOLEAN is2T = FALSE; BOOLEAN is2T = FALSE;
BOOLEAN bInteralPA = FALSE; BOOLEAN bInteralPA = FALSE;
@ -363,7 +363,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
struct dm_priv *pdmpriv = &pHalData->dmpriv; struct dm_priv *pdmpriv = &pHalData->dmpriv;
//4 0.1 The following TWO tables decide the final index of OFDM/CCK swing table. //4 0.1 The following TWO tables decide the final index of OFDM/CCK swing table.
s1Byte deltaSwingTableIdx[2][index_mapping_NUM_88E] = { s8 deltaSwingTableIdx[2][index_mapping_NUM_88E] = {
// {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}} // {{Power decreasing(lower temperature)}, {Power increasing(higher temperature)}}
{0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,-1,-2,-3,-4,-4,-4,-4,-5,-7,-8,-9,-9,-10} {0,0,2,3,4,4,5,6,7,7,8,9,10,10,11}, {0,0,-1,-2,-3,-4,-4,-4,-4,-5,-7,-8,-9,-9,-10}
}; };
@ -812,13 +812,13 @@ void
_PHY_PathAFillIQKMatrix( _PHY_PathAFillIQKMatrix(
IN struct adapter *pAdapter, IN struct adapter *pAdapter,
IN BOOLEAN bIQKOK, IN BOOLEAN bIQKOK,
IN s4Byte result[][8], IN s32 result[][8],
IN u8 final_candidate, IN u8 final_candidate,
IN BOOLEAN bTxOnly IN BOOLEAN bTxOnly
) )
{ {
u32 Oldval_0, X, TX0_A, reg; u32 Oldval_0, X, TX0_A, reg;
s4Byte Y, TX0_C; s32 Y, TX0_C;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"));
@ -872,13 +872,13 @@ void
_PHY_PathBFillIQKMatrix( _PHY_PathBFillIQKMatrix(
IN struct adapter *pAdapter, IN struct adapter *pAdapter,
IN BOOLEAN bIQKOK, IN BOOLEAN bIQKOK,
IN s4Byte result[][8], IN s32 result[][8],
IN u8 final_candidate, IN u8 final_candidate,
IN BOOLEAN bTxOnly //do Tx only IN BOOLEAN bTxOnly //do Tx only
) )
{ {
u32 Oldval_1, X, TX1_A, reg; u32 Oldval_1, X, TX1_A, reg;
s4Byte Y, TX1_C; s32 Y, TX1_C;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"));
@ -1101,7 +1101,7 @@ _PHY_PIModeSwitch(
BOOLEAN BOOLEAN
phy_SimularityCompare_8188E( phy_SimularityCompare_8188E(
IN struct adapter *pAdapter, IN struct adapter *pAdapter,
IN s4Byte result[][8], IN s32 result[][8],
IN u8 c1, IN u8 c1,
IN u8 c2 IN u8 c2
) )
@ -1112,7 +1112,7 @@ phy_SimularityCompare_8188E(
u8 final_candidate[2] = {0xFF, 0xFF}; //for path A and path B u8 final_candidate[2] = {0xFF, 0xFF}; //for path A and path B
BOOLEAN bResult = TRUE; BOOLEAN bResult = TRUE;
BOOLEAN is2T; BOOLEAN is2T;
s4Byte tmp1 = 0,tmp2 = 0; s32 tmp1 = 0,tmp2 = 0;
if( (pDM_Odm->RFType ==ODM_2T2R )||(pDM_Odm->RFType ==ODM_2T3R )||(pDM_Odm->RFType ==ODM_2T4R )) if( (pDM_Odm->RFType ==ODM_2T2R )||(pDM_Odm->RFType ==ODM_2T3R )||(pDM_Odm->RFType ==ODM_2T4R ))
is2T = TRUE; is2T = TRUE;
@ -1225,7 +1225,7 @@ phy_SimularityCompare_8188E(
void void
phy_IQCalibrate_8188E( phy_IQCalibrate_8188E(
IN struct adapter *pAdapter, IN struct adapter *pAdapter,
IN s4Byte result[][8], IN s32 result[][8],
IN u8 t, IN u8 t,
IN BOOLEAN is2T IN BOOLEAN is2T
) )
@ -1488,7 +1488,7 @@ phy_LCCalibrate_8188E(
void void
phy_APCalibrate_8188E( phy_APCalibrate_8188E(
IN struct adapter *pAdapter, IN struct adapter *pAdapter,
IN s1Byte delta, IN s8 delta,
IN BOOLEAN is2T IN BOOLEAN is2T
) )
{ {
@ -1561,7 +1561,7 @@ phy_APCalibrate_8188E(
u32 APK_normal_value[PATH_NUM] = { u32 APK_normal_value[PATH_NUM] = {
0x92680000, 0x12680000}; 0x92680000, 0x12680000};
s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { s8 APK_delta_mapping[APK_BB_REG_NUM][13] = {
{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
{-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
@ -1585,7 +1585,7 @@ phy_APCalibrate_8188E(
u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a
// u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; // u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM];
s4Byte BB_offset, delta_V, delta_offset; s32 BB_offset, delta_V, delta_offset;
#if MP_DRIVER == 1 #if MP_DRIVER == 1
if ( *(pDM_Odm->mp_mode) == 1) if ( *(pDM_Odm->mp_mode) == 1)
@ -1940,11 +1940,11 @@ PHY_IQCalibrate_8188E(
PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx);
#endif//(MP_DRIVER == 1) #endif//(MP_DRIVER == 1)
s4Byte result[4][8]; //last is final result s32 result[4][8]; //last is final result
u8 i, final_candidate, Indexforchannel; u8 i, final_candidate, Indexforchannel;
u8 channelToIQK = 7; u8 channelToIQK = 7;
BOOLEAN bPathAOK, bPathBOK; BOOLEAN bPathAOK, bPathBOK;
s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; s32 RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0;
BOOLEAN is12simular, is13simular, is23simular; BOOLEAN is12simular, is13simular, is23simular;
BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE;
u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = { u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
@ -2179,7 +2179,7 @@ if (*(pDM_Odm->mp_mode) == 1)
void void
PHY_APCalibrate_8188E( PHY_APCalibrate_8188E(
IN struct adapter *pAdapter, IN struct adapter *pAdapter,
IN s1Byte delta IN s8 delta
) )
{ {
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);

2
hal/HalPhyRf_8188e.h
View file

@ -70,7 +70,7 @@ PHY_LCCalibrate_8188E(
void void
PHY_APCalibrate_8188E( PHY_APCalibrate_8188E(
IN struct adapter * pAdapter, IN struct adapter * pAdapter,
IN s1Byte delta); IN s8 delta);
void void
PHY_DigitalPredistortion_8188E( IN struct adapter * pAdapter); PHY_DigitalPredistortion_8188E( IN struct adapter * pAdapter);

8
hal/odm.c
View file

@ -1307,8 +1307,8 @@ odm_Adaptivity(
IN u8 IGI IN u8 IGI
) )
{ {
s1Byte TH_L2H_dmc, TH_H2L_dmc; s8 TH_L2H_dmc, TH_H2L_dmc;
s1Byte TH_L2H, TH_H2L, Diff, IGI_target; s8 TH_L2H, TH_H2L, Diff, IGI_target;
u32 value32; u32 value32;
BOOLEAN EDCCA_State = 0; BOOLEAN EDCCA_State = 0;
@ -1362,7 +1362,7 @@ odm_Adaptivity(
if(EDCCA_State == 1) if(EDCCA_State == 1)
{ {
Diff = IGI_target -(s1Byte)IGI; Diff = IGI_target -(s8)IGI;
TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff;
if(TH_L2H_dmc > 10) TH_L2H_dmc = 10; if(TH_L2H_dmc > 10) TH_L2H_dmc = 10;
TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff; TH_H2L_dmc = TH_L2H_dmc - pDM_Odm->TH_EDCCA_HL_diff;
@ -2894,7 +2894,7 @@ odm_RefreshRateAdaptiveMaskAPADSL(
BOOLEAN BOOLEAN
ODM_RAStateCheck( ODM_RAStateCheck(
IN PDM_ODM_T pDM_Odm, IN PDM_ODM_T pDM_Odm,
IN s4Byte RSSI, IN s32 RSSI,
IN BOOLEAN bForceUpdate, IN BOOLEAN bForceUpdate,
OUT u8 * pRATRState OUT u8 * pRATRState
) )

46
hal/odm.h
View file

@ -150,9 +150,9 @@ typedef struct _Dynamic_Initial_Gain_Threshold_
u8 BT30_CurIGI; u8 BT30_CurIGI;
u8 BackupIGValue; u8 BackupIGValue;
s1Byte BackoffVal; s8 BackoffVal;
s1Byte BackoffVal_range_max; s8 BackoffVal_range_max;
s1Byte BackoffVal_range_min; s8 BackoffVal_range_min;
u8 rx_gain_range_max; u8 rx_gain_range_max;
u8 rx_gain_range_min; u8 rx_gain_range_min;
u8 Rssi_val_min; u8 Rssi_val_min;
@ -249,7 +249,7 @@ typedef struct _RX_High_Power_
typedef struct _SW_Antenna_Switch_ typedef struct _SW_Antenna_Switch_
{ {
u8 try_flag; u8 try_flag;
s4Byte PreRSSI; s32 PreRSSI;
u8 CurAntenna; u8 CurAntenna;
u8 PreAntenna; u8 PreAntenna;
u8 RSSI_Trying; u8 RSSI_Trying;
@ -264,10 +264,10 @@ typedef struct _SW_Antenna_Switch_
BOOLEAN ANTA_ON; //To indicate Ant A is or not BOOLEAN ANTA_ON; //To indicate Ant A is or not
BOOLEAN ANTB_ON; //To indicate Ant B is on or not BOOLEAN ANTB_ON; //To indicate Ant B is on or not
s4Byte RSSI_sum_A; s32 RSSI_sum_A;
s4Byte RSSI_sum_B; s32 RSSI_sum_B;
s4Byte RSSI_cnt_A; s32 RSSI_cnt_A;
s4Byte RSSI_cnt_B; s32 RSSI_cnt_B;
u64 lastTxOkCnt; u64 lastTxOkCnt;
u64 lastRxOkCnt; u64 lastRxOkCnt;
@ -340,8 +340,8 @@ typedef struct _ODM_Phy_Status_Info_
u8 SignalQuality; // in 0-100 index. u8 SignalQuality; // in 0-100 index.
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; //EVM
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];// in 0~100 index
s1Byte RxPower; // in dBm Translate from PWdB s8 RxPower; // in dBm Translate from PWdB
s1Byte RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. s8 RecvSignalPower;// Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures.
u8 BTRxRSSIPercentage; u8 BTRxRSSIPercentage;
u8 SignalStrength; // in 0-100 index. u8 SignalStrength; // in 0-100 index.
u8 RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb u8 RxPwr[MAX_PATH_NUM_92CS];//per-path's pwdb
@ -352,13 +352,13 @@ typedef struct _ODM_Phy_Status_Info_
typedef struct _ODM_Phy_Dbg_Info_ typedef struct _ODM_Phy_Dbg_Info_
{ {
//ODM Write,debug info //ODM Write,debug info
s1Byte RxSNRdB[MAX_PATH_NUM_92CS]; s8 RxSNRdB[MAX_PATH_NUM_92CS];
u64 NumQryPhyStatus; u64 NumQryPhyStatus;
u64 NumQryPhyStatusCCK; u64 NumQryPhyStatusCCK;
u64 NumQryPhyStatusOFDM; u64 NumQryPhyStatusOFDM;
u8 NumQryBeaconPkt; u8 NumQryBeaconPkt;
//Others //Others
s4Byte RxEVM[MAX_PATH_NUM_92CS]; s32 RxEVM[MAX_PATH_NUM_92CS];
}ODM_PHY_DBG_INFO_T; }ODM_PHY_DBG_INFO_T;
@ -793,7 +793,7 @@ typedef struct _ODM_RA_Info_
typedef struct _IQK_MATRIX_REGS_SETTING{ typedef struct _IQK_MATRIX_REGS_SETTING{
BOOLEAN bIQKDone; BOOLEAN bIQKDone;
s4Byte Value[1][IQK_Matrix_REG_NUM]; s32 Value[1][IQK_Matrix_REG_NUM];
}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; }IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
typedef struct ODM_RF_Calibration_Structure typedef struct ODM_RF_Calibration_Structure
@ -801,10 +801,10 @@ typedef struct ODM_RF_Calibration_Structure
//for tx power tracking //for tx power tracking
u32 RegA24; // for TempCCK u32 RegA24; // for TempCCK
s4Byte RegE94; s32 RegE94;
s4Byte RegE9C; s32 RegE9C;
s4Byte RegEB4; s32 RegEB4;
s4Byte RegEBC; s32 RegEBC;
//u8 bTXPowerTracking; //u8 bTXPowerTracking;
u8 TXPowercount; u8 TXPowercount;
@ -836,9 +836,9 @@ typedef struct ODM_RF_Calibration_Structure
u8 CCK_index; u8 CCK_index;
u8 OFDM_index[2]; u8 OFDM_index[2];
BOOLEAN bDoneTxpower; BOOLEAN bDoneTxpower;
s1Byte PowerIndexOffset; s8 PowerIndexOffset;
s1Byte DeltaPowerIndex; s8 DeltaPowerIndex;
s1Byte DeltaPowerIndexLast; s8 DeltaPowerIndexLast;
BOOLEAN bTxPowerChanged; BOOLEAN bTxPowerChanged;
u8 ThermalValue_HP[HP_THERMAL_NUM]; u8 ThermalValue_HP[HP_THERMAL_NUM];
@ -1086,8 +1086,8 @@ typedef struct DM_Out_Source_Dynamic_Mechanism_Structure
BOOLEAN IsBbSwingOffsetPositiveA; BOOLEAN IsBbSwingOffsetPositiveA;
u32 BbSwingOffsetB; u32 BbSwingOffsetB;
BOOLEAN IsBbSwingOffsetPositiveB; BOOLEAN IsBbSwingOffsetPositiveB;
s1Byte TH_L2H_ini; s8 TH_L2H_ini;
s1Byte TH_EDCCA_HL_diff; s8 TH_EDCCA_HL_diff;
u32 IGI_Base; u32 IGI_Base;
u32 IGI_target; u32 IGI_target;
BOOLEAN ForceEDCCA; BOOLEAN ForceEDCCA;
@ -1456,7 +1456,7 @@ ODM_TXPowerTrackingCheck(
BOOLEAN BOOLEAN
ODM_RAStateCheck( ODM_RAStateCheck(
PDM_ODM_T pDM_Odm, PDM_ODM_T pDM_Odm,
s4Byte RSSI, s32 RSSI,
BOOLEAN bForceUpdate, BOOLEAN bForceUpdate,
OUT u8 * pRATRState OUT u8 * pRATRState
); );

34
hal/odm_HWConfig.c
View file

@ -42,7 +42,7 @@
u8 u8
odm_QueryRxPwrPercentage( odm_QueryRxPwrPercentage(
IN s1Byte AntPower IN s8 AntPower
) )
{ {
if ((AntPower <= -100) || (AntPower >= 20)) if ((AntPower <= -100) || (AntPower >= 20))
@ -64,34 +64,34 @@ odm_QueryRxPwrPercentage(
// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. // 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
// IF other SW team do not support the feature, remove this section.?? // IF other SW team do not support the feature, remove this section.??
// //
s4Byte s32
odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo( odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
IN OUT PDM_ODM_T pDM_Odm, IN OUT PDM_ODM_T pDM_Odm,
s4Byte CurrSig s32 CurrSig
) )
{ {
s4Byte RetSig; s32 RetSig;
return RetSig; return RetSig;
} }
s4Byte s32
odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore( odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
IN OUT PDM_ODM_T pDM_Odm, IN OUT PDM_ODM_T pDM_Odm,
s4Byte CurrSig s32 CurrSig
) )
{ {
s4Byte RetSig; s32 RetSig;
return RetSig; return RetSig;
} }
s4Byte s32
odm_SignalScaleMapping_92CSeries( odm_SignalScaleMapping_92CSeries(
IN OUT PDM_ODM_T pDM_Odm, IN OUT PDM_ODM_T pDM_Odm,
IN s4Byte CurrSig IN s32 CurrSig
) )
{ {
s4Byte RetSig; s32 RetSig;
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE) if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{ {
@ -178,10 +178,10 @@ odm_SignalScaleMapping_92CSeries(
#endif #endif
return RetSig; return RetSig;
} }
s4Byte s32
odm_SignalScaleMapping( odm_SignalScaleMapping(
IN OUT PDM_ODM_T pDM_Odm, IN OUT PDM_ODM_T pDM_Odm,
IN s4Byte CurrSig IN s32 CurrSig
) )
{ {
if( (pDM_Odm->SupportPlatform == ODM_MP) && if( (pDM_Odm->SupportPlatform == ODM_MP) &&
@ -217,13 +217,13 @@ static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(
static u8 static u8
odm_EVMdbToPercentage( odm_EVMdbToPercentage(
IN s1Byte Value IN s8 Value
) )
{ {
// //
// -33dB~0dB to 0%~99% // -33dB~0dB to 0%~99%
// //
s1Byte ret_val; s8 ret_val;
ret_val = Value; ret_val = Value;
//ret_val /= 2; //ret_val /= 2;
@ -256,7 +256,7 @@ odm_RxPhyStatus92CSeries_Parsing(
{ {
SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
u8 i, Max_spatial_stream; u8 i, Max_spatial_stream;
s1Byte rx_pwr[4], rx_pwr_all=0; s8 rx_pwr[4], rx_pwr_all=0;
u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT; u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
u8 RSSI, total_rssi=0; u8 RSSI, total_rssi=0;
u8 isCCKrate=0; u8 isCCKrate=0;
@ -498,7 +498,7 @@ odm_RxPhyStatus92CSeries_Parsing(
pPhyInfo->RxMIMOSignalStrength[i] =(u8) RSSI; pPhyInfo->RxMIMOSignalStrength[i] =(u8) RSSI;
//Get Rx snr value in DB //Get Rx snr value in DB
pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2); pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
/* Record Signal Strength for next packet */ /* Record Signal Strength for next packet */
if(pPktinfo->bPacketMatchBSSID) if(pPktinfo->bPacketMatchBSSID)
@ -598,7 +598,7 @@ odm_Process_RSSIForDM(
) )
{ {
s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave; s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
u8 isCCKrate=0; u8 isCCKrate=0;
u8 RSSI_max, RSSI_min, i; u8 RSSI_max, RSSI_min, i;
u32 OFDM_pkt=0; u32 OFDM_pkt=0;

8
hal/odm_HWConfig.h
View file

@ -88,13 +88,13 @@ typedef struct _Phy_Status_Rpt_8192cd
u8 noise_power_db_msb; u8 noise_power_db_msb;
u8 path_cfotail[2]; u8 path_cfotail[2];
u8 pcts_mask[2]; u8 pcts_mask[2];
s1Byte stream_rxevm[2]; s8 stream_rxevm[2];
u8 path_rxsnr[2]; u8 path_rxsnr[2];
u8 noise_power_db_lsb; u8 noise_power_db_lsb;
u8 rsvd_2[3]; u8 rsvd_2[3];
u8 stream_csi[2]; u8 stream_csi[2];
u8 stream_target_csi[2]; u8 stream_target_csi[2];
s1Byte sig_evm; s8 sig_evm;
u8 rsvd_3; u8 rsvd_3;
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
@ -128,13 +128,13 @@ typedef struct _Phy_Status_Rpt_8195
u8 rsvd_1; u8 rsvd_1;
u8 path_cfotail[2]; u8 path_cfotail[2];
u8 pcts_mask[2]; u8 pcts_mask[2];
s1Byte stream_rxevm[2]; s8 stream_rxevm[2];
u8 path_rxsnr[2]; u8 path_rxsnr[2];
u8 rsvd_2[2]; u8 rsvd_2[2];
u8 stream_snr[2]; u8 stream_snr[2];
u8 stream_csi[2]; u8 stream_csi[2];
u8 rsvd_3[2]; u8 rsvd_3[2];
s1Byte sig_evm; s8 sig_evm;
u8 rsvd_4; u8 rsvd_4;
#if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE) #if (ODM_ENDIAN_TYPE == ODM_ENDIAN_LITTLE)
u8 antidx_anta:3; u8 antidx_anta:3;

2
hal/odm_interface.c
View file

@ -187,7 +187,7 @@ ODM_FreeMemory(
rtw_vmfree(pPtr, length); rtw_vmfree(pPtr, length);
} }
s4Byte ODM_CompareMemory( s32 ODM_CompareMemory(
IN PDM_ODM_T pDM_Odm, IN PDM_ODM_T pDM_Odm,
IN void * pBuf1, IN void * pBuf1,
IN void * pBuf2, IN void * pBuf2,

2
hal/odm_interface.h
View file

@ -194,7 +194,7 @@ ODM_FreeMemory(
IN u32 length IN u32 length
); );
s4Byte ODM_CompareMemory( s32 ODM_CompareMemory(
IN PDM_ODM_T pDM_Odm, IN PDM_ODM_T pDM_Odm,
IN void * pBuf1, IN void * pBuf1,
IN void * pBuf2, IN void * pBuf2,

16
hal/odm_types.h
View file

@ -53,22 +53,6 @@ typedef enum _RT_SPINLOCK_TYPE{
#include <basic_types.h> #include <basic_types.h>
#define u8 u8
#define u64 u64
#define s1Byte s8
#define ps1Byte s8*
#define s2Byte s16
#define ps2Byte s16*
#define s4Byte s32
#define ps4Byte s32*
#define s8Byte s64
#define ps8Byte s64*
#define DEV_BUS_TYPE RT_USB_INTERFACE #define DEV_BUS_TYPE RT_USB_INTERFACE
#if defined(CONFIG_LITTLE_ENDIAN) #if defined(CONFIG_LITTLE_ENDIAN)

10
hal/rtl8188e_phycfg.c
View file

@ -703,7 +703,7 @@ rtl8188e_PHY_SetRFReg(
* Read/Write * Read/Write
* *
* Input: struct adapter * Adapter * Input: struct adapter * Adapter
* ps1Byte pFileName * s8 * pFileName
* *
* Output: NONE * Output: NONE
* *
@ -732,7 +732,7 @@ phy_ConfigMACWithParaFile(
* Read/Write * Read/Write
* *
* Input: struct adapter * Adapter * Input: struct adapter * Adapter
* ps1Byte pFileName * s8 * pFileName
* *
* Output: NONE * Output: NONE
* *
@ -959,7 +959,7 @@ phy_InitBBRFRegisterDefinition(
* Read/Write * Read/Write
* *
* Input: struct adapter * Adapter * Input: struct adapter * Adapter
* ps1Byte pFileName * s8 * pFileName
* *
* Output: NONE * Output: NONE
* *
@ -1535,7 +1535,7 @@ PHY_RFConfig8188E(
* Overview: This function read RF parameters from general file format, and do RF 3-wire * Overview: This function read RF parameters from general file format, and do RF 3-wire
* *
* Input: struct adapter * Adapter * Input: struct adapter * Adapter
* ps1Byte pFileName * s8 * pFileName
* RF_RADIO_PATH_E eRFPath * RF_RADIO_PATH_E eRFPath
* *
* Output: NONE * Output: NONE
@ -1600,7 +1600,7 @@ PHY_ConfigRFExternalPA(
* Overview: This function read RF parameters from general file format, and do RF 3-wire * Overview: This function read RF parameters from general file format, and do RF 3-wire
* *
* Input: struct adapter * Adapter * Input: struct adapter * Adapter
* ps1Byte pFileName * s8 * pFileName
* RF_RADIO_PATH_E eRFPath * RF_RADIO_PATH_E eRFPath
* *
* Output: NONE * Output: NONE

2
hal/rtl8188e_rf6052.c
View file

@ -342,7 +342,7 @@ void getTxPowerWriteValByRegulatory88E(
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv; struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 i, chnlGroup=0, pwr_diff_limit[4], customer_pwr_limit; u8 i, chnlGroup=0, pwr_diff_limit[4], customer_pwr_limit;
s1Byte pwr_diff=0; s8 pwr_diff=0;
u32 writeVal, customer_limit, rf; u32 writeVal, customer_limit, rf;
u8 Regulatory = pHalData->EEPROMRegulatory; u8 Regulatory = pHalData->EEPROMRegulatory;

8
include/rtl8188e_hal.h
View file

@ -237,10 +237,10 @@ typedef struct _TxPowerInfo24G{
u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G]; u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1]; u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
//If only one tx, only BW20 and OFDM are used. //If only one tx, only BW20 and OFDM are used.
s1Byte CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s1Byte OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s1Byte BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
s1Byte BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT]; s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
}TxPowerInfo24G, *PTxPowerInfo24G; }TxPowerInfo24G, *PTxPowerInfo24G;
#define EFUSE_REAL_CONTENT_LEN 512 #define EFUSE_REAL_CONTENT_LEN 512

25
include/rtw_mp.h
View file

@ -159,25 +159,6 @@ struct mp_tx
#define MP_MAX_LINES 1000 #define MP_MAX_LINES 1000
#define MP_MAX_LINES_BYTES 256 #define MP_MAX_LINES_BYTES 256
#define u8 u8
#define s1Byte s8
#define u32 u32
#define s4Byte s32
#define u8 u8
#define u64 u64
#define s1Byte s8
#define ps1Byte s8*
#define s2Byte s16
#define ps2Byte s16*
#define s4Byte s32
#define ps4Byte s32*
#define s8Byte s64
#define ps8Byte s64*
#define UCHAR u8 #define UCHAR u8
#define USHORT u16 #define USHORT u16
@ -267,9 +248,9 @@ typedef struct _MPT_CONTEXT
ULONG MptAckCounter; ULONG MptAckCounter;
// SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! // SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~!
//s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; //s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
//s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; //s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
//s4Byte RfReadLine[2]; //s32 RfReadLine[2];
u8 APK_bound[2]; //for APK path A/path B u8 APK_bound[2]; //for APK path A/path B
BOOLEAN bMptIndexEven; BOOLEAN bMptIndexEven;