mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Convert non-standard variable types to regular ones
These include changing s1Byte to s8, etc. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
9dd1827027
commit
2db42a3fbf
39 changed files with 1041 additions and 1120 deletions
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@ -48,12 +48,12 @@
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* 04/23/2012 MHC Adjust TX agc directly not throughput BB digital.
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*
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*---------------------------------------------------------------------------*/
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void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *dm_odm, u1Byte Type,/* 0 = OFDM, 1 = CCK */
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pu1Byte pDirection, /* 1 = +(increase) 2 = -(decrease) */
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pu4Byte pOutWriteVal /* Tx tracking CCK/OFDM BB swing index adjust */
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void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *dm_odm, u8 Type,/* 0 = OFDM, 1 = CCK */
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u8 *pDirection, /* 1 = +(increase) 2 = -(decrease) */
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u32 *pOutWriteVal /* Tx tracking CCK/OFDM BB swing index adjust */
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)
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{
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u1Byte pwr_value = 0;
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u8 pwr_value = 0;
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/* Tx power tracking BB swing table. */
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/* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */
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if (Type == 0) { /* For OFDM afjust */
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@ -130,20 +130,20 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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)
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{
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struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
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u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, offset;
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u1Byte ThermalValue_AVG_count = 0;
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u4Byte ThermalValue_AVG = 0;
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s4Byte ele_A = 0, ele_D, TempCCk, X, value32;
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s4Byte Y, ele_C = 0;
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s1Byte OFDM_index[2], CCK_index = 0;
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s1Byte OFDM_index_old[2] = {0, 0}, CCK_index_old = 0;
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u4Byte i = 0, j = 0;
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u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset;
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u8 ThermalValue_AVG_count = 0;
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u32 ThermalValue_AVG = 0;
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s32 ele_A = 0, ele_D, TempCCk, X, value32;
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s32 Y, ele_C = 0;
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s8 OFDM_index[2], CCK_index = 0;
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s8 OFDM_index_old[2] = {0, 0}, CCK_index_old = 0;
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u32 i = 0, j = 0;
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bool is2t = false;
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bool bInteralPA = false;
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u1Byte OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
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u1Byte Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/;
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s1Byte OFDM_index_mapping[2][index_mapping_NUM_88E] = {
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u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB, which is required by Arthur */
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u8 Indexforchannel = 0/*GetRightChnlPlaceforIQK(pHalData->CurrentChannel)*/;
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s8 OFDM_index_mapping[2][index_mapping_NUM_88E] = {
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{0, 0, 2, 3, 4, 4, /* 2.4G, decrease power */
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5, 6, 7, 7, 8, 9,
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10, 10, 11}, /* For lower temperature, 20120220 updated on 20120220. */
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@ -151,7 +151,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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-4, -4, -4, -5, -7, -8,
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-9, -9, -10},
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};
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u1Byte Thermal_mapping[2][index_mapping_NUM_88E] = {
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u8 Thermal_mapping[2][index_mapping_NUM_88E] = {
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{0, 2, 4, 6, 8, 10, /* 2.4G, decrease power */
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12, 14, 16, 18, 20, 22,
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24, 26, 27},
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@ -174,7 +174,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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("===>dm_TXPowerTrackingCallback_ThermalMeter_8188E txpowercontrol %d\n",
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dm_odm->RFCalibrateInfo.TxPowerTrackControl));
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ThermalValue = (u1Byte)ODM_GetRFReg(dm_odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
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ThermalValue = (u8)ODM_GetRFReg(dm_odm, RF_PATH_A, RF_T_METER_88E, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("Readback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",
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@ -190,8 +190,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D;
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for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */
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if (ele_D == (OFDMSwingTable[i]&bMaskOFDM_D)) {
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OFDM_index_old[0] = (u1Byte)i;
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dm_odm->BbSwingIdxOfdmBase = (u1Byte)i;
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OFDM_index_old[0] = (u8)i;
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dm_odm->BbSwingIdxOfdmBase = (u8)i;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("Initial pathA ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n",
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rOFDM0_XATxIQImbalance, ele_D, OFDM_index_old[0]));
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@ -204,7 +204,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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ele_D = ODM_GetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord)&bMaskOFDM_D;
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for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { /* find the index */
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if (ele_D == (OFDMSwingTable[i]&bMaskOFDM_D)) {
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OFDM_index_old[1] = (u1Byte)i;
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OFDM_index_old[1] = (u8)i;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("Initial pathB ele_D reg0x%x = 0x%x, OFDM_index=0x%x\n",
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rOFDM0_XBTxIQImbalance, ele_D, OFDM_index_old[1]));
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@ -219,8 +219,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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for (i = 0; i < CCK_TABLE_SIZE; i++) {
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if (dm_odm->RFCalibrateInfo.bCCKinCH14) {
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if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4) == 0) {
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CCK_index_old = (u1Byte)i;
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dm_odm->BbSwingIdxCckBase = (u1Byte)i;
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CCK_index_old = (u8)i;
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dm_odm->BbSwingIdxCckBase = (u8)i;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n",
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rCCK0_TxFilter2, TempCCk, CCK_index_old, dm_odm->RFCalibrateInfo.bCCKinCH14));
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@ -231,8 +231,8 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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("RegA24: 0x%X, CCKSwingTable_Ch1_Ch13[%d][2]: CCKSwingTable_Ch1_Ch13[i][2]: 0x%X\n",
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TempCCk, i, CCKSwingTable_Ch1_Ch13[i][2]));
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if (ODM_CompareMemory(dm_odm, (void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4) == 0) {
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CCK_index_old = (u1Byte)i;
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dm_odm->BbSwingIdxCckBase = (u1Byte)i;
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CCK_index_old = (u8)i;
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dm_odm->BbSwingIdxCckBase = (u8)i;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n",
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rCCK0_TxFilter2, TempCCk, CCK_index_old, dm_odm->RFCalibrateInfo.bCCKinCH14));
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@ -269,7 +269,7 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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}
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if (ThermalValue_AVG_count) {
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ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count);
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ThermalValue = (u8)(ThermalValue_AVG / ThermalValue_AVG_count);
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("AVG Thermal Meter = 0x%x\n", ThermalValue));
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}
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@ -374,13 +374,13 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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dm_odm->RFCalibrateInfo.bDoneTxpower = true;
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/* Adujst OFDM Ant_A according to IQK result */
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ele_D = (OFDMSwingTable[(u1Byte)OFDM_index[0]] & 0xFFC00000)>>22;
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ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22;
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X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][0];
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Y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][1];
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/* Revse TX power table. */
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dm_odm->BbSwingIdxOfdm = (u1Byte)OFDM_index[0];
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dm_odm->BbSwingIdxCck = (u1Byte)CCK_index;
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dm_odm->BbSwingIdxOfdm = (u8)OFDM_index[0];
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dm_odm->BbSwingIdxCck = (u8)CCK_index;
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if (dm_odm->BbSwingIdxOfdmCurrent != dm_odm->BbSwingIdxOfdm) {
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dm_odm->BbSwingIdxOfdmCurrent = dm_odm->BbSwingIdxOfdm;
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@ -408,10 +408,10 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("TxPwrTracking for path A: X=0x%x, Y=0x%x ele_A=0x%x ele_C=0x%x ele_D=0x%x 0xe94=0x%x 0xe9c=0x%x\n",
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(u4Byte)X, (u4Byte)Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)X, (u4Byte)Y));
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(u32)X, (u32)Y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)X, (u32)Y));
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if (is2t) {
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ele_D = (OFDMSwingTable[(u1Byte)OFDM_index[1]] & 0xFFC00000)>>22;
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ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
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/* new element A = element D x X */
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X = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[Indexforchannel].Value[0][4];
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@ -437,15 +437,15 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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value32 = ((X * ele_D)>>7)&0x01;
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ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT28, value32);
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} else {
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ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u1Byte)OFDM_index[1]]);
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ODM_SetBBReg(dm_odm, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]);
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ODM_SetBBReg(dm_odm, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
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ODM_SetBBReg(dm_odm, rOFDM0_ECCAThreshold, BIT28, 0x00);
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}
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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("TxPwrTracking path B: X=0x%x, Y=0x%x ele_A=0x%x ele_C=0x%x ele_D=0x%x 0xeb4=0x%x 0xebc=0x%x\n",
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(u4Byte)X, (u4Byte)Y, (u4Byte)ele_A,
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(u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)X, (u4Byte)Y));
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(u32)X, (u32)Y, (u32)ele_A,
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(u32)ele_C, (u32)ele_D, (u32)X, (u32)Y));
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}
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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@ -474,11 +474,11 @@ odm_TXPowerTrackingCallback_ThermalMeter_8188E(
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#define MAX_TOLERANCE 5
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#define IQK_DELAY_TIME 1 /* ms */
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static u1Byte /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
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static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
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phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB)
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{
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u4Byte regeac, regE94, regE9C, regEA4;
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u1Byte result = 0x00;
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u32 regeac, regE94, regE9C, regEA4;
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u8 result = 0x00;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n"));
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@ -522,11 +522,11 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB)
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return result;
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}
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static u1Byte /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
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static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
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phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
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{
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u4Byte regeac, regE94, regE9C, regEA4, u4tmp;
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u1Byte result = 0x00;
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u32 regeac, regE94, regE9C, regEA4, u4tmp;
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u8 result = 0x00;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK!\n"));
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@ -650,11 +650,11 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB)
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return result;
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}
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static u1Byte /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
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static u8 /* bit0 = 1 => Tx OK, bit1 = 1 => Rx OK */
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phy_PathB_IQK_8188E(struct adapter *adapt)
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{
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u4Byte regeac, regeb4, regebc, regec4, regecc;
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u1Byte result = 0x00;
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u32 regeac, regeb4, regebc, regec4, regecc;
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u8 result = 0x00;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n"));
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@ -703,10 +703,10 @@ phy_PathB_IQK_8188E(struct adapter *adapt)
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return result;
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}
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static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s4Byte result[][8], u1Byte final_candidate, bool txonly)
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static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly)
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{
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u4Byte Oldval_0, X, TX0_A, reg;
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s4Byte Y, TX0_C;
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u32 Oldval_0, X, TX0_A, reg;
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s32 Y, TX0_C;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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@ -756,10 +756,10 @@ static void patha_fill_iqk(struct adapter *adapt, bool iqkok, s4Byte result[][8]
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}
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}
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static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s4Byte result[][8], u1Byte final_candidate, bool txonly)
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static void pathb_fill_iqk(struct adapter *adapt, bool iqkok, s32 result[][8], u8 final_candidate, bool txonly)
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{
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u4Byte Oldval_1, X, TX1_A, reg;
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s4Byte Y, TX1_C;
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u32 Oldval_1, X, TX1_A, reg;
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s32 Y, TX1_C;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,
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@ -814,9 +814,9 @@ static bool ODM_CheckPowerStatus(struct adapter *Adapter)
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return true;
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}
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void _PHY_SaveADDARegisters(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDABackup, u4Byte RegisterNum)
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void _PHY_SaveADDARegisters(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegisterNum)
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{
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u4Byte i;
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u32 i;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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@ -831,11 +831,11 @@ void _PHY_SaveADDARegisters(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDA
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static void _PHY_SaveMACRegisters(
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struct adapter *adapt,
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pu4Byte MACReg,
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pu4Byte MACBackup
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u32 *MACReg,
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u32 *MACBackup
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)
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{
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u4Byte i;
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u32 i;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n"));
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@ -845,9 +845,9 @@ static void _PHY_SaveMACRegisters(
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MACBackup[i] = ODM_Read4Byte(dm_odm, MACReg[i]);
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}
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static void reload_adda_reg(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDABackup, u4Byte RegiesterNum)
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static void reload_adda_reg(struct adapter *adapt, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
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{
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u4Byte i;
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u32 i;
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struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
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struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
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@ -859,17 +859,17 @@ static void reload_adda_reg(struct adapter *adapt, pu4Byte ADDAReg, pu4Byte ADDA
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static void
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_PHY_ReloadMACRegisters(
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struct adapter *adapt,
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pu4Byte MACReg,
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pu4Byte MACBackup
|
||||
u32 *MACReg,
|
||||
u32 *MACBackup
|
||||
)
|
||||
{
|
||||
u4Byte i;
|
||||
u32 i;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n"));
|
||||
for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++) {
|
||||
ODM_Write1Byte(dm_odm, MACReg[i], (u1Byte)MACBackup[i]);
|
||||
ODM_Write1Byte(dm_odm, MACReg[i], (u8)MACBackup[i]);
|
||||
}
|
||||
ODM_Write4Byte(dm_odm, MACReg[i], MACBackup[i]);
|
||||
}
|
||||
|
|
@ -877,13 +877,13 @@ _PHY_ReloadMACRegisters(
|
|||
void
|
||||
_PHY_PathADDAOn(
|
||||
struct adapter *adapt,
|
||||
pu4Byte ADDAReg,
|
||||
u32 *ADDAReg,
|
||||
bool isPathAOn,
|
||||
bool is2t
|
||||
)
|
||||
{
|
||||
u4Byte pathOn;
|
||||
u4Byte i;
|
||||
u32 pathOn;
|
||||
u32 i;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n"));
|
||||
|
|
@ -903,11 +903,11 @@ _PHY_PathADDAOn(
|
|||
void
|
||||
_PHY_MACSettingCalibration(
|
||||
struct adapter *adapt,
|
||||
pu4Byte MACReg,
|
||||
pu4Byte MACBackup
|
||||
u32 *MACReg,
|
||||
u32 *MACBackup
|
||||
)
|
||||
{
|
||||
u4Byte i = 0;
|
||||
u32 i = 0;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
|
||||
|
|
@ -916,9 +916,9 @@ _PHY_MACSettingCalibration(
|
|||
ODM_Write1Byte(dm_odm, MACReg[i], 0x3F);
|
||||
|
||||
for (i = 1; i < (IQK_MAC_REG_NUM - 1); i++) {
|
||||
ODM_Write1Byte(dm_odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3)));
|
||||
ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i]&(~BIT3)));
|
||||
}
|
||||
ODM_Write1Byte(dm_odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5)));
|
||||
ODM_Write1Byte(dm_odm, MACReg[i], (u8)(MACBackup[i]&(~BIT5)));
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -941,7 +941,7 @@ static void _PHY_PIModeSwitch(
|
|||
bool PIMode
|
||||
)
|
||||
{
|
||||
u4Byte mode;
|
||||
u32 mode;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
|
||||
|
|
@ -954,18 +954,18 @@ static void _PHY_PIModeSwitch(
|
|||
|
||||
static bool phy_SimularityCompare_8188E(
|
||||
struct adapter *adapt,
|
||||
s4Byte resulta[][8],
|
||||
u1Byte c1,
|
||||
u1Byte c2
|
||||
s32 resulta[][8],
|
||||
u8 c1,
|
||||
u8 c2
|
||||
)
|
||||
{
|
||||
u4Byte i, j, diff, sim_bitmap, bound = 0;
|
||||
u32 i, j, diff, sim_bitmap, bound = 0;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
u1Byte final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
|
||||
u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
|
||||
bool result = true;
|
||||
bool is2t;
|
||||
s4Byte tmp1 = 0, tmp2 = 0;
|
||||
s32 tmp1 = 0, tmp2 = 0;
|
||||
|
||||
if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) || (dm_odm->RFType == ODM_2T4R))
|
||||
is2t = true;
|
||||
|
|
@ -1051,13 +1051,13 @@ static bool phy_SimularityCompare_8188E(
|
|||
}
|
||||
}
|
||||
|
||||
static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1Byte t, bool is2t)
|
||||
static void phy_IQCalibrate_8188E(struct adapter *adapt, s32 result[][8], u8 t, bool is2t)
|
||||
{
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
u4Byte i;
|
||||
u1Byte PathAOK, PathBOK;
|
||||
u4Byte ADDA_REG[IQK_ADDA_REG_NUM] = {
|
||||
u32 i;
|
||||
u8 PathAOK, PathBOK;
|
||||
u32 ADDA_REG[IQK_ADDA_REG_NUM] = {
|
||||
rFPGA0_XCD_SwitchControl, rBlue_Tooth,
|
||||
rRx_Wait_CCA, rTx_CCK_RFON,
|
||||
rTx_CCK_BBON, rTx_OFDM_RFON,
|
||||
|
|
@ -1066,19 +1066,19 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1B
|
|||
rRx_OFDM, rRx_Wait_RIFS,
|
||||
rRx_TO_Rx, rStandby,
|
||||
rSleep, rPMPD_ANAEN };
|
||||
u4Byte IQK_MAC_REG[IQK_MAC_REG_NUM] = {
|
||||
u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = {
|
||||
REG_TXPAUSE, REG_BCN_CTRL,
|
||||
REG_BCN_CTRL_1, REG_GPIO_MUXCFG};
|
||||
|
||||
/* since 92C & 92D have the different define in IQK_BB_REG */
|
||||
u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
|
||||
u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
|
||||
rOFDM0_TRxPathEnable, rOFDM0_TRMuxPar,
|
||||
rFPGA0_XCD_RFInterfaceSW, rConfig_AntA, rConfig_AntB,
|
||||
rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE,
|
||||
rFPGA0_XB_RFInterfaceOE, rFPGA0_RFMOD
|
||||
};
|
||||
|
||||
u4Byte retryCount = 9;
|
||||
u32 retryCount = 9;
|
||||
if (*(dm_odm->mp_mode) == 1)
|
||||
retryCount = 9;
|
||||
else
|
||||
|
|
@ -1098,7 +1098,7 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1B
|
|||
|
||||
_PHY_PathADDAOn(adapt, ADDA_REG, true, is2t);
|
||||
if (t == 0)
|
||||
dm_odm->RFCalibrateInfo.bRfPiEnable = (u1Byte)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8));
|
||||
dm_odm->RFCalibrateInfo.bRfPiEnable = (u8)ODM_GetBBReg(dm_odm, rFPGA0_XA_HSSIParameter1, BIT(8));
|
||||
|
||||
if (!dm_odm->RFCalibrateInfo.bRfPiEnable) {
|
||||
/* Switch BB to PI mode to do IQ Calibration. */
|
||||
|
|
@ -1222,8 +1222,8 @@ static void phy_IQCalibrate_8188E(struct adapter *adapt, s4Byte result[][8], u1B
|
|||
|
||||
static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t)
|
||||
{
|
||||
u1Byte tmpreg;
|
||||
u4Byte RF_Amode = 0, RF_Bmode = 0, LC_Cal;
|
||||
u8 tmpreg;
|
||||
u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
|
||||
|
|
@ -1282,28 +1282,28 @@ static void phy_LCCalibrate_8188E(struct adapter *adapt, bool is2t)
|
|||
#define APK_CURVE_REG_NUM 4
|
||||
#define PATH_NUM 2
|
||||
|
||||
static void phy_APCalibrate_8188E(struct adapter *adapt, s1Byte delta, bool is2t)
|
||||
static void phy_APCalibrate_8188E(struct adapter *adapt, s8 delta, bool is2t)
|
||||
{
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
u4Byte regD[PATH_NUM];
|
||||
u4Byte tmpreg, index, offset, apkbound;
|
||||
u1Byte path, i, pathbound = PATH_NUM;
|
||||
u4Byte BB_backup[APK_BB_REG_NUM];
|
||||
u4Byte BB_REG[APK_BB_REG_NUM] = {
|
||||
u32 regD[PATH_NUM];
|
||||
u32 tmpreg, index, offset, apkbound;
|
||||
u8 path, i, pathbound = PATH_NUM;
|
||||
u32 BB_backup[APK_BB_REG_NUM];
|
||||
u32 BB_REG[APK_BB_REG_NUM] = {
|
||||
rFPGA1_TxBlock, rOFDM0_TRxPathEnable,
|
||||
rFPGA0_RFMOD, rOFDM0_TRMuxPar,
|
||||
rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW,
|
||||
rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE };
|
||||
u4Byte BB_AP_MODE[APK_BB_REG_NUM] = {
|
||||
u32 BB_AP_MODE[APK_BB_REG_NUM] = {
|
||||
0x00000020, 0x00a05430, 0x02040000,
|
||||
0x000800e4, 0x00204000 };
|
||||
u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = {
|
||||
u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = {
|
||||
0x00000020, 0x00a05430, 0x02040000,
|
||||
0x000800e4, 0x22204000 };
|
||||
|
||||
u4Byte AFE_backup[IQK_ADDA_REG_NUM];
|
||||
u4Byte AFE_REG[IQK_ADDA_REG_NUM] = {
|
||||
u32 AFE_backup[IQK_ADDA_REG_NUM];
|
||||
u32 AFE_REG[IQK_ADDA_REG_NUM] = {
|
||||
rFPGA0_XCD_SwitchControl, rBlue_Tooth,
|
||||
rRx_Wait_CCA, rTx_CCK_RFON,
|
||||
rTx_CCK_BBON, rTx_OFDM_RFON,
|
||||
|
|
@ -1313,47 +1313,47 @@ static void phy_APCalibrate_8188E(struct adapter *adapt, s1Byte delta, bool is2t
|
|||
rRx_TO_Rx, rStandby,
|
||||
rSleep, rPMPD_ANAEN };
|
||||
|
||||
u4Byte MAC_backup[IQK_MAC_REG_NUM];
|
||||
u4Byte MAC_REG[IQK_MAC_REG_NUM] = {
|
||||
u32 MAC_backup[IQK_MAC_REG_NUM];
|
||||
u32 MAC_REG[IQK_MAC_REG_NUM] = {
|
||||
REG_TXPAUSE, REG_BCN_CTRL,
|
||||
REG_BCN_CTRL_1, REG_GPIO_MUXCFG};
|
||||
|
||||
u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
{0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c},
|
||||
{0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e}
|
||||
};
|
||||
|
||||
u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
{0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, /* path settings equal to path b settings */
|
||||
{0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c}
|
||||
};
|
||||
|
||||
u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
{0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d},
|
||||
{0x5201a, 0x52019, 0x52016, 0x52033, 0x52050}
|
||||
};
|
||||
|
||||
u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = {
|
||||
{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, /* path settings equal to path b settings */
|
||||
{0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}
|
||||
};
|
||||
|
||||
u4Byte AFE_on_off[PATH_NUM] = {
|
||||
u32 AFE_on_off[PATH_NUM] = {
|
||||
0x04db25a4, 0x0b1b25a4}; /* path A on path B off / path A off path B on */
|
||||
|
||||
u4Byte APK_offset[PATH_NUM] = {
|
||||
u32 APK_offset[PATH_NUM] = {
|
||||
rConfig_AntA, rConfig_AntB};
|
||||
|
||||
u4Byte APK_normal_offset[PATH_NUM] = {
|
||||
u32 APK_normal_offset[PATH_NUM] = {
|
||||
rConfig_Pmpd_AntA, rConfig_Pmpd_AntB};
|
||||
|
||||
u4Byte APK_value[PATH_NUM] = {
|
||||
u32 APK_value[PATH_NUM] = {
|
||||
0x92fc0000, 0x12fc0000};
|
||||
|
||||
u4Byte APK_normal_value[PATH_NUM] = {
|
||||
u32 APK_normal_value[PATH_NUM] = {
|
||||
0x92680000, 0x12680000};
|
||||
|
||||
s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = {
|
||||
s8 APK_delta_mapping[APK_BB_REG_NUM][13] = {
|
||||
{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
|
||||
{-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
|
||||
{-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6},
|
||||
|
|
@ -1361,21 +1361,21 @@ static void phy_APCalibrate_8188E(struct adapter *adapt, s1Byte delta, bool is2t
|
|||
{-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0}
|
||||
};
|
||||
|
||||
u4Byte APK_normal_setting_value_1[13] = {
|
||||
u32 APK_normal_setting_value_1[13] = {
|
||||
0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28,
|
||||
0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3,
|
||||
0x12680000, 0x00880000, 0x00880000
|
||||
};
|
||||
|
||||
u4Byte APK_normal_setting_value_2[16] = {
|
||||
u32 APK_normal_setting_value_2[16] = {
|
||||
0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3,
|
||||
0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025,
|
||||
0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008,
|
||||
0x00050006
|
||||
};
|
||||
|
||||
u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; /* val_1_1a, val_1_2a, val_2a, val_3a, val_4a */
|
||||
s4Byte BB_offset, delta_V, delta_offset;
|
||||
u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; /* val_1_1a, val_1_2a, val_2a, val_3a, val_4a */
|
||||
s32 BB_offset, delta_V, delta_offset;
|
||||
|
||||
if (*(dm_odm->mp_mode) == 1) {
|
||||
struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx);
|
||||
|
|
@ -1684,13 +1684,13 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
|
|||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx);
|
||||
s4Byte result[4][8]; /* last is final result */
|
||||
u1Byte i, final_candidate, Indexforchannel;
|
||||
s32 result[4][8]; /* last is final result */
|
||||
u8 i, final_candidate, Indexforchannel;
|
||||
bool pathaok, pathbok;
|
||||
s4Byte RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC;
|
||||
s32 RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC;
|
||||
bool is12simular, is13simular, is23simular;
|
||||
bool singletone = false, carrier_sup = false;
|
||||
u4Byte IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
|
||||
u32 IQK_BB_REG_92C[IQK_BB_REG_NUM] = {
|
||||
rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance,
|
||||
rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable,
|
||||
rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance,
|
||||
|
|
@ -1834,7 +1834,7 @@ void PHY_IQCalibrate_8188E(struct adapter *adapt, bool recovery)
|
|||
void PHY_LCCalibrate_8188E(struct adapter *adapt)
|
||||
{
|
||||
bool singletone = false, carrier_sup = false;
|
||||
u4Byte timeout = 2000, timecount = 0;
|
||||
u32 timeout = 2000, timecount = 0;
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
struct mpt_context *pMptCtx = &(adapt->mppriv.MptCtx);
|
||||
|
|
@ -1869,7 +1869,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt)
|
|||
("LCK:Finish!!!interface %d\n", dm_odm->InterfaceIndex));
|
||||
}
|
||||
|
||||
void PHY_APCalibrate_8188E(struct adapter *adapt, s1Byte delta)
|
||||
void PHY_APCalibrate_8188E(struct adapter *adapt, s8 delta)
|
||||
{
|
||||
struct hal_data_8188e *pHalData = GET_HAL_DATA(adapt);
|
||||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
|
|
@ -1897,7 +1897,7 @@ static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2
|
|||
struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
|
||||
|
||||
if (!adapt->hw_init_completed) {
|
||||
u1Byte u1btmp;
|
||||
u8 u1btmp;
|
||||
u1btmp = ODM_Read1Byte(dm_odm, REG_LEDCFG2) | BIT7;
|
||||
ODM_Write1Byte(dm_odm, REG_LEDCFG2, u1btmp);
|
||||
ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFParameter, BIT13, 0x01);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue