rtl8188eu: Remove some unused files, and flatten include/

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2014-12-28 20:44:53 -06:00
parent 06334102cd
commit 327b55965f
15 changed files with 2 additions and 3155 deletions

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_WIRELESS_H
#define _LINUX_WIRELESS_H
/***************************** INCLUDES *****************************/
#define __user
//typedef uint16_t __u16;
#include <sys/socket.h> /* for "struct sockaddr" et al */
#include <net/if.h> /* for IFNAMSIZ and co... */
/****************************** TYPES ******************************/
/* --------------------------- SUBTYPES --------------------------- */
/*
* For all data larger than 16 octets, we need to use a
* pointer to memory allocated in user space.
*/
struct iw_point {
void __user *pointer; /* Pointer to the data (in user space) */
__u16 length; /* number of fields or size in bytes */
__u16 flags; /* Optional params */
};
/* ------------------------ IOCTL REQUEST ------------------------ */
/*
* This structure defines the payload of an ioctl, and is used
* below.
*
* Note that this structure should fit on the memory footprint
* of iwreq (which is the same as ifreq), which mean a max size of
* 16 octets = 128 bits. Warning, pointers might be 64 bits wide...
* You should check this when increasing the structures defined
* above in this file...
*/
union iwreq_data {
/* Config - generic */
char name[IFNAMSIZ];
/* Name : used to verify the presence of wireless extensions.
* Name of the protocol/provider... */
struct iw_point data; /* Other large parameters */
};
/*
* The structure to exchange data for ioctl.
* This structure is the same as 'struct ifreq', but (re)defined for
* convenience...
* Do I need to remind you about structure size (32 octets) ?
*/
struct iwreq {
union {
char ifrn_name[IFNAMSIZ]; /* if name, e.g. "eth0" */
} ifr_ifrn;
/* Data part (defined just above) */
union iwreq_data u;
};
#endif /* _LINUX_WIRELESS_H */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_CMD_H_
#define __RTL8192D_CMD_H_
//--------------------------------------------
//3 Host Message Box
//--------------------------------------------
// User Define Message [31:8]
//_SETPWRMODE_PARM
#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
//JOINBSSRPT_PARM
#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
//_RSVDPAGE_LOC
#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value)
#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value)
//P2P_PS_OFFLOAD
struct P2P_PS_Offload_t {
unsigned char Offload_En:1;
unsigned char role:1; // 1: Owner, 0: Client
unsigned char CTWindow_En:1;
unsigned char NoA0_En:1;
unsigned char NoA1_En:1;
unsigned char AllStaSleep:1; // Only valid in Owner
unsigned char discovery:1;
unsigned char rsvd:1;
};
#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value)
#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value)
// Description: Determine the types of H2C commands that are the same in driver and Fw.
// Fisrt constructed by tynli. 2009.10.09.
typedef enum _RTL8192D_H2C_CMD
{
H2C_AP_OFFLOAD = 0, /*0*/
H2C_SETPWRMODE = 1, /*1*/
H2C_JOINBSSRPT = 2, /*2*/
H2C_RSVDPAGE = 3,
H2C_RSSI_REPORT = 5,
H2C_RA_MASK = 6,
H2C_P2P_PS_OFFLOAD = 8,
H2C_MAC_MODE_SEL = 9,
H2C_PWRM=15,
H2C_P2P_PS_CTW_CMD = 24,
H2C_PathDiv = 26, //PathDiv--NeilChen--2011.07.15
H2C_CMD_MAX
}RTL8192D_H2C_CMD;
struct cmd_msg_parm {
u8 eid; //element id
u8 sz; // sz
u8 buf[6];
};
void FillH2CCmd92D(struct adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer);
// host message to firmware cmd
void rtl8192d_set_FwPwrMode_cmd(struct adapter*padapter, u8 Mode);
void rtl8192d_set_FwJoinBssReport_cmd(struct adapter* padapter, u8 mstatus);
u8 rtl8192d_set_rssi_cmd(struct adapter*padapter, u8 *param);
u8 rtl8192d_set_raid_cmd(struct adapter*padapter, u32 mask, u8 arg);
void rtl8192d_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level);
#ifdef CONFIG_P2P
void rtl8192d_set_p2p_ps_offload_cmd(struct adapter* padapter, u8 p2p_ps_state);
#endif //CONFIG_P2P
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_DM_H__
#define __RTL8192D_DM_H__
//============================================================
// Description:
//
// This file is for 92CE/92CU dynamic mechanism only
//
//
//============================================================
enum{
UP_LINK,
DOWN_LINK,
};
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
//============================================================
// structure and define
//============================================================
//###### duplicate code,will move to ODM #########
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 10
#define IQK_BB_REG_NUM_92C 9
#define IQK_BB_REG_NUM_92D 10
#define IQK_BB_REG_NUM_test 6
#define index_mapping_NUM 13
#define Rx_index_mapping_NUM 15
#define AVG_THERMAL_NUM 8
#define IQK_Matrix_REG_NUM 8
#define IQK_Matrix_Settings_NUM 1+24+21
//###### duplicate code,will move to ODM #########
struct dm_priv
{
u8 DM_Type;
u8 DMFlag;
u8 InitDMFlag;
u32 InitODMFlag;
//* Upper and Lower Signal threshold for Rate Adaptive*/
int UndecoratedSmoothedPWDB;
int EntryMinUndecoratedSmoothedPWDB;
int EntryMaxUndecoratedSmoothedPWDB;
int MinUndecoratedPWDBForDM;
int LastMinUndecoratedPWDBForDM;
//###### duplicate code,will move to ODM #########
/*
//for DIG
u8 bDMInitialGainEnable;
//u8 binitialized; // for dm_initial_gain_Multi_STA use.
DIG_T DM_DigTable;
PS_T DM_PSTable;
FALSE_ALARM_STATISTICS FalseAlmCnt;
//for rate adaptive, in fact, 88c/92c fw will handle this
u8 bUseRAMask;
RATE_ADAPTIVE RateAdaptive;
*/
//for High Power
u8 bDynamicTxPowerEnable;
u8 LastDTPLvl;
u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
//for tx power tracking
u8 bTXPowerTracking;
u8 TXPowercount;
u8 bTXPowerTrackingInit;
u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
u8 TM_Trigger;
u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
u8 ThermalValue;
u8 ThermalValue_LCK;
u8 ThermalValue_IQK;
u8 ThermalValue_AVG[AVG_THERMAL_NUM];
u8 ThermalValue_AVG_index;
u8 ThermalValue_RxGain;
u8 ThermalValue_Crystal;
u8 Delta_IQK;
u8 Delta_LCK;
u8 bRfPiEnable;
u8 bReloadtxpowerindex;
u8 bDoneTxpower;
//for APK
u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a
u8 bAPKdone;
u8 bAPKThermalMeterIgnore;
u32 RegA24;
//for IQK
u32 Reg874;
u32 RegC08;
u32 Reg88C;
u8 Reg522;
u8 Reg550;
u8 Reg551;
u32 Reg870;
u32 ADDA_backup[IQK_ADDA_REG_NUM];
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
u32 IQK_BB_backup[IQK_BB_REG_NUM];
u8 bCCKinCH14;
char CCK_index;
//u8 Record_CCK_20Mindex;
//u8 Record_CCK_40Mindex;
char OFDM_index[2];
BOOLEAN bDPKdone[2];
u8 PowerIndex_backup[6];
//for Antenna diversity
//#ifdef CONFIG_ANTENNA_DIVERSITY
//SWAT_T DM_SWAT_Table;
//#endif
//Neil Chen----2011--06--23-----
//3 Path Diversity
BOOLEAN bPathDiv_Enable; //For 92D Non-interrupt Antenna Diversity by Neil ,add by wl.2011.07.19
BOOLEAN RSSI_test;
s32 RSSI_sum_A;
s32 RSSI_cnt_A;
s32 RSSI_sum_B;
s32 RSSI_cnt_B;
struct sta_info *RSSI_target;
_timer PathDivSwitchTimer;
//for TxPwrTracking
int RegE94;
int RegE9C;
int RegEB4;
int RegEBC;
#if MP_DRIVER == 1
u8 RegC04_MP;
u32 RegD04_MP;
#endif
u32 TXPowerTrackingCallbackCnt; //cosa add for debug
u32 prv_traffic_idx; // edca turbo
u32 RegRF3C[2]; //pathA / pathB
//###### duplicate code,will move to ODM #########
// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
u8 INIDATA_RATE[32];
};
//============================================================
// function prototype
//============================================================
void rtl8192d_init_dm_priv(IN struct adapter *Adapter);
void rtl8192d_deinit_dm_priv(IN struct adapter *Adapter);
void rtl8192d_InitHalDm(IN struct adapter *Adapter);
void rtl8192d_HalDmWatchDog(IN struct adapter *Adapter);
#endif //__HAL8190PCIDM_H__

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_HAL_H__
#define __RTL8192D_HAL_H__
#include "rtl8192d_spec.h"
#include "Hal8192DPhyReg.h"
#include "Hal8192DPhyCfg.h"
#include "rtl8192d_rf.h"
#include "rtl8192d_dm.h"
#include "rtl8192d_recv.h"
#include "rtl8192d_xmit.h"
#include "rtl8192d_cmd.h"
#include "rtw_efuse.h"
#include "../hal/OUTSRC/odm_precomp.h"
#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
//---------------------------------------------------------------------
// RTL8192DU From file
//---------------------------------------------------------------------
#define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin"
#define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt"
#define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt"
#define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt"
#define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt"
#define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt"
#define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt"
#define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt"
#define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt"
#define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt"
#define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt"
#define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt"
//---------------------------------------------------------------------
// RTL8192DU From header
//---------------------------------------------------------------------
// Fw Array
#define Rtl8192D_FwImageArray Rtl8192DUFwImgArray
// MAC/BB/PHY Array
#define Rtl8192D_MAC_Array Rtl8192DUMAC_2T_Array
#define Rtl8192D_AGCTAB_Array Rtl8192DUAGCTAB_Array
#define Rtl8192D_AGCTAB_5GArray Rtl8192DUAGCTAB_5GArray
#define Rtl8192D_AGCTAB_2GArray Rtl8192DUAGCTAB_2GArray
#define Rtl8192D_AGCTAB_2TArray Rtl8192DUAGCTAB_2TArray
#define Rtl8192D_AGCTAB_1TArray Rtl8192DUAGCTAB_1TArray
#define Rtl8192D_PHY_REG_2TArray Rtl8192DUPHY_REG_2TArray
#define Rtl8192D_PHY_REG_1TArray Rtl8192DUPHY_REG_1TArray
#define Rtl8192D_PHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG
#define Rtl8192D_PHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP
#define Rtl8192D_RadioA_2TArray Rtl8192DURadioA_2TArray
#define Rtl8192D_RadioA_1TArray Rtl8192DURadioA_1TArray
#define Rtl8192D_RadioB_2TArray Rtl8192DURadioB_2TArray
#define Rtl8192D_RadioB_1TArray Rtl8192DURadioB_1TArray
#define Rtl8192D_RadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray
#define Rtl8192D_RadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray
// Array length
#define Rtl8192D_FwImageArrayLength Rtl8192DUImgArrayLength
#define Rtl8192D_MAC_ArrayLength Rtl8192DUMAC_2T_ArrayLength
#define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DUAGCTAB_5GArrayLength
#define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DUAGCTAB_2GArrayLength
#define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DUAGCTAB_2TArrayLength
#define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DUAGCTAB_1TArrayLength
#define Rtl8192D_AGCTAB_ArrayLength Rtl8192DUAGCTAB_ArrayLength
#define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DUPHY_REG_2TArrayLength
#define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DUPHY_REG_1TArrayLength
#define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DUPHY_REG_Array_PGLength
#define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DUPHY_REG_Array_MPLength
#define Rtl8192D_RadioA_2TArrayLength Rtl8192DURadioA_2TArrayLength
#define Rtl8192D_RadioB_2TArrayLength Rtl8192DURadioB_2TArrayLength
#define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DURadioA_2T_intPAArrayLength
#define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DURadioB_2T_intPAArrayLength
// The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24.
#define DRVINFO_SZ 4 // unit is 8bytes
#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0))
//
// Check if FW header exists. We do not consider the lower 4 bits in this case.
// By tynli. 2009.12.04.
//
#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\
(le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 )
#define FW_8192D_SIZE 0x8020 // Max FW len = 32k + 32(FW header length).
#define FW_8192D_START_ADDRESS 0x1000
#define FW_8192D_END_ADDRESS 0x1FFF
#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes
typedef enum _FIRMWARE_SOURCE{
FW_SOURCE_IMG_FILE = 0,
FW_SOURCE_HEADER_FILE = 1, //from header file
}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
typedef struct _RT_FIRMWARE{
FIRMWARE_SOURCE eFWSource;
u8* szFwBuffer;
u32 ulFwLength;
}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D;
//
// This structure must be cared byte-ordering
//
// Added by tynli. 2009.12.04.
typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required
//--- LONG WORD 0 ----
u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut
u8 Category; // AP/NIC and USB/PCI
u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions
u16 Version; // FW Version
u8 Subversion; // FW Subversion, default 0x00
u8 Rsvd1;
//--- LONG WORD 1 ----
u8 Month; // Release time Month field
u8 Date; // Release time Date field
u8 Hour; // Release time Hour field
u8 Minute; // Release time Minute field
u16 RamCodeSize; // The size of RAM code
u16 Rsvd2;
//--- LONG WORD 2 ----
u32 SvnIdx; // The SVN entry index
u32 Rsvd3;
//--- LONG WORD 3 ----
u32 Rsvd4;
u32 Rsvd5;
}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR;
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
typedef enum _BT_CoType{
BT_2Wire = 0,
BT_ISSC_3Wire = 1,
BT_Accel = 2,
BT_CSR = 3,
BT_CSR_ENHAN = 4,
BT_RTL8756 = 5,
} BT_CoType, *PBT_CoType;
typedef enum _BT_CurState{
BT_OFF = 0,
BT_ON = 1,
} BT_CurState, *PBT_CurState;
typedef enum _BT_ServiceType{
BT_SCO = 0,
BT_A2DP = 1,
BT_HID = 2,
BT_HID_Idle = 3,
BT_Scan = 4,
BT_Idle = 5,
BT_OtherAction = 6,
BT_Busy = 7,
BT_OtherBusy = 8,
} BT_ServiceType, *PBT_ServiceType;
typedef enum _BT_RadioShared{
BT_Radio_Shared = 0,
BT_Radio_Individual = 1,
} BT_RadioShared, *PBT_RadioShared;
typedef struct _BT_COEXIST_STR{
u8 BluetoothCoexist;
u8 BT_Ant_Num;
u8 BT_CoexistType;
u8 BT_State;
u8 BT_CUR_State; //0:on, 1:off
u8 BT_Ant_isolation; //0:good, 1:bad
u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic
u8 BT_Service;
u8 BT_RadioSharedType;
u8 Ratio_Tx;
u8 Ratio_PRI;
}BT_COEXIST_STR, *PBT_COEXIST_STR;
#ifdef CONFIG_USB_RX_AGGREGATION
typedef enum _USB_RX_AGG_MODE{
USB_RX_AGG_DISABLE,
USB_RX_AGG_DMA,
USB_RX_AGG_USB,
USB_RX_AGG_DMA_USB
}USB_RX_AGG_MODE;
#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer
#endif
#define TX_SELE_HQ BIT(0) // High Queue
#define TX_SELE_LQ BIT(1) // Low Queue
#define TX_SELE_NQ BIT(2) // Normal Queue
// Note: We will divide number of page equally for each queue other than public queue!
#define TX_TOTAL_PAGE_NUMBER 0xF8
#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1)
// For Normal Chip Setting
// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
#define NORMAL_PAGE_NUM_PUBQ 0x56
// For Test Chip Setting
// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER
#define TEST_PAGE_NUM_PUBQ 0x89
#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A
#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A
#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10
#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10
#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0
#define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1)
// For Test Chip Setting
#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
#define WMM_TEST_PAGE_NUM_PUBQ 0xA3
#define WMM_TEST_PAGE_NUM_HPQ 0x29
#define WMM_TEST_PAGE_NUM_LPQ 0x29
//Note: For Normal Chip Setting ,modify later
#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5
#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6
#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0
#define WMM_NORMAL_PAGE_NUM_HPQ 0x29
#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C
#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C
#define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82
#define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29
#define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30
#define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30
//-------------------------------------------------------------------------
// Chip specific
//-------------------------------------------------------------------------
#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3)
#define CHIP_BONDING_92C_1T2R 0x1
#define CHIP_BONDING_88C_USB_MCARD 0x2
#define CHIP_BONDING_88C_USB_HP 0x1
#include "HalVerDef.h"
#include "hal_com.h"
//-------------------------------------------------------------------------
// Channel Plan
//-------------------------------------------------------------------------
enum ChannelPlan{
CHPL_FCC = 0,
CHPL_IC = 1,
CHPL_ETSI = 2,
CHPL_SPAIN = 3,
CHPL_FRANCE = 4,
CHPL_MKK = 5,
CHPL_MKK1 = 6,
CHPL_ISRAEL = 7,
CHPL_TELEC = 8,
CHPL_GLOBAL = 9,
CHPL_WORLD = 10,
};
typedef struct _TxPowerInfo{
u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX];
s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX];
u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX];
u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX];
u8 TSSI_A[3];
u8 TSSI_B[3];
u8 TSSI_A_5G[3]; //5GL/5GM/5GH
u8 TSSI_B_5G[3];
}TxPowerInfo, *PTxPowerInfo;
#define EFUSE_REAL_CONTENT_LEN 1024
#define EFUSE_MAP_LEN 256
#define EFUSE_MAX_SECTION 32
#define EFUSE_MAX_SECTION_BASE 16
// <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section
// 9bytes + 1byt + 5bytes and pre 1byte.
// For worst case:
// | 2byte|----8bytes----|1byte|--7bytes--| //92D
#define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte.
typedef enum _PA_MODE {
PA_MODE_EXTERNAL = 0x00,
PA_MODE_INTERNAL_SP3T = 0x01,
PA_MODE_INTERNAL_SPDT = 0x02
} PA_MODE;
/* Copy from rtl8192c */
enum c2h_id_8192d {
C2H_DBG = 0,
C2H_TSF = 1,
C2H_AP_RPT_RSP = 2,
C2H_CCX_TX_RPT = 3,
C2H_BT_RSSI = 4,
C2H_BT_OP_MODE = 5,
C2H_EXT_RA_RPT = 6,
C2H_HW_INFO_EXCH = 10,
C2H_C2H_H2C_TEST = 11,
C2H_BT_INFO = 12,
C2H_BT_MP_INFO = 15,
MAX_C2HEVENT
};
struct hal_data_8192de {
HAL_VERSION VersionID;
// add for 92D Phy mode/mac/Band mode
MACPHY_MODE_8192D MacPhyMode92D;
BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G
BAND_TYPE BandSet92D;
BOOLEAN bIsVS;
BOOLEAN bSupportRemoteWakeUp;
u8 AutoLoadStatusFor8192D;
BOOLEAN bNOPG;
BOOLEAN bMasterOfDMSP;
BOOLEAN bSlaveOfDMSP;
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
u32 IntrMask[2];
u32 IntrMaskToSet[2];
u32 DisabledFunctions;
//current WIFI_PHY values
u32 ReceiveConfig;
u32 TransmitConfig;
WIRELESS_MODE CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier
u16 BasicRateSet;
//rf_ctrl
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
//
// EEPROM setting.
//
u16 EEPROMVID;
u16 EEPROMDID;
u16 EEPROMSVID;
u16 EEPROMSMID;
u16 EEPROMChannelPlan;
u16 EEPROMVersion;
u8 EEPROMCustomerID;
u8 EEPROMBoardType;
u8 EEPROMRegulatory;
u8 EEPROMThermalMeter;
u8 EEPROMC9;
u8 EEPROMCC;
u8 PAMode;
u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G];
u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
// For power group
u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
u8 CrystalCap; // CrystalCap.
#ifdef CONFIG_BT_COEXIST
struct btcoexist_priv bt_coexist;
#endif
// Read/write are allow for following hardware information variables
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; // Antenna path Tx
u32 AntennaRxPath; // Antenna path Rx
u8 BluetoothCoexist;
u8 ExternalPA;
u8 InternalPA5G[2]; //pathA / pathB
//u32 LedControlNum;
//u32 LedControlMode;
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
//vivi, for tx power tracking, 20080407
//u16 TSSI_13dBm;
//u32 Pwr_Track;
// The current Tx Power Level
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
u32 RfRegChnlVal[2];
BOOLEAN bPhyValueInitReady;
BOOLEAN bTXPowerDataReadFromEEPORM;
BOOLEAN bInSetPower;
//RDG enable
BOOLEAN bRDGEnable;
BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress
BOOLEAN bNeedIQK;
BOOLEAN bLCKInProgress;
BOOLEAN bEarlyModeEnable;
#if 1
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
#else
//regc80、regc94、regc4c、regc88、regc9c、regc14、regca0、regc1c、regc78
u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM];
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel.
#endif
//for host message to fw
u8 LastHMEBoxNum;
u8 fw_ractrl;
// Beacon function related global variable.
u32 RegBcnCtrlVal;
u8 RegTxPause;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
u8 RegCR_1;
struct dm_priv dmpriv;
DM_ODM_T odmpriv;
//_lock odm_stainfo_lock;
u8 bInterruptMigration;
u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
// Add for dual MAC 0--Mac0 1--Mac1
u32 interfaceIndex;
u16 RegRRSR;
u16 EfuseUsedBytes;
BOOLEAN EepromOrEfuse;
u8 EfuseMap[2][HWSET_MAX_SIZE_512]; //92C:256bytes, 88E:512bytes, we use union set (512bytes)
u8 EfuseUsedPercentage;
EFUSE_HAL EfuseHal;
u8 RTSInitRate; // 2010.11.24.by tynli.
#ifdef CONFIG_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif //CONFIG_P2P
};
typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE;
//
// Function disabled.
//
#define DF_TX_BIT BIT0
#define DF_RX_BIT BIT1
#define DF_IO_BIT BIT2
#define DF_IO_D3_BIT BIT3
#define RT_DF_TYPE u32
#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits)))
#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits))))
#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) )
void InterruptRecognized8192DE(struct adapter *Adapter, PRT_ISR_CONTENT pIsrContent);
void UpdateInterruptMask8192DE(struct adapter *Adapter, u32 AddMSR, u32 RemoveMSR);
//should be renamed and moved to another file
typedef enum _INTERFACE_SELECT_8192DUSB{
INTF_SEL0_USB = 0, // USB
INTF_SEL1_MINICARD = 1, // Minicard
INTF_SEL2_EKB_PRO = 2, // Eee keyboard proprietary
INTF_SEL3_PRO = 3, // Customized proprietary
} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB;
typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB;
struct hal_data_8192du
{
HAL_VERSION VersionID;
// add for 92D Phy mode/mac/Band mode
MACPHY_MODE_8192D MacPhyMode92D;
BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G
BAND_TYPE BandSet92D;
BOOLEAN bIsVS;
BOOLEAN bNOPG;
BOOLEAN bSupportRemoteWakeUp;
BOOLEAN bMasterOfDMSP;
BOOLEAN bSlaveOfDMSP;
#ifdef CONFIG_DUALMAC_CONCURRENT
BOOLEAN bInModeSwitchProcess;
#endif
u16 CustomerID;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
//current WIFI_PHY values
u32 ReceiveConfig;
WIRELESS_MODE CurrentWirelessMode;
HT_CHANNEL_WIDTH CurrentChannelBW;
u8 CurrentChannel;
u8 nCur40MhzPrimeSC;// Control channel sub-carrier
u16 BasicRateSet;
INTERFACE_SELECT_8192DUSB InterfaceSel;
//rf_ctrl
u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
//
// EEPROM setting.
//
u8 EEPROMVersion;
u16 EEPROMVID;
u16 EEPROMPID;
u16 EEPROMSVID;
u16 EEPROMSDID;
u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID;
u8 EEPROMRegulatory;
u8 EEPROMThermalMeter;
u8 EEPROMC9;
u8 EEPROMCC;
u8 PAMode;
u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G];
u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr
s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff
u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff
// For power group
u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff
u8 CrystalCap; // CrystalCap.
#ifdef CONFIG_BT_COEXIST
struct btcoexist_priv bt_coexist;
#endif
// Read/write are allow for following hardware information variables
u8 framesync;
u32 framesyncC34;
u8 framesyncMonitor;
u8 DefaultInitialGain[4];
u8 pwrGroupCnt;
u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16];
u32 CCKTxPowerLevelOriginalOffset;
u32 AntennaTxPath; // Antenna path Tx
u32 AntennaRxPath; // Antenna path Rx
u8 BluetoothCoexist;
u8 ExternalPA;
u8 InternalPA5G[2]; //pathA / pathB
//u32 LedControlNum;
//u32 LedControlMode;
//u32 TxPowerTrackControl;
u8 b1x1RecvCombine; // for 1T1R receive combining
u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo.
//vivi, for tx power tracking, 20080407
//u16 TSSI_13dBm;
//u32 Pwr_Track;
// The current Tx Power Level
u8 CurrentCckTxPwrIdx;
u8 CurrentOfdm24GTxPwrIdx;
BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D
u32 RfRegChnlVal[2];
BOOLEAN bPhyValueInitReady;
BOOLEAN bTXPowerDataReadFromEEPORM;
BOOLEAN bInSetPower;
//RDG enable
BOOLEAN bRDGEnable;
BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress
BOOLEAN bNeedIQK;
BOOLEAN bLCKInProgress;
BOOLEAN bEarlyModeEnable;
#if 1
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
#else
//regc80、regc94、regc4c、regc88、regc9c、regc14、regca0、regc1c、regc78
u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM];
IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel.
#endif
//for host message to fw
u8 LastHMEBoxNum;
u8 fw_ractrl;
// Beacon function related global variable.
u32 RegBcnCtrlVal;
u8 RegTxPause;
u8 RegFwHwTxQCtrl;
u8 RegReg542;
u8 RegCR_1;
struct dm_priv dmpriv;
DM_ODM_T odmpriv;
//_lock odm_stainfo_lock;
u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ.
//Query RF by FW
BOOLEAN bReadRFbyFW;
// For 92C USB endpoint setting
//
u32 UsbBulkOutSize;
// Add for dual MAC 0--Mac0 1--Mac1
u32 interfaceIndex;
u8 OutEpQueueSel;
u8 OutEpNumber;
#ifdef CONFIG_USB_TX_AGGREGATION
u8 UsbTxAggMode;
u8 UsbTxAggDescNum;
#endif
#ifdef CONFIG_USB_RX_AGGREGATION
u16 HwRxPageSize; // Hardware setting
u32 MaxUsbRxAggBlock;
USB_RX_AGG_MODE UsbRxAggMode;
u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed
u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; // 8192C DMA page count
u8 UsbRxAggPageTimeout;
#endif
u16 RegRRSR;
u16 EfuseUsedBytes;
BOOLEAN EepromOrEfuse;
u8 EfuseMap[2][HWSET_MAX_SIZE_512]; //92C:256bytes, 88E:512bytes, we use union set (512bytes)
u8 EfuseUsedPercentage;
EFUSE_HAL EfuseHal;
u8 RTSInitRate; // 2010.11.24.by tynli.
#ifdef CONFIG_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif //CONFIG_P2P
};
typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE;
#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData))
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
int FirmwareDownload92D(IN struct adapter *Adapter);
void rtl8192d_FirmwareSelfReset(IN struct adapter *Adapter);
void rtl8192d_ReadChipVersion(IN struct adapter *Adapter);
void rtl8192d_EfuseParseChnlPlan(struct adapter *Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail);
void rtl8192d_ReadTxPowerInfo(struct adapter *Adapter, u8* PROMContent, BOOLEAN AutoLoadFail);
void rtl8192d_ResetDualMacSwitchVariables(IN struct adapter *Adapter);
u8 GetEEPROMSize8192D(struct adapter *Adapter);
BOOLEAN PHY_CheckPowerOffFor8192D(struct adapter *Adapter);
void PHY_SetPowerOnFor8192D(struct adapter *Adapter);
//void PHY_ConfigMacPhyMode92D(struct adapter *Adapter);
void rtl8192d_free_hal_data(struct adapter * padapter);
void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc);
#endif

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@ -1,34 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTL8192D_LED_H_
#define __RTL8192D_LED_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
//================================================================================
// Interface to manipulate LED objects.
//================================================================================
void rtl8192du_InitSwLeds(struct adapter *padapter);
void rtl8192du_DeInitSwLeds(struct adapter *padapter);
#endif

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@ -1,93 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192D_RECV_H_
#define _RTL8192D_RECV_H_
#include <drv_conf.h>
#include <osdep_service.h>
#include <drv_types.h>
#ifdef CONFIG_SINGLE_RECV_BUF
#define NR_RECVBUFF (1)
#else
#define NR_RECVBUFF (4)
#endif //CONFIG_SINGLE_RECV_BUF
#define NR_PREALLOC_RECV_SKB (8)
#define RECV_BLK_SZ 512
#define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
#ifdef CONFIG_PLATFORM_MSTAR
#define MAX_RECVBUF_SZ (8192) // 8K
#else
#define MAX_RECVBUF_SZ (15360) // 15k < 16k
#endif
#else
#define MAX_RECVBUF_SZ (4000) // about 4K
#endif
#define RECV_BULK_IN_ADDR 0x80
#define RECV_INT_IN_ADDR 0x81
#define PHY_RSSI_SLID_WIN_MAX 100
#define PHY_LINKQUALITY_SLID_WIN_MAX 20
struct phy_stat {
unsigned int phydw0;
unsigned int phydw1;
unsigned int phydw2;
unsigned int phydw3;
unsigned int phydw4;
unsigned int phydw5;
unsigned int phydw6;
unsigned int phydw7;
};
// Rx smooth factor
#define Rx_Smooth_Factor (20)
typedef struct _INTERRUPT_MSG_FORMAT_EX{
unsigned int C2H_MSG0;
unsigned int C2H_MSG1;
unsigned int C2H_MSG2;
unsigned int C2H_MSG3;
unsigned int HISR; // from HISR Reg0x124, read to clear
unsigned int HISRE;// from HISRE Reg0x12c, read to clear
unsigned int MSG_EX;
}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX;
void rtl8192du_init_recvbuf(struct adapter *padapter, struct recv_buf *precvbuf);
int rtl8192du_init_recv_priv(struct adapter * padapter);
void rtl8192du_free_recv_priv(struct adapter * padapter);
void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_status);
void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc);
#endif

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@ -1,96 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
*
*
* Module: rtl8192d_rf.h ( Header File)
*
* Note: Collect every HAL RF type exter API or constant.
*
* Function:
*
* Export:
*
* Abbrev:
*
* History:
* Data Who Remark
*
* 09/25/2008 MHC Create initial version.
*
*
******************************************************************************/
#ifndef _RTL8192D_RF_H_
#define _RTL8192D_RF_H_
/* Check to see if the file has been included already. */
/*--------------------------Define Parameters-------------------------------*/
//
// For RF 6052 Series
//
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
#define RF6052_MAX_PATH 2
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
//
// RF RL6052 Series API
//
void rtl8192d_RF_ChangeTxPath( IN struct adapter *Adapter,
IN u16 DataRate);
void rtl8192d_PHY_RF6052SetBandwidth(
IN struct adapter * Adapter,
IN HT_CHANNEL_WIDTH Bandwidth);
void rtl8192d_PHY_RF6052SetCckTxPower(
IN struct adapter *Adapter,
IN u8* pPowerlevel);
void rtl8192d_PHY_RF6052SetOFDMTxPower(
IN struct adapter *Adapter,
IN u8* pPowerLevel,
IN u8 Channel);
int PHY_RF6052_Config8192D( IN struct adapter * Adapter );
BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN struct adapter *Adapter, IN BOOLEAN bMac0);
void rtl8192d_PHY_PowerDownAnotherPHY(IN struct adapter *Adapter, IN BOOLEAN bMac0);
/*--------------------------Exported Function prototype---------------------*/
#endif/* End of HalRf.h */

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@ -1,157 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTL8192D_XMIT_H_
#define _RTL8192D_XMIT_H_
//
//defined for TX DESC Operation
//
#define MAX_TID (15)
//OFFSET 0
#define OFFSET_SZ 0
#define OFFSET_SHT 16
#define BMC BIT(24)
#define LSG BIT(26)
#define FSG BIT(27)
#define OWN BIT(31)
//OFFSET 4
#define PKT_OFFSET_SZ 0
#define BK BIT(6)
#define QSEL_SHT 8
#define Rate_ID_SHT 16
#define NAVUSEHDR BIT(20)
#define PKT_OFFSET_SHT 26
#define HWPC BIT(31)
//OFFSET 8
#define AGG_EN BIT(29)
//OFFSET 12
#define SEQ_SHT 16
//OFFSET 16
#define QoS BIT(6)
#define HW_SEQ_EN BIT(7)
#define USERATE BIT(8)
#define DISDATAFB BIT(10)
#define DATA_SHORT BIT(24)
#define DATA_BW BIT(25)
//OFFSET 20
#define SGI BIT(6)
//
// Queue Select Value in TxDesc
//
#define QSLT_BK 0x2//0x01
#define QSLT_BE 0x0
#define QSLT_VI 0x5//0x4
#define QSLT_VO 0x7//0x6
#define QSLT_BEACON 0x10
#define QSLT_HIGH 0x11
#define QSLT_MGNT 0x12
#define QSLT_CMD 0x13
//Because we open EM for normal case, we just always insert 2*8 bytes.by wl
#define USB_92D_DUMMY_OFFSET 2
#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ)
#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH)
//For 92D early mode
#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
/* Copy from rtl8192c */
struct txrpt_ccx_8192d {
/* offset 0 */
u8 retry_cnt:6;
u8 rsvd_0:2;
/* offset 1 */
u8 rts_retry_cnt:6;
u8 rsvd_1:2;
/* offset 2 */
u8 ccx_qtime0;
u8 ccx_qtime1;
/* offset 4 */
u8 missed_pkt_num:5;
u8 rsvd_4:3;
/* offset 5 */
u8 mac_id:5;
u8 des1_fragssn:3;
/* offset 6 */
u8 rpt_pkt_num:5;
u8 pkt_drop:1;
u8 lifetime_over:1;
u8 retry_over:1;
/* offset 7*/
u8 edca_tx_queue:4;
u8 rsvd_7:1;
u8 bmc:1;
u8 pkt_ok:1;
u8 int_ccx:1;
};
#define txrpt_ccx_qtime_8192d(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
#ifdef CONFIG_XMIT_ACK
void dump_txrpt_ccx_8192d(void *buf);
void handle_txrpt_ccx_8192d(struct adapter *adapter, void *buf);
#else
#define dump_txrpt_ccx_8192d(buf) do {} while(0)
#define handle_txrpt_ccx_8192d(adapter, buf) do {} while(0)
#endif
#ifdef CONFIG_USB_TX_AGGREGATION
#define MAX_TX_AGG_PACKET_NUMBER 0xFF
s32 rtl8192du_init_xmit_priv(struct adapter * padapter);
void rtl8192du_free_xmit_priv(struct adapter * padapter);
void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc);
s32 rtl8192du_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
s32 rtl8192du_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe);
s32 rtl8192du_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
#ifdef CONFIG_HOSTAPD_MLME
s32 rtl8192du_hostap_mgnt_xmit_entry(struct adapter *padapter, _pkt *pkt);
#endif
#endif
#endif

View file

@ -28,10 +28,10 @@
#if defined (CONFIG_LITTLE_ENDIAN) #if defined (CONFIG_LITTLE_ENDIAN)
#ifndef CONFIG_PLATFORM_MSTAR #ifndef CONFIG_PLATFORM_MSTAR
# include <byteorder/little_endian.h> # include <little_endian.h>
#endif #endif
#elif defined (CONFIG_BIG_ENDIAN) #elif defined (CONFIG_BIG_ENDIAN)
# include <byteorder/big_endian.h> # include <big_endian.h>
#else #else
# error "Must be LITTLE/BIG Endian Host" # error "Must be LITTLE/BIG Endian Host"
#endif #endif