mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-06-23 16:44:20 +00:00
rtl8188eu: Convert C90 comments
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
54abf571c4
commit
592c85f4e2
47 changed files with 4098 additions and 4374 deletions
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@ -348,7 +348,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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PADAPTER Adapter = pDM_Odm->Adapter;
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struct xmit_frame *pxmit_frame;
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u8 bndy_cnt=1;
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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HAL_STATUS rst =HAL_STATUS_SUCCESS;
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hex += board;
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@ -364,14 +364,14 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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return HAL_STATUS_FAILURE;
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}
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}
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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for (i = 0; i < ArrayLen; i += 2 )
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{
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u32 v1 = Array[i];
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u32 v2 = Array[i+1];
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// This (offset, data) pair meets the condition.
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/* This (offset, data) pair meets the condition. */
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if ( v1 < 0xCDCDCDCD )
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{
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#ifdef CONFIG_IOL_IOREG_CFG
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@ -381,16 +381,16 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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rtw_IOL_append_WD_cmd(pxmit_frame,(u16)v1, v2,bMaskDWord);
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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continue;
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}
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else
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{ // This line is the start line of branch.
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{ /* This line is the start line of branch. */
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if ( !CheckCondition(Array[i], hex) )
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{ // Discard the following (offset, data) pairs.
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{ /* Discard the following (offset, data) pairs. */
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READ_NEXT_PAIR(v1, v2, i);
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while ( v2 != 0xDEAD &&
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v2 != 0xCDEF &&
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@ -398,9 +398,9 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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{
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READ_NEXT_PAIR(v1, v2, i);
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}
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i -= 2; // prevent from for-loop += 2
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i -= 2; /* prevent from for-loop += 2 */
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}
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else // Configure matched pairs and skip to end of if-else.
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else /* Configure matched pairs and skip to end of if-else. */
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{
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READ_NEXT_PAIR(v1, v2, i);
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while ( v2 != 0xDEAD &&
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@ -414,7 +414,7 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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rtw_IOL_append_WD_cmd(pxmit_frame,(u16)v1, v2,bMaskDWord);
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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@ -431,31 +431,31 @@ ODM_ReadAndConfig_AGC_TAB_1T_8188E(
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}
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#ifdef CONFIG_IOL_IOREG_CFG
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if(biol){
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//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
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/* printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); */
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if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
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{
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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printk("~~~ %s Success !!! \n",__FUNCTION__);
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{
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//dump data from TX packet buffer
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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}
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else{
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printk("~~~ %s IOL_exec_cmds Failed !!! \n",__FUNCTION__);
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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{
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//dump data from TX packet buffer
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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rst = HAL_STATUS_FAILURE;
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}
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}
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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return rst;
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}
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@ -626,16 +626,16 @@ ODM_ReadAndConfig_AGC_TAB_1T_ICUT_8188E(
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u32 v1 = Array[i];
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u32 v2 = Array[i+1];
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// This (offset, data) pair meets the condition.
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/* This (offset, data) pair meets the condition. */
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if ( v1 < 0xCDCDCDCD )
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{
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odm_ConfigBB_AGC_8188E(pDM_Odm, v1, bMaskDWord, v2);
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continue;
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}
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else
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{ // This line is the start line of branch.
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{ /* This line is the start line of branch. */
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if ( !CheckCondition(Array[i], hex) )
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{ // Discard the following (offset, data) pairs.
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{ /* Discard the following (offset, data) pairs. */
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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v2 != 0xCDEF &&
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@ -643,9 +643,9 @@ ODM_ReadAndConfig_AGC_TAB_1T_ICUT_8188E(
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{
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READ_NEXT_PAIR(v1, v2, i);
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}
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i -= 2; // prevent from for-loop += 2
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i -= 2; /* prevent from for-loop += 2 */
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}
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else // Configure matched pairs and skip to end of if-else.
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else /* Configure matched pairs and skip to end of if-else. */
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{
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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@ -914,7 +914,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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struct cmd_cmp cmpdata[ArrayLen];
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u32 cmpdata_idx=0;
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#endif
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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HAL_STATUS rst =HAL_STATUS_SUCCESS;
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hex += board;
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hex += interfaceValue << 8;
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@ -930,7 +930,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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return HAL_STATUS_FAILURE;
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}
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}
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#endif//#ifdef CONFIG_IOL_IOREG_CFG
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#endif/* ifdef CONFIG_IOL_IOREG_CFG */
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for (i = 0; i < ArrayLen; i += 2 )
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{
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@ -938,7 +938,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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u32 v2 = Array[i+1];
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// This (offset, data) pair meets the condition.
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/* This (offset, data) pair meets the condition. */
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if ( v1 < 0xCDCDCDCD )
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{
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#ifdef CONFIG_IOL_IOREG_CFG
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@ -978,16 +978,16 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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continue;
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}
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else
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{ // This line is the start line of branch.
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{ /* This line is the start line of branch. */
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if ( !CheckCondition(Array[i], hex) )
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{ // Discard the following (offset, data) pairs.
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{ /* Discard the following (offset, data) pairs. */
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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v2 != 0xCDEF &&
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@ -995,9 +995,9 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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{
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READ_NEXT_PAIR(v1, v2, i);
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}
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i -= 2; // prevent from for-loop += 2
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i -= 2; /* prevent from for-loop += 2 */
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}
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else // Configure matched pairs and skip to end of if-else.
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else /* Configure matched pairs and skip to end of if-else. */
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{
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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@ -1039,7 +1039,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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}
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else
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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{
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odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
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}
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@ -1056,7 +1056,7 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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#ifdef CONFIG_IOL_IOREG_CFG
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if(biol){
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//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
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/* printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__FUNCTION__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt); */
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if(rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
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{
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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@ -1076,13 +1076,13 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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}
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}
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printk("### %s data compared !!###\n",__FUNCTION__);
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//if(rst == HAL_STATUS_FAILURE)
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{//dump data from TX packet buffer
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/* if(rst == HAL_STATUS_FAILURE) */
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{/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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}
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else{
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@ -1090,13 +1090,13 @@ ODM_ReadAndConfig_PHY_REG_1T_8188E(
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printk("~~~ IOL Config %s Failed !!! \n",__FUNCTION__);
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#ifdef CONFIG_IOL_IOREG_CFG_DBG
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{
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//dump data from TX packet buffer
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/* dump data from TX packet buffer */
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rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
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}
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#endif //CONFIG_IOL_IOREG_CFG_DBG
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#endif /* CONFIG_IOL_IOREG_CFG_DBG */
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}
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}
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#endif //#ifdef CONFIG_IOL_IOREG_CFG
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#endif /* ifdef CONFIG_IOL_IOREG_CFG */
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return rst;
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}
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/******************************************************************************
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@ -1327,16 +1327,16 @@ ODM_ReadAndConfig_PHY_REG_1T_ICUT_8188E(
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u32 v1 = Array[i];
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u32 v2 = Array[i+1];
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// This (offset, data) pair meets the condition.
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/* This (offset, data) pair meets the condition. */
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if ( v1 < 0xCDCDCDCD )
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{
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odm_ConfigBB_PHY_8188E(pDM_Odm, v1, bMaskDWord, v2);
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continue;
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}
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else
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{ // This line is the start line of branch.
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{ /* This line is the start line of branch. */
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if ( !CheckCondition(Array[i], hex) )
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{ // Discard the following (offset, data) pairs.
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{ /* Discard the following (offset, data) pairs. */
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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v2 != 0xCDEF &&
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@ -1344,9 +1344,9 @@ ODM_ReadAndConfig_PHY_REG_1T_ICUT_8188E(
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{
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READ_NEXT_PAIR(v1, v2, i);
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}
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i -= 2; // prevent from for-loop += 2
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i -= 2; /* prevent from for-loop += 2 */
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}
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else // Configure matched pairs and skip to end of if-else.
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else /* Configure matched pairs and skip to end of if-else. */
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{
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READ_NEXT_PAIR(v1, v2, i);
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while (v2 != 0xDEAD &&
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@ -1412,7 +1412,7 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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u32 v5 = Array[i+4];
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u32 v6 = Array[i+5];
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// this line is a line of pure_body
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/* this line is a line of pure_body */
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if ( v1 < 0xCDCDCDCD )
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{
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@ -1421,10 +1421,10 @@ ODM_ReadAndConfig_PHY_REG_PG_8188E(
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continue;
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}
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else
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{ // this line is the start of branch
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{ /* this line is the start of branch */
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if ( !CheckCondition(Array[i], hex) )
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{ // don't need the hw_body
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i += 2; // skip the pair of expression
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{ /* don't need the hw_body */
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i += 2; /* skip the pair of expression */
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v1 = Array[i];
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v2 = Array[i+1];
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v3 = Array[i+2];
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