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rtl8188eu: Convert C90 comments

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2015-02-19 18:51:33 -06:00
parent 54abf571c4
commit 592c85f4e2
47 changed files with 4098 additions and 4374 deletions
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10
hal/odm_RegConfig8188E.c
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@ -60,7 +60,7 @@ odm_ConfigRFReg_8188E(
else
{
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
// Add 1us delay between BB/RF register setting.
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
}
}
@ -73,7 +73,7 @@ odm_ConfigRF_RadioA_8188E(
IN u32 Data
)
{
u32 content = 0x1000; // RF_Content: radioa_txt
u32 content = 0x1000; /* RF_Content: radioa_txt */
u32 maskforPhySet= (u32)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet);
@ -88,7 +88,7 @@ odm_ConfigRF_RadioB_8188E(
IN u32 Data
)
{
u32 content = 0x1001; // RF_Content: radiob_txt
u32 content = 0x1001; /* RF_Content: radiob_txt */
u32 maskforPhySet= (u32)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
@ -117,7 +117,7 @@ odm_ConfigBB_AGC_8188E(
)
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
// Add 1us delay between BB/RF register setting.
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data));
@ -190,7 +190,7 @@ odm_ConfigBB_PHY_8188E(
pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
// Add 1us delay between BB/RF register setting.
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
}