mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2025-06-23 16:44:20 +00:00
rtl8188eu: Convert C90 comments
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
54abf571c4
commit
592c85f4e2
47 changed files with 4098 additions and 4374 deletions
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@ -17,27 +17,27 @@
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*
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*
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******************************************************************************/
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//============================================================
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// Description:
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//
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// This file is for 92CE/92CU dynamic mechanism only
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//
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//
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//============================================================
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/* */
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/* Description: */
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/* */
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/* This file is for 92CE/92CU dynamic mechanism only */
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/* */
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/* */
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/* */
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#define _RTL8188E_DM_C_
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//============================================================
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// include files
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//============================================================
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/* */
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/* include files */
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/* */
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#include <drv_conf.h>
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#include <osdep_service.h>
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#include <drv_types.h>
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#include <rtl8188e_hal.h>
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//============================================================
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// Global var
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//============================================================
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/* */
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/* Global var */
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/* */
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static void
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@ -64,14 +64,14 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte |= (HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as output mode */
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tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level
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rtw_write8(padapter, GPIO_IN, tmp1byte); /* reset the floating voltage level */
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tmp1byte = rtw_read8(padapter, GPIO_IO_SEL);
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tmp1byte &= ~(HAL_8188E_HW_GPIO_WPS_BIT);
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode
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rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); /* enable GPIO[2] as input mode */
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tmp1byte =rtw_read8(padapter, GPIO_IN);
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@ -84,8 +84,8 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
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}
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if( true == bPbcPressed)
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{
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// Here we only set bPbcPressed to true
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// After trigger PBC, the variable will be set to false
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/* Here we only set bPbcPressed to true */
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/* After trigger PBC, the variable will be set to false */
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DBG_8192C("CheckPbcGPIO - PBC is pressed\n");
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#ifdef RTK_DMP_PLATFORM
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@ -97,7 +97,7 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
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#else
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if ( padapter->pid[0] == 0 )
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{ // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver.
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{ /* 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. */
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return;
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}
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rtw_signal_process(padapter->pid[0], SIGUSR1);
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@ -105,9 +105,9 @@ static void dm_CheckPbcGPIO(struct adapter *padapter)
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}
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}
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//
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// Initialize GPIO setting registers
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//
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/* */
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/* Initialize GPIO setting registers */
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/* */
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static void
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dm_InitGPIOSetting(
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IN struct adapter *Adapter
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@ -121,7 +121,7 @@ dm_InitGPIOSetting(
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tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
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#ifdef CONFIG_BT_COEXIST
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// UMB-B cut bug. We need to support the modification.
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/* UMB-B cut bug. We need to support the modification. */
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if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) &&
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pHalData->bt_coexist.BT_Coexist)
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{
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@ -132,9 +132,9 @@ dm_InitGPIOSetting(
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}
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//============================================================
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// functions
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//============================================================
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/* */
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/* functions */
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/* */
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static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
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{
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@ -143,9 +143,9 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
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PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
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u8 cut_ver,fab_ver;
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//
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// Init Value
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//
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/* */
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/* Init Value */
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/* */
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memset(pDM_Odm, 0, sizeof(*pDM_Odm));
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pDM_Odm->Adapter = Adapter;
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@ -155,7 +155,7 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
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if(Adapter->interface_type == RTW_GSPI )
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,ODM_ITRF_SDIO);
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else
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);//RTL871X_HCI_TYPE
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_INTERFACE,Adapter->interface_type);/* RTL871X_HCI_TYPE */
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_IC_TYPE,ODM_RTL8188E);
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@ -168,7 +168,7 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
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ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP,IS_NORMAL_CHIP(pHalData->VersionID));
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_PATCH_ID,pHalData->CustomerID);
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// ODM_CMNINFO_BINHCT_TEST only for MP Team
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/* ODM_CMNINFO_BINHCT_TEST only for MP Team */
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ODM_CmnInfoInit(pDM_Odm,ODM_CMNINFO_BWIFI_TEST,Adapter->registrypriv.wifi_spec);
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@ -188,10 +188,10 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
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pdmpriv->InitODMFlag = 0;
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#else
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pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
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ODM_RF_TX_PWR_TRACK //|
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ODM_RF_TX_PWR_TRACK /* */
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;
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//if(pHalData->AntDivCfg)
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// pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
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/* if(pHalData->AntDivCfg) */
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/* pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV; */
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#endif
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ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
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@ -238,11 +238,11 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
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| ODM_RF_TX_PWR_TRACK
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;
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}
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#endif//(MP_DRIVER==1)
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#endif/* MP_DRIVER==1) */
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#ifdef CONFIG_DISABLE_ODM
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pdmpriv->InitODMFlag = 0;
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#endif//CONFIG_DISABLE_ODM
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#endif/* CONFIG_DISABLE_ODM */
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ODM_CmnInfoUpdate(pDM_Odm,ODM_CMNINFO_ABILITY,pdmpriv->InitODMFlag);
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@ -257,18 +257,7 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_MP_MODE,&(Adapter->registrypriv.mp_mode));
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u8_temp));
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//================= only for 8192D =================
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/*
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//pHalData->CurrentBandType92D
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BAND,&(pDM_Odm->u8_temp));
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_GET_VALUE,&(pDM_Odm->u8_temp));
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BUDDY_ADAPTOR,&(pDM_Odm->PADAPTER_temp));
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_DMSP_IS_MASTER,&(pDM_Odm->u8_temp));
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//================= only for 8192D =================
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// driver havn't those variable now
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_OPERATION,&(pDM_Odm->u8_temp));
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_BT_DISABLE_EDCA,&(pDM_Odm->u8_temp));
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*/
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/* only for 8192D ================= */
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_SCAN,&(pmlmepriv->bScanInProcess));
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ODM_CmnInfoHook(pDM_Odm,ODM_CMNINFO_POWER_SAVING,&(pwrctrlpriv->bpower_saving));
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@ -276,7 +265,7 @@ static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
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for(i=0; i< NUM_STA; i++)
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{
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//pDM_Odm->pODM_StaInfo[i] = NULL;
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/* pDM_Odm->pODM_StaInfo[i] = NULL; */
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ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS,i,NULL);
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}
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}
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@ -327,23 +316,23 @@ rtl8188e_HalDmWatchDog(
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#endif
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#ifdef CONFIG_P2P_PS
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// Fw is under p2p powersaving mode, driver should stop dynamic mechanism.
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// modifed by thomas. 2011.06.11.
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/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
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/* modifed by thomas. 2011.06.11. */
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if(Adapter->wdinfo.p2p_ps_mode)
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bFwPSAwake = false;
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#endif //CONFIG_P2P_PS
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#endif /* CONFIG_P2P_PS */
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if( (hw_init_completed == true)
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&& ((!bFwCurrentInPSMode) && bFwPSAwake))
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{
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//
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// Calculate Tx/Rx statistics.
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//
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/* */
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/* Calculate Tx/Rx statistics. */
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/* */
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dm_CheckStatistics(Adapter);
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}
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//ODM
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/* ODM */
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if (hw_init_completed == true)
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{
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u8 bLinked=false;
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@ -369,8 +358,8 @@ rtl8188e_HalDmWatchDog(
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skip_dm:
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// Check GPIO to determine current RF on/off and Pbc status.
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// Check Hardware Radio ON/OFF or not
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/* Check GPIO to determine current RF on/off and Pbc status. */
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/* Check Hardware Radio ON/OFF or not */
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return;
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}
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@ -380,10 +369,10 @@ void rtl8188e_init_dm_priv(IN struct adapter *Adapter)
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struct dm_priv *pdmpriv = &pHalData->dmpriv;
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PDM_ODM_T podmpriv = &pHalData->odmpriv;
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memset(pdmpriv, 0, sizeof(struct dm_priv));
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//_rtw_spinlock_init(&(pHalData->odm_stainfo_lock));
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/* _rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); */
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Init_ODM_ComInfo_88E(Adapter);
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#ifdef CONFIG_SW_ANTENNA_DIVERSITY
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//_init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , odm_SW_AntennaSwitchCallback, Adapter);
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/* _init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , odm_SW_AntennaSwitchCallback, Adapter); */
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ODM_InitAllTimers(podmpriv );
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#endif
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ODM_InitDebugSetting(podmpriv);
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@ -394,29 +383,29 @@ void rtl8188e_deinit_dm_priv(IN struct adapter *Adapter)
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PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
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struct dm_priv *pdmpriv = &pHalData->dmpriv;
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PDM_ODM_T podmpriv = &pHalData->odmpriv;
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//_rtw_spinlock_free(&pHalData->odm_stainfo_lock);
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/* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */
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#ifdef CONFIG_SW_ANTENNA_DIVERSITY
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//_cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer);
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/* _cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); */
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ODM_CancelAllTimers(podmpriv);
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#endif
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}
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#ifdef CONFIG_ANTENNA_DIVERSITY
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// Add new function to reset the state of antenna diversity before link.
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//
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// Compare RSSI for deciding antenna
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/* Add new function to reset the state of antenna diversity before link. */
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/* */
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/* Compare RSSI for deciding antenna */
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void AntDivCompare8188E(struct adapter *Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
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{
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//struct adapter *Adapter = pDM_Odm->Adapter ;
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/* struct adapter *Adapter = pDM_Odm->Adapter ; */
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HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
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if(0 != pHalData->AntDivCfg )
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{
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//DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi),
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// src->Rssi,query_rx_pwr_percentage(src->Rssi));
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//select optimum_antenna for before linked =>For antenna diversity
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if(dst->Rssi >= src->Rssi )//keep org parameter
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/* DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), */
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/* src->Rssi,query_rx_pwr_percentage(src->Rssi)); */
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/* select optimum_antenna for before linked =>For antenna diversity */
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if(dst->Rssi >= src->Rssi )/* keep org parameter */
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{
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src->Rssi = dst->Rssi;
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src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna;
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@ -424,7 +413,7 @@ void AntDivCompare8188E(struct adapter *Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_
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}
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}
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// Add new function to reset the state of antenna diversity before link.
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/* Add new function to reset the state of antenna diversity before link. */
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u8 AntDivBeforeLink8188E(struct adapter *Adapter )
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{
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@ -433,10 +422,10 @@ u8 AntDivBeforeLink8188E(struct adapter *Adapter )
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SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
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struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
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// Condition that does not need to use antenna diversity.
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/* Condition that does not need to use antenna diversity. */
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if(pHalData->AntDivCfg==0)
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{
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//DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n");
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/* DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); */
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return false;
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}
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@ -447,13 +436,13 @@ u8 AntDivBeforeLink8188E(struct adapter *Adapter )
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if(pDM_SWAT_Table->SWAS_NoLink_State == 0){
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//switch channel
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/* switch channel */
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pDM_SWAT_Table->SWAS_NoLink_State = 1;
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pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A;
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//PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna);
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/* PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); */
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rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, false);
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//DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B");
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/* DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); */
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return true;
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}
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else
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