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rtl8188eu: Remove dead code for connections other than USB

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-11-03 16:31:56 -05:00
parent fec17178bc
commit 681e680993
16 changed files with 4 additions and 696 deletions
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86
include/drv_types.h
View file

@ -820,11 +820,6 @@ struct halmacpriv {
/* For asynchronous functions */ /* For asynchronous functions */
struct halmac_indicator *indicator; struct halmac_indicator *indicator;
#ifdef CONFIG_SDIO_HCI
/* Store hardware tx queue page number setting */
u16 txpage[HW_QUEUE_ENTRY];
#endif /* CONFIG_SDIO_HCI */
}; };
#endif /* RTW_HALMAC */ #endif /* RTW_HALMAC */
@ -932,8 +927,6 @@ struct dvobj_priv {
/*-------- below is for USB INTERFACE --------*/ /*-------- below is for USB INTERFACE --------*/
#ifdef CONFIG_USB_HCI
u8 usb_speed; /* 1.1, 2.0 or 3.0 */ u8 usb_speed; /* 1.1, 2.0 or 3.0 */
u8 nr_endpoint; u8 nr_endpoint;
u8 RtNumInPipes; u8 RtNumInPipes;
@ -956,56 +949,8 @@ struct dvobj_priv {
struct usb_interface *pusbintf; struct usb_interface *pusbintf;
struct usb_device *pusbdev; struct usb_device *pusbdev;
#endif/* CONFIG_USB_HCI */
/*-------- below is for PCIE INTERFACE --------*/ /*-------- below is for PCIE INTERFACE --------*/
#ifdef CONFIG_PCI_HCI
struct pci_dev *ppcidev;
/* PCI MEM map */
unsigned long pci_mem_end; /* shared mem end */
unsigned long pci_mem_start; /* shared mem start */
/* PCI IO map */
unsigned long pci_base_addr; /* device I/O address */
#ifdef RTK_129X_PLATFORM
unsigned long ctrl_start;
/* PCI MASK addr */
unsigned long mask_addr;
/* PCI TRANSLATE addr */
unsigned long tran_addr;
_lock io_reg_lock;
#endif
/* PciBridge */
struct pci_priv pcipriv;
unsigned int irq; /* get from pci_dev.irq, store to net_device.irq */
u16 irqline;
u8 irq_enabled;
RT_ISR_CONTENT isr_content;
_lock irq_th_lock;
/* ASPM */
u8 const_pci_aspm;
u8 const_amdpci_aspm;
u8 const_hwsw_rfoff_d3;
u8 const_support_pciaspm;
/* pci-e bridge */
u8 const_hostpci_aspm_setting;
/* pci-e device */
u8 const_devicepci_aspm_setting;
u8 b_support_aspm; /* If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. */
u8 b_support_backdoor;
u8 bdma64;
#endif/* CONFIG_PCI_HCI */
#ifdef CONFIG_MCC_MODE #ifdef CONFIG_MCC_MODE
struct mcc_obj_priv mcc_objpriv; struct mcc_obj_priv mcc_objpriv;
#endif /*CONFIG_MCC_MODE */ #endif /*CONFIG_MCC_MODE */
@ -1058,18 +1003,7 @@ static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj)
static struct device *dvobj_to_dev(struct dvobj_priv *dvobj) static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
{ {
/* todo: get interface type from dvobj and the return the dev accordingly */ /* todo: get interface type from dvobj and the return the dev accordingly */
#ifdef CONFIG_USB_HCI
return &dvobj->pusbintf->dev; return &dvobj->pusbintf->dev;
#endif
#ifdef CONFIG_SDIO_HCI
return &dvobj->intf_data.func->dev;
#endif
#ifdef CONFIG_GSPI_HCI
return &dvobj->intf_data.func->dev;
#endif
#ifdef CONFIG_PCI_HCI
return &dvobj->ppcidev->dev;
#endif
} }
_adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj); _adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj);
@ -1485,28 +1419,8 @@ int recvbuf2recvframe(PADAPTER padapter, void *ptr);
#endif #endif
/* HCI Related header file */ /* HCI Related header file */
#ifdef CONFIG_USB_HCI
#include <usb_osintf.h> #include <usb_osintf.h>
#include <usb_ops.h> #include <usb_ops.h>
#include <usb_hal.h> #include <usb_hal.h>
#endif
#ifdef CONFIG_SDIO_HCI
#include <sdio_osintf.h>
#include <sdio_ops.h>
#include <sdio_hal.h>
#endif
#ifdef CONFIG_GSPI_HCI
#include <gspi_osintf.h>
#include <gspi_ops.h>
#include <gspi_hal.h>
#endif
#ifdef CONFIG_PCI_HCI
#include <pci_osintf.h>
#include <pci_ops.h>
#include <pci_hal.h>
#endif
#endif /* __DRV_TYPES_H__ */ #endif /* __DRV_TYPES_H__ */

116
include/hal_com_led.h
View file

@ -153,63 +153,9 @@ typedef enum _LED_PIN {
LED_PIN_LED2 LED_PIN_LED2
} LED_PIN; } LED_PIN;
/* ********************************************************************************
* PCIE LED Definition.
* ******************************************************************************** */
#ifdef CONFIG_PCI_HCI
typedef enum _LED_STRATEGY_PCIE {
SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
SW_LED_MODE1, /* SW control for PCI Express */
SW_LED_MODE2, /* SW control for Cameo. */
SW_LED_MODE3, /* SW contorl for RunTop. */
SW_LED_MODE4, /* SW control for Netcore */
SW_LED_MODE5, /* added by vivi, for led new mode, DLINK */
SW_LED_MODE6, /* added by vivi, for led new mode, PRONET */
SW_LED_MODE7, /* added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec */
SW_LED_MODE8, /* added by chiyokolin, for QMI */
SW_LED_MODE9, /* added by chiyokolin, for BITLAND-LENOVO, PCI Express Minicard Spec Rev.1.1 */
SW_LED_MODE10, /* added by chiyokolin, for Edimax-ASUS */
SW_LED_MODE11, /* added by hpfan, for Xavi */
SW_LED_MODE12, /* added by chiyokolin, for Azurewave */
HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) */
} LED_STRATEGY_PCIE, *PLED_STRATEGY_PCIE;
typedef struct _LED_PCIE {
PADAPTER padapter;
LED_PIN LedPin; /* Identify how to implement this SW led. */
LED_STATE CurrLedState; /* Current LED state. */
BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */
BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */
BOOLEAN bLedWPSBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */
BOOLEAN bLedSlowBlinkInProgress;/* added by vivi, for led new mode */
u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */
struct timer_list BlinkTimer; /* Timer object for led blinking. */
} LED_PCIE, *PLED_PCIE;
typedef struct _LED_PCIE LED_DATA, *PLED_DATA;
typedef enum _LED_STRATEGY_PCIE LED_STRATEGY, *PLED_STRATEGY;
VOID
LedControlPCIE(
IN PADAPTER Adapter,
IN LED_CTL_MODE LedAction
);
VOID
gen_RefreshLedState(
IN PADAPTER Adapter);
/* ******************************************************************************** /* ********************************************************************************
* USB LED Definition. * USB LED Definition.
* ******************************************************************************** */ * ******************************************************************************** */
#elif defined(CONFIG_USB_HCI)
#define IS_LED_WPS_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS \ #define IS_LED_WPS_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS \
|| ((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS_STOP \ || ((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS_STOP \
@ -276,68 +222,6 @@ LedControlUSB(
IN LED_CTL_MODE LedAction IN LED_CTL_MODE LedAction
); );
/* ********************************************************************************
* SDIO LED Definition.
* ******************************************************************************** */
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#define IS_LED_WPS_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->CurrLedState == LED_BLINK_WPS \
|| ((PLED_SDIO)_LED_SDIO)->CurrLedState == LED_BLINK_WPS_STOP \
|| ((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress)
#define IS_LED_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress \
|| ((PLED_SDIO)_LED_SDIO)->bLedScanBlinkInProgress)
typedef enum _LED_STRATEGY_SDIO {
SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
SW_LED_MODE1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
SW_LED_MODE2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */
SW_LED_MODE3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */
SW_LED_MODE4, /* for Edimax / Belkin */
SW_LED_MODE5, /* for Sercomm / Belkin */
SW_LED_MODE6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */
HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) */
} LED_STRATEGY_SDIO, *PLED_STRATEGY_SDIO;
typedef struct _LED_SDIO {
PADAPTER padapter;
LED_PIN LedPin; /* Identify how to implement this SW led. */
LED_STATE CurrLedState; /* Current LED state. */
BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */
BOOLEAN bSWLedCtrl;
BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */
/* ALPHA, added by chiyoko, 20090106 */
BOOLEAN bLedNoLinkBlinkInProgress;
BOOLEAN bLedLinkBlinkInProgress;
BOOLEAN bLedStartToLinkBlinkInProgress;
BOOLEAN bLedScanBlinkInProgress;
BOOLEAN bLedWPSBlinkInProgress;
u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */
struct timer_list BlinkTimer; /* Timer object for led blinking. */
_workitem BlinkWorkItem; /* Workitem used by BlinkTimer to manipulate H/W to blink LED. */
} LED_SDIO, *PLED_SDIO;
typedef struct _LED_SDIO LED_DATA, *PLED_DATA;
typedef enum _LED_STRATEGY_SDIO LED_STRATEGY, *PLED_STRATEGY;
VOID
LedControlSDIO(
IN PADAPTER Adapter,
IN LED_CTL_MODE LedAction
);
#endif
struct led_priv { struct led_priv {
/* add for led controll */ /* add for led controll */
LED_DATA SwLed0; LED_DATA SwLed0;

8
include/hal_com_reg.h
View file

@ -1727,12 +1727,8 @@ Current IOREG MAP
#define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */ #define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */
#define SDIO_TX_FIFO_PAGE_SZ 128 #define SDIO_TX_FIFO_PAGE_SZ 128
#ifdef CONFIG_SDIO_HCI
#define MAX_TX_AGG_PACKET_NUMBER 0x8
#else
#define MAX_TX_AGG_PACKET_NUMBER 0xFF #define MAX_TX_AGG_PACKET_NUMBER 0xFF
#define MAX_TX_AGG_PACKET_NUMBER_8812 64 #define MAX_TX_AGG_PACKET_NUMBER_8812 64
#endif
/* ----------------------------------------------------- /* -----------------------------------------------------
* *
@ -1793,11 +1789,7 @@ Current IOREG MAP
* General definitions * General definitions
* ******************************************************** */ * ******************************************************** */
#ifdef CONFIG_USB_HCI
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (175) #define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (175)
#else
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (IS_VENDOR_8188E_I_CUT_SERIES(__Adapter) ? 255 : 175)
#endif
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255
#define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255 #define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255

80
include/hal_data.h
View file

@ -27,12 +27,6 @@
#include <hal_btcoex.h> #include <hal_btcoex.h>
#endif #endif
#ifdef CONFIG_SDIO_HCI
#include <hal_sdio.h>
#endif
#ifdef CONFIG_GSPI_HCI
#include <hal_gspi.h>
#endif
/* /*
* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. * <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06.
* */ * */
@ -314,15 +308,9 @@ typedef struct hal_com_data {
u16 EEPROMVID; u16 EEPROMVID;
u16 EEPROMSVID; u16 EEPROMSVID;
#ifdef CONFIG_USB_HCI
u8 EEPROMUsbSwitch; u8 EEPROMUsbSwitch;
u16 EEPROMPID; u16 EEPROMPID;
u16 EEPROMSDID; u16 EEPROMSDID;
#endif
#ifdef CONFIG_PCI_HCI
u16 EEPROMDID;
u16 EEPROMSMID;
#endif
u8 EEPROMCustomerID; u8 EEPROMCustomerID;
u8 EEPROMSubCustomerID; u8 EEPROMSubCustomerID;
@ -536,44 +524,6 @@ typedef struct hal_com_data {
u8 rxagg_dma_timeout; u8 rxagg_dma_timeout;
#endif /* RTW_RX_AGGREGATION */ #endif /* RTW_RX_AGGREGATION */
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
/* */
/* For SDIO Interface HAL related */
/* */
/* */
/* SDIO ISR Related */
/*
* u32 IntrMask[1];
* u32 IntrMaskToSet[1];
* LOG_INTERRUPT InterruptLog; */
u32 sdio_himr;
u32 sdio_hisr;
#ifndef RTW_HALMAC
/* */
/* SDIO Tx FIFO related. */
/* */
/* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */
u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
_lock SdioTxFIFOFreePageLock;
u8 SdioTxOQTMaxFreeSpace;
u8 SdioTxOQTFreeSpace;
#else /* RTW_HALMAC */
u16 SdioTxOQTFreeSpace;
#endif /* RTW_HALMAC */
/* */
/* SDIO Rx FIFO related. */
/* */
u8 SdioRxFIFOCnt;
u16 SdioRxFIFOSize;
#ifndef RTW_HALMAC
u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */
#endif /* !RTW_HALMAC */
#endif /* CONFIG_SDIO_HCI */
#ifdef CONFIG_USB_HCI
/* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */ /* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */
BOOLEAN UsbRxHighSpeedMode; BOOLEAN UsbRxHighSpeedMode;
@ -597,33 +547,6 @@ typedef struct hal_com_data {
u8 rxagg_usb_size; u8 rxagg_usb_size;
u8 rxagg_usb_timeout; u8 rxagg_usb_timeout;
#endif/* CONFIG_USB_RX_AGGREGATION */ #endif/* CONFIG_USB_RX_AGGREGATION */
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_PCI_HCI
/* */
/* EEPROM setting. */
/* */
u32 TransmitConfig;
u32 IntrMaskToSet[2];
u32 IntArray[4];
u32 IntrMask[4];
u32 SysIntArray[1];
u32 SysIntrMask[1];
u32 IntrMaskReg[2];
u32 IntrMaskDefault[4];
BOOLEAN bL1OffSupport;
BOOLEAN bSupportBackDoor;
u8 bDefaultAntenna;
u8 bInterruptMigration;
u8 bDisableTxInt;
u16 RxTag;
#endif /* CONFIG_PCI_HCI */
#ifdef DBG_CONFIG_ERROR_DETECT #ifdef DBG_CONFIG_ERROR_DETECT
struct sreset_priv srestpriv; struct sreset_priv srestpriv;
@ -669,9 +592,6 @@ typedef struct hal_com_data {
BOOLEAN bCCKinCH14; BOOLEAN bCCKinCH14;
BB_INIT_REGISTER RegForRecover[5]; BB_INIT_REGISTER RegForRecover[5];
#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN)
BOOLEAN bCorrectBCN;
#endif
u32 RxGainOffset[4]; /*{2G, 5G_Low, 5G_Middle, G_High}*/ u32 RxGainOffset[4]; /*{2G, 5G_Low, 5G_Middle, G_High}*/
u8 BackUp_IG_REG_4_Chnl_Section[4]; /*{A,B,C,D}*/ u8 BackUp_IG_REG_4_Chnl_Section[4]; /*{A,B,C,D}*/

24
include/hal_intf.h
View file

@ -301,26 +301,17 @@ struct hal_ops {
#ifdef CONFIG_RECV_THREAD_MODE #ifdef CONFIG_RECV_THREAD_MODE
s32 (*recv_hdl)(_adapter *adapter); s32 (*recv_hdl)(_adapter *adapter);
#endif #endif
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
u32(*inirp_init)(_adapter *padapter); u32(*inirp_init)(_adapter *padapter);
u32(*inirp_deinit)(_adapter *padapter); u32(*inirp_deinit)(_adapter *padapter);
#endif
/*** interrupt hdl section ***/ /*** interrupt hdl section ***/
void (*enable_interrupt)(_adapter *padapter); void (*enable_interrupt)(_adapter *padapter);
void (*disable_interrupt)(_adapter *padapter); void (*disable_interrupt)(_adapter *padapter);
u8(*check_ips_status)(_adapter *padapter); u8(*check_ips_status)(_adapter *padapter);
#if defined(CONFIG_PCI_HCI)
s32(*interrupt_handler)(_adapter *padapter);
#endif
#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT) #if defined(CONFIG_SUPPORT_USB_INT)
void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf); void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif #endif
#if defined(CONFIG_PCI_HCI)
void (*irp_reset)(_adapter *padapter);
#endif
/*** DM section ***/ /*** DM section ***/
void (*InitSwLeds)(_adapter *padapter); void (*InitSwLeds)(_adapter *padapter);
@ -403,7 +394,7 @@ struct hal_ops {
u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
s32(*fw_dl)(_adapter *adapter, u8 wowlan); s32(*fw_dl)(_adapter *adapter, u8 wowlan);
#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI) #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
void (*clear_interrupt)(_adapter *padapter); void (*clear_interrupt)(_adapter *padapter);
#endif #endif
u8(*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan); u8(*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan);
@ -633,14 +624,8 @@ void rtw_hal_disable_interrupt(_adapter *padapter);
u8 rtw_hal_check_ips_status(_adapter *padapter); u8 rtw_hal_check_ips_status(_adapter *padapter);
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
u32 rtw_hal_inirp_init(_adapter *padapter); u32 rtw_hal_inirp_init(_adapter *padapter);
u32 rtw_hal_inirp_deinit(_adapter *padapter); u32 rtw_hal_inirp_deinit(_adapter *padapter);
#endif
#if defined(CONFIG_PCI_HCI)
void rtw_hal_irp_reset(_adapter *padapter);
#endif
u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val); u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
@ -677,10 +662,7 @@ void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMa
#define phy_query_mac_reg phy_query_bb_reg #define phy_query_mac_reg phy_query_bb_reg
#if defined(CONFIG_PCI_HCI) #if defined(CONFIG_SUPPORT_USB_INT)
s32 rtw_hal_interrupt_handler(_adapter *padapter);
#endif
#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf); void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf);
#endif #endif

3
include/osdep_intf.h
View file

@ -48,7 +48,6 @@ struct intf_priv {
_mutex ioctl_mutex; _mutex ioctl_mutex;
#ifdef CONFIG_USB_HCI
/* when in USB, IO is through interrupt in/out endpoints */ /* when in USB, IO is through interrupt in/out endpoints */
struct usb_device *udev; struct usb_device *udev;
PURB piorw_urb; PURB piorw_urb;
@ -58,10 +57,8 @@ struct intf_priv {
struct timer_list io_timer; struct timer_list io_timer;
u8 bio_irp_timeout; u8 bio_irp_timeout;
u8 bio_timer_cancel; u8 bio_timer_cancel;
#endif
}; };
#ifdef CONFIG_R871X_TEST #ifdef CONFIG_R871X_TEST
int rtw_start_pseudo_adhoc(_adapter *padapter); int rtw_start_pseudo_adhoc(_adapter *padapter);
int rtw_stop_pseudo_adhoc(_adapter *padapter); int rtw_stop_pseudo_adhoc(_adapter *padapter);

8
include/osdep_service.h
View file

@ -144,10 +144,8 @@ gro_result_t dbg_rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *
#endif #endif
#endif /* CONFIG_RTW_NAPI */ #endif /* CONFIG_RTW_NAPI */
void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line); void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line);
#ifdef CONFIG_USB_HCI
void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, const int line); void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, const int line);
void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, const int line); void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, const int line);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_USE_VMALLOC #ifdef CONFIG_USE_VMALLOC
#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __func__, __LINE__) #define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __func__, __LINE__)
@ -187,12 +185,10 @@ void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dm
#endif #endif
#endif /* CONFIG_RTW_NAPI */ #endif /* CONFIG_RTW_NAPI */
#define rtw_skb_queue_purge(sk_buff_head) dbg_rtw_skb_queue_purge(sk_buff_head, MSTAT_TYPE_SKB, __func__, __LINE__) #define rtw_skb_queue_purge(sk_buff_head) dbg_rtw_skb_queue_purge(sk_buff_head, MSTAT_TYPE_SKB, __func__, __LINE__)
#ifdef CONFIG_USB_HCI
#define rtw_usb_buffer_alloc(dev, size, dma) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), MSTAT_TYPE_USB, __func__, __LINE__) #define rtw_usb_buffer_alloc(dev, size, dma) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), MSTAT_TYPE_USB, __func__, __LINE__)
#define rtw_usb_buffer_free(dev, size, addr, dma) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), MSTAT_TYPE_USB, __func__, __LINE__) #define rtw_usb_buffer_free(dev, size, addr, dma) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), MSTAT_TYPE_USB, __func__, __LINE__)
#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __func__, __LINE__) #define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __func__, __LINE__)
#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __func__, __LINE__) #define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __func__, __LINE__)
#endif /* CONFIG_USB_HCI */
#else /* DBG_MEM_ALLOC */ #else /* DBG_MEM_ALLOC */
#define rtw_mstat_update(flag, status, sz) do {} while (0) #define rtw_mstat_update(flag, status, sz) do {} while (0)
@ -217,10 +213,8 @@ gro_result_t _rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb
#endif /* CONFIG_RTW_NAPI */ #endif /* CONFIG_RTW_NAPI */
void _rtw_skb_queue_purge(struct sk_buff_head *list); void _rtw_skb_queue_purge(struct sk_buff_head *list);
#ifdef CONFIG_USB_HCI
void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma); void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma);
void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma); void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma);
#endif /* CONFIG_USB_HCI */
#ifdef CONFIG_USE_VMALLOC #ifdef CONFIG_USE_VMALLOC
#define rtw_vmalloc(sz) _rtw_vmalloc((sz)) #define rtw_vmalloc(sz) _rtw_vmalloc((sz))
@ -260,12 +254,10 @@ void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_a
#endif #endif
#endif /* CONFIG_RTW_NAPI */ #endif /* CONFIG_RTW_NAPI */
#define rtw_skb_queue_purge(sk_buff_head) _rtw_skb_queue_purge(sk_buff_head) #define rtw_skb_queue_purge(sk_buff_head) _rtw_skb_queue_purge(sk_buff_head)
#ifdef CONFIG_USB_HCI
#define rtw_usb_buffer_alloc(dev, size, dma) _rtw_usb_buffer_alloc((dev), (size), (dma)) #define rtw_usb_buffer_alloc(dev, size, dma) _rtw_usb_buffer_alloc((dev), (size), (dma))
#define rtw_usb_buffer_free(dev, size, addr, dma) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) #define rtw_usb_buffer_free(dev, size, addr, dma) _rtw_usb_buffer_free((dev), (size), (addr), (dma))
#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) _rtw_usb_buffer_alloc((dev), (size), (dma)) #define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) _rtw_usb_buffer_alloc((dev), (size), (dma))
#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) _rtw_usb_buffer_free((dev), (size), (addr), (dma)) #define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) _rtw_usb_buffer_free((dev), (size), (addr), (dma))
#endif /* CONFIG_USB_HCI */
#endif /* DBG_MEM_ALLOC */ #endif /* DBG_MEM_ALLOC */
extern void *rtw_malloc2d(int h, int w, size_t size); extern void *rtw_malloc2d(int h, int w, size_t size);

4
include/osdep_service_linux.h
View file

@ -107,14 +107,12 @@
#include <linux/fs.h> #include <linux/fs.h>
#endif #endif
#ifdef CONFIG_USB_HCI
#include <linux/usb.h> #include <linux/usb.h>
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 21)) #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 21))
#include <linux/usb_ch9.h> #include <linux/usb_ch9.h>
#else #else
#include <linux/usb/ch9.h> #include <linux/usb/ch9.h>
#endif #endif
#endif
#ifdef CONFIG_BT_COEXIST_SOCKET_TRX #ifdef CONFIG_BT_COEXIST_SOCKET_TRX
#include <net/sock.h> #include <net/sock.h>
@ -124,14 +122,12 @@
#include <linux/netlink.h> #include <linux/netlink.h>
#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
#ifdef CONFIG_USB_HCI
typedef struct urb *PURB; typedef struct urb *PURB;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22)) #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22))
#ifdef CONFIG_USB_SUSPEND #ifdef CONFIG_USB_SUSPEND
#define CONFIG_AUTOSUSPEND 1 #define CONFIG_AUTOSUSPEND 1
#endif #endif
#endif #endif
#endif
#if defined(CONFIG_RTW_GRO) && (!defined(CONFIG_RTW_NAPI)) #if defined(CONFIG_RTW_GRO) && (!defined(CONFIG_RTW_NAPI))

24
include/rtl8188e_hal.h
View file

@ -115,11 +115,7 @@ typedef struct _RT_8188E_FIRMWARE_HDR {
/* #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 */ /* 9k for 88E nornal chip , */ /* MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) */ /* #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 */ /* 9k for 88E nornal chip , */ /* MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) */
#ifdef CONFIG_USB_HCI
#define RX_DMA_SIZE_88E(__Adapter) 0x2800 #define RX_DMA_SIZE_88E(__Adapter) 0x2800
#else
#define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000)
#endif
#ifdef CONFIG_WOWLAN #ifdef CONFIG_WOWLAN
#define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/
@ -152,11 +148,7 @@ Tx FIFO Size : previous CUT:22K /I_CUT after:32KB
Tx page Size : 128B Tx page Size : 128B
Total page numbers : 176(0xB0) / 256(0x100) Total page numbers : 176(0xB0) / 256(0x100)
*/ */
#ifdef CONFIG_USB_HCI
#define TOTAL_PAGE_NUMBER_88E(_Adapter) (0xB0 - 1) #define TOTAL_PAGE_NUMBER_88E(_Adapter) (0xB0 - 1)
#else
#define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */
#endif
#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) #define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E)
#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ #define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */
@ -234,22 +226,6 @@ Total page numbers : 176(0xB0) / 256(0x100)
/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ /* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */
#ifdef CONFIG_PCI_HCI
/* according to the define in the rtw_xmit.h, rtw_recv.h */
#define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */
#ifdef CONFIG_CONCURRENT_MODE
/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */
#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */
/*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */
#else
#define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */
/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) */ /* 192 */
#endif
void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
#endif /* CONFIG_PCI_HCI */
/* rtl8188e_hal_init.c */ /* rtl8188e_hal_init.c */
s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw);

10
include/rtl8188e_led.h
View file

@ -24,17 +24,7 @@
/* ******************************************************************************** /* ********************************************************************************
* Interface to manipulate LED objects. * Interface to manipulate LED objects.
* ******************************************************************************** */ * ******************************************************************************** */
#ifdef CONFIG_USB_HCI
void rtl8188eu_InitSwLeds(PADAPTER padapter); void rtl8188eu_InitSwLeds(PADAPTER padapter);
void rtl8188eu_DeInitSwLeds(PADAPTER padapter); void rtl8188eu_DeInitSwLeds(PADAPTER padapter);
#endif
#ifdef CONFIG_PCI_HCI
void rtl8188ee_InitSwLeds(PADAPTER padapter);
void rtl8188ee_DeInitSwLeds(PADAPTER padapter);
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
void rtl8188es_InitSwLeds(PADAPTER padapter);
void rtl8188es_DeInitSwLeds(PADAPTER padapter);
#endif
#endif #endif

29
include/rtl8188e_recv.h
View file

@ -24,8 +24,6 @@
#define RECV_BLK_CNT 16 #define RECV_BLK_CNT 16
#define RECV_BLK_TH RECV_BLK_CNT #define RECV_BLK_TH RECV_BLK_CNT
#if defined(CONFIG_USB_HCI)
#ifndef MAX_RECVBUF_SZ #ifndef MAX_RECVBUF_SZ
#ifndef CONFIG_MINIMAL_MEMORY_USAGE #ifndef CONFIG_MINIMAL_MEMORY_USAGE
/* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */
@ -38,20 +36,6 @@
#endif #endif
#endif /* !MAX_RECVBUF_SZ */ #endif /* !MAX_RECVBUF_SZ */
#elif defined(CONFIG_PCI_HCI)
/* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */
/* #define MAX_RECVBUF_SZ (9100) */
/* #else */
#define MAX_RECVBUF_SZ (4000) /* about 4K
* #endif */
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#define MAX_RECVBUF_SZ (10240)
#endif
/* Rx smooth factor */ /* Rx smooth factor */
#define Rx_Smooth_Factor (20) #define Rx_Smooth_Factor (20)
@ -140,22 +124,9 @@ typedef struct rxreport_8188e {
u32 rsvd2413:19; u32 rsvd2413:19;
} RXREPORT, *PRXREPORT; } RXREPORT, *PRXREPORT;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
s32 rtl8188es_init_recv_priv(PADAPTER padapter);
void rtl8188es_free_recv_priv(PADAPTER padapter);
#endif
#ifdef CONFIG_USB_HCI
void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
s32 rtl8188eu_init_recv_priv(PADAPTER padapter); s32 rtl8188eu_init_recv_priv(PADAPTER padapter);
void rtl8188eu_free_recv_priv(PADAPTER padapter); void rtl8188eu_free_recv_priv(PADAPTER padapter);
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8188ee_init_recv_priv(PADAPTER padapter);
void rtl8188ee_free_recv_priv(PADAPTER padapter);
#endif
void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat); void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat);

14
include/rtl8188e_xmit.h
View file

@ -261,7 +261,6 @@ void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
#endif #endif
#endif #endif
#ifdef CONFIG_USB_HCI
s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); s32 rtl8188eu_init_xmit_priv(PADAPTER padapter);
void rtl8188eu_free_xmit_priv(PADAPTER padapter); void rtl8188eu_free_xmit_priv(PADAPTER padapter);
s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
@ -270,19 +269,6 @@ void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter);
void rtl8188eu_xmit_tasklet(void *priv); void rtl8188eu_xmit_tasklet(void *priv);
s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#endif
#ifdef CONFIG_PCI_HCI
s32 rtl8188ee_init_xmit_priv(PADAPTER padapter);
void rtl8188ee_free_xmit_priv(PADAPTER padapter);
void rtl8188ee_xmitframe_resume(_adapter *padapter);
s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
void rtl8188ee_xmit_tasklet(void *priv);
#endif
#ifdef CONFIG_TX_EARLY_MODE #ifdef CONFIG_TX_EARLY_MODE
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);

79
include/rtw_io.h
View file

@ -117,19 +117,6 @@ struct _io_ops {
void (*_read_port_cancel)(struct intf_hdl *pintfhdl); void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
void (*_write_port_cancel)(struct intf_hdl *pintfhdl); void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
#ifdef CONFIG_SDIO_HCI
u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr);
u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr);
u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr);
int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif
}; };
struct io_req { struct io_req {
@ -254,24 +241,8 @@ struct reg_protocol_wt {
#endif #endif
}; };
#ifdef CONFIG_PCI_HCI
#define MAX_CONTINUAL_IO_ERR 4 #define MAX_CONTINUAL_IO_ERR 4
#endif
#ifdef CONFIG_USB_HCI
#define MAX_CONTINUAL_IO_ERR 4
#endif
#ifdef CONFIG_SDIO_HCI
#define SD_IO_TRY_CNT (8)
#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT
#endif
#ifdef CONFIG_GSPI_HCI
#define SD_IO_TRY_CNT (8)
#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT
#endif
int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj); int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj);
void rtw_reset_continual_io_error(struct dvobj_priv *dvobj); void rtw_reset_continual_io_error(struct dvobj_priv *dvobj);
@ -326,18 +297,6 @@ extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val);
extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val);
extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata);
#ifdef CONFIG_SDIO_HCI
u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 _rtw_sd_iread8(_adapter *adapter, u32 addr);
u16 _rtw_sd_iread16(_adapter *adapter, u32 addr);
u32 _rtw_sd_iread32(_adapter *adapter, u32 addr);
int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val);
int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val);
int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val);
extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val);
extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val);
@ -362,18 +321,6 @@ extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *cal
extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
extern int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line); extern int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line);
#ifdef CONFIG_SDIO_HCI
u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line);
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line);
u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line);
u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line);
int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __func__, __LINE__) #define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __func__, __LINE__)
#define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __func__, __LINE__) #define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __func__, __LINE__)
#define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __func__, __LINE__) #define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __func__, __LINE__)
@ -395,18 +342,6 @@ int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter)
#ifdef CONFIG_SDIO_HCI
#define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__)
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
#define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__)
#define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__)
#define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__)
#define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__)
#define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__)
#define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__)
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#else /* DBG_IO */ #else /* DBG_IO */
#define match_read_sniff_ranges(addr, len) _FALSE #define match_read_sniff_ranges(addr, len) _FALSE
#define match_write_sniff_ranges(addr, len) _FALSE #define match_write_sniff_ranges(addr, len) _FALSE
@ -433,18 +368,6 @@ int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms)) #define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) #define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter))
#ifdef CONFIG_SDIO_HCI
#define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr))
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
#define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr))
#define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr))
#define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr))
#define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val))
#define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val))
#define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val))
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
#endif /* CONFIG_SDIO_HCI */
#endif /* DBG_IO */ #endif /* DBG_IO */
extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem);

3
include/rtw_mp.h
View file

@ -36,8 +36,6 @@ struct mp_xmit_frame {
_adapter *padapter; _adapter *padapter;
#ifdef CONFIG_USB_HCI
/* insert urb, irp, and irpcnt info below... */ /* insert urb, irp, and irpcnt info below... */
/* max frag_cnt = 8 */ /* max frag_cnt = 8 */
@ -51,7 +49,6 @@ struct mp_xmit_frame {
sint last[8]; sint last[8];
uint irpcnt; uint irpcnt;
uint fragcnt; uint fragcnt;
#endif /* CONFIG_USB_HCI */
uint mem[(MAX_MP_XMITBUF_SZ >> 2)]; uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
}; };

42
include/rtw_recv.h
View file

@ -23,13 +23,7 @@
#ifdef CONFIG_SINGLE_RECV_BUF #ifdef CONFIG_SINGLE_RECV_BUF
#define NR_RECVBUFF (1) #define NR_RECVBUFF (1)
#else #else
#if defined(CONFIG_GSPI_HCI)
#define NR_RECVBUFF (32)
#elif defined(CONFIG_SDIO_HCI)
#define NR_RECVBUFF (8) #define NR_RECVBUFF (8)
#else
#define NR_RECVBUFF (8)
#endif
#endif /* CONFIG_SINGLE_RECV_BUF */ #endif /* CONFIG_SINGLE_RECV_BUF */
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
#define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1) #define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1)
@ -253,27 +247,6 @@ struct recv_stat {
#define EOR BIT(30) #define EOR BIT(30)
#ifdef CONFIG_PCI_HCI
#define PCI_MAX_RX_QUEUE 1/* MSDU packet queue, Rx Command Queue */
#define PCI_MAX_RX_COUNT 128
#ifdef CONFIG_TRX_BD_ARCH
#define RX_BD_NUM PCI_MAX_RX_COUNT /* alias */
#endif
struct rtw_rx_ring {
#ifdef CONFIG_TRX_BD_ARCH
struct rx_buf_desc *buf_desc;
#else
struct recv_stat *desc;
#endif
dma_addr_t dma;
unsigned int idx;
struct sk_buff *rx_buf[PCI_MAX_RX_COUNT];
};
#endif
/* /*
accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch) accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
; halt(passive) ; ; halt(passive) ;
@ -312,7 +285,6 @@ struct recv_priv {
uint rx_smallpacket_crcerr; uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr; uint rx_middlepacket_crcerr;
#ifdef CONFIG_USB_HCI
/* u8 *pallocated_urb_buf; */ /* u8 *pallocated_urb_buf; */
_sema allrxreturnevt; _sema allrxreturnevt;
uint ff_hwaddr; uint ff_hwaddr;
@ -324,7 +296,6 @@ struct recv_priv {
u8 *int_in_buf; u8 *int_in_buf;
#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */ #endif /* CONFIG_USB_INTERRUPT_IN_PIPE */
#endif
struct tasklet_struct irq_prepare_beacon_tasklet; struct tasklet_struct irq_prepare_beacon_tasklet;
struct tasklet_struct recv_tasklet; struct tasklet_struct recv_tasklet;
struct sk_buff_head free_recv_skb_queue; struct sk_buff_head free_recv_skb_queue;
@ -342,16 +313,7 @@ struct recv_priv {
_queue free_recv_buf_queue; _queue free_recv_buf_queue;
u32 free_recv_buf_queue_cnt; u32 free_recv_buf_queue_cnt;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_USB_HCI)
_queue recv_buf_pending_queue; _queue recv_buf_pending_queue;
#endif
#ifdef CONFIG_PCI_HCI
/* Rx */
struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE];
int rxringcount; /* size should be PCI_MAX_RX_QUEUE */
u16 rxbuffersize;
#endif
/* For display the phy informatiom */ /* For display the phy informatiom */
u8 is_signal_dbg; /* for debug */ u8 is_signal_dbg; /* for debug */
@ -422,8 +384,6 @@ struct recv_buf {
u8 *ptail; u8 *ptail;
u8 *pend; u8 *pend;
#ifdef CONFIG_USB_HCI
PURB purb; PURB purb;
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u32 alloc_sz; u32 alloc_sz;
@ -431,8 +391,6 @@ struct recv_buf {
u8 irp_pending; u8 irp_pending;
int transfer_len; int transfer_len;
#endif
_pkt *pskb; _pkt *pskb;
}; };

170
include/rtw_xmit.h
View file

@ -21,24 +21,6 @@
#define _RTW_XMIT_H_ #define _RTW_XMIT_H_
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifdef CONFIG_TX_AGGREGATION
#define MAX_XMITBUF_SZ (20480) /* 20k */
/* #define SDIO_TX_AGG_MAX 5 */
#else
#define MAX_XMITBUF_SZ (1664)
#define SDIO_TX_AGG_MAX 1
#endif
#if defined CONFIG_SDIO_HCI
#define NR_XMITBUFF (16)
#endif
#if defined(CONFIG_GSPI_HCI)
#define NR_XMITBUFF (128)
#endif
#elif defined (CONFIG_USB_HCI)
#ifdef CONFIG_USB_TX_AGGREGATION #ifdef CONFIG_USB_TX_AGGREGATION
#if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1) #if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1)
#define MAX_XMITBUF_SZ (12288) /* 12k 1536*8 */ #define MAX_XMITBUF_SZ (12288) /* 12k 1536*8 */
@ -56,24 +38,12 @@
#else #else
#define NR_XMITBUFF (4) #define NR_XMITBUFF (4)
#endif /* CONFIG_SINGLE_XMIT_BUF */ #endif /* CONFIG_SINGLE_XMIT_BUF */
#elif defined (CONFIG_PCI_HCI)
#ifdef CONFIG_TX_AMSDU
#define MAX_XMITBUF_SZ (3500)
#else
#define MAX_XMITBUF_SZ (1664)
#endif
#define NR_XMITBUFF (128)
#endif
#ifdef CONFIG_PCI_HCI
#define XMITBUF_ALIGN_SZ 4
#else
#ifdef USB_XMITBUF_ALIGN_SZ #ifdef USB_XMITBUF_ALIGN_SZ
#define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ) #define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ)
#else #else
#define XMITBUF_ALIGN_SZ 512 #define XMITBUF_ALIGN_SZ 512
#endif #endif
#endif
/* xmit extension buff defination */ /* xmit extension buff defination */
#define MAX_XMIT_EXTBUF_SZ (1536) #define MAX_XMIT_EXTBUF_SZ (1536)
@ -104,14 +74,6 @@
#define HW_QUEUE_ENTRY 8 #define HW_QUEUE_ENTRY 8
#ifdef CONFIG_PCI_HCI
#ifdef CONFIG_TRX_BD_ARCH
#define TX_BD_NUM (128+1) /* +1 result from ring buffer */
#else
#define TXDESC_NUM 128
#endif
#endif
#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ #define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
do {\ do {\
pattrib_iv[0] = dot11txpn._byte_.TSC0;\ pattrib_iv[0] = dot11txpn._byte_.TSC0;\
@ -175,18 +137,12 @@
#endif #endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#define TXDESC_OFFSET TXDESC_SIZE
#endif
#ifdef CONFIG_USB_HCI
#ifdef USB_PACKET_OFFSET_SZ #ifdef USB_PACKET_OFFSET_SZ
#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
#else #else
#define PACKET_OFFSET_SZ (8) #define PACKET_OFFSET_SZ (8)
#endif #endif
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
#endif
enum TXDESC_SC { enum TXDESC_SC {
SC_DONT_CARE = 0x00, SC_DONT_CARE = 0x00,
@ -243,27 +199,6 @@ union txdesc {
}; };
#endif #endif
#ifdef CONFIG_PCI_HCI
#define PCI_MAX_TX_QUEUE_COUNT 8 /* == HW_QUEUE_ENTRY */
struct rtw_tx_ring {
unsigned char qid;
#ifdef CONFIG_TRX_BD_ARCH
struct tx_buf_desc *buf_desc;
#else
struct tx_desc *desc;
#endif
dma_addr_t dma;
unsigned int idx;
unsigned int entries;
_queue queue;
u32 qlen;
#ifdef CONFIG_TRX_BD_ARCH
u16 hw_rp_cache;
#endif
};
#endif
struct hw_xmit { struct hw_xmit {
/* _lock xmit_lock; */ /* _lock xmit_lock; */
/* _list pending; */ /* _list pending; */
@ -273,56 +208,6 @@ struct hw_xmit {
int accnt; int accnt;
}; };
#if 0
struct pkt_attrib {
u8 type;
u8 subtype;
u8 bswenc;
u8 dhcp_pkt;
u16 ether_type;
int pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */
int pkt_hdrlen; /* the original 802.3 pkt header len */
int hdrlen; /* the WLAN Header Len */
int nr_frags;
int last_txcmdsz;
int encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
u8 iv[8];
int iv_len;
u8 icv[8];
int icv_len;
int priority;
int ack_policy;
int mac_id;
int vcs_mode; /* virtual carrier sense method */
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 key_idx;
u8 qos_en;
u8 ht_en;
u8 raid;/* rate adpative id */
u8 bwmode;
u8 ch_offset;/* PRIME_CHNL_OFFSET */
u8 sgi;/* short GI */
u8 ampdu_en;/* tx ampdu enable */
u8 mdata;/* more data bit */
u8 eosp;
u8 triggered;/* for ap mode handling Power Saving sta */
u32 qsel;
u16 seqnum;
struct sta_info *psta;
#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
u8 hw_tcp_csum;
#endif
};
#else
/* reduce size */ /* reduce size */
struct pkt_attrib { struct pkt_attrib {
u8 type; u8 type;
@ -409,7 +294,6 @@ struct pkt_attrib {
#endif #endif
}; };
#endif
#ifdef CONFIG_TX_AMSDU #ifdef CONFIG_TX_AMSDU
enum { enum {
@ -491,8 +375,6 @@ struct xmit_buf {
struct submit_ctx *sctx; struct submit_ctx *sctx;
#ifdef CONFIG_USB_HCI
/* u32 sz[8]; */ /* u32 sz[8]; */
u32 ff_hwaddr; u32 ff_hwaddr;
#ifdef RTW_HALMAC #ifdef RTW_HALMAC
@ -506,26 +388,6 @@ struct xmit_buf {
sint last[8]; sint last[8];
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 *phead;
u8 *pdata;
u8 *ptail;
u8 *pend;
u32 ff_hwaddr;
u8 pg_num;
u8 agg_num;
#endif
#ifdef CONFIG_PCI_HCI
#ifdef CONFIG_TRX_BD_ARCH
/*struct tx_buf_desc *buf_desc;*/
#else
struct tx_desc *desc;
#endif
#endif
#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT) #if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT)
u8 no; u8 no;
#endif #endif
@ -548,17 +410,10 @@ struct xmit_frame {
struct xmit_buf *pxmitbuf; struct xmit_buf *pxmitbuf;
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
u8 pg_num;
u8 agg_num;
#endif
#ifdef CONFIG_USB_HCI
#ifdef CONFIG_USB_TX_AGGREGATION #ifdef CONFIG_USB_TX_AGGREGATION
u8 agg_num; u8 agg_num;
#endif #endif
s8 pkt_offset; s8 pkt_offset;
#endif
#ifdef CONFIG_XMIT_ACK #ifdef CONFIG_XMIT_ACK
u8 ack_report; u8 ack_report;
@ -679,7 +534,6 @@ struct xmit_priv {
u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */ u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */
#ifdef CONFIG_USB_HCI
_sema tx_retevt;/* all tx return event; */ _sema tx_retevt;/* all tx return event; */
u8 txirp_cnt; u8 txirp_cnt;
@ -690,26 +544,6 @@ struct xmit_priv {
int viq_cnt; int viq_cnt;
int voq_cnt; int voq_cnt;
#endif
#ifdef CONFIG_PCI_HCI
/* Tx */
struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
int txringcount[PCI_MAX_TX_QUEUE_COUNT];
u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */
struct tasklet_struct xmit_tasklet;
#endif
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
#ifdef CONFIG_SDIO_TX_TASKLET
struct tasklet_struct xmit_tasklet;
#else
_thread_hdl_ SdioXmitThread;
_sema SdioXmitSema;
_sema SdioXmitTerminateSema;
#endif /* CONFIG_SDIO_TX_TASKLET */
#endif /* CONFIG_SDIO_HCI */
_queue free_xmitbuf_queue; _queue free_xmitbuf_queue;
_queue pending_xmitbuf_queue; _queue pending_xmitbuf_queue;
u8 *pallocated_xmitbuf; u8 *pallocated_xmitbuf;
@ -726,11 +560,7 @@ struct xmit_priv {
u16 nqos_ssn; u16 nqos_ssn;
#ifdef CONFIG_TX_EARLY_MODE #ifdef CONFIG_TX_EARLY_MODE
#ifdef CONFIG_SDIO_HCI
#define MAX_AGG_PKT_NUM 20
#else
#define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */ #define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */
#endif
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM]; struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
#endif #endif