mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-15 01:19:36 +00:00
rtl8188eu: Remove dead code for connections other than USB
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
parent
fec17178bc
commit
681e680993
16 changed files with 4 additions and 696 deletions
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@ -820,11 +820,6 @@ struct halmacpriv {
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/* For asynchronous functions */
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struct halmac_indicator *indicator;
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#ifdef CONFIG_SDIO_HCI
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/* Store hardware tx queue page number setting */
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u16 txpage[HW_QUEUE_ENTRY];
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#endif /* CONFIG_SDIO_HCI */
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};
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#endif /* RTW_HALMAC */
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@ -932,8 +927,6 @@ struct dvobj_priv {
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/*-------- below is for USB INTERFACE --------*/
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#ifdef CONFIG_USB_HCI
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u8 usb_speed; /* 1.1, 2.0 or 3.0 */
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u8 nr_endpoint;
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u8 RtNumInPipes;
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@ -956,56 +949,8 @@ struct dvobj_priv {
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struct usb_interface *pusbintf;
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struct usb_device *pusbdev;
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#endif/* CONFIG_USB_HCI */
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/*-------- below is for PCIE INTERFACE --------*/
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#ifdef CONFIG_PCI_HCI
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struct pci_dev *ppcidev;
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/* PCI MEM map */
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unsigned long pci_mem_end; /* shared mem end */
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unsigned long pci_mem_start; /* shared mem start */
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/* PCI IO map */
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unsigned long pci_base_addr; /* device I/O address */
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#ifdef RTK_129X_PLATFORM
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unsigned long ctrl_start;
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/* PCI MASK addr */
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unsigned long mask_addr;
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/* PCI TRANSLATE addr */
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unsigned long tran_addr;
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_lock io_reg_lock;
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#endif
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/* PciBridge */
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struct pci_priv pcipriv;
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unsigned int irq; /* get from pci_dev.irq, store to net_device.irq */
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u16 irqline;
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u8 irq_enabled;
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RT_ISR_CONTENT isr_content;
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_lock irq_th_lock;
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/* ASPM */
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u8 const_pci_aspm;
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u8 const_amdpci_aspm;
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u8 const_hwsw_rfoff_d3;
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u8 const_support_pciaspm;
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/* pci-e bridge */
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u8 const_hostpci_aspm_setting;
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/* pci-e device */
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u8 const_devicepci_aspm_setting;
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u8 b_support_aspm; /* If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. */
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u8 b_support_backdoor;
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u8 bdma64;
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#endif/* CONFIG_PCI_HCI */
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#ifdef CONFIG_MCC_MODE
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struct mcc_obj_priv mcc_objpriv;
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#endif /*CONFIG_MCC_MODE */
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@ -1058,18 +1003,7 @@ static inline void dev_clr_drv_stopped(struct dvobj_priv *dvobj)
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static struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
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{
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/* todo: get interface type from dvobj and the return the dev accordingly */
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#ifdef CONFIG_USB_HCI
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return &dvobj->pusbintf->dev;
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#endif
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#ifdef CONFIG_SDIO_HCI
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return &dvobj->intf_data.func->dev;
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#endif
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#ifdef CONFIG_GSPI_HCI
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return &dvobj->intf_data.func->dev;
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#endif
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#ifdef CONFIG_PCI_HCI
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return &dvobj->ppcidev->dev;
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#endif
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}
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_adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj);
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@ -1485,28 +1419,8 @@ int recvbuf2recvframe(PADAPTER padapter, void *ptr);
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#endif
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/* HCI Related header file */
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#ifdef CONFIG_USB_HCI
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#include <usb_osintf.h>
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#include <usb_ops.h>
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#include <usb_hal.h>
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#endif
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#ifdef CONFIG_SDIO_HCI
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#include <sdio_osintf.h>
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#include <sdio_ops.h>
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#include <sdio_hal.h>
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#endif
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#ifdef CONFIG_GSPI_HCI
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#include <gspi_osintf.h>
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#include <gspi_ops.h>
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#include <gspi_hal.h>
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#endif
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#ifdef CONFIG_PCI_HCI
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#include <pci_osintf.h>
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#include <pci_ops.h>
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#include <pci_hal.h>
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#endif
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#endif /* __DRV_TYPES_H__ */
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@ -153,63 +153,9 @@ typedef enum _LED_PIN {
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LED_PIN_LED2
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} LED_PIN;
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/* ********************************************************************************
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* PCIE LED Definition.
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* ******************************************************************************** */
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#ifdef CONFIG_PCI_HCI
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typedef enum _LED_STRATEGY_PCIE {
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SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
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SW_LED_MODE1, /* SW control for PCI Express */
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SW_LED_MODE2, /* SW control for Cameo. */
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SW_LED_MODE3, /* SW contorl for RunTop. */
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SW_LED_MODE4, /* SW control for Netcore */
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SW_LED_MODE5, /* added by vivi, for led new mode, DLINK */
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SW_LED_MODE6, /* added by vivi, for led new mode, PRONET */
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SW_LED_MODE7, /* added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec */
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SW_LED_MODE8, /* added by chiyokolin, for QMI */
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SW_LED_MODE9, /* added by chiyokolin, for BITLAND-LENOVO, PCI Express Minicard Spec Rev.1.1 */
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SW_LED_MODE10, /* added by chiyokolin, for Edimax-ASUS */
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SW_LED_MODE11, /* added by hpfan, for Xavi */
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SW_LED_MODE12, /* added by chiyokolin, for Azurewave */
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HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) */
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} LED_STRATEGY_PCIE, *PLED_STRATEGY_PCIE;
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typedef struct _LED_PCIE {
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PADAPTER padapter;
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LED_PIN LedPin; /* Identify how to implement this SW led. */
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LED_STATE CurrLedState; /* Current LED state. */
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BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */
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BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */
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BOOLEAN bLedWPSBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */
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BOOLEAN bLedSlowBlinkInProgress;/* added by vivi, for led new mode */
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u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
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LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */
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struct timer_list BlinkTimer; /* Timer object for led blinking. */
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} LED_PCIE, *PLED_PCIE;
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typedef struct _LED_PCIE LED_DATA, *PLED_DATA;
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typedef enum _LED_STRATEGY_PCIE LED_STRATEGY, *PLED_STRATEGY;
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VOID
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LedControlPCIE(
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IN PADAPTER Adapter,
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IN LED_CTL_MODE LedAction
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);
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VOID
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gen_RefreshLedState(
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IN PADAPTER Adapter);
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/* ********************************************************************************
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* USB LED Definition.
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* ******************************************************************************** */
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#elif defined(CONFIG_USB_HCI)
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#define IS_LED_WPS_BLINKING(_LED_USB) (((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS \
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|| ((PLED_USB)_LED_USB)->CurrLedState == LED_BLINK_WPS_STOP \
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@ -276,68 +222,6 @@ LedControlUSB(
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IN LED_CTL_MODE LedAction
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);
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/* ********************************************************************************
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* SDIO LED Definition.
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* ******************************************************************************** */
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#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
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#define IS_LED_WPS_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->CurrLedState == LED_BLINK_WPS \
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|| ((PLED_SDIO)_LED_SDIO)->CurrLedState == LED_BLINK_WPS_STOP \
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|| ((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress)
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#define IS_LED_BLINKING(_LED_SDIO) (((PLED_SDIO)_LED_SDIO)->bLedWPSBlinkInProgress \
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|| ((PLED_SDIO)_LED_SDIO)->bLedScanBlinkInProgress)
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typedef enum _LED_STRATEGY_SDIO {
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SW_LED_MODE0, /* SW control 1 LED via GPIO0. It is default option. */
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SW_LED_MODE1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
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SW_LED_MODE2, /* SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. */
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SW_LED_MODE3, /* SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. */
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SW_LED_MODE4, /* for Edimax / Belkin */
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SW_LED_MODE5, /* for Sercomm / Belkin */
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SW_LED_MODE6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */
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HW_LED, /* HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) */
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} LED_STRATEGY_SDIO, *PLED_STRATEGY_SDIO;
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typedef struct _LED_SDIO {
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PADAPTER padapter;
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LED_PIN LedPin; /* Identify how to implement this SW led. */
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LED_STATE CurrLedState; /* Current LED state. */
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BOOLEAN bLedOn; /* TRUE if LED is ON, FALSE if LED is OFF. */
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BOOLEAN bSWLedCtrl;
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BOOLEAN bLedBlinkInProgress; /* TRUE if it is blinking, FALSE o.w.. */
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/* ALPHA, added by chiyoko, 20090106 */
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BOOLEAN bLedNoLinkBlinkInProgress;
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BOOLEAN bLedLinkBlinkInProgress;
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BOOLEAN bLedStartToLinkBlinkInProgress;
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BOOLEAN bLedScanBlinkInProgress;
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BOOLEAN bLedWPSBlinkInProgress;
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u32 BlinkTimes; /* Number of times to toggle led state for blinking. */
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LED_STATE BlinkingLedState; /* Next state for blinking, either LED_ON or LED_OFF are. */
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struct timer_list BlinkTimer; /* Timer object for led blinking. */
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_workitem BlinkWorkItem; /* Workitem used by BlinkTimer to manipulate H/W to blink LED. */
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} LED_SDIO, *PLED_SDIO;
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typedef struct _LED_SDIO LED_DATA, *PLED_DATA;
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typedef enum _LED_STRATEGY_SDIO LED_STRATEGY, *PLED_STRATEGY;
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VOID
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LedControlSDIO(
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IN PADAPTER Adapter,
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IN LED_CTL_MODE LedAction
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);
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#endif
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struct led_priv {
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/* add for led controll */
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LED_DATA SwLed0;
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@ -1727,12 +1727,8 @@ Current IOREG MAP
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#define SDIO_TX_FREE_PG_QUEUE 4 /* The number of Tx FIFO free page */
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#define SDIO_TX_FIFO_PAGE_SZ 128
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#ifdef CONFIG_SDIO_HCI
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#define MAX_TX_AGG_PACKET_NUMBER 0x8
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#else
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#define MAX_TX_AGG_PACKET_NUMBER 0xFF
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#define MAX_TX_AGG_PACKET_NUMBER_8812 64
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#endif
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/* -----------------------------------------------------
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*
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@ -1793,11 +1789,7 @@ Current IOREG MAP
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* General definitions
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* ******************************************************** */
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#ifdef CONFIG_USB_HCI
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#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (175)
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#else
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#define LAST_ENTRY_OF_TX_PKT_BUFFER_8188E(__Adapter) (IS_VENDOR_8188E_I_CUT_SERIES(__Adapter) ? 255 : 175)
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#endif
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#define LAST_ENTRY_OF_TX_PKT_BUFFER_8812 255
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#define LAST_ENTRY_OF_TX_PKT_BUFFER_8723B 255
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#define LAST_ENTRY_OF_TX_PKT_BUFFER_8192C 255
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@ -27,12 +27,6 @@
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#include <hal_btcoex.h>
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#endif
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#ifdef CONFIG_SDIO_HCI
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#include <hal_sdio.h>
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#endif
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#ifdef CONFIG_GSPI_HCI
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#include <hal_gspi.h>
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#endif
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/*
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* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06.
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* */
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@ -314,15 +308,9 @@ typedef struct hal_com_data {
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u16 EEPROMVID;
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u16 EEPROMSVID;
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#ifdef CONFIG_USB_HCI
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u8 EEPROMUsbSwitch;
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u16 EEPROMPID;
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u16 EEPROMSDID;
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#endif
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#ifdef CONFIG_PCI_HCI
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u16 EEPROMDID;
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u16 EEPROMSMID;
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#endif
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u8 EEPROMCustomerID;
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u8 EEPROMSubCustomerID;
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@ -536,44 +524,6 @@ typedef struct hal_com_data {
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u8 rxagg_dma_timeout;
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#endif /* RTW_RX_AGGREGATION */
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#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
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/* */
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/* For SDIO Interface HAL related */
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/* */
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/* */
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/* SDIO ISR Related */
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/*
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* u32 IntrMask[1];
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* u32 IntrMaskToSet[1];
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* LOG_INTERRUPT InterruptLog; */
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u32 sdio_himr;
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u32 sdio_hisr;
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#ifndef RTW_HALMAC
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/* */
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/* SDIO Tx FIFO related. */
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/* */
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/* HIQ, MID, LOW, PUB free pages; padapter->xmitpriv.free_txpg */
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u8 SdioTxFIFOFreePage[SDIO_TX_FREE_PG_QUEUE];
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_lock SdioTxFIFOFreePageLock;
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u8 SdioTxOQTMaxFreeSpace;
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u8 SdioTxOQTFreeSpace;
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#else /* RTW_HALMAC */
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u16 SdioTxOQTFreeSpace;
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#endif /* RTW_HALMAC */
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/* */
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/* SDIO Rx FIFO related. */
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/* */
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u8 SdioRxFIFOCnt;
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u16 SdioRxFIFOSize;
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#ifndef RTW_HALMAC
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u32 sdio_tx_max_len[SDIO_MAX_TX_QUEUE];/* H, N, L, used for sdio tx aggregation max length per queue */
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#endif /* !RTW_HALMAC */
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#endif /* CONFIG_SDIO_HCI */
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#ifdef CONFIG_USB_HCI
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/* 2010/12/10 MH Add for USB aggreation mode dynamic shceme. */
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BOOLEAN UsbRxHighSpeedMode;
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u8 rxagg_usb_size;
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u8 rxagg_usb_timeout;
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#endif/* CONFIG_USB_RX_AGGREGATION */
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#endif /* CONFIG_USB_HCI */
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#ifdef CONFIG_PCI_HCI
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/* */
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/* EEPROM setting. */
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/* */
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u32 TransmitConfig;
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u32 IntrMaskToSet[2];
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u32 IntArray[4];
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u32 IntrMask[4];
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u32 SysIntArray[1];
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u32 SysIntrMask[1];
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u32 IntrMaskReg[2];
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u32 IntrMaskDefault[4];
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BOOLEAN bL1OffSupport;
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BOOLEAN bSupportBackDoor;
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u8 bDefaultAntenna;
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u8 bInterruptMigration;
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u8 bDisableTxInt;
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u16 RxTag;
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#endif /* CONFIG_PCI_HCI */
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#ifdef DBG_CONFIG_ERROR_DETECT
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struct sreset_priv srestpriv;
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@ -669,9 +592,6 @@ typedef struct hal_com_data {
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BOOLEAN bCCKinCH14;
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BB_INIT_REGISTER RegForRecover[5];
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#if defined(CONFIG_PCI_HCI) && defined(RTL8814AE_SW_BCN)
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BOOLEAN bCorrectBCN;
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#endif
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u32 RxGainOffset[4]; /*{2G, 5G_Low, 5G_Middle, G_High}*/
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u8 BackUp_IG_REG_4_Chnl_Section[4]; /*{A,B,C,D}*/
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@ -301,26 +301,17 @@ struct hal_ops {
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#ifdef CONFIG_RECV_THREAD_MODE
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s32 (*recv_hdl)(_adapter *adapter);
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#endif
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#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
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u32(*inirp_init)(_adapter *padapter);
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u32(*inirp_deinit)(_adapter *padapter);
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#endif
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/*** interrupt hdl section ***/
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void (*enable_interrupt)(_adapter *padapter);
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void (*disable_interrupt)(_adapter *padapter);
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u8(*check_ips_status)(_adapter *padapter);
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#if defined(CONFIG_PCI_HCI)
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s32(*interrupt_handler)(_adapter *padapter);
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#endif
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#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
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#if defined(CONFIG_SUPPORT_USB_INT)
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void (*interrupt_handler)(_adapter *padapter, u16 pkt_len, u8 *pbuf);
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#endif
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#if defined(CONFIG_PCI_HCI)
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void (*irp_reset)(_adapter *padapter);
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#endif
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/*** DM section ***/
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void (*InitSwLeds)(_adapter *padapter);
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@ -403,7 +394,7 @@ struct hal_ops {
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u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
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s32(*fw_dl)(_adapter *adapter, u8 wowlan);
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#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) || defined(CONFIG_PCI_HCI)
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#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
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void (*clear_interrupt)(_adapter *padapter);
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#endif
|
||||
u8(*hal_get_tx_buff_rsvd_page_num)(_adapter *adapter, bool wowlan);
|
||||
|
@ -633,14 +624,8 @@ void rtw_hal_disable_interrupt(_adapter *padapter);
|
|||
|
||||
u8 rtw_hal_check_ips_status(_adapter *padapter);
|
||||
|
||||
#if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
|
||||
u32 rtw_hal_inirp_init(_adapter *padapter);
|
||||
u32 rtw_hal_inirp_deinit(_adapter *padapter);
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
void rtw_hal_irp_reset(_adapter *padapter);
|
||||
#endif
|
||||
|
||||
u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val);
|
||||
|
||||
|
@ -677,10 +662,7 @@ void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMa
|
|||
#define phy_query_mac_reg phy_query_bb_reg
|
||||
|
||||
|
||||
#if defined(CONFIG_PCI_HCI)
|
||||
s32 rtw_hal_interrupt_handler(_adapter *padapter);
|
||||
#endif
|
||||
#if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
|
||||
#if defined(CONFIG_SUPPORT_USB_INT)
|
||||
void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf);
|
||||
#endif
|
||||
|
||||
|
|
|
@ -48,7 +48,6 @@ struct intf_priv {
|
|||
_mutex ioctl_mutex;
|
||||
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
/* when in USB, IO is through interrupt in/out endpoints */
|
||||
struct usb_device *udev;
|
||||
PURB piorw_urb;
|
||||
|
@ -58,10 +57,8 @@ struct intf_priv {
|
|||
struct timer_list io_timer;
|
||||
u8 bio_irp_timeout;
|
||||
u8 bio_timer_cancel;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
#ifdef CONFIG_R871X_TEST
|
||||
int rtw_start_pseudo_adhoc(_adapter *padapter);
|
||||
int rtw_stop_pseudo_adhoc(_adapter *padapter);
|
||||
|
|
|
@ -144,10 +144,8 @@ gro_result_t dbg_rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *
|
|||
#endif
|
||||
#endif /* CONFIG_RTW_NAPI */
|
||||
void dbg_rtw_skb_queue_purge(struct sk_buff_head *list, enum mstat_f flags, const char *func, int line);
|
||||
#ifdef CONFIG_USB_HCI
|
||||
void *dbg_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma, const enum mstat_f flags, const char *func, const int line);
|
||||
void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma, const enum mstat_f flags, const char *func, const int line);
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
|
||||
#ifdef CONFIG_USE_VMALLOC
|
||||
#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), MSTAT_TYPE_VIR, __func__, __LINE__)
|
||||
|
@ -187,12 +185,10 @@ void dbg_rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dm
|
|||
#endif
|
||||
#endif /* CONFIG_RTW_NAPI */
|
||||
#define rtw_skb_queue_purge(sk_buff_head) dbg_rtw_skb_queue_purge(sk_buff_head, MSTAT_TYPE_SKB, __func__, __LINE__)
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define rtw_usb_buffer_alloc(dev, size, dma) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), MSTAT_TYPE_USB, __func__, __LINE__)
|
||||
#define rtw_usb_buffer_free(dev, size, addr, dma) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), MSTAT_TYPE_USB, __func__, __LINE__)
|
||||
#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) dbg_rtw_usb_buffer_alloc((dev), (size), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __func__, __LINE__)
|
||||
#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) dbg_rtw_usb_buffer_free((dev), (size), (addr), (dma), ((mstat_f) & 0xff00) | MSTAT_TYPE_USB, __func__, __LINE__)
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
|
||||
#else /* DBG_MEM_ALLOC */
|
||||
#define rtw_mstat_update(flag, status, sz) do {} while (0)
|
||||
|
@ -217,10 +213,8 @@ gro_result_t _rtw_napi_gro_receive(struct napi_struct *napi, struct sk_buff *skb
|
|||
#endif /* CONFIG_RTW_NAPI */
|
||||
void _rtw_skb_queue_purge(struct sk_buff_head *list);
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
void *_rtw_usb_buffer_alloc(struct usb_device *dev, size_t size, dma_addr_t *dma);
|
||||
void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_addr_t dma);
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
|
||||
#ifdef CONFIG_USE_VMALLOC
|
||||
#define rtw_vmalloc(sz) _rtw_vmalloc((sz))
|
||||
|
@ -260,12 +254,10 @@ void _rtw_usb_buffer_free(struct usb_device *dev, size_t size, void *addr, dma_a
|
|||
#endif
|
||||
#endif /* CONFIG_RTW_NAPI */
|
||||
#define rtw_skb_queue_purge(sk_buff_head) _rtw_skb_queue_purge(sk_buff_head)
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define rtw_usb_buffer_alloc(dev, size, dma) _rtw_usb_buffer_alloc((dev), (size), (dma))
|
||||
#define rtw_usb_buffer_free(dev, size, addr, dma) _rtw_usb_buffer_free((dev), (size), (addr), (dma))
|
||||
#define rtw_usb_buffer_alloc_f(dev, size, dma, mstat_f) _rtw_usb_buffer_alloc((dev), (size), (dma))
|
||||
#define rtw_usb_buffer_free_f(dev, size, addr, dma, mstat_f) _rtw_usb_buffer_free((dev), (size), (addr), (dma))
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
#endif /* DBG_MEM_ALLOC */
|
||||
|
||||
extern void *rtw_malloc2d(int h, int w, size_t size);
|
||||
|
|
|
@ -107,14 +107,12 @@
|
|||
#include <linux/fs.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#include <linux/usb.h>
|
||||
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 21))
|
||||
#include <linux/usb_ch9.h>
|
||||
#else
|
||||
#include <linux/usb/ch9.h>
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BT_COEXIST_SOCKET_TRX
|
||||
#include <net/sock.h>
|
||||
|
@ -124,14 +122,12 @@
|
|||
#include <linux/netlink.h>
|
||||
#endif /* CONFIG_BT_COEXIST_SOCKET_TRX */
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
typedef struct urb *PURB;
|
||||
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22))
|
||||
#ifdef CONFIG_USB_SUSPEND
|
||||
#define CONFIG_AUTOSUSPEND 1
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTW_GRO) && (!defined(CONFIG_RTW_NAPI))
|
||||
|
||||
|
|
|
@ -115,11 +115,7 @@ typedef struct _RT_8188E_FIRMWARE_HDR {
|
|||
|
||||
|
||||
/* #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 */ /* 9k for 88E nornal chip , */ /* MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) */
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define RX_DMA_SIZE_88E(__Adapter) 0x2800
|
||||
#else
|
||||
#define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WOWLAN
|
||||
#define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/
|
||||
|
@ -152,11 +148,7 @@ Tx FIFO Size : previous CUT:22K /I_CUT after:32KB
|
|||
Tx page Size : 128B
|
||||
Total page numbers : 176(0xB0) / 256(0x100)
|
||||
*/
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define TOTAL_PAGE_NUMBER_88E(_Adapter) (0xB0 - 1)
|
||||
#else
|
||||
#define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */
|
||||
#endif
|
||||
#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E)
|
||||
#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */
|
||||
|
||||
|
@ -234,22 +226,6 @@ Total page numbers : 176(0xB0) / 256(0x100)
|
|||
|
||||
/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
/* according to the define in the rtw_xmit.h, rtw_recv.h */
|
||||
#define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */
|
||||
#ifdef CONFIG_CONCURRENT_MODE
|
||||
/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */
|
||||
#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */
|
||||
/*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */
|
||||
#else
|
||||
#define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */
|
||||
/*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) */ /* 192 */
|
||||
#endif
|
||||
|
||||
void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent);
|
||||
void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1);
|
||||
#endif /* CONFIG_PCI_HCI */
|
||||
|
||||
/* rtl8188e_hal_init.c */
|
||||
|
||||
s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw);
|
||||
|
|
|
@ -24,17 +24,7 @@
|
|||
/* ********************************************************************************
|
||||
* Interface to manipulate LED objects.
|
||||
* ******************************************************************************** */
|
||||
#ifdef CONFIG_USB_HCI
|
||||
void rtl8188eu_InitSwLeds(PADAPTER padapter);
|
||||
void rtl8188eu_DeInitSwLeds(PADAPTER padapter);
|
||||
#endif
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
void rtl8188ee_InitSwLeds(PADAPTER padapter);
|
||||
void rtl8188ee_DeInitSwLeds(PADAPTER padapter);
|
||||
#endif
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
void rtl8188es_InitSwLeds(PADAPTER padapter);
|
||||
void rtl8188es_DeInitSwLeds(PADAPTER padapter);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -24,8 +24,6 @@
|
|||
#define RECV_BLK_CNT 16
|
||||
#define RECV_BLK_TH RECV_BLK_CNT
|
||||
|
||||
#if defined(CONFIG_USB_HCI)
|
||||
|
||||
#ifndef MAX_RECVBUF_SZ
|
||||
#ifndef CONFIG_MINIMAL_MEMORY_USAGE
|
||||
/* #define MAX_RECVBUF_SZ (32768) */ /* 32k */
|
||||
|
@ -38,20 +36,6 @@
|
|||
#endif
|
||||
#endif /* !MAX_RECVBUF_SZ */
|
||||
|
||||
#elif defined(CONFIG_PCI_HCI)
|
||||
/* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */
|
||||
/* #define MAX_RECVBUF_SZ (9100) */
|
||||
/* #else */
|
||||
#define MAX_RECVBUF_SZ (4000) /* about 4K
|
||||
* #endif */
|
||||
|
||||
|
||||
#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
|
||||
#define MAX_RECVBUF_SZ (10240)
|
||||
|
||||
#endif
|
||||
|
||||
/* Rx smooth factor */
|
||||
#define Rx_Smooth_Factor (20)
|
||||
|
||||
|
@ -140,22 +124,9 @@ typedef struct rxreport_8188e {
|
|||
u32 rsvd2413:19;
|
||||
} RXREPORT, *PRXREPORT;
|
||||
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
s32 rtl8188es_init_recv_priv(PADAPTER padapter);
|
||||
void rtl8188es_free_recv_priv(PADAPTER padapter);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf);
|
||||
s32 rtl8188eu_init_recv_priv(PADAPTER padapter);
|
||||
void rtl8188eu_free_recv_priv(PADAPTER padapter);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
s32 rtl8188ee_init_recv_priv(PADAPTER padapter);
|
||||
void rtl8188ee_free_recv_priv(PADAPTER padapter);
|
||||
#endif
|
||||
|
||||
void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat);
|
||||
|
||||
|
|
|
@ -261,7 +261,6 @@ void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
s32 rtl8188eu_init_xmit_priv(PADAPTER padapter);
|
||||
void rtl8188eu_free_xmit_priv(PADAPTER padapter);
|
||||
s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
|
||||
|
@ -270,19 +269,6 @@ void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc);
|
|||
s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter);
|
||||
void rtl8188eu_xmit_tasklet(void *priv);
|
||||
s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
s32 rtl8188ee_init_xmit_priv(PADAPTER padapter);
|
||||
void rtl8188ee_free_xmit_priv(PADAPTER padapter);
|
||||
void rtl8188ee_xmitframe_resume(_adapter *padapter);
|
||||
s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
|
||||
s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
|
||||
s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
|
||||
void rtl8188ee_xmit_tasklet(void *priv);
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#ifdef CONFIG_TX_EARLY_MODE
|
||||
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
|
||||
|
|
|
@ -117,19 +117,6 @@ struct _io_ops {
|
|||
|
||||
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
|
||||
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
|
||||
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||
u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr);
|
||||
u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr);
|
||||
u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr);
|
||||
int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
|
||||
int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
|
||||
int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
|
||||
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
struct io_req {
|
||||
|
@ -254,24 +241,8 @@ struct reg_protocol_wt {
|
|||
#endif
|
||||
|
||||
};
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
|
||||
#define MAX_CONTINUAL_IO_ERR 4
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define MAX_CONTINUAL_IO_ERR 4
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#define SD_IO_TRY_CNT (8)
|
||||
#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_GSPI_HCI
|
||||
#define SD_IO_TRY_CNT (8)
|
||||
#define MAX_CONTINUAL_IO_ERR SD_IO_TRY_CNT
|
||||
#endif
|
||||
|
||||
|
||||
int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj);
|
||||
void rtw_reset_continual_io_error(struct dvobj_priv *dvobj);
|
||||
|
@ -326,18 +297,6 @@ extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val);
|
|||
extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val);
|
||||
extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata);
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr);
|
||||
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||
u8 _rtw_sd_iread8(_adapter *adapter, u32 addr);
|
||||
u16 _rtw_sd_iread16(_adapter *adapter, u32 addr);
|
||||
u32 _rtw_sd_iread32(_adapter *adapter, u32 addr);
|
||||
int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val);
|
||||
int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val);
|
||||
int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val);
|
||||
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val);
|
||||
extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val);
|
||||
extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val);
|
||||
|
@ -362,18 +321,6 @@ extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *cal
|
|||
extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
|
||||
extern int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line);
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||
u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line);
|
||||
int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line);
|
||||
int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line);
|
||||
int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line);
|
||||
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
#define rtw_read8(adapter, addr) dbg_rtw_read8((adapter), (addr), __func__, __LINE__)
|
||||
#define rtw_read16(adapter, addr) dbg_rtw_read16((adapter), (addr), __func__, __LINE__)
|
||||
#define rtw_read32(adapter, addr) dbg_rtw_read32((adapter), (addr), __func__, __LINE__)
|
||||
|
@ -395,18 +342,6 @@ int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller
|
|||
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
|
||||
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter)
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#define rtw_sd_f0_read8(adapter, addr) dbg_rtw_sd_f0_read8((adapter), (addr), __func__, __LINE__)
|
||||
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||
#define rtw_sd_iread8(adapter, addr) dbg_rtw_sd_iread8((adapter), (addr), __func__, __LINE__)
|
||||
#define rtw_sd_iread16(adapter, addr) dbg_rtw_sd_iread16((adapter), (addr), __func__, __LINE__)
|
||||
#define rtw_sd_iread32(adapter, addr) dbg_rtw_sd_iread32((adapter), (addr), __func__, __LINE__)
|
||||
#define rtw_sd_iwrite8(adapter, addr, val) dbg_rtw_sd_iwrite8((adapter), (addr), (val), __func__, __LINE__)
|
||||
#define rtw_sd_iwrite16(adapter, addr, val) dbg_rtw_sd_iwrite16((adapter), (addr), (val), __func__, __LINE__)
|
||||
#define rtw_sd_iwrite32(adapter, addr, val) dbg_rtw_sd_iwrite32((adapter), (addr), (val), __func__, __LINE__)
|
||||
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
#else /* DBG_IO */
|
||||
#define match_read_sniff_ranges(addr, len) _FALSE
|
||||
#define match_write_sniff_ranges(addr, len) _FALSE
|
||||
|
@ -433,18 +368,6 @@ int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller
|
|||
#define rtw_write_port_and_wait(adapter, addr, cnt, mem, timeout_ms) _rtw_write_port_and_wait((adapter), (addr), (cnt), (mem), (timeout_ms))
|
||||
#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter))
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#define rtw_sd_f0_read8(adapter, addr) _rtw_sd_f0_read8((adapter), (addr))
|
||||
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||
#define rtw_sd_iread8(adapter, addr) _rtw_sd_iread8((adapter), (addr))
|
||||
#define rtw_sd_iread16(adapter, addr) _rtw_sd_iread16((adapter), (addr))
|
||||
#define rtw_sd_iread32(adapter, addr) _rtw_sd_iread32((adapter), (addr))
|
||||
#define rtw_sd_iwrite8(adapter, addr, val) _rtw_sd_iwrite8((adapter), (addr), (val))
|
||||
#define rtw_sd_iwrite16(adapter, addr, val) _rtw_sd_iwrite16((adapter), (addr), (val))
|
||||
#define rtw_sd_iwrite32(adapter, addr, val) _rtw_sd_iwrite32((adapter), (addr), (val))
|
||||
#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
#endif /* DBG_IO */
|
||||
|
||||
extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem);
|
||||
|
|
|
@ -36,8 +36,6 @@ struct mp_xmit_frame {
|
|||
|
||||
_adapter *padapter;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
/* insert urb, irp, and irpcnt info below... */
|
||||
/* max frag_cnt = 8 */
|
||||
|
||||
|
@ -51,7 +49,6 @@ struct mp_xmit_frame {
|
|||
sint last[8];
|
||||
uint irpcnt;
|
||||
uint fragcnt;
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
|
||||
uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
|
||||
};
|
||||
|
|
|
@ -23,13 +23,7 @@
|
|||
#ifdef CONFIG_SINGLE_RECV_BUF
|
||||
#define NR_RECVBUFF (1)
|
||||
#else
|
||||
#if defined(CONFIG_GSPI_HCI)
|
||||
#define NR_RECVBUFF (32)
|
||||
#elif defined(CONFIG_SDIO_HCI)
|
||||
#define NR_RECVBUFF (8)
|
||||
#else
|
||||
#define NR_RECVBUFF (8)
|
||||
#endif
|
||||
#endif /* CONFIG_SINGLE_RECV_BUF */
|
||||
#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
|
||||
#define NR_PREALLOC_RECV_SKB (rtw_rtkm_get_nr_recv_skb()>>1)
|
||||
|
@ -253,27 +247,6 @@ struct recv_stat {
|
|||
|
||||
#define EOR BIT(30)
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define PCI_MAX_RX_QUEUE 1/* MSDU packet queue, Rx Command Queue */
|
||||
#define PCI_MAX_RX_COUNT 128
|
||||
#ifdef CONFIG_TRX_BD_ARCH
|
||||
#define RX_BD_NUM PCI_MAX_RX_COUNT /* alias */
|
||||
#endif
|
||||
|
||||
struct rtw_rx_ring {
|
||||
#ifdef CONFIG_TRX_BD_ARCH
|
||||
struct rx_buf_desc *buf_desc;
|
||||
#else
|
||||
struct recv_stat *desc;
|
||||
#endif
|
||||
dma_addr_t dma;
|
||||
unsigned int idx;
|
||||
struct sk_buff *rx_buf[PCI_MAX_RX_COUNT];
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*
|
||||
accesser of recv_priv: rtw_recv_entry(dispatch / passive level); recv_thread(passive) ; returnpkt(dispatch)
|
||||
; halt(passive) ;
|
||||
|
@ -312,7 +285,6 @@ struct recv_priv {
|
|||
uint rx_smallpacket_crcerr;
|
||||
uint rx_middlepacket_crcerr;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
/* u8 *pallocated_urb_buf; */
|
||||
_sema allrxreturnevt;
|
||||
uint ff_hwaddr;
|
||||
|
@ -324,7 +296,6 @@ struct recv_priv {
|
|||
u8 *int_in_buf;
|
||||
#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */
|
||||
|
||||
#endif
|
||||
struct tasklet_struct irq_prepare_beacon_tasklet;
|
||||
struct tasklet_struct recv_tasklet;
|
||||
struct sk_buff_head free_recv_skb_queue;
|
||||
|
@ -342,16 +313,7 @@ struct recv_priv {
|
|||
_queue free_recv_buf_queue;
|
||||
u32 free_recv_buf_queue_cnt;
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) || defined(CONFIG_USB_HCI)
|
||||
_queue recv_buf_pending_queue;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
/* Rx */
|
||||
struct rtw_rx_ring rx_ring[PCI_MAX_RX_QUEUE];
|
||||
int rxringcount; /* size should be PCI_MAX_RX_QUEUE */
|
||||
u16 rxbuffersize;
|
||||
#endif
|
||||
|
||||
/* For display the phy informatiom */
|
||||
u8 is_signal_dbg; /* for debug */
|
||||
|
@ -422,8 +384,6 @@ struct recv_buf {
|
|||
u8 *ptail;
|
||||
u8 *pend;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
PURB purb;
|
||||
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
|
||||
u32 alloc_sz;
|
||||
|
@ -431,8 +391,6 @@ struct recv_buf {
|
|||
u8 irp_pending;
|
||||
int transfer_len;
|
||||
|
||||
#endif
|
||||
|
||||
_pkt *pskb;
|
||||
};
|
||||
|
||||
|
|
|
@ -21,24 +21,6 @@
|
|||
#define _RTW_XMIT_H_
|
||||
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
#ifdef CONFIG_TX_AGGREGATION
|
||||
#define MAX_XMITBUF_SZ (20480) /* 20k */
|
||||
/* #define SDIO_TX_AGG_MAX 5 */
|
||||
#else
|
||||
#define MAX_XMITBUF_SZ (1664)
|
||||
#define SDIO_TX_AGG_MAX 1
|
||||
#endif
|
||||
|
||||
#if defined CONFIG_SDIO_HCI
|
||||
#define NR_XMITBUFF (16)
|
||||
#endif
|
||||
#if defined(CONFIG_GSPI_HCI)
|
||||
#define NR_XMITBUFF (128)
|
||||
#endif
|
||||
|
||||
#elif defined (CONFIG_USB_HCI)
|
||||
|
||||
#ifdef CONFIG_USB_TX_AGGREGATION
|
||||
#if defined(CONFIG_PLATFORM_ARM_SUNxI) || defined(CONFIG_PLATFORM_ARM_SUN6I) || defined(CONFIG_PLATFORM_ARM_SUN7I) || defined(CONFIG_PLATFORM_ARM_SUN8I) || defined(CONFIG_PLATFORM_ARM_SUN50IW1P1)
|
||||
#define MAX_XMITBUF_SZ (12288) /* 12k 1536*8 */
|
||||
|
@ -56,24 +38,12 @@
|
|||
#else
|
||||
#define NR_XMITBUFF (4)
|
||||
#endif /* CONFIG_SINGLE_XMIT_BUF */
|
||||
#elif defined (CONFIG_PCI_HCI)
|
||||
#ifdef CONFIG_TX_AMSDU
|
||||
#define MAX_XMITBUF_SZ (3500)
|
||||
#else
|
||||
#define MAX_XMITBUF_SZ (1664)
|
||||
#endif
|
||||
#define NR_XMITBUFF (128)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define XMITBUF_ALIGN_SZ 4
|
||||
#else
|
||||
#ifdef USB_XMITBUF_ALIGN_SZ
|
||||
#define XMITBUF_ALIGN_SZ (USB_XMITBUF_ALIGN_SZ)
|
||||
#else
|
||||
#define XMITBUF_ALIGN_SZ 512
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* xmit extension buff defination */
|
||||
#define MAX_XMIT_EXTBUF_SZ (1536)
|
||||
|
@ -104,14 +74,6 @@
|
|||
|
||||
#define HW_QUEUE_ENTRY 8
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#ifdef CONFIG_TRX_BD_ARCH
|
||||
#define TX_BD_NUM (128+1) /* +1 result from ring buffer */
|
||||
#else
|
||||
#define TXDESC_NUM 128
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
|
||||
do {\
|
||||
pattrib_iv[0] = dot11txpn._byte_.TSC0;\
|
||||
|
@ -175,18 +137,12 @@
|
|||
#endif
|
||||
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
#define TXDESC_OFFSET TXDESC_SIZE
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#ifdef USB_PACKET_OFFSET_SZ
|
||||
#define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ)
|
||||
#else
|
||||
#define PACKET_OFFSET_SZ (8)
|
||||
#endif
|
||||
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
|
||||
#endif
|
||||
|
||||
enum TXDESC_SC {
|
||||
SC_DONT_CARE = 0x00,
|
||||
|
@ -243,27 +199,6 @@ union txdesc {
|
|||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#define PCI_MAX_TX_QUEUE_COUNT 8 /* == HW_QUEUE_ENTRY */
|
||||
|
||||
struct rtw_tx_ring {
|
||||
unsigned char qid;
|
||||
#ifdef CONFIG_TRX_BD_ARCH
|
||||
struct tx_buf_desc *buf_desc;
|
||||
#else
|
||||
struct tx_desc *desc;
|
||||
#endif
|
||||
dma_addr_t dma;
|
||||
unsigned int idx;
|
||||
unsigned int entries;
|
||||
_queue queue;
|
||||
u32 qlen;
|
||||
#ifdef CONFIG_TRX_BD_ARCH
|
||||
u16 hw_rp_cache;
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
struct hw_xmit {
|
||||
/* _lock xmit_lock; */
|
||||
/* _list pending; */
|
||||
|
@ -273,56 +208,6 @@ struct hw_xmit {
|
|||
int accnt;
|
||||
};
|
||||
|
||||
#if 0
|
||||
struct pkt_attrib {
|
||||
u8 type;
|
||||
u8 subtype;
|
||||
u8 bswenc;
|
||||
u8 dhcp_pkt;
|
||||
u16 ether_type;
|
||||
int pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */
|
||||
int pkt_hdrlen; /* the original 802.3 pkt header len */
|
||||
int hdrlen; /* the WLAN Header Len */
|
||||
int nr_frags;
|
||||
int last_txcmdsz;
|
||||
int encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
|
||||
u8 iv[8];
|
||||
int iv_len;
|
||||
u8 icv[8];
|
||||
int icv_len;
|
||||
int priority;
|
||||
int ack_policy;
|
||||
int mac_id;
|
||||
int vcs_mode; /* virtual carrier sense method */
|
||||
|
||||
u8 dst[ETH_ALEN];
|
||||
u8 src[ETH_ALEN];
|
||||
u8 ta[ETH_ALEN];
|
||||
u8 ra[ETH_ALEN];
|
||||
|
||||
u8 key_idx;
|
||||
|
||||
u8 qos_en;
|
||||
u8 ht_en;
|
||||
u8 raid;/* rate adpative id */
|
||||
u8 bwmode;
|
||||
u8 ch_offset;/* PRIME_CHNL_OFFSET */
|
||||
u8 sgi;/* short GI */
|
||||
u8 ampdu_en;/* tx ampdu enable */
|
||||
u8 mdata;/* more data bit */
|
||||
u8 eosp;
|
||||
|
||||
u8 triggered;/* for ap mode handling Power Saving sta */
|
||||
|
||||
u32 qsel;
|
||||
u16 seqnum;
|
||||
|
||||
struct sta_info *psta;
|
||||
#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
|
||||
u8 hw_tcp_csum;
|
||||
#endif
|
||||
};
|
||||
#else
|
||||
/* reduce size */
|
||||
struct pkt_attrib {
|
||||
u8 type;
|
||||
|
@ -409,7 +294,6 @@ struct pkt_attrib {
|
|||
#endif
|
||||
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TX_AMSDU
|
||||
enum {
|
||||
|
@ -491,8 +375,6 @@ struct xmit_buf {
|
|||
|
||||
struct submit_ctx *sctx;
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
|
||||
/* u32 sz[8]; */
|
||||
u32 ff_hwaddr;
|
||||
#ifdef RTW_HALMAC
|
||||
|
@ -506,26 +388,6 @@ struct xmit_buf {
|
|||
|
||||
sint last[8];
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
u8 *phead;
|
||||
u8 *pdata;
|
||||
u8 *ptail;
|
||||
u8 *pend;
|
||||
u32 ff_hwaddr;
|
||||
u8 pg_num;
|
||||
u8 agg_num;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
#ifdef CONFIG_TRX_BD_ARCH
|
||||
/*struct tx_buf_desc *buf_desc;*/
|
||||
#else
|
||||
struct tx_desc *desc;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT)
|
||||
u8 no;
|
||||
#endif
|
||||
|
@ -548,17 +410,10 @@ struct xmit_frame {
|
|||
|
||||
struct xmit_buf *pxmitbuf;
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
u8 pg_num;
|
||||
u8 agg_num;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#ifdef CONFIG_USB_TX_AGGREGATION
|
||||
u8 agg_num;
|
||||
#endif
|
||||
s8 pkt_offset;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_XMIT_ACK
|
||||
u8 ack_report;
|
||||
|
@ -679,7 +534,6 @@ struct xmit_priv {
|
|||
|
||||
u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
_sema tx_retevt;/* all tx return event; */
|
||||
u8 txirp_cnt;
|
||||
|
||||
|
@ -690,26 +544,6 @@ struct xmit_priv {
|
|||
int viq_cnt;
|
||||
int voq_cnt;
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
/* Tx */
|
||||
struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT];
|
||||
int txringcount[PCI_MAX_TX_QUEUE_COUNT];
|
||||
u8 beaconDMAing; /* flag of indicating beacon is transmiting to HW by DMA */
|
||||
struct tasklet_struct xmit_tasklet;
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
|
||||
#ifdef CONFIG_SDIO_TX_TASKLET
|
||||
struct tasklet_struct xmit_tasklet;
|
||||
#else
|
||||
_thread_hdl_ SdioXmitThread;
|
||||
_sema SdioXmitSema;
|
||||
_sema SdioXmitTerminateSema;
|
||||
#endif /* CONFIG_SDIO_TX_TASKLET */
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
_queue free_xmitbuf_queue;
|
||||
_queue pending_xmitbuf_queue;
|
||||
u8 *pallocated_xmitbuf;
|
||||
|
@ -726,11 +560,7 @@ struct xmit_priv {
|
|||
u16 nqos_ssn;
|
||||
#ifdef CONFIG_TX_EARLY_MODE
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
#define MAX_AGG_PKT_NUM 20
|
||||
#else
|
||||
#define MAX_AGG_PKT_NUM 256 /* Max tx ampdu coounts */
|
||||
#endif
|
||||
|
||||
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
|
||||
#endif
|
||||
|
|
Loading…
Reference in a new issue