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rtl8188eu: Fix chackpatch errors in include/*.h - part 2
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
2db42a3fbf
commit
7120e63109
38 changed files with 2302 additions and 2664 deletions
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@ -24,133 +24,122 @@
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/* */
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/* Define the debug levels */
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/* Define the debug levels */
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/* */
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/* 1. DBG_TRACE and DBG_LOUD are used for normal cases. */
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/* So that, they can help SW engineer to develope or trace states changed */
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/* and also help HW enginner to trace every operation to and from HW, */
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/* e.g IO, Tx, Rx. */
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/* 1. DBG_TRACE and DBG_LOUD are used for normal cases. */
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/* They can help SW engineer to develope or trace states changed */
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/* and also help HW enginner to trace every operation to and from HW, */
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/* e.g IO, Tx, Rx. */
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/* */
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/* 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, */
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/* which help us to debug SW or HW. */
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/* */
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/* */
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/* */
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/* Never used in a call to ODM_RT_TRACE()! */
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/* */
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#define ODM_DBG_OFF 1
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/* 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, */
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/* which help us to debug SW or HW. */
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/* */
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/* Fatal bug. */
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/* For example, Tx/Rx/IO locked up, OS hangs, memory access violation, */
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/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */
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/* */
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/* Never used in a call to ODM_RT_TRACE()! */
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#define ODM_DBG_OFF 1
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/* Fatal bug. */
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/* For example, Tx/Rx/IO locked up, OS hangs, memory access violation, */
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/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */
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#define ODM_DBG_SERIOUS 2
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/* */
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/* Abnormal, rare, or unexpeted cases. */
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/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */
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/* */
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/* Abnormal, rare, or unexpeted cases. */
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/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */
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#define ODM_DBG_WARNING 3
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/* */
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/* Normal case with useful information about current SW or HW state. */
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/* For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, */
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/* SW protocol state change, dynamic mechanism state change and so on. */
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/* Normal case with useful information about current SW or HW state. */
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/* For example, Tx/Rx descriptor to fill, Tx/Rx descr. completed status, */
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/* SW protocol state change, dynamic mechanism state change and so on. */
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/* */
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#define ODM_DBG_LOUD 4
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/* */
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/* Normal case with detail execution flow or information. */
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/* */
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/* Normal case with detail execution flow or information. */
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#define ODM_DBG_TRACE 5
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/* */
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/* Define the tracing components */
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/* */
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/* */
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/* BB Functions */
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#define ODM_COMP_DIG BIT0
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#define ODM_COMP_RA_MASK BIT1
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#define ODM_COMP_DYNAMIC_TXPWR BIT2
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#define ODM_COMP_FA_CNT BIT3
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#define ODM_COMP_RSSI_MONITOR BIT4
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#define ODM_COMP_CCK_PD BIT5
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#define ODM_COMP_DYNAMIC_TXPWR BIT2
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#define ODM_COMP_FA_CNT BIT3
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#define ODM_COMP_RSSI_MONITOR BIT4
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#define ODM_COMP_CCK_PD BIT5
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#define ODM_COMP_ANT_DIV BIT6
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#define ODM_COMP_PWR_SAVE BIT7
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#define ODM_COMP_PWR_TRA BIT8
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#define ODM_COMP_RATE_ADAPTIVE BIT9
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#define ODM_COMP_PWR_SAVE BIT7
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#define ODM_COMP_PWR_TRA BIT8
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#define ODM_COMP_RATE_ADAPTIVE BIT9
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#define ODM_COMP_PATH_DIV BIT10
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#define ODM_COMP_PSD BIT11
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#define ODM_COMP_DYNAMIC_PRICCA BIT12
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#define ODM_COMP_RXHP BIT13
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#define ODM_COMP_DYNAMIC_PRICCA BIT12
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#define ODM_COMP_RXHP BIT13
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/* MAC Functions */
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#define ODM_COMP_EDCA_TURBO BIT16
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#define ODM_COMP_EARLY_MODE BIT17
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#define ODM_COMP_EDCA_TURBO BIT16
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#define ODM_COMP_EARLY_MODE BIT17
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/* RF Functions */
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#define ODM_COMP_TX_PWR_TRACK BIT24
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#define ODM_COMP_RX_GAIN_TRACK BIT25
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#define ODM_COMP_CALIBRATION BIT26
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#define ODM_COMP_TX_PWR_TRACK BIT24
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#define ODM_COMP_RX_GAIN_TRACK BIT25
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#define ODM_COMP_CALIBRATION BIT26
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/* Common Functions */
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#define ODM_COMP_COMMON BIT30
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#define ODM_COMP_COMMON BIT30
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#define ODM_COMP_INIT BIT31
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/*------------------------Export Marco Definition---------------------------*/
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#define DbgPrint printk
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#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __func__, ## args);
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#define DbgPrint pr_info
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#define RT_PRINTK(fmt, args...) \
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DbgPrint( "%s(): " fmt, __func__, ## args);
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#ifndef ASSERT
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#define ASSERT(expr)
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#endif
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#if DBG
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#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
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if (((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
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{ \
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if (pDM_Odm->SupportICType == ODM_RTL8192C) \
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DbgPrint("[ODM-92C] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8192D) \
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DbgPrint("[ODM-92D] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8723A) \
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DbgPrint("[ODM-8723A] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8188E) \
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DbgPrint("[ODM-8188E] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8812) \
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DbgPrint("[ODM-8812] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8821) \
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DbgPrint("[ODM-8821] "); \
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RT_PRINTK fmt; \
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}
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#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
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if (((comp) & pDM_Odm->DebugComponents) && \
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(level <= pDM_Odm->DebugLevel)) { \
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if (pDM_Odm->SupportICType == ODM_RTL8192C) \
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DbgPrint("[ODM-92C] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8192D) \
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DbgPrint("[ODM-92D] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8723A) \
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DbgPrint("[ODM-8723A] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8188E) \
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DbgPrint("[ODM-8188E] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8812) \
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DbgPrint("[ODM-8812] "); \
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else if (pDM_Odm->SupportICType == ODM_RTL8821) \
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DbgPrint("[ODM-8821] "); \
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RT_PRINTK fmt; \
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}
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#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
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if (((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
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{ \
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RT_PRINTK fmt; \
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}
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#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
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if (((comp) & pDM_Odm->DebugComponents) && \
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(level <= pDM_Odm->DebugLevel)) { \
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RT_PRINTK fmt; \
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}
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#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
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if (!(expr)) { \
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DbgPrint( "Assertion failed! %s at ......\n", #expr); \
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DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__func__,__LINE__); \
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RT_PRINTK fmt; \
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ASSERT(false); \
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}
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#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
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if (!(expr)) { \
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DbgPrint( "Assertion failed! %s at ......\n", #expr); \
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DbgPrint( " ......%s,%s,line=%d\n", __FILE__, \
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__func__, __LINE__); \
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RT_PRINTK fmt; \
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ASSERT(false); \
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}
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#define ODM_dbg_enter() { DbgPrint("==> %s\n", __func__); }
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#define ODM_dbg_exit() { DbgPrint("<== %s\n", __func__); }
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#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __func__, str); }
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#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
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if (((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
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{ \
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int __i; \
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pu8 __ptr = (pu8)ptr; \
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DbgPrint("[ODM] "); \
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DbgPrint(title_str); \
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DbgPrint(" "); \
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for ( __i=0; __i<6; __i++ ) \
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DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \
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DbgPrint("\n"); \
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}
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#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
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if (((comp) & pDM_Odm->DebugComponents) && \
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(level <= pDM_Odm->DebugLevel)) { \
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int __i; \
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u8 *__ptr = (u8 *)ptr; \
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DbgPrint("[ODM] "); \
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DbgPrint(title_str); \
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DbgPrint(" "); \
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for (__i = 0; __i < 6; __i++) \
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DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-");\
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DbgPrint("\n"); \
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}
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#else
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#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt)
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#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt)
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