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rtl8188eu: Fix chackpatch errors in include/*.h - part 2

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-08-14 22:03:17 -05:00
parent 2db42a3fbf
commit 7120e63109
38 changed files with 2302 additions and 2664 deletions
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52
include/rtw_eeprom.h
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@ -23,12 +23,12 @@
#include <osdep_service.h>
#include <drv_types.h>
#define RTL8712_EEPROM_ID 0x8712
#define RTL8712_EEPROM_ID 0x8712
#define HWSET_MAX_SIZE_512 512
#define EEPROM_MAX_SIZE HWSET_MAX_SIZE_512
#define CLOCK_RATE 50 /* 100us */
#define CLOCK_RATE 50 /* 100us */
/* EEPROM opcodes */
#define EEPROM_READ_OPCODE 06
@ -38,32 +38,31 @@
#define EEPROM_EWDS_OPCODE 16 /* Erase/write disable */
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_ALPHA 0x1
#define EEPROM_CID_Senao 0x3
#define EEPROM_CID_NetCore 0x5
#define EEPROM_CID_CAMEO 0X8
#define EEPROM_CID_SITECOM 0x9
#define EEPROM_CID_COREGA 0xB
#define EEPROM_CID_DEFAULT 0x0
#define EEPROM_CID_ALPHA 0x1
#define EEPROM_CID_Senao 0x3
#define EEPROM_CID_NetCore 0x5
#define EEPROM_CID_CAMEO 0X8
#define EEPROM_CID_SITECOM 0x9
#define EEPROM_CID_COREGA 0xB
#define EEPROM_CID_EDIMAX_BELK 0xC
#define EEPROM_CID_SERCOMM_BELK 0xE
#define EEPROM_CID_CAMEO1 0xF
#define EEPROM_CID_CAMEO1 0xF
#define EEPROM_CID_WNC_COREGA 0x12
#define EEPROM_CID_CLEVO 0x13
#define EEPROM_CID_WHQL 0xFE /* added by chiyoko for dtm, 20090108 */
#define EEPROM_CID_CLEVO 0x13
#define EEPROM_CID_WHQL 0xFE
/* */
/* Customer ID, note that: */
/* This variable is initiailzed through EEPROM or registry, */
/* however, its definition may be different with that in EEPROM for */
/* EEPROM size consideration. So, we have to perform proper translation between them. */
/* EEPROM size consideration. So, we have to perform proper translation
* between them. */
/* Besides, CustomerID of registry has precedence of that of EEPROM. */
/* defined below. 060703, by rcnjko. */
/* */
enum RT_CUSTOMER_ID {
RT_CID_DEFAULT = 0,
RT_CID_8187_ALPHA0 = 1,
@ -83,7 +82,9 @@ enum RT_CUSTOMER_ID {
RT_CID_CHINA_MOBILE = 15,
RT_CID_819x_ALPHA = 16,
RT_CID_819x_Sitecom = 17,
RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. */
RT_CID_CCX = 18, /* It's set under CCX logo test and isn't demanded
* for CCX functions, but for test behavior like retry
* limit and tx report. By Bruce, 2009-02-17. */
RT_CID_819x_Lenovo = 19,
RT_CID_819x_QMI = 20,
RT_CID_819x_Edimax_Belkin = 21,
@ -92,7 +93,8 @@ enum RT_CUSTOMER_ID {
RT_CID_819x_MSI = 24,
RT_CID_819x_Acer = 25,
RT_CID_819x_AzWave_ASUS = 26,
RT_CID_819x_AzWave = 27, /* For AzWave in PCIe, The ID is AzWave use and not only Asus */
RT_CID_819x_AzWave = 27, /* For AzWave in PCIe,i
* The ID is AzWave use and not only Asus */
RT_CID_819x_HP = 28,
RT_CID_819x_WNC_COREGA = 29,
RT_CID_819x_Arcadyan_Belkin = 30,
@ -119,10 +121,10 @@ struct eeprom_priv {
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512];
};
extern void eeprom_write16(struct adapter *padapter, u16 reg, u16 data);
extern u16 eeprom_read16(struct adapter *padapter, u16 reg);
extern void read_eeprom_content(struct adapter *padapter);
extern void eeprom_read_sz(struct adapter * padapter, u16 reg,u8* data, u32 sz);
extern void read_eeprom_content_by_attrib(struct adapter * padapter );
void eeprom_write16(struct adapter *padapter, u16 reg, u16 data);
u16 eeprom_read16(struct adapter *padapter, u16 reg);
void read_eeprom_content(struct adapter *padapter);
void eeprom_read_sz(struct adapter *adapt, u16 reg, u8 *data, u32 sz);
void read_eeprom_content_by_attrib(struct adapter *padapter);
#endif /* __RTL871X_EEPROM_H__ */