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rtl8188eu: Copy the code from the kernel into a new branch

Browse source 
This version takes advantage of all the cleanups to the code. It has
been modified to build on older kernels.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2022-06-08 18:46:35 -05:00
parent 30901e601a
commit 77d786b6e8
156 changed files with 6564 additions and 41050 deletions
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83
Makefile
View file

@ -32,7 +32,6 @@ OUTSRC_FILES := \
hal/HalHWImg8188E_MAC.o \
hal/HalHWImg8188E_BB.o \
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o \
@ -40,21 +39,16 @@ OUTSRC_FILES := \
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_debug.o \
hal/odm_interface.o \
hal/odm_HWConfig.o \
hal/odm_RegConfig8188E.o\
hal/odm_RTL8188E.o \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/rtl8188e_mp.o \
hal/rtl8188e_phycfg.o \
hal/rtl8188e_rf6052.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_sreset.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
hal/rtl8188eu_recv.o \
hal/rtl8188eu_xmit.o \
hal/usb_halinit.o \
@ -70,7 +64,6 @@ _OS_INTFS_FILES := \
os_dep/os_intfs.o \
os_dep/osdep_service.o \
os_dep/recv_linux.o \
os_dep/rtw_android.o \
os_dep/usb_intf.o \
os_dep/usb_ops_linux.o \
os_dep/xmit_linux.o
@ -106,36 +99,60 @@ INSTALL_PREFIX :=
ifneq ($(KERNELRELEASE),)
rtk_core := \
core/rtw_ap.o \
core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_debug.o \
core/rtw_efuse.o \
core/rtw_ieee80211.o \
core/rtw_io.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_mp.o \
core/rtw_mp_ioctl.o \
core/rtw_pwrctrl.o \
core/rtw_p2p.o \
core/rtw_recv.o \
core/rtw_rf.o \
core/rtw_security.o \
core/rtw_sreset.o \
core/rtw_sta_mgt.o \
core/rtw_wlan_util.o \
hal/HalHWImg8188E_MAC.o \
hal/HalHWImg8188E_BB.o \
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o \
hal/Hal8188ERateAdaptive.o \
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_HWConfig.o \
hal/odm_RegConfig8188E.o \
hal/odm_RTL8188E.o \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/rtl8188e_phycfg.o \
hal/rtl8188e_rf6052.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_recv.o \
hal/rtl8188eu_xmit.o \
hal/usb_halinit.o \
hal/usb_ops_linux.o \
os_dep/ioctl_linux.o \
os_dep/mlme_linux.o \
os_dep/os_intfs.o \
os_dep/osdep_service.o \
os_dep/recv_linux.o \
os_dep/usb_intf.o \
os_dep/usb_ops_linux.o \
os_dep/xmit_linux.o \
core/rtw_ap.o \
core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_efuse.o \
core/rtw_fw.o \
core/rtw_ieee80211.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_pwrctrl.o \
core/rtw_p2p.o \
core/rtw_recv.o \
core/rtw_rf.o \
core/rtw_security.o \
core/rtw_sta_mgt.o \
core/rtw_wlan_util.o \
core/rtw_xmit.o
8188eu-y += $(rtk_core)
8188eu-y += $(_HAL_INTFS_FILES)
8188eu-y += $(_OS_INTFS_FILES)
obj-$(CONFIG_RTL8188EU) := 8188eu.o
else

1136
core/rtw_ap.c
View file

File diff suppressed because it is too large Load diff

660
core/rtw_br_ext.c
View file

@ -1,47 +1,27 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. i*/
#define _RTW_BR_EXT_C_
#include <linux/version.h>
#include <linux/if_arp.h>
#include <net/ip.h>
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)
#include <net/ipx.h>
#endif
#include <linux/atalk.h>
#include <linux/udp.h>
#include <linux/if_pppox.h>
#include "../include/linux/if_arp.h"
#include "../include/net/ip.h"
#include "../include/linux/atalk.h"
#include "../include/linux/udp.h"
#include "../include/linux/if_pppox.h"
#include <drv_types.h>
#include "rtw_br_ext.h"
#include <usb_osintf.h>
#include <recv_osdep.h>
#include "../include/drv_types.h"
#include "../include/rtw_br_ext.h"
#include "../include/usb_osintf.h"
#include "../include/recv_osdep.h"
#ifndef csum_ipv6_magic
#include <net/ip6_checksum.h>
#include "../include/net/ip6_checksum.h"
#endif
#include <linux/ipv6.h>
#include <linux/icmpv6.h>
#include <net/ndisc.h>
#include <net/checksum.h>
#include "../include/linux/ipv6.h"
#include "../include/linux/icmpv6.h"
#include "../include/net/ndisc.h"
#include "../include/net/checksum.h"
#define NAT25_IPV4 01
#define NAT25_IPV6 02
@ -68,7 +48,7 @@
-----------------------------------------------------------------*/
/* Find a tag in pppoe frame and return the pointer */
static inline unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type)
static unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type)
{
unsigned char *cur_ptr, *start_ptr;
unsigned short tagLen, tagType;
@ -85,16 +65,14 @@ static inline unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsign
return NULL;
}
static inline int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag)
static int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag)
{
struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN);
int data_len;
data_len = tag->tag_len + TAG_HDR_LEN;
if (skb_tailroom(skb) < data_len) {
_DEBUG_ERR("skb_tailroom() failed in add SID tag!\n");
data_len = be16_to_cpu(tag->tag_len) + TAG_HDR_LEN;
if (skb_tailroom(skb) < data_len)
return -1;
}
skb_put(skb, data_len);
/* have a room for new tag */
@ -125,25 +103,15 @@ static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len)
return 0;
}
static inline unsigned long __nat25_timeout(struct adapter *priv)
static int __nat25_has_expired(struct nat25_network_db_entry *fdb)
{
unsigned long timeout;
timeout = jiffies - NAT25_AGEING_TIME*HZ;
return timeout;
}
static inline int __nat25_has_expired(struct adapter *priv,
struct nat25_network_db_entry *fdb)
{
if (time_before_eq(fdb->ageing_timer, __nat25_timeout(priv)))
if (time_before_eq(fdb->ageing_timer, jiffies - NAT25_AGEING_TIME * HZ))
return 1;
return 0;
}
static inline void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr,
static void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr,
unsigned int *ipAddr)
{
memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
@ -152,38 +120,8 @@ static inline void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr
memcpy(networkAddr+7, (unsigned char *)ipAddr, 4);
}
static inline void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr,
unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr)
{
memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
networkAddr[0] = NAT25_IPX;
memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4);
memcpy(networkAddr+5, ipxNodeAddr, 6);
}
static inline void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr,
unsigned int *ipxNetAddr, unsigned short *ipxSocketAddr)
{
memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
networkAddr[0] = NAT25_IPX;
memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4);
memcpy(networkAddr+5, (unsigned char *)ipxSocketAddr, 2);
}
static inline void __nat25_generate_apple_network_addr(unsigned char *networkAddr,
unsigned short *network, unsigned char *node)
{
memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
networkAddr[0] = NAT25_APPLE;
memcpy(networkAddr+1, (unsigned char *)network, 2);
networkAddr[3] = *node;
}
static inline void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr,
unsigned char *ac_mac, unsigned short *sid)
static void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr,
unsigned char *ac_mac, __be16 *sid)
{
memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN);
@ -222,9 +160,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 8) {
mac = scan_tlv(&data[8], len-8, 1, 1);
if (mac) {
_DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@ -233,9 +168,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 16) {
mac = scan_tlv(&data[16], len-16, 1, 1);
if (mac) {
_DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@ -244,9 +176,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 1, 1);
if (mac) {
_DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@ -255,9 +184,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 24) {
mac = scan_tlv(&data[24], len-24, 2, 1);
if (mac) {
_DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@ -266,9 +192,6 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
if (len >= 40) {
mac = scan_tlv(&data[40], len-40, 2, 1);
if (mac) {
_DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
replace_mac[0], replace_mac[1], replace_mac[2], replace_mac[3], replace_mac[4], replace_mac[5]);
memcpy(mac, replace_mac, 6);
return 1;
}
@ -277,7 +200,7 @@ static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char
return 0;
}
static inline int __nat25_network_hash(unsigned char *networkAddr)
static int __nat25_network_hash(unsigned char *networkAddr)
{
if (networkAddr[0] == NAT25_IPV4) {
unsigned long x;
@ -324,77 +247,27 @@ static inline int __nat25_network_hash(unsigned char *networkAddr)
}
}
static inline void __network_hash_link(struct adapter *priv,
static void __network_hash_link(struct adapter *priv,
struct nat25_network_db_entry *ent, int hash)
{
/* Caller must spin_lock already! */
ent->next_hash = priv->nethash[hash];
if (ent->next_hash != NULL)
if (ent->next_hash)
ent->next_hash->pprev_hash = &ent->next_hash;
priv->nethash[hash] = ent;
ent->pprev_hash = &priv->nethash[hash];
}
static inline void __network_hash_unlink(struct nat25_network_db_entry *ent)
static void __network_hash_unlink(struct nat25_network_db_entry *ent)
{
/* Caller must spin_lock already! */
*(ent->pprev_hash) = ent->next_hash;
if (ent->next_hash != NULL)
*ent->pprev_hash = ent->next_hash;
if (ent->next_hash)
ent->next_hash->pprev_hash = ent->pprev_hash;
ent->next_hash = NULL;
ent->pprev_hash = NULL;
}
static int __nat25_db_network_lookup_and_replace(struct adapter *priv,
struct sk_buff *skb, unsigned char *networkAddr)
{
struct nat25_network_db_entry *db;
spin_lock_bh(&priv->br_ext_lock);
db = priv->nethash[__nat25_network_hash(networkAddr)];
while (db != NULL) {
if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) {
if (!__nat25_has_expired(priv, db)) {
/* replace the destination mac address */
memcpy(skb->data, db->macAddr, ETH_ALEN);
atomic_inc(&db->use_count);
DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x"
"%02x%02x%02x%02x%02x%02x\n",
db->macAddr[0],
db->macAddr[1],
db->macAddr[2],
db->macAddr[3],
db->macAddr[4],
db->macAddr[5],
db->networkAddr[0],
db->networkAddr[1],
db->networkAddr[2],
db->networkAddr[3],
db->networkAddr[4],
db->networkAddr[5],
db->networkAddr[6],
db->networkAddr[7],
db->networkAddr[8],
db->networkAddr[9],
db->networkAddr[10],
db->networkAddr[11],
db->networkAddr[12],
db->networkAddr[13],
db->networkAddr[14],
db->networkAddr[15],
db->networkAddr[16]);
}
spin_unlock_bh(&priv->br_ext_lock);
return 1;
}
db = db->next_hash;
}
spin_unlock_bh(&priv->br_ext_lock);
return 0;
}
static void __nat25_db_network_insert(struct adapter *priv,
unsigned char *macAddr, unsigned char *networkAddr)
{
@ -404,7 +277,7 @@ static void __nat25_db_network_insert(struct adapter *priv,
spin_lock_bh(&priv->br_ext_lock);
hash = __nat25_network_hash(networkAddr);
db = priv->nethash[hash];
while (db != NULL) {
while (db) {
if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) {
memcpy(db->macAddr, macAddr, ETH_ALEN);
db->ageing_timer = jiffies;
@ -413,8 +286,8 @@ static void __nat25_db_network_insert(struct adapter *priv,
}
db = db->next_hash;
}
db = (struct nat25_network_db_entry *) rtw_malloc(sizeof(*db));
if (db == NULL) {
db = kmalloc(sizeof(*db), GFP_ATOMIC);
if (!db) {
spin_unlock_bh(&priv->br_ext_lock);
return;
}
@ -428,10 +301,6 @@ static void __nat25_db_network_insert(struct adapter *priv,
spin_unlock_bh(&priv->br_ext_lock);
}
static void __nat25_db_print(struct adapter *priv)
{
}
/*
* NAT2.5 interface
*/
@ -445,7 +314,7 @@ void nat25_db_cleanup(struct adapter *priv)
for (i = 0; i < NAT25_HASH_SIZE; i++) {
struct nat25_network_db_entry *f;
f = priv->nethash[i];
while (f != NULL) {
while (f) {
struct nat25_network_db_entry *g;
g = f->next_hash;
@ -472,11 +341,11 @@ void nat25_db_expire(struct adapter *priv)
struct nat25_network_db_entry *f;
f = priv->nethash[i];
while (f != NULL) {
while (f) {
struct nat25_network_db_entry *g;
g = f->next_hash;
if (__nat25_has_expired(priv, f)) {
if (__nat25_has_expired(f)) {
if (atomic_dec_and_test(&f->use_count)) {
if (priv->scdb_entry == f) {
memset(priv->scdb_mac, 0, ETH_ALEN);
@ -499,7 +368,7 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
unsigned int tmp;
if (skb == NULL)
if (!skb)
return -1;
if ((method <= NAT25_MIN) || (method >= NAT25_MAX))
@ -513,10 +382,8 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
if (protocol == ETH_P_IP) {
struct iphdr *iph = (struct iphdr *)(skb->data + ETH_HLEN);
if (((unsigned char *)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len)) {
DEBUG_WARN("NAT25: malformed IP packet !\n");
if (((unsigned char *)(iph) + (iph->ihl << 2)) >= (skb->data + ETH_HLEN + skb->len))
return -1;
}
switch (method) {
case NAT25_CHECK:
@ -527,33 +394,9 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
if (iph->saddr == 0)
return 0;
tmp = be32_to_cpu(iph->saddr);
DEBUG_INFO("NAT25: Insert IP, SA =%08x, DA =%08x\n", tmp, iph->daddr);
__nat25_generate_ipv4_network_addr(networkAddr, &tmp);
/* record source IP address and , source mac address into db */
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup IP, SA =%08x, DA =%08x\n", iph->saddr, iph->daddr);
tmp = be32_to_cpu(iph->daddr);
__nat25_generate_ipv4_network_addr(networkAddr, &tmp);
if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) {
if (*((unsigned char *)&iph->daddr + 3) == 0xff) {
/* L2 is unicast but L3 is broadcast, make L2 bacome broadcast */
DEBUG_INFO("NAT25: Set DA as boardcast\n");
memset(skb->data, 0xff, ETH_ALEN);
} else {
/* forward unknow IP packet to upper TCP/IP */
DEBUG_INFO("NAT25: Replace DA with BR's MAC\n");
if ((*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0) {
printk("Re-init netdev_br_init() due to br_mac == 0!\n");
netdev_br_init(priv->pnetdev);
}
memcpy(skb->data, priv->br_mac, ETH_ALEN);
}
}
return 0;
default:
return -1;
@ -564,244 +407,25 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
/*---------------------------------------------------*/
struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN);
unsigned char *arp_ptr = (unsigned char *)(arp + 1);
unsigned int *sender, *target;
unsigned int *sender;
if (arp->ar_pro != __constant_htons(ETH_P_IP)) {
DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", be16_to_cpu(arp->ar_pro));
if (arp->ar_pro != htons(ETH_P_IP))
return -1;
}
switch (method) {
case NAT25_CHECK:
return 0; /* skb_copy for all ARP frame */
case NAT25_INSERT:
DEBUG_INFO("NAT25: Insert ARP, MAC =%02x%02x%02x%02x%02x%02x\n", arp_ptr[0],
arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]);
/* change to ARP sender mac address to wlan STA address */
memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN);
arp_ptr += arp->ar_hln;
sender = (unsigned int *)arp_ptr;
__nat25_generate_ipv4_network_addr(networkAddr, sender);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup ARP\n");
arp_ptr += arp->ar_hln;
sender = (unsigned int *)arp_ptr;
arp_ptr += (arp->ar_hln + arp->ar_pln);
target = (unsigned int *)arp_ptr;
__nat25_generate_ipv4_network_addr(networkAddr, target);
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
/* change to ARP target mac address to Lookup result */
arp_ptr = (unsigned char *)(arp + 1);
arp_ptr += (arp->ar_hln + arp->ar_pln);
memcpy(arp_ptr, skb->data, ETH_ALEN);
return 0;
default:
return -1;
}
} else if ((protocol == ETH_P_IPX) ||
(protocol <= ETH_FRAME_LEN)) {
/*---------------------------------------------------*/
/* Handle IPX and Apple Talk frame */
/*---------------------------------------------------*/
unsigned char ipx_header[2] = {0xFF, 0xFF};
struct ipxhdr *ipx = NULL;
struct elapaarp *ea = NULL;
struct ddpehdr *ddp = NULL;
unsigned char *framePtr = skb->data + ETH_HLEN;
if (protocol == ETH_P_IPX) {
DEBUG_INFO("NAT25: Protocol = IPX (Ethernet II)\n");
ipx = (struct ipxhdr *)framePtr;
} else if (protocol <= ETH_FRAME_LEN) {
if (!memcmp(ipx_header, framePtr, 2)) {
DEBUG_INFO("NAT25: Protocol = IPX (Ethernet 802.3)\n");
ipx = (struct ipxhdr *)framePtr;
} else {
unsigned char ipx_8022_type = 0xE0;
unsigned char snap_8022_type = 0xAA;
if (*framePtr == snap_8022_type) {
unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; /* IPX SNAP ID */
unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; /* Apple Talk AARP SNAP ID */
unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; /* Apple Talk DDP SNAP ID */
framePtr += 3; /* eliminate the 802.2 header */
if (!memcmp(ipx_snap_id, framePtr, 5)) {
framePtr += 5; /* eliminate the SNAP header */
DEBUG_INFO("NAT25: Protocol = IPX (Ethernet SNAP)\n");
ipx = (struct ipxhdr *)framePtr;
} else if (!memcmp(aarp_snap_id, framePtr, 5)) {
framePtr += 5; /* eliminate the SNAP header */
ea = (struct elapaarp *)framePtr;
} else if (!memcmp(ddp_snap_id, framePtr, 5)) {
framePtr += 5; /* eliminate the SNAP header */
ddp = (struct ddpehdr *)framePtr;
} else {
DEBUG_WARN("NAT25: Protocol = Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0],
framePtr[1], framePtr[2], framePtr[3], framePtr[4]);
return -1;
}
} else if (*framePtr == ipx_8022_type) {
framePtr += 3; /* eliminate the 802.2 header */
if (!memcmp(ipx_header, framePtr, 2)) {
DEBUG_INFO("NAT25: Protocol = IPX (Ethernet 802.2)\n");
ipx = (struct ipxhdr *)framePtr;
} else {
return -1;
}
} else {
return -1;
}
}
} else {
return -1;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)
/* IPX */
if (ipx != NULL) {
switch (method) {
case NAT25_CHECK:
if (!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN))
DEBUG_INFO("NAT25: Check IPX skb_copy\n");
return 0;
case NAT25_INSERT:
DEBUG_INFO("NAT25: Insert IPX, Dest =%08x,%02x%02x%02x%02x%02x%02x,%04x Source =%08x,%02x%02x%02x%02x%02x%02x,%04x\n",
ipx->ipx_dest.net,
ipx->ipx_dest.node[0],
ipx->ipx_dest.node[1],
ipx->ipx_dest.node[2],
ipx->ipx_dest.node[3],
ipx->ipx_dest.node[4],
ipx->ipx_dest.node[5],
ipx->ipx_dest.sock,
ipx->ipx_source.net,
ipx->ipx_source.node[0],
ipx->ipx_source.node[1],
ipx->ipx_source.node[2],
ipx->ipx_source.node[3],
ipx->ipx_source.node[4],
ipx->ipx_source.node[5],
ipx->ipx_source.sock);
if (!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) {
DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n");
__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock);
/* change IPX source node addr to wlan STA address */
memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN);
} else {
__nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node);
}
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
case NAT25_LOOKUP:
if (!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) {
DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n");
__nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock);
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
/* replace IPX destination node addr with Lookup destination MAC addr */
memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN);
} else {
__nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node);
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
}
return 0;
default:
return -1;
}
} else if (ea != NULL) {
/* Sanity check fields. */
if (ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) {
DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n");
return -1;
}
switch (method) {
case NAT25_CHECK:
return 0;
case NAT25_INSERT:
/* change to AARP source mac address to wlan STA address */
memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN);
DEBUG_INFO("NAT25: Insert AARP, Source =%d,%d Destination =%d,%d\n",
ea->pa_src_net,
ea->pa_src_node,
ea->pa_dst_net,
ea->pa_dst_node);
__nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup AARP, Source =%d,%d Destination =%d,%d\n",
ea->pa_src_net,
ea->pa_src_node,
ea->pa_dst_net,
ea->pa_dst_node);
__nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node);
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
/* change to AARP destination mac address to Lookup result */
memcpy(ea->hw_dst, skb->data, ETH_ALEN);
return 0;
default:
return -1;
}
} else if (ddp != NULL) {
switch (method) {
case NAT25_CHECK:
return -1;
case NAT25_INSERT:
DEBUG_INFO("NAT25: Insert DDP, Source =%d,%d Destination =%d,%d\n",
ddp->deh_snet,
ddp->deh_snode,
ddp->deh_dnet,
ddp->deh_dnode);
__nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup DDP, Source =%d,%d Destination =%d,%d\n",
ddp->deh_snet,
ddp->deh_snode,
ddp->deh_dnet,
ddp->deh_dnode);
__nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode);
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
return 0;
default:
return -1;
}
}
#endif
return -1;
} else if ((protocol == ETH_P_PPP_DISC) ||
(protocol == ETH_P_PPP_SES)) {
/*---------------------------------------------------*/
@ -827,18 +451,19 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID));
if (pOldTag) { /* if SID existed, copy old value and delete it */
old_tag_len = ntohs(pOldTag->tag_len);
if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) {
DEBUG_ERR("SID tag length too long!\n");
if (old_tag_len +
TAG_HDR_LEN +
MAGIC_CODE_LEN +
RTL_RELAY_TAG_LEN >
sizeof(tag_buf))
return -1;
}
memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN,
pOldTag->tag_data, old_tag_len);
if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) {
DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n");
if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0)
return -1;
}
ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len);
}
@ -853,15 +478,12 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
/* Add relay tag */
if (__nat25_add_pppoe_tag(skb, tag) < 0)
return -1;
DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n",
(ph->code == PADI_CODE ? "PADI" : "PADR"));
} else { /* not add relay tag */
if (priv->pppoe_connection_in_progress &&
memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) {
DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n");
memcmp(skb->data + ETH_ALEN,
priv->pppoe_addr,
ETH_ALEN))
return -2;
}
if (priv->pppoe_connection_in_progress == 0)
memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN);
@ -872,84 +494,16 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return -1;
}
} else { /* session phase */
DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid));
__nat25_generate_pppoe_network_addr(networkAddr, skb->data, &ph->sid);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
if (!priv->ethBrExtInfo.addPPPoETag &&
priv->pppoe_connection_in_progress &&
!memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN))
priv->pppoe_connection_in_progress = 0;
}
return 0;
case NAT25_LOOKUP:
if (ph->code == PADO_CODE || ph->code == PADS_CODE) {
if (priv->ethBrExtInfo.addPPPoETag) {
struct pppoe_tag *tag;
unsigned char *ptr;
unsigned short tagType, tagLen;
int offset = 0;
ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID));
if (ptr == NULL) {
DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n");
return -1;
}
tag = (struct pppoe_tag *)ptr;
tagType = (unsigned short)((ptr[0] << 8) + ptr[1]);
tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]);
if ((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN))) {
DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen);
return -1;
}
pMagic = (unsigned short *)tag->tag_data;
if (ntohs(*pMagic) != MAGIC_CODE) {
DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n",
(ph->code == PADO_CODE ? "PADO" : "PADS"));
return -1;
}
memcpy(skb->data, tag->tag_data+MAGIC_CODE_LEN, ETH_ALEN);
if (tagLen > MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN)
offset = TAG_HDR_LEN;
if (skb_pull_and_merge(skb, ptr+offset, TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset) < 0) {
DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n");
return -1;
}
ph->length = htons(ntohs(ph->length)-(TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset));
if (offset > 0)
tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN);
DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n",
(ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name);
} else { /* not add relay tag */
if (!priv->pppoe_connection_in_progress) {
DEBUG_ERR("Discard PPPoE packet due to no connection in progresss!\n");
return -1;
}
memcpy(skb->data, priv->pppoe_addr, ETH_ALEN);
priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE;
}
} else {
if (ph->sid != 0) {
DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name);
__nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid));
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
__nat25_db_print(priv);
} else {
return -1;
}
}
return 0;
default:
return -1;
}
@ -962,8 +516,6 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return -1;
case NAT25_INSERT:
return 0;
case NAT25_LOOKUP:
return 0;
default:
return -1;
}
@ -976,8 +528,6 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return -1;
case NAT25_INSERT:
return 0;
case NAT25_LOOKUP:
return 0;
default:
return -1;
}
@ -987,10 +537,8 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
/*------------------------------------------------*/
struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN);
if (sizeof(*iph) >= (skb->len - ETH_HLEN)) {
DEBUG_WARN("NAT25: malformed IPv6 packet !\n");
if (sizeof(*iph) >= (skb->len - ETH_HLEN))
return -1;
}
switch (method) {
case NAT25_CHECK:
@ -998,17 +546,9 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return 0;
return -1;
case NAT25_INSERT:
DEBUG_INFO("NAT25: Insert IP, SA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x,"
" DA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7],
iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3],
iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]);
if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) {
__nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr);
__nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr);
__nat25_db_print(priv);
if (iph->nexthdr == IPPROTO_ICMPV6 &&
skb->len > (ETH_HLEN + sizeof(*iph) + 4)) {
@ -1024,15 +564,6 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
}
}
return 0;
case NAT25_LOOKUP:
DEBUG_INFO("NAT25: Lookup IP, SA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x, DA =%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n",
iph->saddr.s6_addr16[0], iph->saddr.s6_addr16[1], iph->saddr.s6_addr16[2], iph->saddr.s6_addr16[3],
iph->saddr.s6_addr16[4], iph->saddr.s6_addr16[5], iph->saddr.s6_addr16[6], iph->saddr.s6_addr16[7],
iph->daddr.s6_addr16[0], iph->daddr.s6_addr16[1], iph->daddr.s6_addr16[2], iph->daddr.s6_addr16[3],
iph->daddr.s6_addr16[4], iph->daddr.s6_addr16[5], iph->daddr.s6_addr16[6], iph->daddr.s6_addr16[7]);
__nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->daddr);
__nat25_db_network_lookup_and_replace(priv, skb, networkAddr);
return 0;
default:
return -1;
}
@ -1040,67 +571,6 @@ int nat25_db_handle(struct adapter *priv, struct sk_buff *skb, int method)
return -1;
}
int nat25_handle_frame(struct adapter *priv, struct sk_buff *skb)
{
if (!(skb->data[0] & 1)) {
int is_vlan_tag = 0, i, retval = 0;
unsigned short vlan_hdr = 0;
unsigned short protocol;
protocol = be16_to_cpu(*((__be16 *)(skb->data + 2 * ETH_ALEN)));
if (protocol == ETH_P_8021Q) {
is_vlan_tag = 1;
vlan_hdr = *((unsigned short *)(skb->data+ETH_ALEN*2+2));
for (i = 0; i < 6; i++)
*((unsigned short *)(skb->data+ETH_ALEN*2+2-i*2)) = *((unsigned short *)(skb->data+ETH_ALEN*2-2-i*2));
skb_pull(skb, 4);
}
if (!priv->ethBrExtInfo.nat25_disable) {
spin_lock_bh(&priv->br_ext_lock);
/*
* This function look up the destination network address from
* the NAT2.5 database. Return value = -1 means that the
* corresponding network protocol is NOT support.
*/
if (!priv->ethBrExtInfo.nat25sc_disable &&
(be16_to_cpu(*((__be16 *)(skb->data+ETH_ALEN*2))) == ETH_P_IP) &&
!memcmp(priv->scdb_ip, skb->data+ETH_HLEN+16, 4)) {
memcpy(skb->data, priv->scdb_mac, ETH_ALEN);
spin_unlock_bh(&priv->br_ext_lock);
} else {
spin_unlock_bh(&priv->br_ext_lock);
retval = nat25_db_handle(priv, skb, NAT25_LOOKUP);
}
} else {
if (((be16_to_cpu(*((__be16 *)(skb->data+ETH_ALEN*2))) == ETH_P_IP) &&
!memcmp(priv->br_ip, skb->data+ETH_HLEN+16, 4)) ||
((be16_to_cpu(*((__be16 *)(skb->data+ETH_ALEN*2))) == ETH_P_ARP) &&
!memcmp(priv->br_ip, skb->data+ETH_HLEN+24, 4))) {
/* for traffic to upper TCP/IP */
retval = nat25_db_handle(priv, skb, NAT25_LOOKUP);
}
}
if (is_vlan_tag) {
skb_push(skb, 4);
for (i = 0; i < 6; i++)
*((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2));
*((__be16 *)(skb->data+ETH_ALEN*2)) = __constant_htons(ETH_P_8021Q);
*((unsigned short *)(skb->data+ETH_ALEN*2+2)) = vlan_hdr;
}
if (retval == -1) {
/* DEBUG_ERR("NAT25: Lookup fail!\n"); */
return -1;
}
}
return 0;
}
#define SERVER_PORT 67
#define CLIENT_PORT 68
#define DHCP_MAGIC 0x63825363
@ -1112,22 +582,22 @@ struct dhcpMessage {
u_int8_t hlen;
u_int8_t hops;
u_int32_t xid;
u_int16_t secs;
u_int16_t flags;
u_int32_t ciaddr;
u_int32_t yiaddr;
u_int32_t siaddr;
u_int32_t giaddr;
__be16 secs;
__be16 flags;
__be32 ciaddr;
__be32 yiaddr;
__be32 siaddr;
__be32 giaddr;
u_int8_t chaddr[16];
u_int8_t sname[64];
u_int8_t file[128];
u_int32_t cookie;
__be32 cookie;
u_int8_t options[308]; /* 312 - cookie */
};
void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb)
{
if (skb == NULL)
if (!skb)
return;
if (!priv->ethBrExtInfo.dhcp_bcst_disable) {
@ -1150,7 +620,6 @@ void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb)
/* if not broadcast */
register int sum = 0;
DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n");
/* or BROADCAST flag */
dhcph->flags |= htons(BROADCAST_FLAG);
/* recalculate checksum */
@ -1167,8 +636,7 @@ void dhcp_flag_bcast(struct adapter *priv, struct sk_buff *skb)
}
}
void *scdb_findEntry(struct adapter *priv, unsigned char *macAddr,
unsigned char *ipAddr)
void *scdb_findEntry(struct adapter *priv, unsigned char *ipAddr)
{
unsigned char networkAddr[MAX_NETWORK_ADDR_LEN];
struct nat25_network_db_entry *db;
@ -1177,7 +645,7 @@ void *scdb_findEntry(struct adapter *priv, unsigned char *macAddr,
__nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr);
hash = __nat25_network_hash(networkAddr);
db = priv->nethash[hash];
while (db != NULL) {
while (db) {
if (!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) {
return (void *)db;
}

1001
core/rtw_cmd.c
View file

File diff suppressed because it is too large Load diff

943
core/rtw_debug.c
View file

@ -1,943 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_DEBUG_C_
#include <rtw_debug.h>
#include <rtw_version.h>
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
int len = 0;
len += snprintf(page + len, count - len, "%s\n", DRIVERVERSION);
*eof = 1;
return len;
}
int proc_get_write_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
*eof = 1;
return 0;
}
int proc_set_write_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 addr, val, len;
if (count < 3) {
DBG_88E("argument size is less than 3\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x %x %x", &addr, &val, &len);
if (num != 3) {
DBG_88E("invalid write_reg parameter!\n");
return count;
}
switch (len) {
case 1:
rtw_write8(padapter, addr, (u8)val);
break;
case 2:
rtw_write16(padapter, addr, (u16)val);
break;
case 4:
rtw_write32(padapter, addr, val);
break;
default:
DBG_88E("error write length =%d", len);
break;
}
}
return count;
}
static u32 proc_get_read_addr = 0xeeeeeeee;
static u32 proc_get_read_len = 0x4;
int proc_get_read_reg(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
if (proc_get_read_addr == 0xeeeeeeee) {
*eof = 1;
return len;
}
switch (proc_get_read_len) {
case 1:
len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr));
break;
case 2:
len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr));
break;
case 4:
len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr));
break;
default:
len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len);
break;
}
*eof = 1;
return len;
}
int proc_set_read_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
char tmp[16];
u32 addr, len;
if (count < 2) {
DBG_88E("argument size is less than 2\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x %x", &addr, &len);
if (num != 2) {
DBG_88E("invalid read_reg parameter!\n");
return count;
}
proc_get_read_addr = addr;
proc_get_read_len = len;
}
return count;
}
int proc_get_fwstate(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len, "fwstate=0x%x\n", get_fwstate(pmlmepriv));
*eof = 1;
return len;
}
int proc_get_sec_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct security_priv *psecuritypriv = &padapter->securitypriv;
int len = 0;
len += snprintf(page + len, count - len, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n",
psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm,
psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus);
*eof = 1;
return len;
}
int proc_get_mlmext_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
int len = 0;
len += snprintf(page + len, count - len, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state);
*eof = 1;
return len;
}
int proc_get_qos_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len, "qos_option=%d\n", pmlmepriv->qospriv.qos_option);
*eof = 1;
return len;
}
int proc_get_ht_option(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
int len = 0;
len += snprintf(page + len, count - len, "ht_option=%d\n", pmlmepriv->htpriv.ht_option);
*eof = 1;
return len;
}
int proc_get_rf_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n",
pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
*eof = 1;
return len;
}
int proc_get_ap_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct sta_info *psta;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct wlan_network *cur_network = &(pmlmepriv->cur_network);
struct sta_priv *pstapriv = &padapter->stapriv;
int len = 0;
psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
if (psta) {
int i;
struct recv_reorder_ctrl *preorder_ctrl;
len += snprintf(page + len, count - len, "SSID=%s\n", cur_network->network.Ssid.Ssid);
len += snprintf(page + len, count - len, "sta's macaddr:%pM\n", psta->hwaddr);
len += snprintf(page + len, count - len, "cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);
len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);
len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);
len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
if (preorder_ctrl->enable)
len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq);
}
} else {
len += snprintf(page + len, count - len, "can't get sta's macaddr, cur_network's macaddr: %pM\n", cur_network->network.MacAddress);
}
*eof = 1;
return len;
}
int proc_get_adapter_state(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
len += snprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n",
padapter->bSurpriseRemoved, padapter->bDriverStopped);
*eof = 1;
return len;
}
int proc_get_trx_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct recv_priv *precvpriv = &padapter->recvpriv;
int len = 0;
len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_ext_xmitbuf_cnt=%d, free_recvframe_cnt=%d\n",
pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmit_extbuf_cnt, precvpriv->free_recvframe_cnt);
len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt);
*eof = 1;
return len;
}
int proc_get_mac_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= MAC REG =======\n");
for (i = 0x0; i < 0x300; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_mac_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= MAC REG =======\n");
memset(page, 0, count);
for (i = 0x300; i < 0x600; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_mac_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= MAC REG =======\n");
for (i = 0x600; i < 0x800; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_bb_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= BB REG =======\n");
for (i = 0x800; i < 0xB00; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_bb_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= BB REG =======\n");
for (i = 0xB00; i < 0xE00; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_bb_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1;
len += snprintf(page + len, count - len, "\n======= BB REG =======\n");
for (i = 0xE00; i < 0x1000; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump1(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 1;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0; i < 0xC0; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump2(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 1;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0xC0; i < 0x100; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump3(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 2;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0; i < 0xC0; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rf_reg_dump4(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
int i, j = 1, path;
u32 value;
len += snprintf(page + len, count - len, "\n======= RF REG =======\n");
path = 2;
len += snprintf(page + len, count - len, "\nRF_Path(%x)\n", path);
for (i = 0xC0; i < 0x100; i++) {
value = rtw_hal_read_rfreg(padapter, path, i, 0xffffffff);
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x ", i);
len += snprintf(page + len, count - len, " 0x%08x ", value);
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
*eof = 1;
return len;
}
int proc_get_rx_signal(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
len = snprintf(page + len, count,
"rssi:%d\n"
"rxpwdb:%d\n"
"signal_strength:%u\n"
"signal_qual:%u\n"
"noise:%u\n",
padapter->recvpriv.rssi,
padapter->recvpriv.rxpwdb,
padapter->recvpriv.signal_strength,
padapter->recvpriv.signal_qual,
padapter->recvpriv.noise
);
*eof = 1;
return len;
}
int proc_set_rx_signal(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 is_signal_dbg;
s32 signal_strength;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength);
is_signal_dbg = is_signal_dbg == 0 ? 0 : 1;
if (is_signal_dbg && num != 2)
return count;
signal_strength = signal_strength > 100 ? 100 : signal_strength;
signal_strength = signal_strength < 0 ? 0 : signal_strength;
padapter->recvpriv.is_signal_dbg = is_signal_dbg;
padapter->recvpriv.signal_strength_dbg = signal_strength;
if (is_signal_dbg)
DBG_88E("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength);
else
DBG_88E("set %s\n", "HW_SIGNAL_STRENGTH");
}
return count;
}
int proc_get_ht_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->ht_enable
);
*eof = 1;
return len;
}
int proc_set_ht_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
s32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->ht_enable = mode;
pr_info("ht_enable=%d\n", pregpriv->ht_enable);
}
}
return count;
}
int proc_get_cbw40_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->cbw40_enable
);
*eof = 1;
return len;
}
int proc_set_cbw40_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
s32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->cbw40_enable = mode;
pr_info("cbw40_enable=%d\n", mode);
}
}
return count;
}
int proc_get_ampdu_enable(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->ampdu_enable
);
*eof = 1;
return len;
}
int proc_set_ampdu_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
s32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->ampdu_enable = mode;
pr_info("ampdu_enable=%d\n", mode);
}
}
return count;
}
int proc_get_two_path_rssi(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
int len = 0;
if (padapter)
len += snprintf(page + len, count - len,
"%d %d\n",
padapter->recvpriv.RxRssi[0],
padapter->recvpriv.RxRssi[1]
);
*eof = 1;
return len;
}
int proc_get_rx_stbc(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
int len = 0;
if (pregpriv)
len += snprintf(page + len, count - len,
"%d\n",
pregpriv->rx_stbc
);
*eof = 1;
return len;
}
int proc_set_rx_stbc(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
u32 mode = 0;
if (count < 1)
return -EFAULT;
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->rx_stbc = mode;
printk("rx_stbc=%d\n", mode);
}
}
return count;
}
int proc_get_rssi_disp(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
*eof = 1;
return 0;
}
int proc_set_rssi_disp(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 enable = 0;
if (count < 1) {
DBG_88E("argument size is less than 1\n");
return -EFAULT;
}
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
int num = sscanf(tmp, "%x", &enable);
if (num != 1) {
DBG_88E("invalid set_rssi_disp parameter!\n");
return count;
}
if (enable) {
DBG_88E("Turn On Rx RSSI Display Function\n");
padapter->bRxRSSIDisplay = enable ;
} else {
DBG_88E("Turn Off Rx RSSI Display Function\n");
padapter->bRxRSSIDisplay = 0;
}
}
return count;
}
#ifdef CONFIG_88EU_AP_MODE
int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct sta_info *psta;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct sta_priv *pstapriv = &padapter->stapriv;
int i, j;
struct list_head *plist, *phead;
struct recv_reorder_ctrl *preorder_ctrl;
int len = 0;
len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap);
spin_lock_bh(&pstapriv->sta_hash_lock);
for (i = 0; i < NUM_STA; i++) {
phead = &(pstapriv->sta_hash[i]);
plist = phead->next;
while (phead != plist) {
psta = container_of(plist, struct sta_info, hash_list);
plist = plist->next;
len += snprintf(page + len, count - len, "sta's macaddr: %pM\n", psta->hwaddr);
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid);
len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate);
len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi);
len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable);
len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap);
len += snprintf(page + len, count - len, "sleepq_len=%d\n", psta->sleepq_len);
len += snprintf(page + len, count - len, "capability=0x%x\n", psta->capability);
len += snprintf(page + len, count - len, "flags=0x%x\n", psta->flags);
len += snprintf(page + len, count - len, "wpa_psk=0x%x\n", psta->wpa_psk);
len += snprintf(page + len, count - len, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher);
len += snprintf(page + len, count - len, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher);
len += snprintf(page + len, count - len, "qos_info=0x%x\n", psta->qos_info);
len += snprintf(page + len, count - len, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy);
for (j = 0; j < 16; j++) {
preorder_ctrl = &psta->recvreorder_ctrl[j];
if (preorder_ctrl->enable)
len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq);
}
}
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
*eof = 1;
return len;
}
#endif
int proc_get_best_channel(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0;
for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
if (pmlmeext->channel_set[i].ChannelNum == 1)
index_24G = i;
if (pmlmeext->channel_set[i].ChannelNum == 36)
index_5G = i;
}
for (i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) {
/* 2.4G */
if (pmlmeext->channel_set[i].ChannelNum == 6) {
if (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count) {
index_24G = i;
best_channel_24G = pmlmeext->channel_set[i].ChannelNum;
}
}
/* 5G */
if (pmlmeext->channel_set[i].ChannelNum >= 36 &&
pmlmeext->channel_set[i].ChannelNum < 140) {
/* Find primary channel */
if (((pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0) &&
(pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) {
index_5G = i;
best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
}
}
if (pmlmeext->channel_set[i].ChannelNum >= 149 &&
pmlmeext->channel_set[i].ChannelNum < 165) {
/* find primary channel */
if (((pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0) &&
(pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count)) {
index_5G = i;
best_channel_5G = pmlmeext->channel_set[i].ChannelNum;
}
}
/* debug */
len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n",
pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count);
}
len += snprintf(page + len, count - len, "best_channel_5G = %d\n", best_channel_5G);
len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G);
*eof = 1;
return len;
}

833
core/rtw_efuse.c
View file

@ -1,158 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTW_EFUSE_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_efuse.h>
/*------------------------Define local variable------------------------------*/
u8 fakeEfuseBank;
u32 fakeEfuseUsedBytes;
u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE] = {0};
u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN] = {0};
u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN] = {0};
u32 BTEfuseUsedBytes;
u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
u32 fakeBTEfuseUsedBytes;
u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN] = {0};
u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN] = {0};
/*------------------------Define local variable------------------------------*/
/* */
#define REG_EFUSE_CTRL 0x0030
#define EFUSE_CTRL REG_EFUSE_CTRL /* E-Fuse Control. */
/* */
bool
Efuse_Read1ByteFromFakeContent(
struct adapter *pAdapter,
u16 Offset,
u8 *Value);
bool
Efuse_Read1ByteFromFakeContent(
struct adapter *pAdapter,
u16 Offset,
u8 *Value)
{
if (Offset >= EFUSE_MAX_HW_SIZE)
return false;
if (fakeEfuseBank == 0)
*Value = fakeEfuseContent[Offset];
else
*Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset];
return true;
}
static bool
Efuse_Write1ByteToFakeContent(
struct adapter *pAdapter,
u16 Offset,
u8 Value)
{
if (Offset >= EFUSE_MAX_HW_SIZE)
return false;
if (fakeEfuseBank == 0) {
fakeEfuseContent[Offset] = Value;
} else {
fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value;
}
return true;
}
/*-----------------------------------------------------------------------------
* Function: Efuse_PowerSwitch
*
* Overview: When we want to enable write operation, we should change to
* pwr on state. When we stop write, we should switch to 500k mode
* and disable LDO 2.5V.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/17/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
void
Efuse_PowerSwitch(
struct adapter *pAdapter,
u8 write,
u8 PwrState)
{
pAdapter->HalFunc.EfusePowerSwitch(pAdapter, write, PwrState);
}
/*-----------------------------------------------------------------------------
* Function: efuse_GetCurrentSize
*
* Overview: Get current efuse size!!!
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/16/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
u16
Efuse_GetCurrentSize(
struct adapter *pAdapter,
u8 efuseType,
bool pseudo)
{
u16 ret = 0;
ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, pseudo);
return ret;
}
/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */
u8
Efuse_CalculateWordCnts(u8 word_en)
{
u8 word_cnts = 0;
if (!(word_en & BIT(0)))
word_cnts++; /* 0 : write enable */
if (!(word_en & BIT(1)))
word_cnts++;
if (!(word_en & BIT(2)))
word_cnts++;
if (!(word_en & BIT(3)))
word_cnts++;
return word_cnts;
}
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtw_efuse.h"
#include "../include/rtl8188e_hal.h"
/* */
/* Description: */
@ -169,26 +23,20 @@ void
ReadEFuseByte(
struct adapter *Adapter,
u16 _offset,
u8 *pbuf,
bool pseudo)
u8 *pbuf)
{
u32 value32;
u8 readbyte;
u16 retry;
if (pseudo) {
Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf);
return;
}
/* Write Address */
rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff));
readbyte = rtw_read8(Adapter, EFUSE_CTRL+2);
rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
rtw_write8(Adapter, EFUSE_CTRL + 1, (_offset & 0xff));
readbyte = rtw_read8(Adapter, EFUSE_CTRL + 2);
rtw_write8(Adapter, EFUSE_CTRL + 2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc));
/* Write bit 32 0 */
readbyte = rtw_read8(Adapter, EFUSE_CTRL+3);
rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f));
readbyte = rtw_read8(Adapter, EFUSE_CTRL + 3);
rtw_write8(Adapter, EFUSE_CTRL + 3, (readbyte & 0x7f));
/* Check bit 32 read-ready */
retry = 0;
@ -202,616 +50,12 @@ ReadEFuseByte(
/* This fix the problem that Efuse read error in high temperature condition. */
/* Designer says that there shall be some delay after ready bit is set, or the */
/* result will always stay on last data we read. */
rtw_udelay_os(50);
udelay(50);
value32 = rtw_read32(Adapter, EFUSE_CTRL);
*pbuf = (u8)(value32 & 0xff);
}
/* */
/* Description: */
/* 1. Execute E-Fuse read byte operation according as map offset and */
/* save to E-Fuse table. */
/* 2. Referred from SD1 Richard. */
/* */
/* Assumption: */
/* 1. Boot from E-Fuse and successfully auto-load. */
/* 2. PASSIVE_LEVEL (USB interface) */
/* */
/* Created by Roger, 2008.10.21. */
/* */
/* 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description. */
/* 2. Add efuse utilization collect. */
/* 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 */
/* write addr must be after sec5. */
/* */
static void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, bool pseudo)
{
Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, pseudo);
}
void EFUSE_GetEfuseDefinition(struct adapter *pAdapter, u8 efuseType, u8 type, void *pOut, bool pseudo
)
{
pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, pseudo);
}
/*-----------------------------------------------------------------------------
* Function: EFUSE_Read1Byte
*
* Overview: Copy from WMAC fot EFUSE read 1 byte.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 09/23/2008 MHC Copy from WMAC.
*
*---------------------------------------------------------------------------*/
u8 EFUSE_Read1Byte(struct adapter *Adapter, u16 Address)
{
u8 data;
u8 Bytetemp = {0x00};
u8 temp = {0x00};
u32 k = 0;
u16 contentLen = 0;
EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&contentLen, false);
if (Address < contentLen) { /* E-fuse 512Byte */
/* Write E-fuse Register address bit0~7 */
temp = Address & 0xFF;
rtw_write8(Adapter, EFUSE_CTRL+1, temp);
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2);
/* Write E-fuse Register address bit8~9 */
temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC);
rtw_write8(Adapter, EFUSE_CTRL+2, temp);
/* Write 0x30[31]= 0 */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
temp = Bytetemp & 0x7F;
rtw_write8(Adapter, EFUSE_CTRL+3, temp);
/* Wait Write-ready (0x30[31]= 1) */
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
while (!(Bytetemp & 0x80)) {
Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3);
k++;
if (k == 1000) {
k = 0;
break;
}
}
data = rtw_read8(Adapter, EFUSE_CTRL);
return data;
} else {
return 0xFF;
}
} /* EFUSE_Read1Byte */
/* 11/16/2008 MH Read one byte from real Efuse. */
u8 efuse_OneByteRead(struct adapter *pAdapter, u16 addr, u8 *data, bool pseudo)
{
u8 tmpidx = 0;
u8 result;
if (pseudo) {
result = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data);
return result;
}
/* -----------------e-fuse reg ctrl --------------------------------- */
/* address */
rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr & 0xff));
rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) & 0x03)) |
(rtw_read8(pAdapter, EFUSE_CTRL+2) & 0xFC));
rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);/* read cmd */
while (!(0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx < 100))
tmpidx++;
if (tmpidx < 100) {
*data = rtw_read8(pAdapter, EFUSE_CTRL);
result = true;
} else {
*data = 0xff;
result = false;
}
return result;
}
/* 11/16/2008 MH Write one byte to reald Efuse. */
u8 efuse_OneByteWrite(struct adapter *pAdapter, u16 addr, u8 data, bool pseudo)
{
u8 tmpidx = 0;
u8 result;
if (pseudo) {
result = Efuse_Write1ByteToFakeContent(pAdapter, addr, data);
return result;
}
/* -----------------e-fuse reg ctrl --------------------------------- */
/* address */
rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff));
rtw_write8(pAdapter, EFUSE_CTRL+2,
(rtw_read8(pAdapter, EFUSE_CTRL+2) & 0xFC) |
(u8)((addr>>8) & 0x03));
rtw_write8(pAdapter, EFUSE_CTRL, data);/* data */
rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);/* write cmd */
while ((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx < 100))
tmpidx++;
if (tmpidx < 100)
result = true;
else
result = false;
return result;
}
int Efuse_PgPacketRead(struct adapter *pAdapter, u8 offset, u8 *data, bool pseudo)
{
int ret = 0;
ret = pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, pseudo);
return ret;
}
int Efuse_PgPacketWrite(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool pseudo)
{
int ret;
ret = pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, pseudo);
return ret;
}
static int Efuse_PgPacketWrite_BT(struct adapter *pAdapter, u8 offset, u8 word_en, u8 *data, bool pseudo)
{
int ret;
ret = pAdapter->HalFunc.Efuse_PgPacketWrite_BT(pAdapter, offset, word_en, data, pseudo);
return ret;
}
/*-----------------------------------------------------------------------------
* Function: efuse_WordEnableDataRead
*
* Overview: Read allowed word in current efuse section data.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/16/2008 MHC Create Version 0.
* 11/21/2008 MHC Fix Write bug when we only enable late word.
*
*---------------------------------------------------------------------------*/
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata)
{
if (!(word_en&BIT(0))) {
targetdata[0] = sourdata[0];
targetdata[1] = sourdata[1];
}
if (!(word_en&BIT(1))) {
targetdata[2] = sourdata[2];
targetdata[3] = sourdata[3];
}
if (!(word_en&BIT(2))) {
targetdata[4] = sourdata[4];
targetdata[5] = sourdata[5];
}
if (!(word_en&BIT(3))) {
targetdata[6] = sourdata[6];
targetdata[7] = sourdata[7];
}
}
u8 Efuse_WordEnableDataWrite(struct adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data, bool pseudo)
{
u8 ret = 0;
ret = pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, pseudo);
return ret;
}
static u8 efuse_read8(struct adapter *padapter, u16 address, u8 *value)
{
return efuse_OneByteRead(padapter, address, value, false);
}
static u8 efuse_write8(struct adapter *padapter, u16 address, u8 *value)
{
return efuse_OneByteWrite(padapter, address, *value, false);
}
/*
* read/wirte raw efuse data
*/
u8 rtw_efuse_access(struct adapter *padapter, u8 write, u16 start_addr, u16 cnts, u8 *data)
{
int i = 0;
u16 real_content_len = 0, max_available_size = 0;
u8 res = _FAIL ;
u8 (*rw8)(struct adapter *, u16, u8*);
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (void *)&real_content_len, false);
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_available_size, false);
if (start_addr > real_content_len)
return _FAIL;
if (write) {
if ((start_addr + cnts) > max_available_size)
return _FAIL;
rw8 = &efuse_write8;
} else {
rw8 = &efuse_read8;
}
Efuse_PowerSwitch(padapter, write, true);
/* e-fuse one byte read / write */
for (i = 0; i < cnts; i++) {
if (start_addr >= real_content_len) {
res = _FAIL;
break;
}
res = rw8(padapter, start_addr++, data++);
if (_FAIL == res)
break;
}
Efuse_PowerSwitch(padapter, write, false);
return res;
}
/* */
u16 efuse_GetMaxSize(struct adapter *padapter)
{
u16 max_size;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (void *)&max_size, false);
return max_size;
}
/* */
u8 efuse_GetCurrentSize(struct adapter *padapter, u16 *size)
{
Efuse_PowerSwitch(padapter, false, true);
*size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, false);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
/* */
u8 rtw_efuse_map_read(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
Efuse_PowerSwitch(padapter, false, true);
efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, false);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
u8 rtw_BT_efuse_map_read(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
Efuse_PowerSwitch(padapter, false, true);
efuse_ReadEFuse(padapter, EFUSE_BT, addr, cnts, data, false);
Efuse_PowerSwitch(padapter, false, false);
return _SUCCESS;
}
/* */
u8 rtw_efuse_map_write(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u8 offset, word_en;
u8 *map;
u8 newdata[PGPKT_DATA_SIZE + 1];
s32 i, idx;
u8 ret = _SUCCESS;
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
map = rtw_zmalloc(mapLen);
if (map == NULL)
return _FAIL;
ret = rtw_efuse_map_read(padapter, 0, mapLen, map);
if (ret == _FAIL)
goto exit;
Efuse_PowerSwitch(padapter, true, true);
offset = (addr >> 3);
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE + 1);
i = addr & 0x7; /* index of one package */
idx = 0; /* data index */
if (i & 0x1) {
/* odd start */
if (data[idx] != map[addr+idx]) {
word_en &= ~BIT(i >> 1);
newdata[i-1] = map[addr+idx-1];
newdata[i] = data[idx];
}
i++;
idx++;
}
do {
for (; i < PGPKT_DATA_SIZE; i += 2) {
if (cnts == idx)
break;
if ((cnts - idx) == 1) {
if (data[idx] != map[addr+idx]) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i+1] = map[addr+idx+1];
}
idx++;
break;
} else {
if ((data[idx] != map[addr+idx]) ||
(data[idx+1] != map[addr+idx+1])) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i+1] = data[idx + 1];
}
idx += 2;
}
if (idx == cnts)
break;
}
if (word_en != 0xF) {
ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, false);
DBG_88E("offset=%x\n", offset);
DBG_88E("word_en=%x\n", word_en);
for (i = 0; i < PGPKT_DATA_SIZE; i++)
DBG_88E("data=%x \t", newdata[i]);
if (ret == _FAIL)
break;
}
if (idx == cnts)
break;
offset++;
i = 0;
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE);
} while (1);
Efuse_PowerSwitch(padapter, true, false);
exit:
kfree(map);
return ret;
}
/* */
u8 rtw_BT_efuse_map_write(struct adapter *padapter, u16 addr, u16 cnts, u8 *data)
{
u8 offset, word_en;
u8 *map;
u8 newdata[PGPKT_DATA_SIZE + 1];
s32 i, idx;
u8 ret = _SUCCESS;
u16 mapLen = 0;
EFUSE_GetEfuseDefinition(padapter, EFUSE_BT, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, false);
if ((addr + cnts) > mapLen)
return _FAIL;
map = rtw_zmalloc(mapLen);
if (map == NULL)
return _FAIL;
ret = rtw_BT_efuse_map_read(padapter, 0, mapLen, map);
if (ret == _FAIL)
goto exit;
Efuse_PowerSwitch(padapter, true, true);
offset = (addr >> 3);
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE + 1);
i = addr & 0x7; /* index of one package */
idx = 0; /* data index */
if (i & 0x1) {
/* odd start */
if (data[idx] != map[addr+idx]) {
word_en &= ~BIT(i >> 1);
newdata[i-1] = map[addr+idx-1];
newdata[i] = data[idx];
}
i++;
idx++;
}
do {
for (; i < PGPKT_DATA_SIZE; i += 2) {
if (cnts == idx)
break;
if ((cnts - idx) == 1) {
if (data[idx] != map[addr+idx]) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i+1] = map[addr+idx+1];
}
idx++;
break;
} else {
if ((data[idx] != map[addr+idx]) ||
(data[idx+1] != map[addr+idx+1])) {
word_en &= ~BIT(i >> 1);
newdata[i] = data[idx];
newdata[i+1] = data[idx + 1];
}
idx += 2;
}
if (idx == cnts)
break;
}
if (word_en != 0xF) {
DBG_88E("%s: offset=%#X\n", __func__, offset);
DBG_88E("%s: word_en=%#X\n", __func__, word_en);
DBG_88E("%s: data=", __func__);
for (i = 0; i < PGPKT_DATA_SIZE; i++)
DBG_88E("0x%02X ", newdata[i]);
DBG_88E("\n");
ret = Efuse_PgPacketWrite_BT(padapter, offset, word_en, newdata, false);
if (ret == _FAIL)
break;
}
if (idx == cnts)
break;
offset++;
i = 0;
word_en = 0xF;
memset(newdata, 0xFF, PGPKT_DATA_SIZE);
} while (1);
Efuse_PowerSwitch(padapter, true, false);
exit:
kfree(map);
return ret;
}
/*-----------------------------------------------------------------------------
* Function: efuse_ShadowRead1Byte
* efuse_ShadowRead2Byte
* efuse_ShadowRead4Byte
*
* Overview: Read from efuse init map by one/two/four bytes !!!!!
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/12/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
static void
efuse_ShadowRead1Byte(
struct adapter *pAdapter,
u16 Offset,
u8 *Value)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
} /* EFUSE_ShadowRead1Byte */
/* Read Two Bytes */
static void
efuse_ShadowRead2Byte(
struct adapter *pAdapter,
u16 Offset,
u16 *Value)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
} /* EFUSE_ShadowRead2Byte */
/* Read Four Bytes */
static void
efuse_ShadowRead4Byte(
struct adapter *pAdapter,
u16 Offset,
u32 *Value)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
*Value = pEEPROM->efuse_eeprom_data[Offset];
*Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8;
*Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16;
*Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24;
} /* efuse_ShadowRead4Byte */
/*-----------------------------------------------------------------------------
* Function: Efuse_ReadAllMap
*
* Overview: Read All Efuse content
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/11/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse, bool pseudo)
{
u16 mapLen = 0;
Efuse_PowerSwitch(pAdapter, false, true);
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
efuse_ReadEFuse(pAdapter, efuseType, 0, mapLen, Efuse, pseudo);
Efuse_PowerSwitch(pAdapter, false, false);
}
/*-----------------------------------------------------------------------------
* Function: EFUSE_ShadowMapUpdate
*
@ -828,45 +72,16 @@ static void Efuse_ReadAllMap(struct adapter *pAdapter, u8 efuseType, u8 *Efuse,
* 11/13/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
void EFUSE_ShadowMapUpdate(
struct adapter *pAdapter,
u8 efuseType,
bool pseudo)
void EFUSE_ShadowMapUpdate(struct adapter *pAdapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter);
u16 mapLen = 0;
struct eeprom_priv *pEEPROM = &pAdapter->eeprompriv;
EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (void *)&mapLen, pseudo);
if (pEEPROM->bautoload_fail_flag) {
memset(pEEPROM->efuse_eeprom_data, 0xFF, EFUSE_MAP_LEN_88E);
return;
}
if (pEEPROM->bautoload_fail_flag)
memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen);
else
Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, pseudo);
} /* EFUSE_ShadowMapUpdate */
/*-----------------------------------------------------------------------------
* Function: EFUSE_ShadowRead
*
* Overview: Read from efuse init map !!!!!
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/12/2008 MHC Create Version 0.
*
*---------------------------------------------------------------------------*/
void EFUSE_ShadowRead(struct adapter *pAdapter, u8 Type, u16 Offset, u32 *Value)
{
if (Type == 1)
efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value);
else if (Type == 2)
efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value);
else if (Type == 4)
efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value);
} /* EFUSE_ShadowRead */
rtl8188e_EfusePowerSwitch(pAdapter, true);
rtl8188e_ReadEFuse(pAdapter, 0, EFUSE_MAP_LEN_88E, pEEPROM->efuse_eeprom_data);
rtl8188e_EfusePowerSwitch(pAdapter, false);
}

314
core/rtw_fw.c Normal file
View file

@ -0,0 +1,314 @@
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include <linux/firmware.h>
#include "../include/rtw_fw.h"
#define MAX_REG_BOLCK_SIZE 196
#define FW_8188E_START_ADDRESS 0x1000
#define MAX_PAGE_SIZE 4096
#define IS_FW_HEADER_EXIST(_fwhdr) \
((le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x92C0 || \
(le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x88C0 || \
(le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x2300 || \
(le16_to_cpu(_fwhdr->Signature) & 0xFFF0) == 0x88E0)
/* This structure must be careful with byte-ordering */
struct rt_firmware_hdr {
/* 8-byte alinment required */
/* LONG WORD 0 ---- */
__le16 Signature; /* 92C0: test chip; 92C,
* 88C0: test chip; 88C1: MP A-cut;
* 92C1: MP A-cut */
u8 Category; /* AP/NIC and USB/PCI */
u8 Function; /* Reserved for different FW function
* indcation, for further use when
* driver needs to download different
* FW for different conditions */
__le16 Version; /* FW Version */
u8 Subversion; /* FW Subversion, default 0x00 */
u16 Rsvd1;
/* LONG WORD 1 ---- */
u8 Month; /* Release time Month field */
u8 Date; /* Release time Date field */
u8 Hour; /* Release time Hour field */
u8 Minute; /* Release time Minute field */
__le16 RamCodeSize; /* The size of RAM code */
u8 Foundry;
u8 Rsvd2;
/* LONG WORD 2 ---- */
__le32 SvnIdx; /* The SVN entry index */
u32 Rsvd3;
/* LONG WORD 3 ---- */
u32 Rsvd4;
u32 Rsvd5;
};
static void fw_download_enable(struct adapter *padapter, bool enable)
{
u8 tmp;
if (enable) {
/* MCU firmware download enable. */
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp | 0x01);
/* 8051 reset */
tmp = rtw_read8(padapter, REG_MCUFWDL + 2);
rtw_write8(padapter, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
/* MCU firmware download disable. */
tmp = rtw_read8(padapter, REG_MCUFWDL);
rtw_write8(padapter, REG_MCUFWDL, tmp & 0xfe);
/* Reserved for fw extension. */
rtw_write8(padapter, REG_MCUFWDL + 1, 0x00);
}
}
static int block_write(struct adapter *padapter, void *buffer, u32 buffSize)
{
int ret = _SUCCESS;
u32 blockSize_p1 = 4; /* (Default) Phase #1 : PCI muse use 4-byte write to download FW */
u32 blockSize_p2 = 8; /* Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. */
u32 blockSize_p3 = 1; /* Phase #3 : Use 1-byte, the remnant of FW image. */
u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0;
u32 remainSize_p1 = 0, remainSize_p2 = 0;
u8 *bufferPtr = (u8 *)buffer;
u32 i = 0, offset = 0;
blockSize_p1 = MAX_REG_BOLCK_SIZE;
/* 3 Phase #1 */
blockCount_p1 = buffSize / blockSize_p1;
remainSize_p1 = buffSize % blockSize_p1;
for (i = 0; i < blockCount_p1; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + i * blockSize_p1), blockSize_p1, (bufferPtr + i * blockSize_p1));
if (ret == _FAIL)
goto exit;
}
/* 3 Phase #2 */
if (remainSize_p1) {
offset = blockCount_p1 * blockSize_p1;
blockCount_p2 = remainSize_p1 / blockSize_p2;
remainSize_p2 = remainSize_p1 % blockSize_p2;
for (i = 0; i < blockCount_p2; i++) {
ret = rtw_writeN(padapter, (FW_8188E_START_ADDRESS + offset + i * blockSize_p2), blockSize_p2, (bufferPtr + offset + i * blockSize_p2));
if (ret == _FAIL)
goto exit;
}
}
/* 3 Phase #3 */
if (remainSize_p2) {
offset = (blockCount_p1 * blockSize_p1) + (blockCount_p2 * blockSize_p2);
blockCount_p3 = remainSize_p2 / blockSize_p3;
for (i = 0; i < blockCount_p3; i++) {
ret = rtw_write8(padapter, (FW_8188E_START_ADDRESS + offset + i), *(bufferPtr + offset + i));
if (ret == _FAIL)
goto exit;
}
}
exit:
return ret;
}
static int page_write(struct adapter *padapter, u32 page, void *buffer, u32 size)
{
u8 value8;
u8 u8Page = (u8)(page & 0x07);
value8 = (rtw_read8(padapter, REG_MCUFWDL + 2) & 0xF8) | u8Page;
rtw_write8(padapter, REG_MCUFWDL + 2, value8);
return block_write(padapter, buffer, size);
}
static int write_fw(struct adapter *padapter, void *buffer, u32 size)
{
/* Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. */
/* We can remove _ReadChipVersion from ReadpadapterInfo8192C later. */
int ret = _SUCCESS;
u32 pageNums, remainSize;
u32 page, offset;
u8 *bufferPtr = (u8 *)buffer;
pageNums = size / MAX_PAGE_SIZE;
remainSize = size % MAX_PAGE_SIZE;
for (page = 0; page < pageNums; page++) {
offset = page * MAX_PAGE_SIZE;
ret = page_write(padapter, page, bufferPtr + offset, MAX_PAGE_SIZE);
if (ret == _FAIL)
goto exit;
}
if (remainSize) {
offset = pageNums * MAX_PAGE_SIZE;
page = pageNums;
ret = page_write(padapter, page, bufferPtr + offset, remainSize);
if (ret == _FAIL)
goto exit;
}
exit:
return ret;
}
void rtw_reset_8051(struct adapter *padapter)
{
u8 val8;
val8 = rtw_read8(padapter, REG_SYS_FUNC_EN + 1);
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val8 & (~BIT(2)));
rtw_write8(padapter, REG_SYS_FUNC_EN + 1, val8 | (BIT(2)));
}
static int fw_free_to_go(struct adapter *padapter)
{
u32 counter = 0;
u32 value32;
/* polling CheckSum report */
do {
value32 = rtw_read32(padapter, REG_MCUFWDL);
if (value32 & FWDL_CHKSUM_RPT)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
if (counter >= POLLING_READY_TIMEOUT_COUNT)
return _FAIL;
value32 = rtw_read32(padapter, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
rtw_write32(padapter, REG_MCUFWDL, value32);
rtw_reset_8051(padapter);
/* polling for FW ready */
counter = 0;
do {
value32 = rtw_read32(padapter, REG_MCUFWDL);
if (value32 & WINTINI_RDY)
return _SUCCESS;
udelay(5);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
return _FAIL;
}
static int load_firmware(struct rt_firmware *rtfw, struct device *device)
{
int ret = _SUCCESS;
const struct firmware *fw;
const char *fw_name = "rtlwifi/rtl8188eufw.bin";
int err = request_firmware(&fw, fw_name, device);
if (err) {
pr_err("Request firmware failed with error 0x%x\n", err);
ret = _FAIL;
goto exit;
}
if (!fw) {
pr_err("Firmware %s not available\n", fw_name);
ret = _FAIL;
goto exit;
}
rtfw->data = kmemdup(fw->data, fw->size, GFP_KERNEL);
if (!rtfw->data) {
pr_err("Failed to allocate rtfw->data\n");
ret = _FAIL;
goto exit;
}
rtfw->size = fw->size;
exit:
release_firmware(fw);
return ret;
}
int rtl8188e_firmware_download(struct adapter *padapter)
{
int ret = _SUCCESS;
u8 write_fw_retry = 0;
u32 fwdl_start_time;
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
struct device *device = dvobj_to_dev(dvobj);
struct rt_firmware_hdr *fwhdr = NULL;
u16 fw_version, fw_subversion, fw_signature;
u8 *fw_data;
u32 fw_size;
static int log_version;
if (!dvobj->firmware.data)
ret = load_firmware(&dvobj->firmware, device);
if (ret == _FAIL) {
dvobj->firmware.data = NULL;
goto exit;
}
fw_data = dvobj->firmware.data;
fw_size = dvobj->firmware.size;
/* To Check Fw header. Added by tynli. 2009.12.04. */
fwhdr = (struct rt_firmware_hdr *)dvobj->firmware.data;
fw_version = le16_to_cpu(fwhdr->Version);
fw_subversion = fwhdr->Subversion;
fw_signature = le16_to_cpu(fwhdr->Signature);
if (!log_version++)
pr_info("%sFirmware Version %d, SubVersion %d, Signature 0x%x\n",
DRIVER_PREFIX, fw_version, fw_subversion, fw_signature);
if (IS_FW_HEADER_EXIST(fwhdr)) {
/* Shift 32 bytes for FW header */
fw_data = fw_data + 32;
fw_size = fw_size - 32;
}
/* Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, */
/* or it will cause download Fw fail. 2010.02.01. by tynli. */
if (rtw_read8(padapter, REG_MCUFWDL) & RAM_DL_SEL) { /* 8051 RAM code */
rtw_write8(padapter, REG_MCUFWDL, 0x00);
rtw_reset_8051(padapter);
}
fw_download_enable(padapter, true);
fwdl_start_time = jiffies;
while (1) {
/* reset the FWDL chksum */
rtw_write8(padapter, REG_MCUFWDL, rtw_read8(padapter, REG_MCUFWDL) | FWDL_CHKSUM_RPT);
ret = write_fw(padapter, fw_data, fw_size);
if (ret == _SUCCESS ||
(rtw_get_passing_time_ms(fwdl_start_time) > 500 && write_fw_retry++ >= 3))
break;
}
fw_download_enable(padapter, false);
if (ret != _SUCCESS)
goto exit;
ret = fw_free_to_go(padapter);
if (ret != _SUCCESS)
goto exit;
exit:
return ret;
}

683
core/rtw_ieee80211.c
View file

File diff suppressed because it is too large Load diff

323
core/rtw_io.c
View file

@ -1,323 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*
The purpose of rtw_io.c
a. provides the API
b. provides the protocol engine
c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
USB:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
*/
#define _RTW_IO_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_io.h>
#include <osdep_intf.h>
#include <usb_ops.h>
#define rtw_le16_to_cpu(val) le16_to_cpu(val)
#define rtw_le32_to_cpu(val) le32_to_cpu(val)
#define rtw_cpu_to_le16(val) cpu_to_le16(val)
#define rtw_cpu_to_le32(val) cpu_to_le32(val)
u8 _rtw_read8(struct adapter *adapter, u32 addr)
{
u8 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_read8 = pintfhdl->io_ops._read8;
r_val = _read8(pintfhdl, addr);
return r_val;
}
u16 _rtw_read16(struct adapter *adapter, u32 addr)
{
u16 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_read16 = pintfhdl->io_ops._read16;
r_val = _read16(pintfhdl, addr);
return r_val;
}
u32 _rtw_read32(struct adapter *adapter, u32 addr)
{
u32 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_read32 = pintfhdl->io_ops._read32;
r_val = _read32(pintfhdl, addr);
return r_val;
}
int _rtw_write8(struct adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_write8 = pintfhdl->io_ops._write8;
ret = _write8(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write16(struct adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_write16 = pintfhdl->io_ops._write16;
ret = _write16(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write32(struct adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_write32 = pintfhdl->io_ops._write32;
ret = _write32(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_writeN(struct adapter *adapter, u32 addr , u32 length , u8 *pdata)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf));
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
int ret;
_writeN = pintfhdl->io_ops._writeN;
ret = _writeN(pintfhdl, addr, length, pdata);
return RTW_STATUS_CODE(ret);
}
int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_write8_async = pintfhdl->io_ops._write8_async;
ret = _write8_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_write16_async = pintfhdl->io_ops._write16_async;
ret = _write16_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_write32_async = pintfhdl->io_ops._write32_async;
ret = _write32_async(pintfhdl, addr, val);
return RTW_STATUS_CODE(ret);
}
void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_mem = pintfhdl->io_ops._read_mem;
_read_mem(pintfhdl, addr, cnt, pmem);
}
void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_mem = pintfhdl->io_ops._write_mem;
_write_mem(pintfhdl, addr, cnt, pmem);
}
void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_port = pintfhdl->io_ops._read_port;
_read_port(pintfhdl, addr, cnt, pmem);
}
void _rtw_read_port_cancel(struct adapter *adapter)
{
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
if (_read_port_cancel)
_read_port_cancel(pintfhdl);
}
u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 ret = _SUCCESS;
_write_port = pintfhdl->io_ops._write_port;
ret = _write_port(pintfhdl, addr, cnt, pmem);
return ret;
}
u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
{
int ret = _SUCCESS;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
struct submit_ctx sctx;
rtw_sctx_init(&sctx, timeout_ms);
pxmitbuf->sctx = &sctx;
ret = _rtw_write_port(adapter, addr, cnt, pmem);
if (ret == _SUCCESS)
ret = rtw_sctx_wait(&sctx);
return ret;
}
void _rtw_write_port_cancel(struct adapter *adapter)
{
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
if (_write_port_cancel)
_write_port_cancel(pintfhdl);
}
int rtw_init_io_priv(struct adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops))
{
struct io_priv *piopriv = &padapter->iopriv;
struct intf_hdl *pintf = &piopriv->intf;
if (set_intf_ops == NULL)
return _FAIL;
piopriv->padapter = padapter;
pintf->padapter = padapter;
pintf->pintf_dev = adapter_to_dvobj(padapter);
set_intf_ops(&pintf->io_ops);
return _SUCCESS;
}

729
core/rtw_ioctl_set.c
View file

File diff suppressed because it is too large Load diff

83
core/rtw_iol.c
View file

@ -1,44 +1,23 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include<rtw_iol.h>
#include "../include/rtw_iol.h"
struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter)
{
struct xmit_frame *xmit_frame;
struct xmit_buf *xmitbuf;
struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
xmit_frame = rtw_alloc_xmitframe(pxmitpriv);
if (xmit_frame == NULL) {
DBG_88E("%s rtw_alloc_xmitframe return null\n", __func__);
goto exit;
}
if (!xmit_frame)
return NULL;
xmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (xmitbuf == NULL) {
DBG_88E("%s rtw_alloc_xmitbuf return null\n", __func__);
if (!xmitbuf) {
rtw_free_xmitframe(pxmitpriv, xmit_frame);
xmit_frame = NULL;
goto exit;
return NULL;
}
xmit_frame->frame_tag = MGNT_FRAMETAG;
@ -52,7 +31,7 @@ struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter)
pattrib->subtype = WIFI_BEACON;
pattrib->pktlen = 0;
pattrib->last_txcmdsz = 0;
exit:
return xmit_frame;
}
@ -63,14 +42,11 @@ int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len
u32 ori_len;
buf_offset = TXDESC_OFFSET;
ori_len = buf_offset+pattrib->pktlen;
ori_len = buf_offset + pattrib->pktlen;
/* check if the io_buf can accommodate new cmds */
if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
DBG_88E("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n",
__func__ , ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ)
return _FAIL;
}
memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
pattrib->pktlen += cmd_len;
@ -84,21 +60,13 @@ bool rtw_IOL_applied(struct adapter *adapter)
if (1 == adapter->registrypriv.fw_iol)
return true;
if ((2 == adapter->registrypriv.fw_iol) && (!adapter_to_dvobj(adapter)->ishighspeed))
if ((2 == adapter->registrypriv.fw_iol) &&
(adapter_to_dvobj(adapter)->pusbdev->speed != USB_SPEED_HIGH))
return true;
return false;
}
int rtw_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms, bndy_cnt);
}
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
{
return _SUCCESS;
}
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0};
@ -145,7 +113,7 @@ int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr,
{
struct ioreg_cfg cmd = {8, IOREG_CMD_W_RF, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16((rf_path<<8) | ((addr) & 0xFF));
cmd.address = cpu_to_le16((rf_path << 8) | ((addr) & 0xFF));
cmd.data = cpu_to_le32(value);
if (mask != 0x000FFFFF) {
@ -181,29 +149,12 @@ int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame)
{
u8 is_cmd_bndy = false;
if (((pxmit_frame->attrib.pktlen+32)%256) + 8 >= 256) {
if (((pxmit_frame->attrib.pktlen + 32) % 256) + 8 >= 256) {
rtw_IOL_append_END_cmd(pxmit_frame);
pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen+32)/256)+1)*256);
pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen + 32) / 256) + 1) * 256);
pxmit_frame->attrib.last_txcmdsz = pxmit_frame->attrib.pktlen;
is_cmd_bndy = true;
}
return is_cmd_bndy;
}
void rtw_IOL_cmd_buf_dump(struct adapter *Adapter, int buf_len, u8 *pbuf)
{
int i;
int j = 1;
pr_info("###### %s ######\n", __func__);
for (i = 0; i < buf_len; i++) {
printk("%02x-", *(pbuf+i));
if (j%32 == 0)
printk("\n");
j++;
}
printk("\n");
pr_info("=============ioreg_cmd len=%d===============\n", buf_len);
}

1887
core/rtw_led.c
View file

File diff suppressed because it is too large Load diff

718
core/rtw_mlme.c
View file

File diff suppressed because it is too large Load diff

1962
core/rtw_mlme_ext.c
View file

File diff suppressed because it is too large Load diff

1001
core/rtw_mp.c
View file

File diff suppressed because it is too large Load diff

1352
core/rtw_mp_ioctl.c
View file

File diff suppressed because it is too large Load diff

355
core/rtw_p2p.c
View file

@ -1,29 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTW_P2P_C_
#include <drv_types.h>
#include <rtw_p2p.h>
#include <wifi.h>
#ifdef CONFIG_88EU_P2P
#include "../include/drv_types.h"
#include "../include/rtw_p2p.h"
#include "../include/wifi.h"
static int rtw_p2p_is_channel_list_ok(u8 desired_ch, u8 *ch_list, u8 ch_cnt)
{
@ -48,9 +30,7 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
struct adapter *padapter = pwdinfo->padapter;
struct sta_priv *pstapriv = &padapter->stapriv;
DBG_88E("%s\n", __func__);
pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN);
pdata_attr = kzalloc(MAX_P2P_IE_LEN, GFP_KERNEL);
pstart = pdata_attr;
pcur = pdata_attr;
@ -91,8 +71,8 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
*pcur = psta->num_of_secdev_type;
pcur++;
memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8);
pcur += psta->num_of_secdev_type*8;
memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type * 8);
pcur += psta->num_of_secdev_type * 8;
if (psta->dev_name_len > 0) {
/* u16*)(pcur) = cpu_to_be16(WPS_ATTR_DEVICE_NAME); */
@ -107,9 +87,9 @@ static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf)
pcur += psta->dev_name_len;
}
tmplen = (u8)(pcur-pstart);
tmplen = (u8)(pcur - pstart);
*pstart = (tmplen-1);
*pstart = (tmplen - 1);
attr_len += tmplen;
@ -134,17 +114,15 @@ static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da)
struct rtw_ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
struct adapter *padapter = pwdinfo->padapter;
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
unsigned char category = RTW_WLAN_CATEGORY_P2P;/* P2P action frame */
__be32 p2poui = cpu_to_be32(P2POUI);
u8 oui_subtype = P2P_GO_DISC_REQUEST;
u8 dialogToken = 0;
DBG_88E("[%s]\n", __func__);
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (pmgntframe == NULL)
if (!pmgntframe)
return;
/* update attribute */
@ -156,7 +134,7 @@ static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da)
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, da, ETH_ALEN);
@ -171,10 +149,10 @@ static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da)
pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
/* Build P2P action frame header */
pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&(p2poui), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&p2poui, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &oui_subtype, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &dialogToken, &pattrib->pktlen);
/* there is no IE in this P2P action frame */
@ -191,8 +169,8 @@ static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 s
struct rtw_ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
struct adapter *padapter = pwdinfo->padapter;
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
unsigned char category = RTW_WLAN_CATEGORY_PUBLIC;
u8 action = P2P_PUB_ACTION_ACTION;
__be32 p2poui = cpu_to_be32(P2POUI);
@ -200,10 +178,8 @@ static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 s
u8 p2pie[8] = { 0x00 };
u32 p2pielen = 0;
DBG_88E("[%s]\n", __func__);
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (pmgntframe == NULL)
if (!pmgntframe)
return;
/* update attribute */
@ -215,7 +191,7 @@ static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 s
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, da, ETH_ALEN);
@ -230,11 +206,11 @@ static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 s
pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
/* Build P2P public action frame header */
pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&(p2poui), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&p2poui, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &oui_subtype, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &dialogToken, &pattrib->pktlen);
/* Build P2P IE */
/* P2P OUI */
@ -269,11 +245,11 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr,
unsigned char *pframe;
struct rtw_ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (pmgntframe == NULL)
if (!pmgntframe)
return;
/* update attribute */
@ -285,12 +261,12 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr,
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, raddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN);
memcpy(pwlanhdr->addr3, myid(&padapter->eeprompriv), ETH_ALEN);
SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq);
pmlmeext->mgnt_seq++;
@ -299,11 +275,11 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr,
pframe += sizeof(struct rtw_ieee80211_hdr_3addr);
pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&(p2poui), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &action, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&p2poui, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &oui_subtype, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &dialogToken, &pattrib->pktlen);
wpsielen = 0;
/* WPS OUI */
@ -328,8 +304,6 @@ static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8 *raddr,
pattrib->last_txcmdsz = pattrib->pktlen;
dump_mgntframe(padapter, pmgntframe);
return;
}
static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken)
@ -340,8 +314,8 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
struct rtw_ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
struct adapter *padapter = pwdinfo->padapter;
struct xmit_priv *pxmitpriv = &(padapter->xmitpriv);
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
unsigned char category = RTW_WLAN_CATEGORY_P2P;/* P2P action frame */
__be32 p2poui = cpu_to_be32(P2POUI);
u8 oui_subtype = P2P_PRESENCE_RESPONSE;
@ -349,10 +323,8 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
u8 noa_attr_content[32] = { 0x00 };
u32 p2pielen = 0;
DBG_88E("[%s]\n", __func__);
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (pmgntframe == NULL)
if (!pmgntframe)
return;
/* update attribute */
@ -364,7 +336,7 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, da, ETH_ALEN);
@ -379,10 +351,10 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr);
/* Build P2P action frame header */
pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&(p2poui), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen));
pframe = rtw_set_fixed_ie(pframe, 1, &category, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&p2poui, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &oui_subtype, &pattrib->pktlen);
pframe = rtw_set_fixed_ie(pframe, 1, &dialogToken, &pattrib->pktlen);
/* Add P2P IE header */
/* P2P OUI */
@ -403,7 +375,7 @@ static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8
p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content);
pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen));
pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen);
pattrib->last_txcmdsz = pattrib->pktlen;
@ -437,10 +409,10 @@ u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
/* Be able to participate in additional P2P Groups and */
/* support the P2P Invitation Procedure */
/* Group Capability Bitmap, 1 byte */
capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY;
capability = P2P_DEVCAP_INVITATION_PROC | P2P_DEVCAP_CLIENT_DISCOVERABILITY;
capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8);
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING))
capability |= (P2P_GRPCAP_GROUP_FORMATION<<8);
capability |= (P2P_GRPCAP_GROUP_FORMATION << 8);
le_tmp = cpu_to_le16(capability);
p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8 *)&le_tmp);
@ -753,13 +725,6 @@ u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status
return len;
}
u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
{
u32 len = 0;
return len;
}
u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len)
{
u8 *p;
@ -806,15 +771,15 @@ u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
ssid_len &= 0xff; /* Just last 1 byte is valid for ssid len of the probe request */
if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) {
p2pie = rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen);
p2pie = rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_, NULL, &p2pielen);
if (p2pie) {
if ((p != NULL) && !memcmp((void *)(p+2), (void *)pwdinfo->p2p_wildcard_ssid , 7)) {
if (p && !memcmp((void *)(p + 2), (void *)pwdinfo->p2p_wildcard_ssid, 7)) {
/* todo: */
/* Check Requested Device Type attributes in WSC IE. */
/* Check Device ID attribute in P2P IE */
ret = true;
} else if ((p != NULL) && (ssid_len == 0)) {
} else if (p && ssid_len == 0) {
ret = true;
}
} else {
@ -851,35 +816,29 @@ u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
ies = pframe + WLAN_HDR_A3_LEN + ie_offset;
ies_len = len - WLAN_HDR_A3_LEN - ie_offset;
p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen);
p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen);
if (!p2p_ie) {
DBG_88E("[%s] P2P IE not Found!!\n", __func__);
if (!p2p_ie)
status_code = P2P_STATUS_FAIL_INVALID_PARAM;
} else {
DBG_88E("[%s] P2P IE Found!!\n", __func__);
}
while (p2p_ie) {
/* Check P2P Capability ATTR */
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8 *)&le_tmp, (uint *)&attr_contentlen)) {
DBG_88E("[%s] Got P2P Capability Attr!!\n", __func__);
cap_attr = le16_to_cpu(le_tmp);
psta->dev_cap = cap_attr&0xff;
psta->dev_cap = cap_attr & 0xff;
}
/* Check Extended Listen Timing ATTR */
/* Check P2P Device Info ATTR */
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint *)&attr_contentlen)) {
DBG_88E("[%s] Got P2P DEVICE INFO Attr!!\n", __func__);
pattr_content = rtw_zmalloc(attr_contentlen);
pattr_content = kzalloc(attr_contentlen, GFP_KERNEL);
pbuf = pattr_content;
if (pattr_content) {
u8 num_of_secdev_type;
u16 dev_name_len;
rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint *)&attr_contentlen);
rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, pattr_content, (uint *)&attr_contentlen);
memcpy(psta->dev_addr, pattr_content, ETH_ALEN);/* P2P Device Address */
@ -904,28 +863,28 @@ u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
psta->num_of_secdev_type = num_of_secdev_type;
len = (sizeof(psta->secdev_types_list) < (num_of_secdev_type*8)) ?
(sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8);
len = (sizeof(psta->secdev_types_list) < (num_of_secdev_type * 8)) ?
(sizeof(psta->secdev_types_list)) : (num_of_secdev_type * 8);
memcpy(psta->secdev_types_list, pattr_content, len);
pattr_content += (num_of_secdev_type*8);
pattr_content += (num_of_secdev_type * 8);
}
psta->dev_name_len = 0;
if (WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(__be16 *)pattr_content)) {
dev_name_len = be16_to_cpu(*(__be16 *)(pattr_content+2));
dev_name_len = be16_to_cpu(*(__be16 *)(pattr_content + 2));
psta->dev_name_len = (sizeof(psta->dev_name) < dev_name_len) ? sizeof(psta->dev_name) : dev_name_len;
memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len);
memcpy(psta->dev_name, pattr_content + 4, psta->dev_name_len);
}
kfree(pbuf);
}
}
/* Get the next P2P IE */
p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
}
return status_code;
@ -954,7 +913,7 @@ u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint le
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) {
if (!memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) &&
!memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len)) {
!memcmp(pwdinfo->p2p_group_ssid, groupid + ETH_ALEN, pwdinfo->p2p_group_ssid_len)) {
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) {
struct list_head *phead, *plist;
@ -969,7 +928,7 @@ u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint le
plist = plist->next;
if (psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) &&
if (psta->is_p2p_device && (psta->dev_cap & P2P_DEVCAP_CLIENT_DISCOVERABILITY) &&
!memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) {
/* issue GO Discoverability Request */
issue_group_disc_req(pwdinfo, psta->hwaddr);
@ -1031,7 +990,6 @@ u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint l
issue_p2p_provision_resp(pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method);
}
}
DBG_88E("[%s] config method = %s\n", __func__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req);
return true;
}
@ -1056,7 +1014,7 @@ static u8 rtw_p2p_get_peer_ch_list(struct wifidirect_info *pwdinfo, u8 *ch_conte
peer_ch_list[j] = *(ch_content + 1 + i);
ch_content += (temp + 1);
ch_cnt -= (temp + 1);
ch_no += temp ;
ch_no += temp;
}
return ch_no;
@ -1110,7 +1068,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
memcpy(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3);
}
} else {
DBG_88E("[%s] WPS IE not Found!!\n", __func__);
result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
return result;
@ -1128,7 +1085,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
p2p_ie = rtw_get_p2p_ie(ies, ies_len, NULL, &p2p_ielen);
if (!p2p_ie) {
DBG_88E("[%s] P2P IE not Found!!\n", __func__);
result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
}
@ -1145,8 +1101,7 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING);
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen)) {
DBG_88E("[%s] GO Intent = %d, tie = %d\n", __func__, attr_content >> 1, attr_content & 0x01);
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, &attr_content, &attr_contentlen)) {
pwdinfo->peer_intent = attr_content; /* include both intent and tie breaker values. */
if (pwdinfo->intent == (pwdinfo->peer_intent >> 1)) {
@ -1184,7 +1139,6 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned);
if (ch_num_inclusioned == 0) {
DBG_88E("[%s] No common channel in channel list!\n", __func__);
result = P2P_STATUS_FAIL_NO_COMMON_CH;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
break;
@ -1200,23 +1154,21 @@ u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo, u8 *pframe,
peer_operating_ch = operatingch_info[4];
if (rtw_p2p_is_channel_list_ok(peer_operating_ch,
ch_list_inclusioned, ch_num_inclusioned)) {
ch_list_inclusioned,
ch_num_inclusioned))
/**
* Change our operating channel as peer's for compatibility.
*/
pwdinfo->operating_channel = peer_operating_ch;
DBG_88E("[%s] Change op ch to %02x as peer's\n", __func__, pwdinfo->operating_channel);
} else {
else
/* Take first channel of ch_list_inclusioned as operating channel */
pwdinfo->operating_channel = ch_list_inclusioned[0];
DBG_88E("[%s] Change op ch to %02x\n", __func__, pwdinfo->operating_channel);
}
}
}
}
/* Get the next P2P IE */
p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
}
return result;
}
@ -1235,9 +1187,7 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
/* Be able to know which one is the P2P GO and which one is P2P client. */
if (rtw_get_wps_ie(ies, ies_len, NULL, &wps_ielen)) {
} else {
DBG_88E("[%s] WPS IE not Found!!\n", __func__);
if (!rtw_get_wps_ie(ies, ies_len, NULL, &wps_ielen)) {
result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
}
@ -1260,7 +1210,6 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
while (p2p_ie) { /* Found the P2P IE. */
rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
if (attr_contentlen == 1) {
DBG_88E("[%s] Status = %d\n", __func__, attr_content);
if (attr_content == P2P_STATUS_SUCCESS) {
/* Do nothing. */
} else {
@ -1285,8 +1234,7 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
/* Try to get the peer's intent and tie breaker value. */
attr_content = 0x00;
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen)) {
DBG_88E("[%s] GO Intent = %d, tie = %d\n", __func__, attr_content >> 1, attr_content & 0x01);
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT, &attr_content, &attr_contentlen)) {
pwdinfo->peer_intent = attr_content; /* include both intent and tie breaker values. */
if (pwdinfo->intent == (pwdinfo->peer_intent >> 1)) {
@ -1323,20 +1271,20 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
/* Try to get the operation channel information */
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) {
DBG_88E("[%s] Peer's operating channel = %d\n", __func__, operatingch_info[4]);
if (rtw_get_p2p_attr_content(p2p_ie,
p2p_ielen,
P2P_ATTR_OPERATING_CH,
operatingch_info,
&attr_contentlen))
pwdinfo->peer_operating_ch = operatingch_info[4];
}
/* Try to get the channel list information */
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, pwdinfo->channel_list_attr, &pwdinfo->channel_list_attr_len)) {
DBG_88E("[%s] channel list attribute found, len = %d\n", __func__, pwdinfo->channel_list_attr_len);
peer_ch_num = rtw_p2p_get_peer_ch_list(pwdinfo, pwdinfo->channel_list_attr, pwdinfo->channel_list_attr_len, peer_ch_list);
ch_num_inclusioned = rtw_p2p_ch_inclusion(&padapter->mlmeextpriv, peer_ch_list, peer_ch_num, ch_list_inclusioned);
if (ch_num_inclusioned == 0) {
DBG_88E("[%s] No common channel in channel list!\n", __func__);
result = P2P_STATUS_FAIL_NO_COMMON_CH;
rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL);
break;
@ -1352,21 +1300,16 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
peer_operating_ch = operatingch_info[4];
if (rtw_p2p_is_channel_list_ok(peer_operating_ch,
ch_list_inclusioned, ch_num_inclusioned)) {
ch_list_inclusioned, ch_num_inclusioned))
/**
* Change our operating channel as peer's for compatibility.
*/
pwdinfo->operating_channel = peer_operating_ch;
DBG_88E("[%s] Change op ch to %02x as peer's\n", __func__, pwdinfo->operating_channel);
} else {
else
/* Take first channel of ch_list_inclusioned as operating channel */
pwdinfo->operating_channel = ch_list_inclusioned[0];
DBG_88E("[%s] Change op ch to %02x\n", __func__, pwdinfo->operating_channel);
}
}
}
} else {
DBG_88E("[%s] channel list attribute not found!\n", __func__);
}
/* Try to get the group id information if peer is GO */
@ -1378,7 +1321,7 @@ u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo, u8 *pframe
}
/* Get the next P2P IE */
p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
}
}
return result;
@ -1403,13 +1346,10 @@ u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pfr
pwdinfo->negotiation_dialog_token = 1;
rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen);
if (attr_contentlen == 1) {
DBG_88E("[%s] Status = %d\n", __func__, attr_content);
result = attr_content;
if (attr_content == P2P_STATUS_SUCCESS) {
u8 bcancelled = 0;
_cancel_timer(&pwdinfo->restore_p2p_state_timer, &bcancelled);
del_timer_sync(&pwdinfo->restore_p2p_state_timer);
/* Commented by Albert 20100911 */
/* Todo: Need to handle the case which both Intents are the same. */
@ -1437,19 +1377,20 @@ u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo, u8 *pfr
attr_contentlen = 0;
memset(groupid, 0x00, 38);
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) {
DBG_88E("[%s] Ssid = %s, ssidlen = %zu\n", __func__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]));
memcpy(pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN);
memcpy(pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN);
}
attr_contentlen = 0;
if (rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) {
DBG_88E("[%s] Peer's operating channel = %d\n", __func__, operatingch_info[4]);
if (rtw_get_p2p_attr_content(p2p_ie,
p2p_ielen,
P2P_ATTR_OPERATING_CH,
operatingch_info,
&attr_contentlen))
pwdinfo->peer_operating_ch = operatingch_info[4];
}
/* Get the next P2P IE */
p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
}
return result;
}
@ -1512,7 +1453,7 @@ static void pre_tx_invitereq_handler(struct adapter *padapter)
u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->invitereq_info.peer_ch, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@ -1524,7 +1465,7 @@ static void pre_tx_provdisc_handler(struct adapter *padapter)
u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@ -1536,7 +1477,7 @@ static void pre_tx_negoreq_handler(struct adapter *padapter)
u8 val8 = 1;
set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
SetHwReg8188EU(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8));
issue_probereq_p2p(padapter, NULL);
_set_timer(&pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT);
@ -1574,7 +1515,7 @@ void process_p2p_ps_ie(struct adapter *padapter, u8 *IEs, u32 IELength)
u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };/* NoA length should be n*(13) + 2 */
u32 attr_contentlen = 0;
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
u8 find_p2p = false, find_p2p_ps = false;
u8 noa_offset, noa_num, noa_index;
@ -1641,7 +1582,7 @@ void process_p2p_ps_ie(struct adapter *padapter, u8 *IEs, u32 IELength)
}
/* Get the next P2P IE */
p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
p2p_ie = rtw_get_p2p_ie(p2p_ie + p2p_ielen, ies_len - (p2p_ie - ies + p2p_ielen), NULL, &p2p_ielen);
}
if (find_p2p) {
@ -1654,14 +1595,14 @@ void process_p2p_ps_ie(struct adapter *padapter, u8 *IEs, u32 IELength)
void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
/* Pre action for p2p state */
switch (p2p_ps_state) {
case P2P_PS_DISABLE:
pwdinfo->p2p_ps_state = p2p_ps_state;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
pwdinfo->noa_index = 0;
pwdinfo->ctwindow = 0;
@ -1671,7 +1612,7 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
if (padapter->pwrctrlpriv.bFwCurrentInPSMode) {
if (pwrpriv->smart_ps == 0) {
pwrpriv->smart_ps = 2;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode)));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
}
}
break;
@ -1682,11 +1623,10 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
if (pwdinfo->ctwindow > 0) {
if (pwrpriv->smart_ps != 0) {
pwrpriv->smart_ps = 0;
DBG_88E("%s(): Enter CTW, change SmartPS\n", __func__);
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode)));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&padapter->pwrctrlpriv.pwr_mode));
}
}
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
}
break;
case P2P_PS_SCAN:
@ -1694,7 +1634,7 @@ void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state)
case P2P_PS_ALLSTASLEEP:
if (pwdinfo->p2p_ps_mode > P2P_PS_NONE) {
pwdinfo->p2p_ps_state = p2p_ps_state;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state));
}
break;
default:
@ -1707,7 +1647,7 @@ u8 p2p_ps_wk_cmd(struct adapter *padapter, u8 p2p_ps_state, u8 enqueue)
{
struct cmd_obj *ph2c;
struct drvextra_cmd_parm *pdrvextra_cmd_parm;
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
u8 res = _SUCCESS;
@ -1715,14 +1655,14 @@ u8 p2p_ps_wk_cmd(struct adapter *padapter, u8 p2p_ps_state, u8 enqueue)
return res;
if (enqueue) {
ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj));
if (ph2c == NULL) {
ph2c = kzalloc(sizeof(struct cmd_obj), GFP_ATOMIC);
if (!ph2c) {
res = _FAIL;
goto exit;
}
pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)rtw_zmalloc(sizeof(struct drvextra_cmd_parm));
if (pdrvextra_cmd_parm == NULL) {
pdrvextra_cmd_parm = kzalloc(sizeof(struct drvextra_cmd_parm), GFP_ATOMIC);
if (!pdrvextra_cmd_parm) {
kfree(ph2c);
res = _FAIL;
goto exit;
@ -1744,61 +1684,35 @@ exit:
return res;
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
static void reset_ch_sitesurvey_timer_process(struct timer_list *t)
#else
static void reset_ch_sitesurvey_timer_process (void *FunctionContext)
#endif
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
struct adapter *adapter = from_timer(adapter, t, pwrctrlpriv.pwr_state_check_timer);
#else
struct adapter *adapter = (struct adapter *)FunctionContext;
#endif
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
DBG_88E("[%s] In\n", __func__);
/* Reset the operation channel information */
pwdinfo->rx_invitereq_info.operation_ch[0] = 0;
pwdinfo->rx_invitereq_info.scan_op_ch_only = 0;
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
static void reset_ch_sitesurvey_timer_process2 (struct timer_list *t)
#else
static void reset_ch_sitesurvey_timer_process2 (void *FunctionContext)
#endif
static void reset_ch_sitesurvey_timer_process2(struct timer_list *t)
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
struct adapter *adapter = from_timer(adapter, t, pwrctrlpriv.pwr_state_check_timer);
#else
struct adapter *adapter = (struct adapter *)FunctionContext;
#endif
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
DBG_88E("[%s] In\n", __func__);
/* Reset the operation channel information */
pwdinfo->p2p_info.operation_ch[0] = 0;
pwdinfo->p2p_info.scan_op_ch_only = 0;
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
static void restore_p2p_state_timer_process(struct timer_list *t)
#else
static void restore_p2p_state_timer_process (void *FunctionContext)
#endif
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
struct adapter *adapter = from_timer(adapter, t, wdinfo.restore_p2p_state_timer);
#else
struct adapter *adapter = (struct adapter *)FunctionContext;
#endif
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
@ -1807,17 +1721,9 @@ static void restore_p2p_state_timer_process (void *FunctionContext)
p2p_protocol_wk_cmd(adapter, P2P_RESTORE_STATE_WK);
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
static void pre_tx_scan_timer_process(struct timer_list *t)
#else
static void pre_tx_scan_timer_process(void *FunctionContext)
#endif
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
struct adapter *adapter = from_timer(adapter, t, wdinfo.pre_tx_scan_timer);
#else
struct adapter *adapter = (struct adapter *)FunctionContext;
#endif
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
@ -1838,24 +1744,14 @@ static void pre_tx_scan_timer_process(void *FunctionContext)
} else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_INVITE_REQ)) {
if (pwdinfo->invitereq_info.benable)
p2p_protocol_wk_cmd(adapter, P2P_PRE_TX_INVITEREQ_PROCESS_WK);
} else {
DBG_88E("[%s] p2p_state is %d, ignore!!\n", __func__, rtw_p2p_state(pwdinfo));
}
spin_unlock_bh(&pmlmepriv->lock);
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
static void find_phase_timer_process(struct timer_list *t)
#else
static void find_phase_timer_process(void *FunctionContext)
#endif
{
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
struct adapter *adapter = from_timer(adapter, t, wdinfo.find_phase_timer);
#else
struct adapter *adapter = (struct adapter *)FunctionContext;
#endif
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
@ -1873,32 +1769,21 @@ void reset_global_wifidirect_info(struct adapter *padapter)
pwdinfo = &padapter->wdinfo;
pwdinfo->persistent_supported = 0;
pwdinfo->session_available = true;
pwdinfo->wfd_tdls_enable = 0;
pwdinfo->wfd_tdls_weaksec = 0;
}
void rtw_init_wifidirect_timers(struct adapter *padapter)
{
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
timer_setup(&pwdinfo->find_phase_timer, find_phase_timer_process, 0);
timer_setup(&pwdinfo->restore_p2p_state_timer, restore_p2p_state_timer_process, 0);
timer_setup(&pwdinfo->pre_tx_scan_timer, pre_tx_scan_timer_process, 0);
timer_setup(&pwdinfo->reset_ch_sitesurvey, reset_ch_sitesurvey_timer_process, 0);
timer_setup(&pwdinfo->reset_ch_sitesurvey2, reset_ch_sitesurvey_timer_process2, 0);
#else
_init_timer(&pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter);
_init_timer(&pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter);
_init_timer(&pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter);
_init_timer(&pwdinfo->reset_ch_sitesurvey, padapter->pnetdev, reset_ch_sitesurvey_timer_process, padapter);
_init_timer(&pwdinfo->reset_ch_sitesurvey2, padapter->pnetdev, reset_ch_sitesurvey_timer_process2, padapter);
#endif
}
void rtw_init_wifidirect_addrs(struct adapter *padapter, u8 *dev_addr, u8 *iface_addr)
{
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
/*init device&interface address */
@ -1906,7 +1791,6 @@ void rtw_init_wifidirect_addrs(struct adapter *padapter, u8 *dev_addr, u8 *iface
memcpy(pwdinfo->device_addr, dev_addr, ETH_ALEN);
if (iface_addr)
memcpy(pwdinfo->interface_addr, iface_addr, ETH_ALEN);
#endif
}
void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role)
@ -1968,7 +1852,7 @@ void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role)
rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE);
pwdinfo->listen_dwell = (u8) ((jiffies % 3) + 1);
pwdinfo->listen_dwell = (u8)((jiffies % 3) + 1);
memset(&pwdinfo->tx_prov_disc_info, 0x00, sizeof(struct tx_provdisc_req_info));
pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE;
@ -1989,7 +1873,6 @@ void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role)
memset(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4);
memset(pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3);
memset(&pwdinfo->groupid_info, 0x00, sizeof(struct group_id_info));
pwdinfo->wfd_tdls_enable = 0;
memset(pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN);
memset(pwdinfo->p2p_peer_device_addr, 0x00, ETH_ALEN);
@ -2004,7 +1887,7 @@ void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role)
int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
{
int ret = _SUCCESS;
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT || role == P2P_ROLE_GO) {
/* leave IPS/Autosuspend */
@ -2016,12 +1899,11 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
/* Added by Albert 2011/03/22 */
/* In the P2P mode, the driver should not support the b mode. */
/* So, the Tx packet shouldn't use the CCK rate */
update_tx_basic_rate(padapter, WIRELESS_11AGN);
update_tx_basic_rate(padapter, (WIRELESS_11G | WIRELESS_11_24N));
/* Enable P2P function */
init_wifidirect_info(padapter, role);
rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, true);
} else if (role == P2P_ROLE_DISABLE) {
if (_FAIL == rtw_pwr_wakeup(padapter)) {
ret = _FAIL;
@ -2035,18 +1917,11 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
_cancel_timer_ex(&pwdinfo->pre_tx_scan_timer);
_cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey);
_cancel_timer_ex(&pwdinfo->reset_ch_sitesurvey2);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
#else
reset_ch_sitesurvey_timer_process(padapter);
reset_ch_sitesurvey_timer_process2(padapter);
#endif
rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE);
rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE);
memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info));
}
rtw_hal_set_odm_var(padapter, HAL_ODM_P2P_STATE, NULL, false);
/* Restore to initial setting. */
update_tx_basic_rate(padapter, padapter->registrypriv.wireless_mode);
}
@ -2054,15 +1929,3 @@ int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role)
exit:
return ret;
}
#else
u8 p2p_ps_wk_cmd(struct adapter *padapter, u8 p2p_ps_state, u8 enqueue)
{
return _FAIL;
}
void process_p2p_ps_ie(struct adapter *padapter, u8 *IEs, u32 IELength)
{
}
#endif /* CONFIG_88EU_P2P */

299
core/rtw_pwrctrl.c
View file

@ -1,46 +1,24 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#define _RTW_PWRCTRL_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <linux/usb.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/osdep_intf.h"
#include "../include/linux/usb.h"
#include <linux/version.h>
void ips_enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct xmit_priv *pxmit_priv = &padapter->xmitpriv;
if (padapter->registrypriv.mp_mode == 1)
return;
if (pxmit_priv->free_xmitbuf_cnt != NR_XMITBUFF ||
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF) {
DBG_88E_LEVEL(_drv_info_, "There are some pkts to transmit\n");
DBG_88E_LEVEL(_drv_info_, "free_xmitbuf_cnt: %d, free_xmit_extbuf_cnt: %d\n",
pxmit_priv->free_xmitbuf_cnt, pxmit_priv->free_xmit_extbuf_cnt);
pxmit_priv->free_xmit_extbuf_cnt != NR_XMIT_EXTBUFF)
return;
}
_enter_pwrlock(&pwrpriv->lock);
mutex_lock(&pwrpriv->lock);
pwrpriv->bips_processing = true;
@ -48,10 +26,8 @@ void ips_enter(struct adapter *padapter)
pwrpriv->ips_mode = pwrpriv->ips_mode_req;
pwrpriv->ips_enter_cnts++;
DBG_88E("==>ips_enter cnts:%d\n", pwrpriv->ips_enter_cnts);
if (rf_off == pwrpriv->change_rfpwrstate) {
pwrpriv->bpower_saving = true;
DBG_88E_LEVEL(_drv_info_, "nolinked power save enter\n");
if (pwrpriv->ips_mode == IPS_LEVEL_2)
pwrpriv->bkeepfwalive = true;
@ -61,33 +37,30 @@ void ips_enter(struct adapter *padapter)
}
pwrpriv->bips_processing = false;
_exit_pwrlock(&pwrpriv->lock);
mutex_unlock(&pwrpriv->lock);
}
int ips_leave(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct security_priv *psecuritypriv = &(padapter->securitypriv);
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
int result = _SUCCESS;
int keyid;
_enter_pwrlock(&pwrpriv->lock);
mutex_lock(&pwrpriv->lock);
if ((pwrpriv->rf_pwrstate == rf_off) && (!pwrpriv->bips_processing)) {
pwrpriv->bips_processing = true;
pwrpriv->change_rfpwrstate = rf_on;
pwrpriv->ips_leave_cnts++;
DBG_88E("==>ips_leave cnts:%d\n", pwrpriv->ips_leave_cnts);
result = rtw_ips_pwr_up(padapter);
if (result == _SUCCESS) {
pwrpriv->rf_pwrstate = rf_on;
}
DBG_88E_LEVEL(_drv_info_, "nolinked power save leave\n");
if ((_WEP40_ == psecuritypriv->dot11PrivacyAlgrthm) || (_WEP104_ == psecuritypriv->dot11PrivacyAlgrthm)) {
DBG_88E("==>%s, channel(%d), processing(%x)\n", __func__, padapter->mlmeextpriv.cur_channel, pwrpriv->bips_processing);
set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20);
for (keyid = 0; keyid < 4; keyid++) {
if (pmlmepriv->key_mask & BIT(keyid)) {
@ -99,14 +72,13 @@ int ips_leave(struct adapter *padapter)
}
}
DBG_88E("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false;
pwrpriv->bpower_saving = false;
}
_exit_pwrlock(&pwrpriv->lock);
mutex_unlock(&pwrpriv->lock);
return result;
}
@ -114,44 +86,31 @@ int ips_leave(struct adapter *padapter)
static bool rtw_pwr_unassociated_idle(struct adapter *adapter)
{
struct adapter *buddy = adapter->pbuddy_adapter;
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
#endif
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
struct wifidirect_info *pwdinfo = &adapter->wdinfo;
bool ret = false;
if (adapter->pwrctrlpriv.ips_deny_time >= jiffies)
goto exit;
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ||
check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ||
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE | WIFI_SITE_MONITOR) ||
check_fwstate(pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS) ||
check_fwstate(pmlmepriv, WIFI_UNDER_WPS) ||
check_fwstate(pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ||
#if defined(CONFIG_88EU_P2P)
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) ||
!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
#else
0)
#endif
goto exit;
/* consider buddy, if exist */
if (buddy) {
struct mlme_priv *b_pmlmepriv = &(buddy->mlmepriv);
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *b_pwdinfo = &(buddy->wdinfo);
#endif
struct mlme_priv *b_pmlmepriv = &buddy->mlmepriv;
struct wifidirect_info *b_pwdinfo = &buddy->wdinfo;
if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ||
check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ||
if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE | WIFI_SITE_MONITOR) ||
check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING | WIFI_UNDER_WPS) ||
check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ||
#if defined(CONFIG_88EU_P2P)
check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) ||
!rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE))
#else
0)
#endif
goto exit;
}
ret = true;
@ -163,41 +122,19 @@ exit:
void rtw_ps_processor(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
enum rt_rf_power_state rfpwrstate;
pwrpriv->ps_processing = true;
if (pwrpriv->bips_processing)
goto exit;
if (padapter->pwrctrlpriv.bHWPwrPindetect) {
rfpwrstate = RfOnOffDetect(padapter);
DBG_88E("@@@@- #2 %s==> rfstate:%s\n", __func__, (rfpwrstate == rf_on) ? "rf_on" : "rf_off");
if (rfpwrstate != pwrpriv->rf_pwrstate) {
if (rfpwrstate == rf_off) {
pwrpriv->change_rfpwrstate = rf_off;
pwrpriv->brfoffbyhw = true;
padapter->bCardDisableWOHSM = true;
rtw_hw_suspend(padapter);
} else {
pwrpriv->change_rfpwrstate = rf_on;
rtw_hw_resume(padapter);
}
DBG_88E("current rf_pwrstate(%s)\n", (pwrpriv->rf_pwrstate == rf_off) ? "rf_off" : "rf_on");
}
pwrpriv->pwr_state_check_cnts++;
}
if (pwrpriv->ips_mode_req == IPS_NONE)
goto exit;
if (!rtw_pwr_unassociated_idle(padapter))
goto exit;
if ((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts%4) == 0)) {
DBG_88E("==>%s .fw_state(%x)\n", __func__, get_fwstate(pmlmepriv));
if ((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts % 4) == 0)) {
pwrpriv->change_rfpwrstate = rf_off;
ips_enter(padapter);
@ -205,7 +142,6 @@ void rtw_ps_processor(struct adapter *padapter)
exit:
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
pwrpriv->ps_processing = false;
return;
}
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
@ -224,71 +160,11 @@ static void pwr_state_check_handler(void *FunctionContext)
rtw_ps_cmd(padapter);
}
/*
*
* Parameters
* padapter
* pslv power state level, only could be PS_STATE_S0 ~ PS_STATE_S4
*
*/
void rtw_set_rpwm(struct adapter *padapter, u8 pslv)
{
u8 rpwm;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
pslv = PS_STATE(pslv);
if (pwrpriv->btcoex_rfon) {
if (pslv < PS_STATE_S4)
pslv = PS_STATE_S3;
}
if ((pwrpriv->rpwm == pslv)) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: Already set rpwm[0x%02X], new=0x%02X!\n", __func__, pwrpriv->rpwm, pslv));
return;
}
if ((padapter->bSurpriseRemoved) ||
(!padapter->hw_init_completed)) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: SurpriseRemoved(%d) hw_init_completed(%d)\n",
__func__, padapter->bSurpriseRemoved, padapter->hw_init_completed));
pwrpriv->cpwm = PS_STATE_S4;
return;
}
if (padapter->bDriverStopped) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: change power state(0x%02X) when DriverStopped\n", __func__, pslv));
if (pslv < PS_STATE_S2) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_,
("%s: Reject to enter PS_STATE(0x%02X) lower than S2 when DriverStopped!!\n", __func__, pslv));
return;
}
}
rpwm = pslv | pwrpriv->tog;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("rtw_set_rpwm: rpwm=0x%02x cpwm=0x%02x\n", rpwm, pwrpriv->cpwm));
pwrpriv->rpwm = pslv;
rtw_hal_set_hwreg(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm));
pwrpriv->tog += 0x80;
pwrpriv->cpwm = pslv;
}
static u8 PS_RDY_CHECK(struct adapter *padapter)
static bool PS_RDY_CHECK(struct adapter *padapter)
{
u32 curr_time, delta_time;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
curr_time = jiffies;
delta_time = curr_time - pwrpriv->DelayLPSLastTimeStamp;
@ -296,36 +172,27 @@ static u8 PS_RDY_CHECK(struct adapter *padapter)
if (delta_time < LPS_DELAY_TIME)
return false;
if ((check_fwstate(pmlmepriv, _FW_LINKED) == false) ||
(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ||
(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)))
if (!check_fwstate(pmlmepriv, _FW_LINKED) ||
check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) ||
check_fwstate(pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_STATE))
return false;
if (pwrpriv->bInSuspend)
return false;
if ((padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == false)) {
DBG_88E("Group handshake still in progress !!!\n");
if (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X &&
!padapter->securitypriv.binstallGrpkey)
return false;
}
return true;
}
void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
#endif /* CONFIG_88EU_P2P */
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("%s: PowerMode=%d Smart_PS=%d\n",
__func__, ps_mode, smart_ps));
if (ps_mode > PM_Card_Disable) {
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_err_, ("ps_mode:%d error\n", ps_mode));
if (ps_mode > PM_Card_Disable)
return;
}
if (pwrpriv->pwr_mode == ps_mode) {
if (PS_MODE_ACTIVE == ps_mode)
@ -338,31 +205,22 @@ void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_a
/* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */
if (ps_mode == PS_MODE_ACTIVE) {
#ifdef CONFIG_88EU_P2P
if (pwdinfo->opp_ps == 0) {
DBG_88E("rtw_set_ps_mode: Leave 802.11 power save\n");
pwrpriv->pwr_mode = ps_mode;
rtw_set_rpwm(padapter, PS_STATE_S4);
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pwrpriv->bFwCurrentInPSMode = false;
}
} else {
#endif /* CONFIG_88EU_P2P */
if (PS_RDY_CHECK(padapter)) {
DBG_88E("%s: Enter 802.11 power save\n", __func__);
pwrpriv->bFwCurrentInPSMode = true;
pwrpriv->pwr_mode = ps_mode;
pwrpriv->smart_ps = smart_ps;
pwrpriv->bcn_ant_mode = bcn_ant_mode;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
SetHwReg8188EU(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
#ifdef CONFIG_88EU_P2P
/* Set CTWindow after LPS */
if (pwdinfo->opp_ps == 1)
p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0);
#endif /* CONFIG_88EU_P2P */
rtw_set_rpwm(padapter, PS_STATE_S2);
}
}
@ -382,19 +240,17 @@ s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms)
start_time = jiffies;
while (1) {
rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
GetHwReg8188EU(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
if (bAwake)
break;
if (padapter->bSurpriseRemoved) {
err = -2;
DBG_88E("%s: device surprise removed!!\n", __func__);
break;
}
if (rtw_get_passing_time_ms(start_time) > delay_ms) {
err = -1;
DBG_88E("%s: Wait for FW LPS leave more than %u ms!!!\n", __func__, delay_ms);
break;
}
rtw_usleep_os(100);
@ -411,7 +267,7 @@ void LPS_Enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
if (PS_RDY_CHECK(padapter) == false)
if (!PS_RDY_CHECK(padapter))
return;
if (pwrpriv->bLeisurePs) {
@ -419,7 +275,6 @@ void LPS_Enter(struct adapter *padapter)
if (pwrpriv->LpsIdleCount >= 2) { /* 4 Sec */
if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) {
pwrpriv->bpower_saving = true;
DBG_88E("%s smart_ps:%d\n", __func__, pwrpriv->smart_ps);
/* For Tenda W311R IOT issue */
rtw_set_ps_mode(padapter, pwrpriv->power_mgnt,
pwrpriv->smart_ps, 0x40);
@ -458,7 +313,7 @@ void LPS_Leave(struct adapter *padapter)
/* */
void LeaveAllPowerSaveMode(struct adapter *Adapter)
{
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 enqueue = 0;
if (check_fwstate(pmlmepriv, _FW_LINKED)) { /* connect */
@ -473,7 +328,7 @@ void rtw_init_pwrctrl_priv(struct adapter *padapter)
{
struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
_init_pwrlock(&pwrctrlpriv->lock);
mutex_init(&pwrctrlpriv->lock);
pwrctrlpriv->rf_pwrstate = rf_on;
pwrctrlpriv->ips_enter_cnts = 0;
pwrctrlpriv->ips_leave_cnts = 0;
@ -484,59 +339,27 @@ void rtw_init_pwrctrl_priv(struct adapter *padapter)
pwrctrlpriv->pwr_state_check_interval = RTW_PWR_STATE_CHK_INTERVAL;
pwrctrlpriv->pwr_state_check_cnts = 0;
pwrctrlpriv->bInternalAutoSuspend = false;
pwrctrlpriv->bInSuspend = false;
pwrctrlpriv->bkeepfwalive = false;
pwrctrlpriv->LpsIdleCount = 0;
if (padapter->registrypriv.mp_mode == 1)
pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE ;
else
pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt;/* PS_MODE_MIN; */
pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt;/* PS_MODE_MIN; */
pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt) ? true : false;
pwrctrlpriv->bFwCurrentInPSMode = false;
pwrctrlpriv->rpwm = 0;
pwrctrlpriv->cpwm = PS_STATE_S4;
pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE;
pwrctrlpriv->smart_ps = padapter->registrypriv.smart_ps;
pwrctrlpriv->bcn_ant_mode = 0;
pwrctrlpriv->tog = 0x80;
pwrctrlpriv->btcoex_rfon = false;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 15, 0)
timer_setup(&pwrctrlpriv->pwr_state_check_timer, pwr_state_check_handler, 0);
#else
_init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter);
_init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev,
pwr_state_check_handler, (u8 *)padapter);
#endif
}
void rtw_free_pwrctrl_priv(struct adapter *adapter)
{
struct pwrctrl_priv *pwrctrlpriv = &adapter->pwrctrlpriv;
_free_pwrlock(&pwrctrlpriv->lock);
}
u8 rtw_interface_ps_func(struct adapter *padapter, enum hal_intf_ps_func efunc_id, u8 *val)
{
u8 bResult = true;
rtw_hal_intf_ps_func(padapter, efunc_id, val);
return bResult;
}
inline void rtw_set_ips_deny(struct adapter *padapter, u32 ms)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
pwrpriv->ips_deny_time = jiffies + rtw_ms_to_systime(ms);
}
/*
* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend
* @adapter: pointer to struct adapter structure
@ -555,31 +378,16 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
pwrpriv->ips_deny_time = jiffies + rtw_ms_to_systime(ips_deffer_ms);
if (pwrpriv->ps_processing) {
DBG_88E("%s wait ps_processing...\n", __func__);
while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000)
rtw_msleep_os(10);
if (pwrpriv->ps_processing)
DBG_88E("%s wait ps_processing timeout\n", __func__);
else
DBG_88E("%s wait ps_processing done\n", __func__);
msleep(10);
}
/* System suspend is not allowed to wakeup */
if ((!pwrpriv->bInternalAutoSuspend) && pwrpriv->bInSuspend) {
if (pwrpriv->bInSuspend) {
while (pwrpriv->bInSuspend &&
(rtw_get_passing_time_ms(start) <= 3000 ||
(rtw_get_passing_time_ms(start) <= 500)))
rtw_msleep_os(10);
if (pwrpriv->bInSuspend)
DBG_88E("%s wait bInSuspend timeout\n", __func__);
else
DBG_88E("%s wait bInSuspend done\n", __func__);
}
/* block??? */
if ((pwrpriv->bInternalAutoSuspend) && (padapter->net_closed)) {
ret = _FAIL;
goto exit;
msleep(10);
}
/* I think this should be check in IPS, LPS, autosuspend functions... */
@ -588,9 +396,7 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
goto exit;
}
if (rf_off == pwrpriv->rf_pwrstate) {
DBG_88E("%s call ips_leave....\n", __func__);
if (_FAIL == ips_leave(padapter)) {
DBG_88E("======> ips_leave fail.............\n");
ret = _FAIL;
goto exit;
}
@ -599,11 +405,6 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
/* TODO: the following checking need to be merged... */
if (padapter->bDriverStopped || !padapter->bup ||
!padapter->hw_init_completed) {
DBG_88E("%s: bDriverStopped=%d, bup=%d, hw_init_completed =%u\n"
, caller
, padapter->bDriverStopped
, padapter->bup
, padapter->hw_init_completed);
ret = false;
goto exit;
}
@ -641,11 +442,9 @@ int rtw_pm_set_ips(struct adapter *padapter, u8 mode)
if (mode == IPS_NORMAL || mode == IPS_LEVEL_2) {
rtw_ips_mode_req(pwrctrlpriv, mode);
DBG_88E("%s %s\n", __func__, mode == IPS_NORMAL ? "IPS_NORMAL" : "IPS_LEVEL_2");
return 0;
} else if (mode == IPS_NONE) {
rtw_ips_mode_req(pwrctrlpriv, mode);
DBG_88E("%s %s\n", __func__, "IPS_NONE");
if ((padapter->bSurpriseRemoved == 0) && (_FAIL == rtw_pwr_wakeup(padapter)))
return -EFAULT;
} else {

687
core/rtw_recv.c
View file

File diff suppressed because it is too large Load diff

101
core/rtw_rf.c
View file

@ -1,88 +1,29 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_RF_C_
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include "../include/drv_types.h"
struct ch_freq {
u32 channel;
u32 frequency;
static const u32 ch_freq_map[] = {
2412,
2417,
2422,
2427,
2432,
2437,
2442,
2447,
2452,
2457,
2462,
2467,
2472,
2484
};
static struct ch_freq ch_freq_map[] = {
{1, 2412}, {2, 2417}, {3, 2422}, {4, 2427}, {5, 2432},
{6, 2437}, {7, 2442}, {8, 2447}, {9, 2452}, {10, 2457},
{11, 2462}, {12, 2467}, {13, 2472}, {14, 2484},
/* UNII */
{36, 5180}, {40, 5200}, {44, 5220}, {48, 5240}, {52, 5260},
{56, 5280}, {60, 5300}, {64, 5320}, {149, 5745}, {153, 5765},
{157, 5785}, {161, 5805}, {165, 5825}, {167, 5835}, {169, 5845},
{171, 5855}, {173, 5865},
/* HiperLAN2 */
{100, 5500}, {104, 5520}, {108, 5540}, {112, 5560}, {116, 5580},
{120, 5600}, {124, 5620}, {128, 5640}, {132, 5660}, {136, 5680},
{140, 5700},
/* Japan MMAC */
{34, 5170}, {38, 5190}, {42, 5210}, {46, 5230},
/* Japan */
{184, 4920}, {188, 4940}, {192, 4960}, {196, 4980},
{208, 5040},/* Japan, means J08 */
{212, 5060},/* Japan, means J12 */
{216, 5080},/* Japan, means J16 */
};
static int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq));
u32 rtw_ch2freq(u32 channel)
{
u8 i;
u32 freq = 0;
if (channel == 0 || channel > ARRAY_SIZE(ch_freq_map))
return 2412;
for (i = 0; i < ch_freq_map_num; i++) {
if (channel == ch_freq_map[i].channel) {
freq = ch_freq_map[i].frequency;
break;
}
}
if (i == ch_freq_map_num)
freq = 2412;
return freq;
}
u32 rtw_freq2ch(u32 freq)
{
u8 i;
u32 ch = 0;
for (i = 0; i < ch_freq_map_num; i++) {
if (freq == ch_freq_map[i].frequency) {
ch = ch_freq_map[i].channel;
break;
}
}
if (i == ch_freq_map_num)
ch = 1;
return ch;
return ch_freq_map[channel - 1];
}

727
core/rtw_security.c
View file

File diff suppressed because it is too large Load diff

79
core/rtw_sreset.c
View file

@ -1,79 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <rtw_sreset.h>
void sreset_init_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
_rtw_mutex_init(&psrtpriv->silentreset_mutex);
psrtpriv->silent_reset_inprogress = false;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
}
void sreset_reset_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
psrtpriv->silent_reset_inprogress = false;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
}
u8 sreset_get_wifi_status(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
if (psrtpriv->silent_reset_inprogress)
return status;
val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea) {
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
} else if (val32 != 0) {
DBG_88E("txdmastatu(%x)\n", val32);
psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR;
}
if (WIFI_STATUS_SUCCESS != psrtpriv->Wifi_Error_Status) {
DBG_88E("==>%s error_status(0x%x)\n", __func__, psrtpriv->Wifi_Error_Status);
status = (psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL)));
}
DBG_88E("==> %s wifi_status(0x%x)\n", __func__, status);
/* status restore */
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
return status;
}
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
pHalData->srestpriv.Wifi_Error_Status = status;
}

215
core/rtw_sta_mgt.c
View file

@ -1,47 +1,29 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTW_STA_MGT_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <xmit_osdep.h>
#include <mlme_osdep.h>
#include <sta_info.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/recv_osdep.h"
#include "../include/xmit_osdep.h"
#include "../include/mlme_osdep.h"
#include "../include/sta_info.h"
static void _rtw_init_stainfo(struct sta_info *psta)
{
memset((u8 *)psta, 0, sizeof (struct sta_info));
memset((u8 *)psta, 0, sizeof(struct sta_info));
spin_lock_init(&psta->lock);
spin_lock_init(&psta->lock);
INIT_LIST_HEAD(&psta->list);
INIT_LIST_HEAD(&psta->hash_list);
_rtw_init_queue(&psta->sleep_q);
rtw_init_queue(&psta->sleep_q);
psta->sleepq_len = 0;
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
#ifdef CONFIG_88EU_AP_MODE
INIT_LIST_HEAD(&psta->asoc_list);
INIT_LIST_HEAD(&psta->auth_list);
@ -54,21 +36,16 @@ static void _rtw_init_stainfo(struct sta_info *psta)
psta->bpairwise_key_installed = false;
#ifdef CONFIG_88EU_AP_MODE
psta->nonerp_set = 0;
psta->no_short_slot_time_set = 0;
psta->no_short_preamble_set = 0;
psta->no_ht_gf_set = 0;
psta->no_ht_set = 0;
psta->ht_20mhz_set = 0;
#endif
psta->under_exist_checking = 0;
psta->keep_alive_trycnt = 0;
#endif /* CONFIG_88EU_AP_MODE */
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
@ -76,7 +53,7 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
struct sta_info *psta;
s32 i;
pstapriv->pallocated_stainfo_buf = rtw_zvmalloc(sizeof(struct sta_info) * NUM_STA + 4);
pstapriv->pallocated_stainfo_buf = vzalloc(sizeof(struct sta_info) * NUM_STA + 4);
if (!pstapriv->pallocated_stainfo_buf)
return _FAIL;
@ -84,28 +61,26 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
((size_t)(pstapriv->pallocated_stainfo_buf) & 3);
_rtw_init_queue(&pstapriv->free_sta_queue);
rtw_init_queue(&pstapriv->free_sta_queue);
spin_lock_init(&pstapriv->sta_hash_lock);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
_rtw_init_queue(&pstapriv->wakeup_q);
rtw_init_queue(&pstapriv->sleep_q);
rtw_init_queue(&pstapriv->wakeup_q);
psta = (struct sta_info *)(pstapriv->pstainfo_buf);
for (i = 0; i < NUM_STA; i++) {
_rtw_init_stainfo(psta);
INIT_LIST_HEAD(&(pstapriv->sta_hash[i]));
INIT_LIST_HEAD(&pstapriv->sta_hash[i]);
list_add_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
#ifdef CONFIG_88EU_AP_MODE
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
@ -120,105 +95,21 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
pstapriv->assoc_to = 3;
pstapriv->expire_to = 3; /* 3*2 = 6 sec */
pstapriv->max_num_sta = NUM_STA;
#endif
return _SUCCESS;
}
inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta)
{
int offset = (((u8 *)sta) - stapriv->pstainfo_buf)/sizeof(struct sta_info);
if (!stainfo_offset_valid(offset))
DBG_88E("%s invalid offset(%d), out of range!!!", __func__, offset);
return offset;
return (((u8 *)sta) - stapriv->pstainfo_buf) / sizeof(struct sta_info);
}
inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset)
{
if (!stainfo_offset_valid(offset))
DBG_88E("%s invalid offset(%d), out of range!!!", __func__, offset);
return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info));
}
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv);
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv)
{
_rtw_spinlock_free(&psta_xmitpriv->lock);
_rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock));
}
static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv)
{
_rtw_spinlock_free(&psta_recvpriv->lock);
_rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock));
}
void rtw_mfree_stainfo(struct sta_info *psta);
void rtw_mfree_stainfo(struct sta_info *psta)
{
if (&psta->lock != NULL)
_rtw_spinlock_free(&psta->lock);
_rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv);
_rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv);
}
/* this function is used to free the memory of lock || sema for all stainfos */
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv);
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv)
{
struct list_head *plist, *phead;
struct sta_info *psta = NULL;
spin_lock_bh(&pstapriv->sta_hash_lock);
phead = get_list_head(&pstapriv->free_sta_queue);
plist = phead->next;
while (phead != plist) {
psta = container_of(plist, struct sta_info , list);
plist = plist->next;
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
}
static void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv)
{
#ifdef CONFIG_88EU_AP_MODE
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
#endif
rtw_mfree_all_stainfo(pstapriv); /* be done before free sta_hash_lock */
_rtw_spinlock_free(&pstapriv->free_sta_queue.lock);
_rtw_spinlock_free(&pstapriv->sta_hash_lock);
_rtw_spinlock_free(&pstapriv->wakeup_q.lock);
_rtw_spinlock_free(&pstapriv->sleep_q.lock);
#ifdef CONFIG_88EU_AP_MODE
_rtw_spinlock_free(&pstapriv->asoc_list_lock);
_rtw_spinlock_free(&pstapriv->auth_list_lock);
_rtw_spinlock_free(&pacl_list->acl_node_q.lock);
#endif
}
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
void _rtw_free_sta_priv(struct sta_priv *pstapriv)
{
struct list_head *phead, *plist;
struct sta_info *psta = NULL;
@ -229,12 +120,12 @@ u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
/* delete all reordering_ctrl_timer */
spin_lock_bh(&pstapriv->sta_hash_lock);
for (index = 0; index < NUM_STA; index++) {
phead = &(pstapriv->sta_hash[index]);
phead = &pstapriv->sta_hash[index];
plist = phead->next;
while (phead != plist) {
int i;
psta = container_of(plist, struct sta_info , hash_list);
psta = container_of(plist, struct sta_info, hash_list);
plist = plist->next;
for (i = 0; i < 16; i++) {
@ -246,13 +137,8 @@ u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
spin_unlock_bh(&pstapriv->sta_hash_lock);
/*===============================*/
rtw_mfree_sta_priv_lock(pstapriv);
if (pstapriv->pallocated_stainfo_buf)
rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4);
}
return _SUCCESS;
vfree(pstapriv->pallocated_stainfo_buf);
}
}
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
@ -274,24 +160,22 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
psta = NULL;
} else {
psta = container_of((&pfree_sta_queue->queue)->next, struct sta_info, list);
list_del_init(&(psta->list));
list_del_init(&psta->list);
spin_unlock_bh(&pfree_sta_queue->lock);
_rtw_init_stainfo(psta);
memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_, ("rtw_alloc_stainfo: index=%x", index));
if (index >= NUM_STA) {
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("ERROR => rtw_alloc_stainfo: index >= NUM_STA"));
psta = NULL;
goto exit;
}
phash_list = &(pstapriv->sta_hash[index]);
phash_list = &pstapriv->sta_hash[index];
spin_lock_bh(&pstapriv->sta_hash_lock);
list_add_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count++ ;
pstapriv->asoc_sta_count++;
spin_unlock_bh(&pstapriv->sta_hash_lock);
@ -303,10 +187,6 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
for (i = 0; i < 16; i++)
memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i], &wRxSeqInitialValue, 2);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_,
("alloc number_%d stainfo with hwaddr = %pM\n",
pstapriv->asoc_sta_count , hwaddr));
init_addba_retry_timer(pstapriv->padapter, psta);
/* for A-MPDU Rx reordering buffer control */
@ -321,7 +201,7 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
preorder_ctrl->wend_b = 0xffff;
preorder_ctrl->wsize_b = 64;/* 64; */
_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
rtw_init_recv_timer(preorder_ctrl);
}
@ -340,7 +220,7 @@ exit:
}
/* using pstapriv->sta_hash_lock to protect */
u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
u32 rtw_free_stainfo(struct adapter *padapter, struct sta_info *psta)
{
int i;
struct __queue *pfree_sta_queue;
@ -349,7 +229,7 @@ u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
if (psta == NULL)
if (!psta)
goto exit;
pfree_sta_queue = &pstapriv->free_sta_queue;
@ -363,24 +243,23 @@ u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
list_del_init(&(pstaxmitpriv->vo_q.tx_pending));
list_del_init(&pstaxmitpriv->vo_q.tx_pending);
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
list_del_init(&(pstaxmitpriv->vi_q.tx_pending));
list_del_init(&pstaxmitpriv->vi_q.tx_pending);
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
list_del_init(&(pstaxmitpriv->bk_q.tx_pending));
list_del_init(&pstaxmitpriv->bk_q.tx_pending);
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
list_del_init(&(pstaxmitpriv->be_q.tx_pending));
list_del_init(&pstaxmitpriv->be_q.tx_pending);
spin_unlock_bh(&pxmitpriv->lock);
list_del_init(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("\n free number_%d stainfo with hwaddr=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2], psta->hwaddr[3], psta->hwaddr[4], psta->hwaddr[5]));
pstapriv->asoc_sta_count--;
/* re-init sta_info; 20061114 */
@ -412,7 +291,7 @@ u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
plist = plist->next;
list_del_init(&(prframe->list));
list_del_init(&prframe->list);
rtw_free_recvframe(prframe, pfree_recv_queue);
}
@ -421,9 +300,7 @@ u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
}
if (!(psta->state & WIFI_AP_STATE))
rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, false);
#ifdef CONFIG_88EU_AP_MODE
rtl8188e_SetHalODMVar(padapter, psta, false);
spin_lock_bh(&pstapriv->auth_list_lock);
if (!list_empty(&psta->auth_list)) {
@ -454,8 +331,6 @@ u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
psta->under_exist_checking = 0;
#endif /* CONFIG_88EU_AP_MODE */
spin_lock_bh(&pfree_sta_queue->lock);
list_add_tail(&psta->list, get_list_head(pfree_sta_queue));
spin_unlock_bh(&pfree_sta_queue->lock);
@ -480,16 +355,16 @@ void rtw_free_all_stainfo(struct adapter *padapter)
spin_lock_bh(&pstapriv->sta_hash_lock);
for (index = 0; index < NUM_STA; index++) {
phead = &(pstapriv->sta_hash[index]);
phead = &pstapriv->sta_hash[index];
plist = phead->next;
while (phead != plist) {
psta = container_of(plist, struct sta_info , hash_list);
psta = container_of(plist, struct sta_info, hash_list);
plist = plist->next;
if (pbcmc_stainfo != psta)
rtw_free_stainfo(padapter , psta);
rtw_free_stainfo(padapter, psta);
}
}
spin_unlock_bh(&pstapriv->sta_hash_lock);
@ -504,7 +379,7 @@ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
u8 *addr;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
if (hwaddr == NULL)
if (!hwaddr)
return NULL;
if (IS_MCAST(hwaddr))
@ -516,7 +391,7 @@ struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
spin_lock_bh(&pstapriv->sta_hash_lock);
phead = &(pstapriv->sta_hash[index]);
phead = &pstapriv->sta_hash[index];
plist = phead->next;
while (phead != plist) {
@ -544,9 +419,8 @@ u32 rtw_init_bcmc_stainfo(struct adapter *padapter)
psta = rtw_alloc_stainfo(pstapriv, bcast_addr);
if (psta == NULL) {
if (!psta) {
res = _FAIL;
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("rtw_alloc_stainfo fail"));
goto exit;
}
@ -564,7 +438,7 @@ struct sta_info *rtw_get_bcmc_stainfo(struct adapter *padapter)
struct sta_priv *pstapriv = &padapter->stapriv;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
psta = rtw_get_stainfo(pstapriv, bc_addr);
psta = rtw_get_stainfo(pstapriv, bc_addr);
return psta;
}
@ -572,7 +446,6 @@ struct sta_info *rtw_get_bcmc_stainfo(struct adapter *padapter)
u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
{
u8 res = true;
#ifdef CONFIG_88EU_AP_MODE
struct list_head *plist, *phead;
struct rtw_wlan_acl_node *paclnode;
u8 match = false;
@ -601,9 +474,7 @@ u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
else if (pacl_list->mode == 2)/* deny unless in accept list */
res = (match) ? true : false;
else
res = true;
#endif
res = true;
return res;
}

526
core/rtw_wlan_util.c
View file

File diff suppressed because it is too large Load diff

691
core/rtw_xmit.c
View file

File diff suppressed because it is too large Load diff

117
hal/Hal8188EPwrSeq.c
View file

@ -1,86 +1,45 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "Hal8188EPwrSeq.h"
#include <rtl8188e_hal.h>
#include "../include/Hal8188EPwrSeq.h"
#include "../include/rtl8188e_hal.h"
/*
drivers should parse below arrays and do the corresponding actions
*/
/* 3 Power on Array */
struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
struct wl_pwr_cfg rtl8188E_power_on_flow[] = {
{ 0x0006, PWR_CMD_POLLING, BIT(1), BIT(1) },
{ 0x0002, PWR_CMD_WRITE, BIT(0) | BIT(1), 0 }, /* reset BB */
{ 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */
{ 0x0005, PWR_CMD_WRITE, BIT(7), 0 }, /* disable HWPDN (control by DRV)*/
{ 0x0005, PWR_CMD_WRITE, BIT(4) | BIT(3), 0 }, /* disable WL suspend*/
{ 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) },
{ 0x0005, PWR_CMD_POLLING, BIT(0), 0 },
{ 0x0023, PWR_CMD_WRITE, BIT(4), 0 },
{ 0xFFFF, PWR_CMD_END, 0, 0 },
};
/* 3Radio off Array */
struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
struct wl_pwr_cfg rtl8188E_card_disable_flow[] = {
{ 0x001F, PWR_CMD_WRITE, 0xFF, 0 }, /* turn off RF */
{ 0x0023, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* LDO Sleep mode */
{ 0x0005, PWR_CMD_WRITE, BIT(1), BIT(1) }, /* turn off MAC by HW state machine */
{ 0x0005, PWR_CMD_POLLING, BIT(1), 0 },
{ 0x0026, PWR_CMD_WRITE, BIT(7), BIT(7) }, /* schmitt trigger */
{ 0x0005, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) }, /* enable WL suspend */
{ 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */
{ 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */
{ 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */
{ 0xFFFF, PWR_CMD_END, 0, 0 },
};
/* 3Card Disable Array */
struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
};
/* 3 Card Enable Array */
struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDDIS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3Suspend Array */
struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
};
/* 3 Resume Array */
struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3HWPDN Array */
struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
};
/* 3 Enter LPS */
struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
};
/* 3 Leave LPS */
struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = {
{ 0x0522, PWR_CMD_WRITE, 0xFF, 0x7F },/* Tx Pause */
{ 0x05F8, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
{ 0x05F9, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
{ 0x05FA, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
{ 0x05FB, PWR_CMD_POLLING, 0xFF, 0 }, /* Should be zero if no packet is transmitted */
{ 0x0002, PWR_CMD_WRITE, BIT(0), 0 }, /* CCK and OFDM are disabled, clocks are gated */
{ 0x0002, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US },
{ 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */
{ 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */
{ 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */
{ 0xFFFF, PWR_CMD_END, 0, 0 },
};

229
hal/Hal8188ERateAdaptive.c
View file

@ -1,23 +1,9 @@
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
// SPDX-License-Identifier: GPL-2.0
/* Copyright (c) Realtek Semiconductor Corp. */
Module Name:
RateAdaptive.c
#include "../include/drv_types.h"
Abstract:
Implement Rate Adaptive functions for common operations.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-08-12 Page Create.
--*/
#include "odm_precomp.h"
/* Rate adaptive parameters */
static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {
static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE + 1] = {
{5, 4, 3, 2, 0, 3}, /* 92 , idx = 0 */
{6, 5, 4, 3, 0, 4}, /* 86 , idx = 1 */
{6, 5, 4, 2, 0, 4}, /* 81 , idx = 2 */
@ -43,7 +29,7 @@ static u8 RETRY_PENALTY[PERENTRY][RETRYSIZE+1] = {
{49, 16, 16, 0, 0, 48}
}; /* 3, idx = 0x16 */
static u8 PT_PENALTY[RETRYSIZE+1] = {34, 31, 30, 24, 0, 32};
static u8 PT_PENALTY[RETRYSIZE + 1] = {34, 31, 30, 24, 0, 32};
/* wilson modify */
static u8 RETRY_PENALTY_IDX[2][RATESIZE] = {
@ -87,7 +73,7 @@ static u8 DROPING_NECESSARY[RATESIZE] = {
static u8 PendingForRateUpFail[5] = {2, 10, 24, 40, 60};
static u16 DynamicTxRPTTiming[6] = {
0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 , 0x927c}; /* 200ms-1200ms */
0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12, 0x927c}; /* 200ms-1200ms */
/* End Rate adaptive parameters */
@ -114,8 +100,6 @@ static void odm_SetTxRPTTiming_8188E(
idx -= 1;
}
pRaInfo->RptTime = DynamicTxRPTTiming[idx];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime = 0x%x\n", pRaInfo->RptTime));
}
static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
@ -123,25 +107,19 @@ static int odm_RateDown_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *
u8 RateID, LowestRate, HighestRate;
u8 i;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDown_8188E()\n"));
if (NULL == pRaInfo) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateDown_8188E(): pRaInfo is NULL\n"));
if (NULL == pRaInfo)
return -1;
}
RateID = pRaInfo->PreRate;
LowestRate = pRaInfo->LowestRate;
HighestRate = pRaInfo->HighestRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID =%d LowestRate =%d HighestRate =%d RateSGI =%d\n",
RateID, LowestRate, HighestRate, pRaInfo->RateSGI));
if (RateID > HighestRate) {
RateID = HighestRate;
} else if (pRaInfo->RateSGI) {
pRaInfo->RateSGI = 0;
} else if (RateID > LowestRate) {
if (RateID > 0) {
for (i = RateID-1; i > LowestRate; i--) {
for (i = RateID - 1; i > LowestRate; i--) {
if (pRaInfo->RAUseRate & BIT(i)) {
RateID = i;
goto RateDownFinish;
@ -167,10 +145,6 @@ RateDownFinish:
pRaInfo->DecisionRate = RateID;
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 2);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down to RateID %d RateSGI %d\n", RateID, pRaInfo->RateSGI));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDown_8188E()\n"));
return 0;
}
@ -182,16 +156,10 @@ static int odm_RateUp_8188E(
u8 RateID, HighestRate;
u8 i;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateUp_8188E()\n"));
if (NULL == pRaInfo) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E(): pRaInfo is NULL\n"));
if (NULL == pRaInfo)
return -1;
}
RateID = pRaInfo->PreRate;
HighestRate = pRaInfo->HighestRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID =%d HighestRate =%d\n",
RateID, HighestRate));
if (pRaInfo->RAWaitingCounter == 1) {
pRaInfo->RAWaitingCounter = 0;
pRaInfo->RAPendingCounter = 0;
@ -200,10 +168,9 @@ static int odm_RateUp_8188E(
goto RateUpfinish;
}
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 0);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n"));
if (RateID < HighestRate) {
for (i = RateID+1; i <= HighestRate; i++) {
for (i = RateID + 1; i <= HighestRate; i++) {
if (pRaInfo->RAUseRate & BIT(i)) {
RateID = i;
goto RateUpfinish;
@ -218,15 +185,12 @@ static int odm_RateUp_8188E(
RateID = HighestRate;
}
RateUpfinish:
if (pRaInfo->RAWaitingCounter == (4+PendingForRateUpFail[pRaInfo->RAPendingCounter]))
if (pRaInfo->RAWaitingCounter == (4 + PendingForRateUpFail[pRaInfo->RAPendingCounter]))
pRaInfo->RAWaitingCounter = 0;
else
pRaInfo->RAWaitingCounter++;
pRaInfo->DecisionRate = RateID;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate up to RateID %d\n", RateID));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("RAWaitingCounter %d, RAPendingCounter %d", pRaInfo->RAWaitingCounter, pRaInfo->RAPendingCounter));
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateUp_8188E()\n"));
return 0;
}
@ -235,8 +199,8 @@ static void odm_ResetRaCounter_8188E(struct odm_ra_info *pRaInfo)
u8 RateID;
RateID = pRaInfo->DecisionRate;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[RateID] + N_THRESHOLD_LOW[RateID]) >> 1;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[RateID] + N_THRESHOLD_LOW[RateID]) >> 1;
}
static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
@ -247,8 +211,6 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
/* u32 pool_retry; */
static u8 DynamicTxRPTTimingCounter;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n"));
if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) { /* STA used and data packet exits */
if ((pRaInfo->RssiStaRA < (pRaInfo->PreRssiStaRA - 3)) ||
(pRaInfo->RssiStaRA > (pRaInfo->PreRssiStaRA + 3))) {
@ -266,16 +228,11 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
RtyPtID = 1;
PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; /* TODO by page */
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown init is %d\n", pRaInfo->NscDown));
pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0];
pRaInfo->NscDown += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID1][1];
pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2];
pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3];
pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown is %d, total*penalty[5] is %d\n",
pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
else
@ -283,24 +240,16 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
/* rate up */
PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscUp init is %d\n", pRaInfo->NscUp));
pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0];
pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1];
pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2];
pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3];
pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4];
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("NscUp is %d, total*up[5] is %d\n",
pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])));
if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
else
pRaInfo->NscUp = 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD,
(" RssiStaRa = %d RtyPtID =%d PenaltyID1 = 0x%x PenaltyID2 = 0x%x RateID =%d NscDown =%d NscUp =%d SGI =%d\n",
pRaInfo->RssiStaRA, RtyPtID, PenaltyID1, PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI));
if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||
(pRaInfo->DROP > DROPING_NECESSARY[RateID]))
odm_RateDown_8188E(dm_odm, pRaInfo);
@ -317,8 +266,6 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
if (DynamicTxRPTTimingCounter >= 4) {
odm_SetTxRPTTiming_8188E(dm_odm, pRaInfo, 1);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE,
ODM_DBG_LOUD, ("<===== Rate don't change 4 times, Extend RPT Timing\n"));
DynamicTxRPTTimingCounter = 0;
}
@ -326,7 +273,6 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
odm_ResetRaCounter_8188E(pRaInfo);
}
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<===== odm_RateDecision_8188E()\n"));
}
static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
@ -336,41 +282,41 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf
switch (pRaInfo->RateID) {
case RATR_INX_WIRELESS_NGB:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff015;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0f8ff015;
break;
case RATR_INX_WIRELESS_NG:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff010;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0f8ff010;
break;
case RATR_INX_WIRELESS_NB:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff005;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0f8ff005;
break;
case RATR_INX_WIRELESS_N:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0f8ff000;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0f8ff000;
break;
case RATR_INX_WIRELESS_GB:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff5;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x00000ff5;
break;
case RATR_INX_WIRELESS_G:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x00000ff0;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x00000ff0;
break;
case RATR_INX_WIRELESS_B:
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d;
pRaInfo->RAUseRate = (pRaInfo->RateMask) & 0x0000000d;
break;
case 12:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR0);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR0);
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
case 13:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR1);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR1);
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
case 14:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR2);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR2);
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
case 15:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR3);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
MaskFromReg = rtw_read32(dm_odm->Adapter, REG_ARFR3);
pRaInfo->RAUseRate = (pRaInfo->RateMask) & MaskFromReg;
break;
default:
pRaInfo->RAUseRate = (pRaInfo->RateMask);
@ -379,7 +325,7 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf
/* Highest rate */
if (pRaInfo->RAUseRate) {
for (i = RATESIZE; i >= 0; i--) {
if ((pRaInfo->RAUseRate)&BIT(i)) {
if ((pRaInfo->RAUseRate) & BIT(i)) {
pRaInfo->HighestRate = i;
break;
}
@ -398,23 +344,18 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf
} else {
pRaInfo->LowestRate = 0;
}
if (pRaInfo->HighestRate > 0x13)
pRaInfo->PTModeSS = 3;
else if (pRaInfo->HighestRate > 0x0b)
pRaInfo->PTModeSS = 2;
else if (pRaInfo->HighestRate > 0x03)
pRaInfo->PTModeSS = 1;
else
pRaInfo->PTModeSS = 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): PTModeSS =%d\n", pRaInfo->PTModeSS));
if (pRaInfo->HighestRate > 0x13)
pRaInfo->PTModeSS = 3;
else if (pRaInfo->HighestRate > 0x0b)
pRaInfo->PTModeSS = 2;
else if (pRaInfo->HighestRate > 0x03)
pRaInfo->PTModeSS = 1;
else
pRaInfo->PTModeSS = 0;
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): RateID =%d RateMask =%8.8x RAUseRate =%8.8x HighestRate =%d, DecisionRate =%d\n",
pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate, pRaInfo->DecisionRate));
return 0;
}
@ -489,15 +430,15 @@ static void odm_PTDecision_8188E(struct odm_ra_info *pRaInfo)
j = j >> 1;
temp_stage = (pRaInfo->PTStage + 1) >> 1;
if (temp_stage > j)
stage_id = temp_stage-j;
stage_id = temp_stage - j;
else
stage_id = 0;
pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2;
pRaInfo->PTSmoothFactor = (pRaInfo->PTSmoothFactor >> 1) + (pRaInfo->PTSmoothFactor >> 2) + stage_id * 16 + 2;
if (pRaInfo->PTSmoothFactor > 192)
pRaInfo->PTSmoothFactor = 192;
stage_id = pRaInfo->PTSmoothFactor >> 6;
temp_stage = stage_id*2;
temp_stage = stage_id * 2;
if (temp_stage != 0)
temp_stage -= 1;
if (pRaInfo->DROP > 3)
@ -511,27 +452,10 @@ odm_RATxRPTTimerSetting(
u16 minRptTime
)
{
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" =====>odm_RATxRPTTimerSetting()\n"));
if (dm_odm->CurrminRptTime != minRptTime) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
(" CurrminRptTime = 0x%04x minRptTime = 0x%04x\n", dm_odm->CurrminRptTime, minRptTime));
rtw_rpt_timer_cfg_cmd(dm_odm->Adapter, minRptTime);
dm_odm->CurrminRptTime = minRptTime;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, (" <===== odm_RATxRPTTimerSetting()\n"));
}
void
ODM_RASupport_Init(
struct odm_dm_struct *dm_odm
)
{
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n"));
/* 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! */
if (dm_odm->SupportICType == ODM_RTL8188E)
dm_odm->RaSupport88E = true;
}
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
@ -539,8 +463,8 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
u8 WirelessMode = 0xFF; /* invalid value */
u8 max_rate_idx = 0x13; /* MCS7 */
if (dm_odm->pWirelessMode != NULL)
WirelessMode = *(dm_odm->pWirelessMode);
if (dm_odm->pWirelessMode)
WirelessMode = *dm_odm->pWirelessMode;
if (WirelessMode != 0xFF) {
if (WirelessMode & ODM_WM_N24G)
@ -551,10 +475,6 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
max_rate_idx = 0x03;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_RAInfo_Init(): WirelessMode:0x%08x , max_raid_idx:0x%02x\n",
WirelessMode, max_rate_idx));
pRaInfo->DecisionRate = max_rate_idx;
pRaInfo->PreRate = max_rate_idx;
pRaInfo->HighestRate = max_rate_idx;
@ -565,8 +485,8 @@ int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
pRaInfo->PreRssiStaRA = 0;
pRaInfo->SGIEnable = 0;
pRaInfo->RAUseRate = 0xffffffff;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13]+N_THRESHOLD_LOW[0x13])/2;
pRaInfo->NscDown = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2;
pRaInfo->NscUp = (N_THRESHOLD_HIGH[0x13] + N_THRESHOLD_LOW[0x13]) / 2;
pRaInfo->RateSGI = 0;
pRaInfo->Active = 1; /* Active is not used at present. by page, 110819 */
pRaInfo->RptTime = 0x927c;
@ -595,7 +515,6 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm)
{
u8 macid = 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>\n"));
dm_odm->CurrminRptTime = 0;
for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++)
@ -606,10 +525,8 @@ int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm)
u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return 0;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("macid =%d SGI =%d\n", macid, dm_odm->RAInfo[macid].RateSGI));
return dm_odm->RAInfo[macid].RateSGI;
}
@ -617,11 +534,9 @@ u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 DecisionRate = 0;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return 0;
DecisionRate = (dm_odm->RAInfo[macid].DecisionRate);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate));
return DecisionRate;
}
@ -629,11 +544,9 @@ u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 macid)
{
u8 PTStage = 5;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return 0;
PTStage = (dm_odm->RAInfo[macid].PTStage);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("macid =%d PTStage = 0x%x\n", macid, PTStage));
return PTStage;
}
@ -641,13 +554,10 @@ void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rate
{
struct odm_ra_info *pRaInfo = NULL;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid =%d RateID = 0x%x RateMask = 0x%x SGIEnable =%d\n",
macid, RateID, RateMask, SGIEnable));
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &(dm_odm->RAInfo[macid]);
pRaInfo = &dm_odm->RAInfo[macid];
pRaInfo->RateID = RateID;
pRaInfo->RateMask = RateMask;
pRaInfo->SGIEnable = SGIEnable;
@ -658,18 +568,16 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi)
{
struct odm_ra_info *pRaInfo = NULL;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" macid =%d Rssi =%d\n", macid, Rssi));
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
if ((NULL == dm_odm) || (macid >= ODM_ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &(dm_odm->RAInfo[macid]);
pRaInfo = &dm_odm->RAInfo[macid];
pRaInfo->RssiStaRA = Rssi;
}
void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime)
{
ODM_Write2Byte(dm_odm, REG_TX_RPT_TIME, minRptTime);
rtw_write16(dm_odm->Adapter, REG_TX_RPT_TIME, minRptTime);
}
void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1)
@ -680,26 +588,22 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16
u32 valid = 0, ItemNum = 0;
u16 minRptTime = 0x927c;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("=====>ODM_RA_TxRPT2Handle_8188E(): valid0 =%d valid1 =%d BufferLength =%d\n",
macid_entry0, macid_entry1, TxRPT_Len));
ItemNum = TxRPT_Len >> 3;
pBuffer = TxRPT_Buf;
do {
if (MacId >= ASSOCIATE_ENTRY_NUM)
if (MacId >= ODM_ASSOCIATE_ENTRY_NUM)
valid = 0;
else if (MacId >= 32)
valid = (1 << (MacId - 32)) & macid_entry1;
else
valid = (1 << MacId) & macid_entry0;
pRAInfo = &(dm_odm->RAInfo[MacId]);
pRAInfo = &dm_odm->RAInfo[MacId];
if (valid) {
pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2((u8 *)pBuffer);
pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
@ -707,13 +611,6 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16
pRAInfo->RTY[2] + pRAInfo->RTY[3] +
pRAInfo->RTY[4] + pRAInfo->DROP;
if (pRAInfo->TOTAL != 0) {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid =%d Total =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d D0 =%d valid0 =%x valid1 =%x\n",
MacId, pRAInfo->TOTAL,
pRAInfo->RTY[0], pRAInfo->RTY[1],
pRAInfo->RTY[2], pRAInfo->RTY[3],
pRAInfo->RTY[4], pRAInfo->DROP,
macid_entry0 , macid_entry1));
if (pRAInfo->PTActive) {
if (pRAInfo->RAstage < 5)
odm_RateDecision_8188E(dm_odm, pRAInfo);
@ -730,20 +627,6 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16
} else {
odm_RateDecision_8188E(dm_odm, pRAInfo);
}
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("macid =%d R0 =%d R1 =%d R2 =%d R3 =%d R4 =%d drop =%d valid0 =%x RateID =%d SGI =%d\n",
MacId,
pRAInfo->RTY[0],
pRAInfo->RTY[1],
pRAInfo->RTY[2],
pRAInfo->RTY[3],
pRAInfo->RTY[4],
pRAInfo->DROP,
macid_entry0,
pRAInfo->DecisionRate,
pRAInfo->RateSGI));
} else {
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, (" TOTAL = 0!!!!\n"));
}
}
@ -755,6 +638,4 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16
} while (MacId < ItemNum);
odm_RATxRPTTimerSetting(dm_odm, minRptTime);
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n"));
}

85
hal/HalHWImg8188E_BB.c
View file

@ -1,37 +1,17 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "odm_precomp.h"
#include <rtw_iol.h>
#include "../include/rtw_iol.h"
#define read_next_pair(array, v1, v2, i) \
do { \
i += 2; \
v1 = array[i]; \
v2 = array[i+1]; \
v2 = array[i + 1]; \
} while (0)
static bool CheckCondition(const u32 condition, const u32 hex)
{
u32 _board = (hex & 0x000000FF);
u32 _interface = (hex & 0x0000FF00) >> 8;
u32 _platform = (hex & 0x00FF0000) >> 16;
u32 cond = condition;
@ -39,10 +19,6 @@ static bool CheckCondition(const u32 condition, const u32 hex)
if (condition == 0xCDCDCDCD)
return true;
cond = condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
@ -194,10 +170,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
{
u32 hex = 0;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32);
u32 arraylen = sizeof(array_agc_tab_1t_8188e) / sizeof(u32);
u32 *array = array_agc_tab_1t_8188e;
bool biol = false;
struct adapter *adapter = dm_odm->Adapter;
@ -205,15 +178,14 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapter);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
if (pxmit_frame == NULL) {
if (!pxmit_frame) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
@ -221,7 +193,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
for (i = 0; i < arraylen; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
u32 v2 = array[i + 1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
@ -264,7 +236,7 @@ enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__);
rst = HAL_STATUS_FAILURE;
}
@ -474,25 +446,21 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
{
u32 hex = 0;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32);
u32 arraylen = sizeof(array_phy_reg_1t_8188e) / sizeof(u32);
u32 *array = array_phy_reg_1t_8188e;
bool biol = false;
struct adapter *adapter = dm_odm->Adapter;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapter);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
if (pxmit_frame == NULL) {
if (!pxmit_frame) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
@ -500,7 +468,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
for (i = 0; i < arraylen; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
u32 v2 = array[i + 1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
@ -557,7 +525,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
} else if (v1 == 0xf9) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
} else{
} else {
if (v1 == 0xa24)
dm_odm->RFCalibrateInfo.RegA24 = v2;
@ -575,7 +543,7 @@ enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
}
@ -683,19 +651,16 @@ void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm)
{
u32 hex;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32);
u32 *array = array_phy_reg_pg_8188e;
hex = board + (interfaceValue << 8);
hex += (platform << 16) + 0xFF000000;
hex = ODM_ITRF_USB << 8;
hex += (ODM_CE << 16) + 0xFF000000;
for (i = 0; i < arraylen; i += 3) {
u32 v1 = array[i];
u32 v2 = array[i+1];
u32 v3 = array[i+2];
u32 v2 = array[i + 1];
u32 v3 = array[i + 2];
/* this line is a line of pure_body */
if (v1 < 0xCDCDCDCD) {
@ -706,13 +671,13 @@ void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm)
/* don't need the hw_body */
i += 2; /* skip the pair of expression */
v1 = array[i];
v2 = array[i+1];
v3 = array[i+2];
v2 = array[i + 1];
v3 = array[i + 2];
while (v2 != 0xDEAD) {
i += 3;
v1 = array[i];
v2 = array[i+1];
v3 = array[i+1];
v2 = array[i + 1];
v3 = array[i + 1];
}
}
}

42
hal/HalHWImg8188E_MAC.c
View file

@ -1,25 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "odm_precomp.h"
#include <rtw_iol.h>
#include "../include/rtw_iol.h"
static bool Checkcondition(const u32 condition, const u32 hex)
{
@ -146,14 +128,11 @@ static u32 array_MAC_REG_8188E[] = {
enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = array[i]; v2 = array[i+1]; } while (0)
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = array[i]; v2 = array[i + 1]; } while (0)
u32 hex = 0;
u32 i;
u8 platform = dm_odm->SupportPlatform;
u8 interface_val = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 array_len = sizeof(array_MAC_REG_8188E)/sizeof(u32);
u32 array_len = sizeof(array_MAC_REG_8188E) / sizeof(u32);
u32 *array = array_MAC_REG_8188E;
bool biol = false;
@ -161,16 +140,15 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interface_val << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapt);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(adapt);
if (pxmit_frame == NULL) {
if (!pxmit_frame) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
@ -178,7 +156,7 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
for (i = 0; i < array_len; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
u32 v2 = array[i + 1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
@ -221,7 +199,7 @@ enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
pr_info("~~~ MAC IOL_exec_cmds Failed !!!\n");
rst = HAL_STATUS_FAILURE;
}

50
hal/HalHWImg8188E_RF.c
View file

@ -1,30 +1,10 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "odm_precomp.h"
#include <rtw_iol.h>
#include "../include/rtw_iol.h"
static bool CheckCondition(const u32 Condition, const u32 Hex)
{
u32 _board = (Hex & 0x000000FF);
u32 _interface = (Hex & 0x0000FF00) >> 8;
u32 _platform = (Hex & 0x00FF0000) >> 16;
u32 cond = Condition;
@ -32,10 +12,6 @@ static bool CheckCondition(const u32 Condition, const u32 Hex)
if (Condition == 0xCDCDCDCD)
return true;
cond = Condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
@ -158,14 +134,11 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
{
#define READ_NEXT_PAIR(v1, v2, i) do \
{ i += 2; v1 = Array[i]; \
v2 = Array[i+1]; } while (0)
v2 = Array[i + 1]; } while (0)
u32 hex = 0;
u32 i = 0;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u32);
u32 ArrayLen = sizeof(Array_RadioA_1T_8188E) / sizeof(u32);
u32 *Array = Array_RadioA_1T_8188E;
bool biol = false;
struct adapter *Adapter = pDM_Odm->Adapter;
@ -173,15 +146,14 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += ODM_ITRF_USB << 8;
hex += ODM_CE << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(Adapter);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(Adapter);
if (pxmit_frame == NULL) {
if (!pxmit_frame) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
@ -189,7 +161,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
for (i = 0; i < ArrayLen; i += 2) {
u32 v1 = Array[i];
u32 v2 = Array[i+1];
u32 v2 = Array[i + 1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
@ -214,7 +186,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
} else {
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
continue;
continue;
} else { /* This line is the start line of branch. */
if (!CheckCondition(Array[i], hex)) {
/* Discard the following (offset, data) pairs. */
@ -259,7 +231,7 @@ enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
if (!rtl8188e_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
}

49
hal/HalPhyRf.c
View file

@ -1,49 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
/* 3============================================================ */
/* 3 IQ Calibration */
/* 3============================================================ */
void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm)
{
}
u8 ODM_GetRightChnlPlaceforIQK(u8 chnl)
{
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
155, 157, 159, 161, 163, 165
};
u8 place = chnl;
if (chnl > 14) {
for (place = 14; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
return place-13;
}
}
return 0;
}

996
hal/HalPhyRf_8188e.c
View file

File diff suppressed because it is too large Load diff

127
hal/HalPwrSeqCmd.c
View file

@ -1,24 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
HalPwrSeqCmd.c
@ -34,7 +17,7 @@ Major Change History:
--*/
#include <HalPwrSeqCmd.h>
#include "../include/HalPwrSeqCmd.h"
/* Description: */
/* This routine deals with the Power Configuration CMDs parsing
@ -42,8 +25,7 @@ Major Change History:
* Assumption:
* We should follow specific format which was released from HW SD.
*/
u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg pwrseqcmd[])
{
struct wl_pwr_cfg pwrcfgcmd = {0};
u8 poll_bit = false;
@ -56,74 +38,47 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
do {
pwrcfgcmd = pwrseqcmd[aryidx];
RT_TRACE(_module_hal_init_c_ , _drv_info_,
("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
GET_PWR_CFG_OFFSET(pwrcfgcmd),
GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
GET_PWR_CFG_INTF_MASK(pwrcfgcmd),
GET_PWR_CFG_BASE(pwrcfgcmd),
GET_PWR_CFG_CMD(pwrcfgcmd),
GET_PWR_CFG_MASK(pwrcfgcmd),
GET_PWR_CFG_VALUE(pwrcfgcmd)));
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_WRITE:
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) &&
(GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) &&
(GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) {
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
/* Read the value from system register */
value = rtw_read8(padapter, offset);
/* Read the value from system register */
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
/* Write the value back to system register */
rtw_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
poll_bit = false;
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
do {
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
/* Write the value back to system register */
rtw_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
poll_bit = false;
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
do {
value = rtw_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(pwrcfgcmd);
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
poll_bit = true;
else
rtw_udelay_os(10);
if (poll_count++ > max_poll_count) {
DBG_88E("Fail to polling Offset[%#x]\n", offset);
return false;
}
} while (!poll_bit);
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd));
value &= GET_PWR_CFG_MASK(pwrcfgcmd);
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
poll_bit = true;
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
return true;
break;
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
break;
}
udelay(10);
if (poll_count++ > max_poll_count)
return false;
} while (!poll_bit);
break;
case PWR_CMD_DELAY:
if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
else
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd) * 1000);
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
return true;
break;
default:
break;
}
aryidx++;/* Add Array Index */

121
hal/hal_com.c
View file

@ -1,28 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <osdep_service.h>
#include <drv_types.h>
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include <hal_intf.h>
#include <hal_com.h>
#include <rtl8188e_hal.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/hal_intf.h"
#include "../include/hal_com.h"
#include "../include/rtl8188e_hal.h"
#define _HAL_INIT_C_
@ -31,47 +15,36 @@ void dump_chip_info(struct HAL_VERSION chip_vers)
uint cnt = 0;
char buf[128];
if (IS_81XXC(chip_vers)) {
cnt += sprintf((buf+cnt), "Chip Version Info: %s_",
IS_92C_SERIAL(chip_vers) ?
"CHIP_8192C" : "CHIP_8188C");
} else if (IS_92D(chip_vers)) {
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_");
} else if (IS_8723_SERIES(chip_vers)) {
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_");
} else if (IS_8188E(chip_vers)) {
cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_");
cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8188E_");
cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(chip_vers) ?
"Normal_Chip" : "Test_Chip");
cnt += sprintf((buf + cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ?
"TSMC" : "UMC");
switch (chip_vers.CUTVersion) {
case A_CUT_VERSION:
cnt += sprintf((buf + cnt), "A_CUT_");
break;
case B_CUT_VERSION:
cnt += sprintf((buf + cnt), "B_CUT_");
break;
case C_CUT_VERSION:
cnt += sprintf((buf + cnt), "C_CUT_");
break;
case D_CUT_VERSION:
cnt += sprintf((buf + cnt), "D_CUT_");
break;
case E_CUT_VERSION:
cnt += sprintf((buf + cnt), "E_CUT_");
break;
default:
cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_", chip_vers.CUTVersion);
break;
}
cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(chip_vers) ?
"Normal_Chip" : "Test_Chip");
cnt += sprintf((buf+cnt), "%s_", IS_CHIP_VENDOR_TSMC(chip_vers) ?
"TSMC" : "UMC");
if (IS_A_CUT(chip_vers))
cnt += sprintf((buf+cnt), "A_CUT_");
else if (IS_B_CUT(chip_vers))
cnt += sprintf((buf+cnt), "B_CUT_");
else if (IS_C_CUT(chip_vers))
cnt += sprintf((buf+cnt), "C_CUT_");
else if (IS_D_CUT(chip_vers))
cnt += sprintf((buf+cnt), "D_CUT_");
else if (IS_E_CUT(chip_vers))
cnt += sprintf((buf+cnt), "E_CUT_");
else
cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_",
chip_vers.CUTVersion);
cnt += sprintf((buf + cnt), "1T1R_");
if (IS_1T1R(chip_vers))
cnt += sprintf((buf+cnt), "1T1R_");
else if (IS_1T2R(chip_vers))
cnt += sprintf((buf+cnt), "1T2R_");
else if (IS_2T2R(chip_vers))
cnt += sprintf((buf+cnt), "2T2R_");
else
cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_",
chip_vers.RFType);
cnt += sprintf((buf+cnt), "RomVer(%d)\n", chip_vers.ROMVer);
cnt += sprintf((buf + cnt), "RomVer(%d)\n", chip_vers.ROMVer);
pr_info("%s", buf);
}
@ -314,23 +287,12 @@ bool Hal_MappingOutPipe(struct adapter *adapter, u8 numoutpipe)
return result;
}
void hal_init_macaddr(struct adapter *adapter)
{
rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR,
adapter->eeprompriv.mac_addr);
}
/*
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
void c2h_evt_clear(struct adapter *adapter)
{
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
s32 c2h_evt_read(struct adapter *adapter, u8 *buf)
{
s32 ret = _FAIL;
@ -338,7 +300,7 @@ s32 c2h_evt_read(struct adapter *adapter, u8 *buf)
int i;
u8 trigger;
if (buf == NULL)
if (!buf)
goto exit;
trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
@ -353,20 +315,13 @@ s32 c2h_evt_read(struct adapter *adapter, u8 *buf)
memset(c2h_evt, 0, 16);
*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
&c2h_evt , sizeof(c2h_evt));
*(buf + 1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
/* Read the content */
for (i = 0; i < c2h_evt->plen; i++)
c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL +
sizeof(*c2h_evt) + i);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_,
"c2h_evt_read(): Command Content:\n",
c2h_evt->payload, c2h_evt->plen);
ret = _SUCCESS;
clear_evt:
@ -375,7 +330,7 @@ clear_evt:
* If this field isn't clear, the FW won't update the next
* command message.
*/
c2h_evt_clear(adapter);
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
exit:
return ret;
}

439
hal/hal_intf.c
View file

@ -1,90 +1,10 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#define _HAL_INTF_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
#include <usb_hal.h>
void rtw_hal_chip_configure(struct adapter *adapt)
{
if (adapt->HalFunc.intf_chip_configure)
adapt->HalFunc.intf_chip_configure(adapt);
}
void rtw_hal_read_chip_info(struct adapter *adapt)
{
if (adapt->HalFunc.read_adapter_info)
adapt->HalFunc.read_adapter_info(adapt);
}
void rtw_hal_read_chip_version(struct adapter *adapt)
{
if (adapt->HalFunc.read_chip_version)
adapt->HalFunc.read_chip_version(adapt);
}
void rtw_hal_def_value_init(struct adapter *adapt)
{
if (adapt->HalFunc.init_default_value)
adapt->HalFunc.init_default_value(adapt);
}
void rtw_hal_free_data(struct adapter *adapt)
{
if (adapt->HalFunc.free_hal_data)
adapt->HalFunc.free_hal_data(adapt);
}
void rtw_hal_dm_init(struct adapter *adapt)
{
if (adapt->HalFunc.dm_init)
adapt->HalFunc.dm_init(adapt);
}
void rtw_hal_dm_deinit(struct adapter *adapt)
{
/* cancel dm timer */
if (adapt->HalFunc.dm_deinit)
adapt->HalFunc.dm_deinit(adapt);
}
void rtw_hal_sw_led_init(struct adapter *adapt)
{
if (adapt->HalFunc.InitSwLeds)
adapt->HalFunc.InitSwLeds(adapt);
}
void rtw_hal_sw_led_deinit(struct adapter *adapt)
{
if (adapt->HalFunc.DeInitSwLeds)
adapt->HalFunc.DeInitSwLeds(adapt);
}
u32 rtw_hal_power_on(struct adapter *adapt)
{
if (adapt->HalFunc.hal_power_on)
return adapt->HalFunc.hal_power_on(adapt);
return _FAIL;
}
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/hal_intf.h"
uint rtw_hal_init(struct adapter *adapt)
{
@ -92,23 +12,17 @@ uint rtw_hal_init(struct adapter *adapt)
adapt->hw_init_completed = false;
status = adapt->HalFunc.hal_init(adapt);
status = rtl8188eu_hal_init(adapt);
if (status == _SUCCESS) {
adapt->hw_init_completed = true;
if (adapt->registrypriv.notch_filter == 1)
rtw_hal_notch_filter(adapt, 1);
rtw_hal_reset_security_engine(adapt);
hal_notch_filter_8188e(adapt, 1);
} else {
adapt->hw_init_completed = false;
DBG_88E("rtw_hal_init: hal__init fail\n");
}
RT_TRACE(_module_hal_init_c_, _drv_err_,
("-rtl871x_hal_init:status=0x%x\n", status));
return status;
}
@ -116,353 +30,26 @@ uint rtw_hal_deinit(struct adapter *adapt)
{
uint status = _SUCCESS;
status = adapt->HalFunc.hal_deinit(adapt);
status = rtl8188eu_hal_deinit(adapt);
if (status == _SUCCESS)
adapt->hw_init_completed = false;
else
DBG_88E("\n rtw_hal_deinit: hal_init fail\n");
return status;
}
void rtw_hal_set_hwreg(struct adapter *adapt, u8 variable, u8 *val)
{
if (adapt->HalFunc.SetHwRegHandler)
adapt->HalFunc.SetHwRegHandler(adapt, variable, val);
}
void rtw_hal_get_hwreg(struct adapter *adapt, u8 variable, u8 *val)
{
if (adapt->HalFunc.GetHwRegHandler)
adapt->HalFunc.GetHwRegHandler(adapt, variable, val);
}
u8 rtw_hal_set_def_var(struct adapter *adapt, enum hal_def_variable var,
void *val)
{
if (adapt->HalFunc.SetHalDefVarHandler)
return adapt->HalFunc.SetHalDefVarHandler(adapt, var, val);
return _FAIL;
}
u8 rtw_hal_get_def_var(struct adapter *adapt,
enum hal_def_variable var, void *val)
{
if (adapt->HalFunc.GetHalDefVarHandler)
return adapt->HalFunc.GetHalDefVarHandler(adapt, var, val);
return _FAIL;
}
void rtw_hal_set_odm_var(struct adapter *adapt,
enum hal_odm_variable var, void *val1,
bool set)
{
if (adapt->HalFunc.SetHalODMVarHandler)
adapt->HalFunc.SetHalODMVarHandler(adapt, var,
val1, set);
}
void rtw_hal_get_odm_var(struct adapter *adapt,
enum hal_odm_variable var, void *val1,
bool set)
{
if (adapt->HalFunc.GetHalODMVarHandler)
adapt->HalFunc.GetHalODMVarHandler(adapt, var,
val1, set);
}
void rtw_hal_enable_interrupt(struct adapter *adapt)
{
if (adapt->HalFunc.enable_interrupt)
adapt->HalFunc.enable_interrupt(adapt);
else
DBG_88E("%s: HalFunc.enable_interrupt is NULL!\n", __func__);
}
void rtw_hal_disable_interrupt(struct adapter *adapt)
{
if (adapt->HalFunc.disable_interrupt)
adapt->HalFunc.disable_interrupt(adapt);
else
DBG_88E("%s: HalFunc.disable_interrupt is NULL!\n", __func__);
}
u32 rtw_hal_inirp_init(struct adapter *adapt)
{
u32 rst = _FAIL;
if (adapt->HalFunc.inirp_init)
rst = adapt->HalFunc.inirp_init(adapt);
else
DBG_88E(" %s HalFunc.inirp_init is NULL!!!\n", __func__);
return rst;
}
u32 rtw_hal_inirp_deinit(struct adapter *adapt)
{
if (adapt->HalFunc.inirp_deinit)
return adapt->HalFunc.inirp_deinit(adapt);
return _FAIL;
}
u8 rtw_hal_intf_ps_func(struct adapter *adapt,
enum hal_intf_ps_func efunc_id, u8 *val)
{
if (adapt->HalFunc.interface_ps_func)
return adapt->HalFunc.interface_ps_func(adapt, efunc_id,
val);
return _FAIL;
}
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter,
struct xmit_frame *pxmitframe)
{
if(padapter->HalFunc.hal_xmitframe_enqueue)
return padapter->HalFunc.hal_xmitframe_enqueue(padapter, pxmitframe);
return false;
}
s32 rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe)
{
if (adapt->HalFunc.hal_xmit)
return adapt->HalFunc.hal_xmit(adapt, pxmitframe);
return false;
}
s32 rtw_hal_mgnt_xmit(struct adapter *adapt, struct xmit_frame *pmgntframe)
{
s32 ret = _FAIL;
if (adapt->HalFunc.mgnt_xmit)
ret = adapt->HalFunc.mgnt_xmit(adapt, pmgntframe);
return ret;
}
s32 rtw_hal_init_xmit_priv(struct adapter *adapt)
{
if (adapt->HalFunc.init_xmit_priv != NULL)
return adapt->HalFunc.init_xmit_priv(adapt);
return _FAIL;
}
void rtw_hal_free_xmit_priv(struct adapter *adapt)
{
if (adapt->HalFunc.free_xmit_priv != NULL)
adapt->HalFunc.free_xmit_priv(adapt);
}
s32 rtw_hal_init_recv_priv(struct adapter *adapt)
{
if (adapt->HalFunc.init_recv_priv)
return adapt->HalFunc.init_recv_priv(adapt);
return _FAIL;
}
void rtw_hal_free_recv_priv(struct adapter *adapt)
{
if (adapt->HalFunc.free_recv_priv)
adapt->HalFunc.free_recv_priv(adapt);
}
void rtw_hal_update_ra_mask(struct adapter *adapt, u32 mac_id, u8 rssi_level)
{
struct mlme_priv *pmlmepriv = &(adapt->mlmepriv);
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == true) {
#ifdef CONFIG_88EU_AP_MODE
if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) {
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &adapt->stapriv;
if ((mac_id-1) > 0)
psta = pstapriv->sta_aid[(mac_id-1) - 1];
if (mac_id >= 2)
psta = pstapriv->sta_aid[(mac_id - 1) - 1];
if (psta)
add_RATid(adapt, psta, 0);/* todo: based on rssi_level*/
#endif
} else {
if (adapt->HalFunc.UpdateRAMaskHandler)
adapt->HalFunc.UpdateRAMaskHandler(adapt, mac_id,
rssi_level);
UpdateHalRAMask8188EUsb(adapt, mac_id, rssi_level);
}
}
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg,
u8 rssi_level)
{
if (adapt->HalFunc.Add_RateATid)
adapt->HalFunc.Add_RateATid(adapt, bitmap, arg,
rssi_level);
}
/* Start specifical interface thread */
void rtw_hal_start_thread(struct adapter *adapt)
{
if (adapt->HalFunc.run_thread)
adapt->HalFunc.run_thread(adapt);
}
/* Start specifical interface thread */
void rtw_hal_stop_thread(struct adapter *adapt)
{
if (adapt->HalFunc.cancel_thread)
adapt->HalFunc.cancel_thread(adapt);
}
u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask)
{
u32 data = 0;
if (adapt->HalFunc.read_bbreg)
data = adapt->HalFunc.read_bbreg(adapt, regaddr, bitmask);
return data;
}
void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
u32 data)
{
if (adapt->HalFunc.write_bbreg)
adapt->HalFunc.write_bbreg(adapt, regaddr, bitmask, data);
}
u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
u32 regaddr, u32 bitmask)
{
u32 data = 0;
if (adapt->HalFunc.read_rfreg)
data = adapt->HalFunc.read_rfreg(adapt, rfpath, regaddr,
bitmask);
return data;
}
void rtw_hal_write_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
u32 regaddr, u32 bitmask, u32 data)
{
if (adapt->HalFunc.write_rfreg)
adapt->HalFunc.write_rfreg(adapt, rfpath, regaddr,
bitmask, data);
}
s32 rtw_hal_interrupt_handler(struct adapter *adapt)
{
if (adapt->HalFunc.interrupt_handler)
return adapt->HalFunc.interrupt_handler(adapt);
return _FAIL;
}
void rtw_hal_set_bwmode(struct adapter *adapt,
enum ht_channel_width bandwidth, u8 offset)
{
if (adapt->HalFunc.set_bwmode_handler)
adapt->HalFunc.set_bwmode_handler(adapt, bandwidth,
offset);
}
void rtw_hal_set_chan(struct adapter *adapt, u8 channel)
{
if (adapt->HalFunc.set_channel_handler)
adapt->HalFunc.set_channel_handler(adapt, channel);
}
void rtw_hal_dm_watchdog(struct adapter *adapt)
{
if (adapt->HalFunc.hal_dm_watchdog)
adapt->HalFunc.hal_dm_watchdog(adapt);
}
void rtw_hal_bcn_related_reg_setting(struct adapter *adapt)
{
if (adapt->HalFunc.SetBeaconRelatedRegistersHandler)
adapt->HalFunc.SetBeaconRelatedRegistersHandler(adapt);
}
u8 rtw_hal_antdiv_before_linked(struct adapter *adapt)
{
if (adapt->HalFunc.AntDivBeforeLinkHandler)
return adapt->HalFunc.AntDivBeforeLinkHandler(adapt);
return false;
}
void rtw_hal_antdiv_rssi_compared(struct adapter *adapt,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src)
{
if (adapt->HalFunc.AntDivCompareHandler)
adapt->HalFunc.AntDivCompareHandler(adapt, dst, src);
}
void rtw_hal_sreset_init(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_init_value)
adapt->HalFunc.sreset_init_value(adapt);
}
void rtw_hal_sreset_reset(struct adapter *adapt)
{
if (adapt->HalFunc.silentreset)
adapt->HalFunc.silentreset(adapt);
}
void rtw_hal_sreset_reset_value(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_reset_value)
adapt->HalFunc.sreset_reset_value(adapt);
}
void rtw_hal_sreset_xmit_status_check(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_xmit_status_check)
adapt->HalFunc.sreset_xmit_status_check(adapt);
}
void rtw_hal_sreset_linked_status_check(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_linked_status_check)
adapt->HalFunc.sreset_linked_status_check(adapt);
}
u8 rtw_hal_sreset_get_wifi_status(struct adapter *adapt)
{
u8 status = 0;
if (adapt->HalFunc.sreset_get_wifi_status)
status = adapt->HalFunc.sreset_get_wifi_status(adapt);
return status;
}
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt)
{
if (adapter->HalFunc.IOL_exec_cmds_sync)
return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame,
max_wating_ms,
bndy_cnt);
return _FAIL;
}
void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
{
if (adapter->HalFunc.hal_notch_filter)
adapter->HalFunc.hal_notch_filter(adapter, enable);
}
void rtw_hal_reset_security_engine(struct adapter *adapter)
{
if (adapter->HalFunc.hal_reset_security_engine)
adapter->HalFunc.hal_reset_security_engine(adapter);
}
s32 rtw_hal_c2h_handler(struct adapter *adapter, struct c2h_evt_hdr *c2h_evt)
{
s32 ret = _FAIL;
if (adapter->HalFunc.c2h_handler)
ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt);
return ret;
}
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter)
{
return adapter->HalFunc.c2h_id_filter_ccx;
}

2259
hal/odm.c
View file

File diff suppressed because it is too large Load diff

489
hal/odm_HWConfig.c
View file

@ -1,31 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
/* include files */
#include "odm_precomp.h"
#define READ_AND_CONFIG READ_AND_CONFIG_MP
#define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
#define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
#include "../include/drv_types.h"
static u8 odm_QueryRxPwrPercentage(s8 AntPower)
{
@ -34,98 +10,53 @@ static u8 odm_QueryRxPwrPercentage(s8 AntPower)
else if (AntPower >= 0)
return 100;
else
return 100+AntPower;
}
/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
/* IF other SW team do not support the feature, remove this section.?? */
static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
return 0;
}
static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
return 0;
}
static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
s32 RetSig = 0;
if ((dm_odm->SupportInterface == ODM_ITRF_USB) ||
(dm_odm->SupportInterface == ODM_ITRF_SDIO)) {
if (CurrSig >= 51 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig >= 41 && CurrSig <= 50)
RetSig = 80 + ((CurrSig - 40)*2);
else if (CurrSig >= 31 && CurrSig <= 40)
RetSig = 66 + (CurrSig - 30);
else if (CurrSig >= 21 && CurrSig <= 30)
RetSig = 54 + (CurrSig - 20);
else if (CurrSig >= 10 && CurrSig <= 20)
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
else if (CurrSig >= 5 && CurrSig <= 9)
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
else if (CurrSig >= 1 && CurrSig <= 4)
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
else
RetSig = CurrSig;
}
return RetSig;
return 100 + AntPower;
}
static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
if ((dm_odm->SupportPlatform == ODM_MP) &&
(dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */
(dm_odm->PatchID == 10))
return odm_sig_patch_netcore(dm_odm, CurrSig);
else if ((dm_odm->SupportPlatform == ODM_MP) &&
(dm_odm->SupportInterface == ODM_ITRF_PCIE) &&
(dm_odm->PatchID == 19))
return odm_sig_patch_lenove(dm_odm, CurrSig);
s32 RetSig = 0;
if (CurrSig >= 51 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig >= 41 && CurrSig <= 50)
RetSig = 80 + ((CurrSig - 40) * 2);
else if (CurrSig >= 31 && CurrSig <= 40)
RetSig = 66 + (CurrSig - 30);
else if (CurrSig >= 21 && CurrSig <= 30)
RetSig = 54 + (CurrSig - 20);
else if (CurrSig >= 10 && CurrSig <= 20)
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
else if (CurrSig >= 5 && CurrSig <= 9)
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
else if (CurrSig >= 1 && CurrSig <= 4)
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
else
return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
RetSig = CurrSig;
return RetSig;
}
/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
{
return 0;
}
static u8 odm_EVMdbToPercentage(s8 Value)
static u8 odm_evm_db_to_percentage(s8 value)
{
/* -33dB~0dB to 0%~99% */
s8 ret_val;
ret_val = Value;
if (ret_val >= 0)
ret_val = 0;
if (ret_val <= -33)
ret_val = -33;
ret_val = 0 - ret_val;
ret_val *= 3;
s8 ret_val = clamp(-value, 0, 33) * 3;
if (ret_val == 99)
ret_val = 100;
return ret_val;
}
static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
u8 i, Max_spatial_stream;
s8 rx_pwr[4], rx_pwr_all = 0;
u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
u8 EVM, PWDB_ALL = 0;
u8 RSSI, total_rssi = 0;
u8 isCCKrate = 0;
u8 rf_rx_num = 0;
@ -136,143 +67,73 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
if (isCCKrate) {
u8 report;
u8 cck_agc_rpt;
dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
/* (1)Hardware does not provide RSSI for CCK */
/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
cck_highpwr = dm_odm->bCckHighPower;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
/* The RSSI formula should be modified according to the gain table */
/* In 88E, cck_highpwr is always set to 1 */
if (dm_odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) {
LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2*(5-VGA_idx);
break;
case 1:
rx_pwr_all = 8-2*VGA_idx;
break;
case 0:
rx_pwr_all = 14-2*VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
} else {
if (!cck_highpwr) {
report = (cck_agc_rpt & 0xc0)>>6;
switch (report) {
/* 03312009 modified by cosa */
/* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
/* Note: different RF with the different RNA gain. */
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
} else {
report = (cck_agc_rpt & 0x60)>>5;
switch (report) {
case 0x3:
rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x2:
rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);
break;
case 0x1:
rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1);
break;
case 0x0:
rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1);
break;
}
}
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
/* Modification for ext-LNA board */
if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
if ((cck_agc_rpt>>7) == 0) {
PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL+6);
} else {
if (PWDB_ALL > 38)
PWDB_ALL -= 16;
else
PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL>>2) : (PWDB_ALL-12);
}
/* CCK modification */
if (PWDB_ALL > 25 && PWDB_ALL <= 60)
PWDB_ALL += 6;
} else {/* Modification for int-LNA board */
if (PWDB_ALL > 99)
PWDB_ALL -= 8;
else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
PWDB_ALL += 4;
}
LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2 * (5 - VGA_idx);
break;
case 1:
rx_pwr_all = 8 - 2 * VGA_idx;
break;
case 0:
rx_pwr_all = 14 - 2 * VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
pPhyInfo->RxPWDBAll = PWDB_ALL;
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
pPhyInfo->RecvSignalPower = rx_pwr_all;
pPhyInfo->recvpower = rx_pwr_all;
/* (3) Get Signal Quality (EVM) */
if (pPktinfo->bPacketMatchBSSID) {
u8 SQ, SQ_rpt;
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0);
} else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
if (pPhyInfo->RxPWDBAll > 40) {
SQ = 100;
} else {
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
@ -282,23 +143,19 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
else if (SQ_rpt < 20)
SQ = 100;
else
SQ = ((64-SQ_rpt) * 100) / 44;
SQ = ((64 - SQ_rpt) * 100) / 44;
}
pPhyInfo->SignalQuality = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
}
} else { /* is OFDM rate */
dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
/* (1)Get RSSI for HT rate */
for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
/* 2008/01/30 MH we will judge RF RX path now. */
if (dm_odm->RFPathRxEnable & BIT(i))
rf_rx_num++;
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F) * 2) - 110;
if (i == RF_PATH_A)
adapt->signal_strength = rx_pwr[i];
@ -308,62 +165,35 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
total_rssi += RSSI;
/* Modification for ext-LNA board */
if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
if ((pPhyStaRpt->path_agc[i].trsw) == 1)
RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
else
RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
if ((RSSI <= 34) && (RSSI >= 4))
RSSI -= 4;
}
pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
/* Get Rx snr value in DB */
pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
/* Record Signal Strength for next packet */
if (pPktinfo->bPacketMatchBSSID) {
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
if (i == RF_PATH_A)
pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI);
}
}
dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
}
/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
PWDB_ALL_BT = PWDB_ALL;
pPhyInfo->RxPWDBAll = PWDB_ALL;
pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
pPhyInfo->RxPower = rx_pwr_all;
pPhyInfo->RecvSignalPower = rx_pwr_all;
pPhyInfo->recvpower = rx_pwr_all;
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
/* do nothing */
} else {
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
}
}
}
@ -376,20 +206,14 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
}
/* For 92C/92D HW (Hybrid) Antenna Diversity */
pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
/* For 88E HW Antenna Diversity */
dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
}
void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
{
}
static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
struct odm_per_pkt_info *pPktinfo)
{
s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
@ -399,6 +223,8 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
u32 OFDM_pkt = 0;
u32 Weighting = 0;
struct sta_info *pEntry;
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (pPktinfo->StationID == 0xFF)
return;
@ -411,28 +237,14 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
/* Smart Antenna Debug Message------------------ */
if (dm_odm->SupportICType == ODM_RTL8188E) {
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
if (pPktinfo->bPacketToSelf) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
(pDM_FatTable->antsel_rx_keep_1<<1) |
pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
}
}
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
(pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
}
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
(pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0;
ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
}
}
/* Smart Antenna Debug Message------------------ */
UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
@ -467,17 +279,17 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
} else {
if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
UndecoratedSmoothedOFDM =
(((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
(((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) +
(RSSI_Ave)) / (Rx_Smooth_Factor);
UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
} else {
UndecoratedSmoothedOFDM =
(((UndecoratedSmoothedOFDM)*(Rx_Smooth_Factor-1)) +
(((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) +
(RSSI_Ave)) / (Rx_Smooth_Factor);
}
}
pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap << 1) | BIT(0);
} else {
RSSI_Ave = pPhyInfo->RxPWDBAll;
@ -488,16 +300,16 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
} else {
if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
UndecoratedSmoothedCCK =
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) +
pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
} else {
UndecoratedSmoothedCCK =
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor-1)) +
((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) +
pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
}
}
pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap << 1;
}
/* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
if (pEntry->rssi_stat.ValidBit >= 64)
@ -506,16 +318,16 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
pEntry->rssi_stat.ValidBit++;
for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap >> i) & BIT(0);
if (pEntry->rssi_stat.ValidBit == 64) {
Weighting = ((OFDM_pkt<<4) > 64) ? 64 : (OFDM_pkt<<4);
UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
Weighting = ((OFDM_pkt << 4) > 64) ? 64 : (OFDM_pkt << 4);
UndecoratedSmoothedPWDB = (Weighting * UndecoratedSmoothedOFDM + (64 - Weighting) * UndecoratedSmoothedCCK) >> 6;
} else {
if (pEntry->rssi_stat.ValidBit != 0)
UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
(pEntry->rssi_stat.ValidBit-OFDM_pkt) *
UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
(pEntry->rssi_stat.ValidBit - OFDM_pkt) *
UndecoratedSmoothedCCK) / pEntry->rssi_stat.ValidBit;
else
UndecoratedSmoothedPWDB = 0;
}
@ -526,76 +338,17 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
}
/* Endianness before calling this API */
static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
pPktinfo, adapt);
if (dm_odm->RSSI_test) {
/* Select the packets to do RSSI checking for antenna switching. */
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo);
} else {
odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
}
}
void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
{
ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt);
odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt);
odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
}
/* For future use. */
void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
u8 macid, bool pkt_match_bssid,
bool pkttoself, bool pkt_beacon)
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm)
{
/* 2011/10/19 Driver team will handle in the future. */
}
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
enum rf_radio_path content,
enum rf_radio_path rfpath)
{
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
if (dm_odm->SupportICType == ODM_RTL8188E) {
if (rfpath == RF_PATH_A)
READ_AND_CONFIG(8188E, _RadioA_1T_);
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
}
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath));
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
enum odm_bb_config_type config_tp)
{
if (dm_odm->SupportICType == ODM_RTL8188E) {
if (config_tp == CONFIG_BB_PHY_REG) {
READ_AND_CONFIG(8188E, _PHY_REG_1T_);
} else if (config_tp == CONFIG_BB_AGC_TAB) {
READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
} else if (config_tp == CONFIG_BB_PHY_REG_PG) {
READ_AND_CONFIG(8188E, _PHY_REG_PG_);
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
(" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
}
}
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
{
u8 result = HAL_STATUS_SUCCESS;
if (dm_odm->SupportICType == ODM_RTL8188E)
result = READ_AND_CONFIG(8188E, _MAC_REG_);
return result;
return ODM_ReadAndConfig_RadioA_1T_8188E(dm_odm);
}

284
hal/odm_RTL8188E.c
View file

@ -1,192 +1,102 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "odm_precomp.h"
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm)
{
struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable;
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
pDM_DigTable->rx_gain_range_min = (u8) pDM_DigTable->AntDiv_RSSI_max;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max));
}
/* If only one Entry connected */
}
#include "../include/drv_types.h"
static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* 1:CG, 0:CS */
return;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n"));
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
/* Pin Settings */
ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 1); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 1); /* Regb2c[22]=1'b0 disable CS/CG switch */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */
/* OFDM Settings */
ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
/* CCK Settings */
ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */
}
static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, 0); /* Default RX (0/1) */
return;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n"));
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = rtl8188e_PHY_QueryBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
/* Pin Settings */
ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_PIN_CTRL_11N, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(22), 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_LNA_SWITCH_11N, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */
/* OFDM Settings */
ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
/* CCK Settings */
ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT(7), 1); /* Fix CCK PHY status report issue */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT(4), 1); /* CCK complete HW AntDiv within 64 samples */
/* Tx Settings */
ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); /* Reg80c[21]=1'b0 from TX Reg */
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
/* antenna mapping table */
if (!dm_odm->bIsMPChip) { /* testchip */
ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */
ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_DEFUALT_A_11N, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_DEFUALT_A_11N, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */
} else { /* MPchip */
ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */
}
}
static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
{
u32 value32, i;
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u32 AntCombination = 2;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n"));
if (*(dm_odm->mp_mode) == 1) {
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("dm_odm->AntDivType: %d\n", dm_odm->AntDivType));
return;
}
for (i = 0; i < 6; i++) {
dm_fat_tbl->Bssid[i] = 0;
dm_fat_tbl->antSumRSSI[i] = 0;
dm_fat_tbl->antRSSIcnt[i] = 0;
dm_fat_tbl->antAveRSSI[i] = 0;
}
dm_fat_tbl->TrainIdx = 0;
dm_fat_tbl->FAT_State = FAT_NORMAL_STATE;
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, 0x4c, bMaskDWord);
ODM_SetMACReg(dm_odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = ODM_GetMACReg(dm_odm, 0x7B4, bMaskDWord);
ODM_SetMACReg(dm_odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
value32 = rtl8188e_PHY_QueryBBReg(adapter, 0x4c, bMaskDWord);
rtl8188e_PHY_SetBBReg(adapter, 0x4c, bMaskDWord, value32 | (BIT(23) | BIT(25))); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = rtl8188e_PHY_QueryBBReg(adapter, 0x7B4, bMaskDWord);
rtl8188e_PHY_SetBBReg(adapter, 0x7b4, bMaskDWord, value32 | (BIT(16) | BIT(17))); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
/* Match MAC ADDR */
ODM_SetMACReg(dm_odm, 0x7b4, 0xFFFF, 0);
ODM_SetMACReg(dm_odm, 0x7b0, bMaskDWord, 0);
rtl8188e_PHY_SetBBReg(adapter, 0x7b4, 0xFFFF, 0);
rtl8188e_PHY_SetBBReg(adapter, 0x7b0, bMaskDWord, 0);
ODM_SetBBReg(dm_odm, 0x870, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(dm_odm, 0x864, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(dm_odm, 0xb2c, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(dm_odm, 0xb2c, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
ODM_SetBBReg(dm_odm, 0xca4, bMaskDWord, 0x000000a0);
rtl8188e_PHY_SetBBReg(adapter, 0x870, BIT(9) | BIT(8), 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(10), 0); /* Reg864[10]=1'b0 antsel2 by HW */
rtl8188e_PHY_SetBBReg(adapter, 0xb2c, BIT(22), 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
rtl8188e_PHY_SetBBReg(adapter, 0xb2c, BIT(31), 1); /* Regb2c[31]=1'b1 output at CG only */
rtl8188e_PHY_SetBBReg(adapter, 0xca4, bMaskDWord, 0x000000a0);
/* antenna mapping table */
if (AntCombination == 2) {
if (!dm_odm->bIsMPChip) { /* testchip */
ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */
ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */
} else { /* MPchip */
ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 1);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 2);
}
} else if (AntCombination == 7) {
if (!dm_odm->bIsMPChip) { /* testchip */
ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 0); /* Reg858[10:8]=3'b000 */
ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 1); /* Reg858[13:11]=3'b001 */
ODM_SetBBReg(dm_odm, 0x878, BIT16, 0);
ODM_SetBBReg(dm_odm, 0x858, BIT15|BIT14, 2); /* Reg878[0],Reg858[14:15])=3'b010 */
ODM_SetBBReg(dm_odm, 0x878, BIT19|BIT18|BIT17, 3);/* Reg878[3:1]=3b'011 */
ODM_SetBBReg(dm_odm, 0x878, BIT22|BIT21|BIT20, 4);/* Reg878[6:4]=3b'100 */
ODM_SetBBReg(dm_odm, 0x878, BIT25|BIT24|BIT23, 5);/* Reg878[9:7]=3b'101 */
ODM_SetBBReg(dm_odm, 0x878, BIT28|BIT27|BIT26, 6);/* Reg878[12:10]=3b'110 */
ODM_SetBBReg(dm_odm, 0x878, BIT31|BIT30|BIT29, 7);/* Reg878[15:13]=3b'111 */
} else { /* MPchip */
ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 0);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 1);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte2, 2);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte3, 3);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte0, 4);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte1, 5);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte2, 6);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte3, 7);
}
if (!dm_odm->bIsMPChip) { /* testchip */
rtl8188e_PHY_SetBBReg(adapter, 0x858, BIT(10) | BIT(9) | BIT(8), 1); /* Reg858[10:8]=3'b001 */
rtl8188e_PHY_SetBBReg(adapter, 0x858, BIT(13) | BIT(12) | BIT(11), 2); /* Reg858[13:11]=3'b010 */
} else { /* MPchip */
rtl8188e_PHY_SetBBReg(adapter, 0x914, bMaskByte0, 1);
rtl8188e_PHY_SetBBReg(adapter, 0x914, bMaskByte1, 2);
}
/* Default Ant Setting when no fast training */
ODM_SetBBReg(dm_odm, 0x80c, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
ODM_SetBBReg(dm_odm, 0x864, BIT5|BIT4|BIT3, 0); /* Default RX */
ODM_SetBBReg(dm_odm, 0x864, BIT8|BIT7|BIT6, 1); /* Optional RX */
rtl8188e_PHY_SetBBReg(adapter, 0x80c, BIT(21), 1); /* Reg80c[21]=1'b1 from TX Info */
rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(5) | BIT(4) | BIT(3), 0); /* Default RX */
rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(8) | BIT(7) | BIT(6), 1); /* Optional RX */
/* Enter Traing state */
ODM_SetBBReg(dm_odm, 0x864, BIT2|BIT1|BIT0, (AntCombination-1)); /* Reg864[2:0]=3'd6 ant combination=reg864[2:0]+1 */
ODM_SetBBReg(dm_odm, 0xc50, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
/* Enter Training state */
rtl8188e_PHY_SetBBReg(adapter, 0x864, BIT(2) | BIT(1) | BIT(0), 1);
rtl8188e_PHY_SetBBReg(adapter, 0xc50, BIT(7), 1); /* RegC50[7]=1'b1 enable HW AntDiv */
}
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
{
if (dm_odm->SupportICType != ODM_RTL8188E)
return;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->AntDivType=%d\n", dm_odm->AntDivType));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->bIsMPChip=%s\n", (dm_odm->bIsMPChip ? "true" : "false")));
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
odm_RX_HWAntDivInit(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
@ -198,10 +108,10 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
struct adapter *adapter = dm_odm->Adapter;
u32 DefaultAnt, OptionalAnt;
if (dm_fat_tbl->RxIdleAnt != Ant) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n"));
if (Ant == MAIN_ANT) {
DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
@ -211,17 +121,16 @@ void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant)
}
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
ODM_SetBBReg(dm_odm, ODM_REG_ANTSEL_CTRL_11N, BIT14|BIT13|BIT12, DefaultAnt); /* Default TX */
ODM_SetMACReg(dm_odm, ODM_REG_RESP_TX_11N, BIT6|BIT7, DefaultAnt); /* Resp Tx */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt); /* Default RX */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt); /* Optional RX */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_ANTSEL_CTRL_11N, BIT(14) | BIT(13) | BIT(12), DefaultAnt); /* Default TX */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RESP_TX_11N, BIT(6) | BIT(7), DefaultAnt); /* Resp Tx */
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(5) | BIT(4) | BIT(3), DefaultAnt); /* Default RX */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT(8) | BIT(7) | BIT(6), OptionalAnt); /* Optional RX */
}
}
dm_fat_tbl->RxIdleAnt = Ant;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
if (Ant != MAIN_ANT)
pr_info("RxIdleAnt=AUX_ANT\n");
}
@ -235,16 +144,9 @@ static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant, u32 MacId)
TargetAnt = MAIN_ANT_CG_TRX;
else
TargetAnt = AUX_ANT_CG_TRX;
dm_fat_tbl->antsel_a[MacId] = TargetAnt&BIT0;
dm_fat_tbl->antsel_b[MacId] = (TargetAnt&BIT1)>>1;
dm_fat_tbl->antsel_c[MacId] = (TargetAnt&BIT2)>>2;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("Tx from TxInfo, TargetAnt=%s\n",
(Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("antsel_tr_mux=3'b%d%d%d\n",
dm_fat_tbl->antsel_c[MacId], dm_fat_tbl->antsel_b[MacId], dm_fat_tbl->antsel_a[MacId]));
dm_fat_tbl->antsel_a[MacId] = TargetAnt & BIT(0);
dm_fat_tbl->antsel_b[MacId] = (TargetAnt & BIT(1)) >> 1;
dm_fat_tbl->antsel_c[MacId] = (TargetAnt & BIT(2)) >> 2;
}
void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 macId)
@ -293,19 +195,9 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
pEntry = dm_odm->pODM_StaInfo[i];
if (IS_STA_VALID(pEntry)) {
/* 2 Caculate RSSI per Antenna */
Main_RSSI = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? (dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0;
Aux_RSSI = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? (dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
Main_RSSI = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? (dm_fat_tbl->MainAnt_Sum[i] / dm_fat_tbl->MainAnt_Cnt[i]) : 0;
Aux_RSSI = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? (dm_fat_tbl->AuxAnt_Sum[i] / dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
TargetAnt = (Main_RSSI >= Aux_RSSI) ? MAIN_ANT : AUX_ANT;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n",
i, dm_fat_tbl->MainAnt_Sum[i],
dm_fat_tbl->MainAnt_Cnt[i]));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",
i, dm_fat_tbl->AuxAnt_Sum[i], dm_fat_tbl->AuxAnt_Cnt[i]));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n",
i, Main_RSSI, Aux_RSSI));
/* 2 Select MaxRSSI for DIG */
LocalMaxRSSI = (Main_RSSI > Aux_RSSI) ? Main_RSSI : Aux_RSSI;
if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40))
@ -344,57 +236,29 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((dm_odm->SupportICType != ODM_RTL8188E) || (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)))
struct adapter *adapter = dm_odm->Adapter;
if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
return;
if (!dm_odm->bLinked) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
if (dm_fat_tbl->bBecomeLinked) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 0); /* Enable CCK AntDiv */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_IGI_A_11N, BIT(7), 0); /* RegC50[7]=1'b1 enable HW AntDiv */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT(15), 0); /* Enable CCK AntDiv */
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 0); /* Reg80c[21]=1'b0 from TX Reg */
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
return;
} else {
if (!dm_fat_tbl->bBecomeLinked) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
/* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1); /* Enable CCK AntDiv */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_IGI_A_11N, BIT(7), 1); /* RegC50[7]=1'b1 enable HW AntDiv */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT(15), 1); /* Enable CCK AntDiv */
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
rtl8188e_PHY_SetBBReg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT(21), 1); /* Reg80c[21]=1'b1 from TX Info */
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
}
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
odm_HWAntDiv(dm_odm);
}
/* 3============================================================ */
/* 3 Dynamic Primary CCA */
/* 3============================================================ */
void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm)
{
struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
PrimaryCCA->Monitor_flag = 0;
PrimaryCCA->PriCCA_flag = 0;
}
bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *dm_odm)
{
struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
return PrimaryCCA->DupRTS_flag;
}
void odm_DynamicPrimaryCCA(struct odm_dm_struct *dm_odm)
{
return;
}

121
hal/odm_RegConfig8188E.c
View file

@ -1,130 +1,89 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include "odm_precomp.h"
#include "../include/drv_types.h"
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
u32 Data, enum rf_radio_path RF_PATH,
u32 RegAddr)
static void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
u32 Data, u32 RegAddr)
{
if (Addr == 0xffe) {
ODM_sleep_ms(50);
if (Addr == 0xffe) {
msleep(50);
} else if (Addr == 0xfd) {
ODM_delay_ms(5);
mdelay(5);
} else if (Addr == 0xfc) {
ODM_delay_ms(1);
mdelay(1);
} else if (Addr == 0xfb) {
ODM_delay_us(50);
udelay(50);
} else if (Addr == 0xfa) {
ODM_delay_us(5);
udelay(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
udelay(1);
} else {
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
rtl8188e_PHY_SetRFReg(pDM_Odm->Adapter, RegAddr, bRFRegOffsetMask, Data);
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
udelay(1);
}
}
void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
{
u32 content = 0x1000; /* RF_Content: radioa_txt */
u32 maskforPhySet = (u32)(content&0xE000);
u32 maskforPhySet = (u32)(content & 0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_A, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
}
void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
{
u32 content = 0x1001; /* RF_Content: radiob_txt */
u32 maskforPhySet = (u32)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, Addr | maskforPhySet);
}
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data)
{
ODM_Write1Byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
rtw_write8(pDM_Odm->Adapter, Addr, Data);
}
void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n",
Addr, Data));
udelay(1);
}
void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
u32 Bitmask, u32 Data)
{
if (Addr == 0xfe) {
ODM_sleep_ms(50);
} else if (Addr == 0xfd) {
ODM_delay_ms(5);
} else if (Addr == 0xfc) {
ODM_delay_ms(1);
} else if (Addr == 0xfb) {
ODM_delay_us(50);
} else if (Addr == 0xfa) {
ODM_delay_us(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
} else{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n",
Addr, Bitmask, Data));
if (Addr == 0xfe)
msleep(50);
else if (Addr == 0xfd)
mdelay(5);
else if (Addr == 0xfc)
mdelay(1);
else if (Addr == 0xfb)
udelay(50);
else if (Addr == 0xfa)
udelay(5);
else if (Addr == 0xf9)
udelay(1);
else
storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
}
}
void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
{
if (Addr == 0xfe) {
ODM_sleep_ms(50);
msleep(50);
} else if (Addr == 0xfd) {
ODM_delay_ms(5);
mdelay(5);
} else if (Addr == 0xfc) {
ODM_delay_ms(1);
mdelay(1);
} else if (Addr == 0xfb) {
ODM_delay_us(50);
udelay(50);
} else if (Addr == 0xfa) {
ODM_delay_us(5);
udelay(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
udelay(1);
} else {
if (Addr == 0xa24)
pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
rtl8188e_PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data);
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n",
Addr, Data));
udelay(1);
}
}

32
hal/odm_debug.c
View file

@ -1,32 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* include files */
#include "odm_precomp.h"
void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
{
pDM_Odm->DebugLevel = ODM_DBG_TRACE;
pDM_Odm->DebugComponents = 0;
}
u32 GlobalDebugLevel;

205
hal/odm_interface.c
View file

@ -1,205 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
/* ODM IO Relative API. */
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter, RegAddr);
}
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter, RegAddr);
}
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read32(Adapter, RegAddr);
}
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter, RegAddr, Data);
}
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter, RegAddr, Data);
}
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter, RegAddr, Data);
}
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
}
u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
}
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
}
u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
}
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data);
}
u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath, u32 RegAddr, u32 BitMask)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask);
}
/* ODM Memory relative API. */
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length)
{
*pPtr = rtw_zvmalloc(length);
}
/* length could be ignored, used to detect memory leakage. */
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length)
{
rtw_vmfree(pPtr, length);
}
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length)
{
return !memcmp(pBuf1, pBuf2, length);
}
/* ODM MISC relative API. */
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
{
}
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
{
}
/* Work item relative API. FOr MP driver only~! */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID)
{
}
void ODM_StartWorkItem(void *pRtWorkItem)
{
}
void ODM_StopWorkItem(void *pRtWorkItem)
{
}
void ODM_FreeWorkItem(void *pRtWorkItem)
{
}
void ODM_ScheduleWorkItem(void *pRtWorkItem)
{
}
void ODM_IsWorkItemScheduled(void *pRtWorkItem)
{
}
/* ODM Timer relative API. */
void ODM_StallExecution(u32 usDelay)
{
rtw_udelay_os(usDelay);
}
void ODM_delay_ms(u32 ms)
{
rtw_mdelay_os(ms);
}
void ODM_delay_us(u32 us)
{
rtw_udelay_os(us);
}
void ODM_sleep_ms(u32 ms)
{
rtw_msleep_os(ms);
}
void ODM_sleep_us(u32 us)
{
rtw_usleep_os(us);
}
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay)
{
_set_timer(pTimer, msDelay); /* ms */
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer,
void *CallBackFunc, void *pContext,
const char *szID)
{
struct adapter *Adapter = pDM_Odm->Adapter;
_init_timer(pTimer, Adapter->pnetdev, CallBackFunc, pDM_Odm);
}
#endif
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{
_cancel_timer_ex(pTimer);
}
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{
}
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen,
u8 **pCmbBuffer, u8 *CmdStartSeq)
{
return true;
}

292
hal/rtl8188e_cmd.c
View file

@ -1,32 +1,15 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188E_CMD_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <cmd_osdep.h>
#include <mlme_osdep.h>
#include <rtw_ioctl_set.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/recv_osdep.h"
#include "../include/mlme_osdep.h"
#include "../include/rtw_ioctl_set.h"
#include <rtl8188e_hal.h>
#include "../include/rtl8188e_hal.h"
#define RTL88E_MAX_H2C_BOX_NUMS 4
#define RTL88E_MAX_CMD_LEN 7
@ -66,86 +49,58 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
u8 h2c_box_num;
u32 msgbox_addr;
u32 msgbox_ex_addr;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct hal_data_8188e *haldata = &adapt->haldata;
u8 cmd_idx, ext_cmd_len;
u32 h2c_cmd = 0;
u32 h2c_cmd_ex = 0;
s32 ret = _FAIL;
if (!adapt->bFWReady) {
DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
return ret;
}
if (!adapt->bFWReady)
return _FAIL;
if (!pCmdBuffer)
goto exit;
if (CmdLen > RTL88E_MAX_CMD_LEN)
goto exit;
if (adapt->bSurpriseRemoved)
goto exit;
if (!pCmdBuffer || CmdLen > RTL88E_MAX_CMD_LEN || adapt->bSurpriseRemoved)
return _FAIL;
/* pay attention to if race condition happened in H2C cmd setting. */
do {
h2c_box_num = haldata->LastHMEBoxNum;
if (!_is_fw_read_cmd_down(adapt, h2c_box_num)) {
DBG_88E(" fw read cmd failed...\n");
goto exit;
}
if (!_is_fw_read_cmd_down(adapt, h2c_box_num))
return _FAIL;
*(u8 *)(&h2c_cmd) = ElementID;
if (CmdLen <= 3) {
memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, CmdLen);
memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, CmdLen);
} else {
memcpy((u8 *)(&h2c_cmd)+1, pCmdBuffer, 3);
ext_cmd_len = CmdLen-3;
memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer+3, ext_cmd_len);
memcpy((u8 *)(&h2c_cmd) + 1, pCmdBuffer, 3);
ext_cmd_len = CmdLen - 3;
memcpy((u8 *)(&h2c_cmd_ex), pCmdBuffer + 3, ext_cmd_len);
/* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) {
rtw_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx));
rtw_write8(adapt, msgbox_ex_addr + cmd_idx, *((u8 *)(&h2c_cmd_ex) + cmd_idx));
}
}
/* Write command */
msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) {
rtw_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx));
rtw_write8(adapt, msgbox_addr + cmd_idx, *((u8 *)(&h2c_cmd) + cmd_idx));
}
bcmd_down = true;
haldata->LastHMEBoxNum = (h2c_box_num+1) % RTL88E_MAX_H2C_BOX_NUMS;
haldata->LastHMEBoxNum = (h2c_box_num + 1) % RTL88E_MAX_H2C_BOX_NUMS;
} while ((!bcmd_down) && (retry_cnts--));
ret = _SUCCESS;
exit:
return ret;
}
u8 rtl8188e_set_rssi_cmd(struct adapter *adapt, u8 *param)
{
u8 res = _SUCCESS;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
if (haldata->fw_ractrl) {
;
} else {
DBG_88E("==>%s fw dont support RA\n", __func__);
res = _FAIL;
}
return res;
return _SUCCESS;
}
u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
{
u8 buf[3];
u8 res = _SUCCESS;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct hal_data_8188e *haldata = &adapt->haldata;
if (haldata->fw_ractrl) {
__le32 lmask;
@ -156,7 +111,6 @@ u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
FillH2CCmd_88E(adapt, H2C_DM_MACID_CFG, 3, buf);
} else {
DBG_88E("==>%s fw dont support RA\n", __func__);
res = _FAIL;
}
@ -169,35 +123,27 @@ u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
/* arg[5] = Short GI */
void rtl8188e_Add_RateATid(struct adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(pAdapter);
struct hal_data_8188e *haldata = &pAdapter->haldata;
u8 macid, init_rate, raid, shortGIrate = false;
u8 macid, raid, short_gi_rate = false;
macid = arg&0x1f;
macid = arg & 0x1f;
raid = (bitmap>>28) & 0x0f;
raid = (bitmap >> 28) & 0x0f;
bitmap &= 0x0fffffff;
if (rssi_level != DM_RATR_STA_INIT)
bitmap = ODM_Get_Rate_Bitmap(&haldata->odmpriv, macid, bitmap, rssi_level);
bitmap |= ((raid<<28)&0xf0000000);
bitmap |= ((raid << 28) & 0xf0000000);
init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f;
short_gi_rate = (arg & BIT(5)) ? true : false;
shortGIrate = (arg&BIT(5)) ? true : false;
if (shortGIrate)
init_rate |= BIT(6);
raid = (bitmap>>28) & 0x0f;
raid = (bitmap >> 28) & 0x0f;
bitmap &= 0x0fffffff;
DBG_88E("%s=> mac_id:%d, raid:%d, ra_bitmap=0x%x, shortGIrate=0x%02x\n",
__func__, macid, raid, bitmap, shortGIrate);
ODM_RA_UpdateRateInfo_8188E(&(haldata->odmpriv), macid, raid, bitmap, shortGIrate);
ODM_RA_UpdateRateInfo_8188E(&haldata->odmpriv, macid, raid, bitmap, short_gi_rate);
}
void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
@ -206,9 +152,6 @@ void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */
DBG_88E("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __func__,
Mode, pwrpriv->smart_ps, adapt->registrypriv.uapsd_enable);
switch (Mode) {
case PS_MODE_ACTIVE:
H2CSetPwrMode.Mode = 0;
@ -232,7 +175,7 @@ void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
break;
}
H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps<<4)&0xf0) | (RLBM & 0x0f));
H2CSetPwrMode.SmartPS_RLBM = (((pwrpriv->smart_ps << 4) & 0xf0) | (RLBM & 0x0f));
H2CSetPwrMode.AwakeInterval = 1;
@ -249,12 +192,8 @@ void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt)
{
u8 opmode, macid;
u16 mst_rpt = le16_to_cpu(mstatus_rpt);
opmode = (u8) mst_rpt;
macid = (u8)(mst_rpt >> 8);
DBG_88E("### %s: MStatus=%x MACID=%d\n", __func__, opmode, macid);
FillH2CCmd_88E(adapt, H2C_COM_MEDIA_STATUS_RPT, sizeof(mst_rpt), (u8 *)&mst_rpt);
}
@ -263,18 +202,17 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
struct rtw_ieee80211_hdr *pwlanhdr;
__le16 *fctrl;
u32 rate_len, pktlen;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network);
u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
eth_broadcast_addr(pwlanhdr->addr1);
memcpy(pwlanhdr->addr2, myid(&adapt->eeprompriv), ETH_ALEN);
memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN);
SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/);
@ -299,9 +237,9 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
pframe += 2;
pktlen += 2;
if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) {
if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
pktlen += cur_network->IELength - sizeof(struct ndis_802_11_fixed_ie);
memcpy(pframe, cur_network->IEs+sizeof(struct ndis_802_11_fixed_ie), pktlen);
memcpy(pframe, cur_network->IEs + sizeof(struct ndis_802_11_fixed_ie), pktlen);
goto _ConstructBeacon;
}
@ -316,9 +254,9 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8) ? 8 : rate_len), cur_network->SupportedRates, &pktlen);
/* DS parameter set */
pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen);
pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&cur_network->Configuration.DSConfig, &pktlen);
if ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) {
if ((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) {
u32 ATIMWindow;
/* IBSS Parameter Set... */
ATIMWindow = 0;
@ -335,10 +273,8 @@ static void ConstructBeacon(struct adapter *adapt, u8 *pframe, u32 *pLength)
_ConstructBeacon:
if ((pktlen + TXDESC_SIZE) > 512) {
DBG_88E("beacon frame too large\n");
if ((pktlen + TXDESC_SIZE) > 512)
return;
}
*pLength = pktlen;
}
@ -346,14 +282,14 @@ _ConstructBeacon:
static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength)
{
struct rtw_ieee80211_hdr *pwlanhdr;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
__le16 *fctrl;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
/* Frame control. */
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
SetPwrMgt(fctrl);
SetFrameSubType(pframe, WIFI_PSPOLL);
@ -362,10 +298,10 @@ static void ConstructPSPoll(struct adapter *adapt, u8 *pframe, u32 *pLength)
SetDuration(pframe, (pmlmeinfo->aid | 0xc000));
/* BSSID. */
memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
/* TA. */
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&adapt->eeprompriv), ETH_ALEN);
*pLength = 16;
}
@ -383,8 +319,8 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
u32 pktlen;
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
@ -396,21 +332,21 @@ static void ConstructNullFunctionData(struct adapter *adapt, u8 *pframe,
switch (cur_network->network.InfrastructureMode) {
case Ndis802_11Infrastructure:
SetToDs(fctrl);
memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&adapt->eeprompriv), ETH_ALEN);
memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN);
break;
case Ndis802_11APMode:
SetFrDs(fctrl);
memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr3, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr2, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
memcpy(pwlanhdr->addr3, myid(&adapt->eeprompriv), ETH_ALEN);
break;
case Ndis802_11IBSS:
default:
memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&(adapt->eeprompriv)), ETH_ALEN);
memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN);
memcpy(pwlanhdr->addr2, myid(&adapt->eeprompriv), ETH_ALEN);
memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
break;
}
@ -441,16 +377,16 @@ static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u
__le16 *fctrl;
u8 *mac, *bssid;
u32 pktlen;
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct wlan_bssid_ex *cur_network = &(pmlmeinfo->network);
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
pwlanhdr = (struct rtw_ieee80211_hdr *)pframe;
mac = myid(&(adapt->eeprompriv));
mac = myid(&adapt->eeprompriv);
bssid = cur_network->MacAddress;
fctrl = &(pwlanhdr->frame_ctl);
fctrl = &pwlanhdr->frame_ctl;
*(fctrl) = 0;
memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN);
memcpy(pwlanhdr->addr2, mac, ETH_ALEN);
@ -490,7 +426,6 @@ void CheckFwRsvdPageContent(struct adapter *Adapter)
/* 2009.10.15 by tynli. */
static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
{
struct hal_data_8188e *haldata;
struct xmit_frame *pmgntframe;
struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv;
@ -504,14 +439,10 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
u32 TotalPacketLen;
struct rsvdpage_loc RsvdPageLoc;
DBG_88E("%s\n", __func__);
ReservedPagePacket = (u8 *)rtw_zmalloc(1000);
if (ReservedPagePacket == NULL) {
DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__);
ReservedPagePacket = kzalloc(1000, GFP_KERNEL);
if (!ReservedPagePacket)
return;
}
haldata = GET_HAL_DATA(adapt);
pxmitpriv = &adapt->xmitpriv;
pmlmeext = &adapt->mlmeextpriv;
pmlmeinfo = &pmlmeext->mlmext_info;
@ -530,52 +461,51 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
if (PageNeed == 1)
PageNeed += 1;
PageNum += PageNeed;
haldata->FwRsvdPageStartOffset = PageNum;
BufIndex += PageNeed*128;
BufIndex += PageNeed * 128;
/* 3 (2) ps-poll *1 page */
RsvdPageLoc.LocPsPoll = PageNum;
ConstructPSPoll(adapt, &ReservedPagePacket[BufIndex], &PSPollLength);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, true, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], PSPollLength, true, false);
PageNeed = (u8)PageNum_128(TxDescLen + PSPollLength);
PageNum += PageNeed;
BufIndex += PageNeed*128;
BufIndex += PageNeed * 128;
/* 3 (3) null data * 1 page */
RsvdPageLoc.LocNullData = PageNum;
ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex], &NullDataLength, get_my_bssid(&pmlmeinfo->network), false, 0, 0, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], NullDataLength, false, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], NullDataLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + NullDataLength);
PageNum += PageNeed;
BufIndex += PageNeed*128;
BufIndex += PageNeed * 128;
/* 3 (4) probe response * 1page */
RsvdPageLoc.LocProbeRsp = PageNum;
ConstructProbeRsp(adapt, &ReservedPagePacket[BufIndex], &ProbeRspLength, get_my_bssid(&pmlmeinfo->network), false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, false, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], ProbeRspLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + ProbeRspLength);
PageNum += PageNeed;
BufIndex += PageNeed*128;
BufIndex += PageNeed * 128;
/* 3 (5) Qos null data */
RsvdPageLoc.LocQosNull = PageNum;
ConstructNullFunctionData(adapt, &ReservedPagePacket[BufIndex],
&QosNullLength, get_my_bssid(&pmlmeinfo->network), true, 0, 0, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex-TxDescLen], QosNullLength, false, false);
rtl8188e_fill_fake_txdesc(adapt, &ReservedPagePacket[BufIndex - TxDescLen], QosNullLength, false, false);
PageNeed = (u8)PageNum_128(TxDescLen + QosNullLength);
PageNum += PageNeed;
TotalPacketLen = BufIndex + QosNullLength;
pmgntframe = alloc_mgtxmitframe(pxmitpriv);
if (pmgntframe == NULL)
if (!pmgntframe)
goto exit;
/* update attribute */
@ -586,9 +516,8 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
pattrib->pktlen = pattrib->last_txcmdsz;
memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen);
rtw_hal_mgnt_xmit(adapt, pmgntframe);
rtl8188eu_mgnt_xmit(adapt, pmgntframe);
DBG_88E("%s: Set RSVD page location to Fw\n", __func__);
FillH2CCmd_88E(adapt, H2C_COM_RSVD_PAGE, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc);
exit:
@ -597,43 +526,39 @@ exit:
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct mlme_ext_priv *pmlmeext = &(adapt->mlmeextpriv);
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct hal_data_8188e *haldata = &adapt->haldata;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
bool bSendBeacon = false;
bool bcn_valid = false;
u8 DLBcnCount = 0;
u32 poll = 0;
DBG_88E("%s mstatus(%x)\n", __func__, mstatus);
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */
rtw_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
rtw_write16(adapt, REG_BCN_PSR_RPT, (0xC000 | pmlmeinfo->aid));
/* Do not set TSF again here or vWiFi beacon DMA INT will not work. */
/* Set REG_CR bit 8. DMA beacon by SW. */
haldata->RegCR_1 |= BIT0;
rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
haldata->RegCR_1 |= BIT(0);
rtw_write8(adapt, REG_CR + 1, haldata->RegCR_1);
/* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(3)));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(4));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) & (~BIT(3)));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) | BIT(4));
if (haldata->RegFwHwTxQCtrl&BIT6) {
DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
if (haldata->RegFwHwTxQCtrl & BIT(6))
bSendBeacon = true;
}
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6)));
haldata->RegFwHwTxQCtrl &= (~BIT6);
rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl & (~BIT(6))));
haldata->RegFwHwTxQCtrl &= (~BIT(6));
/* Clear beacon valid check bit. */
rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL);
DLBcnCount = 0;
poll = 0;
do {
@ -641,20 +566,14 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
SetFwRsvdPagePkt(adapt, false);
DLBcnCount++;
do {
rtw_yield_os();
/* rtw_mdelay_os(10); */
yield();
/* mdelay(10); */
/* check rsvd page download OK. */
rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
GetHwReg8188EU(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
poll++;
} while (!bcn_valid && (poll%10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
} while (!bcn_valid && (poll % 10) != 0 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
} while (!bcn_valid && DLBcnCount <= 100 && !adapt->bSurpriseRemoved && !adapt->bDriverStopped);
if (adapt->bSurpriseRemoved || adapt->bDriverStopped)
;
else if (!bcn_valid)
DBG_88E("%s: 1 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll);
else
DBG_88E("%s: 1 Download RSVD success! DLBcnCount:%u, poll:%u\n", __func__, DLBcnCount, poll);
/* */
/* We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) */
/* because we need to free the Tx BCN Desc which is used by the first reserved page packet. */
@ -663,8 +582,8 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
/* */
/* Enable Bcn */
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(3));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(4)));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) | BIT(3));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL) & (~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
@ -672,39 +591,34 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
/* the beacon cannot be sent by HW. */
/* 2010.06.23. Added by tynli. */
if (bSendBeacon) {
rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6));
haldata->RegFwHwTxQCtrl |= BIT6;
rtw_write8(adapt, REG_FWHW_TXQ_CTRL + 2, (haldata->RegFwHwTxQCtrl | BIT(6)));
haldata->RegFwHwTxQCtrl |= BIT(6);
}
/* Update RSVD page location H2C to Fw. */
if (bcn_valid) {
rtw_hal_set_hwreg(adapt, HW_VAR_BCN_VALID, NULL);
DBG_88E("Set RSVD page location to Fw.\n");
}
if (bcn_valid)
SetHwReg8188EU(adapt, HW_VAR_BCN_VALID, NULL);
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
haldata->RegCR_1 &= (~BIT0);
rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
haldata->RegCR_1 &= (~BIT(0));
rtw_write8(adapt, REG_CR + 1, haldata->RegCR_1);
}
}
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
{
#ifdef CONFIG_88EU_P2P
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct wifidirect_info *pwdinfo = &(adapt->wdinfo);
struct hal_data_8188e *haldata = &adapt->haldata;
struct wifidirect_info *pwdinfo = &adapt->wdinfo;
struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload;
u8 i;
switch (p2p_ps_state) {
case P2P_PS_DISABLE:
DBG_88E("P2P_PS_DISABLE\n");
memset(p2p_ps_offload, 0, 1);
break;
case P2P_PS_ENABLE:
DBG_88E("P2P_PS_ENABLE\n");
/* update CTWindow value. */
if (pwdinfo->ctwindow > 0) {
p2p_ps_offload->CTWindow_En = 1;
@ -744,11 +658,9 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
}
break;
case P2P_PS_SCAN:
DBG_88E("P2P_PS_SCAN\n");
p2p_ps_offload->discovery = 1;
break;
case P2P_PS_SCAN_DONE:
DBG_88E("P2P_PS_SCAN_DONE\n");
p2p_ps_offload->discovery = 0;
pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
break;
@ -757,6 +669,4 @@ void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
}
FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
#endif
}

209
hal/rtl8188e_dm.c
View file

@ -1,39 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* */
/* Description: */
/* */
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
/* This file is for 92CE/92CU dynamic mechanism only */
/* */
/* */
/* */
#define _RTL8188E_DM_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
static void dm_CheckStatistics(struct adapter *Adapter)
{
}
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtl8188e_hal.h"
/* Initialize GPIO setting registers */
static void dm_InitGPIOSetting(struct adapter *Adapter)
@ -49,185 +22,87 @@ static void dm_InitGPIOSetting(struct adapter *Adapter)
/* */
/* functions */
/* */
static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
u8 cut_ver, fab_ver;
/* Init Value */
memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE);
if (Adapter->interface_type == RTW_GSPI)
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E);
fab_ver = ODM_TSMC;
cut_ver = ODM_CUT_A;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_FAB_VER, fab_ver);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_CUT_VER, cut_ver);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PATCH_ID, hal_data->CustomerID);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
if (hal_data->rf_type == RF_1T1R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
else if (hal_data->rf_type == RF_2T2R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
else if (hal_data->rf_type == RF_1T2R)
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
}
static void Update_ODM_ComInfo_88E(struct adapter *Adapter)
{
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv;
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
int i;
pdmpriv->InitODMFlag = ODM_BB_DIG |
ODM_BB_RA_MASK |
ODM_BB_DYNAMIC_TXPWR |
ODM_BB_FA_CNT |
ODM_BB_RSSI_MONITOR |
ODM_BB_CCK_PD |
ODM_BB_PWR_SAVE |
ODM_MAC_EDCA_TURBO |
ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
pdmpriv->InitODMFlag = ODM_BB_RSSI_MONITOR;
if (hal_data->AntDivCfg)
pdmpriv->InitODMFlag |= ODM_BB_ANT_DIV;
if (Adapter->registrypriv.mp_mode == 1) {
pdmpriv->InitODMFlag = ODM_RF_CALIBRATION |
ODM_RF_TX_PWR_TRACK;
}
dm_odm->SupportAbility = pdmpriv->InitODMFlag;
ODM_CmnInfoUpdate(dm_odm, ODM_CMNINFO_ABILITY, pdmpriv->InitODMFlag);
dm_odm->pWirelessMode = &pmlmeext->cur_wireless_mode;
dm_odm->pSecChOffset = &hal_data->nCur40MhzPrimeSC;
dm_odm->pBandWidth = &hal_data->CurrentChannelBW;
dm_odm->pChannel = &hal_data->CurrentChannel;
dm_odm->pbScanInProcess = &pmlmepriv->bScanInProcess;
dm_odm->pbPowerSaving = &pwrctrlpriv->bpower_saving;
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_TX_UNI, &(Adapter->xmitpriv.tx_bytes));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_RX_UNI, &(Adapter->recvpriv.rx_bytes));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(hal_data->nCur40MhzPrimeSC));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_MODE, &(Adapter->securitypriv.dot11PrivacyAlgrthm));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_BW, &(hal_data->CurrentChannelBW));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_CHNL, &(hal_data->CurrentChannel));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_NET_CLOSED, &(Adapter->net_closed));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_MP_MODE, &(Adapter->registrypriv.mp_mode));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_POWER_SAVING, &(pwrctrlpriv->bpower_saving));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
for (i = 0; i < NUM_STA; i++)
ODM_CmnInfoPtrArrayHook(dm_odm, ODM_CMNINFO_STA_STATUS, i, NULL);
dm_odm->pODM_StaInfo[i] = NULL;
}
void rtl8188e_InitHalDm(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *dm_odm = &(hal_data->odmpriv);
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
dm_InitGPIOSetting(Adapter);
pdmpriv->DM_Type = DM_Type_ByDriver;
pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE;
Update_ODM_ComInfo_88E(Adapter);
ODM_DMInit(dm_odm);
Adapter->fix_rate = 0xFF;
}
void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
{
bool fw_cur_in_ps = false;
bool fw_ps_awake = true;
u8 hw_init_completed = false;
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
hw_init_completed = Adapter->hw_init_completed;
u8 hw_init_completed = Adapter->hw_init_completed;
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 bLinked = false;
if (!hw_init_completed)
goto skip_dm;
return;
fw_cur_in_ps = Adapter->pwrctrlpriv.bFwCurrentInPSMode;
rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&fw_ps_awake));
/* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */
/* modifed by thomas. 2011.06.11. */
if (Adapter->wdinfo.p2p_ps_mode)
fw_ps_awake = false;
if (hw_init_completed && ((!fw_cur_in_ps) && fw_ps_awake)) {
/* Calculate Tx/Rx statistics. */
dm_CheckStatistics(Adapter);
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
/* ODM */
if (hw_init_completed) {
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 bLinked = false;
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
ODM_DMWatchdog(&hal_data->odmpriv);
}
skip_dm:
/* Check GPIO to determine current RF on/off and Pbc status. */
/* Check Hardware Radio ON/OFF or not */
return;
hal_data->odmpriv.bLinked = bLinked;
ODM_DMWatchdog(&hal_data->odmpriv);
}
void rtl8188e_init_dm_priv(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *podmpriv = &hal_data->odmpriv;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
memset(pdmpriv, 0, sizeof(struct dm_priv));
Init_ODM_ComInfo_88E(Adapter);
ODM_InitDebugSetting(podmpriv);
}
memset(dm_odm, 0, sizeof(*dm_odm));
void rtl8188e_deinit_dm_priv(struct adapter *Adapter)
{
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(hal_data->VersionID));
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_RF_ANTENNA_TYPE, hal_data->TRxAntDivType);
}
/* Add new function to reset the state of antenna diversity before link. */
/* Compare RSSI for deciding antenna */
void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct hal_data_8188e *hal_data = &Adapter->haldata;
if (0 != hal_data->AntDivCfg) {
/* select optimum_antenna for before linked =>For antenna diversity */
@ -241,10 +116,10 @@ void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, stru
/* Add new function to reset the state of antenna diversity before link. */
u8 AntDivBeforeLink8188E(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct hal_data_8188e *hal_data = &Adapter->haldata;
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
struct sw_ant_switch *dm_swat_tbl = &dm_odm->DM_SWAT_Table;
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
/* Condition that does not need to use antenna diversity. */
if (hal_data->AntDivCfg == 0)

1843
hal/rtl8188e_hal_init.c
View file

File diff suppressed because it is too large Load diff

851
hal/rtl8188e_mp.c
View file

@ -1,851 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_MP_C_
#include <drv_types.h>
#include <rtw_mp.h>
#include <rtl8188e_hal.h>
#include <rtl8188e_dm.h>
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
if (!netif_running(padapter->pnetdev)) {
RT_TRACE(_module_mp_, _drv_warning_,
("SetPowerTracking! Fail: interface not opened!\n"));
return _FAIL;
}
if (!check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE)) {
RT_TRACE(_module_mp_, _drv_warning_,
("SetPowerTracking! Fail: not in MP mode!\n"));
return _FAIL;
}
if (enable)
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
else
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false;
return _SUCCESS;
}
void Hal_GetPowerTracking(struct adapter *padapter, u8 *enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
*enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl;
}
/*-----------------------------------------------------------------------------
* Function: mpt_SwitchRfSetting
*
* Overview: Change RF Setting when we siwthc channel/rate/BW for MP.
*
* Input: struct adapter * pAdapter
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 01/08/2009 MHC Suggestion from SD3 Willis for 92S series.
* 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3.
*
*---------------------------------------------------------------------------*/
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter)
{
struct mp_priv *pmp = &pAdapter->mppriv;
/* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. */
pmp->MptCtx.backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pmp->MptCtx.backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0);
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD);
PHY_SetRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD);
return;
}
/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
void Hal_MPT_CCKTxPowerAdjust(struct adapter *Adapter, bool bInCH14)
{
u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0;
u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12;
u8 i;
/* get current cck swing value and check 0xa22 & 0xa23 later to match the table. */
CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
if (!bInCH14) {
/* Readback the current bb cck swing value and compare with the table to */
/* get the current swing index */
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) &&
(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) {
CCKSwingIndex = i;
break;
}
}
/* Write 0xa22 0xa23 */
TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8);
/* Write 0xa24 ~ 0xa27 */
TempVal2 = 0;
TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16)+
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24);
/* Write 0xa28 0xa29 */
TempVal3 = 0;
TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8);
} else {
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) &&
(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) {
CCKSwingIndex = i;
break;
}
}
/* Write 0xa22 0xa23 */
TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] +
(CCKSwingTable_Ch14[CCKSwingIndex][1]<<8);
/* Write 0xa24 ~ 0xa27 */
TempVal2 = 0;
TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] +
(CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) +
(CCKSwingTable_Ch14[CCKSwingIndex][4]<<16)+
(CCKSwingTable_Ch14[CCKSwingIndex][5]<<24);
/* Write 0xa28 0xa29 */
TempVal3 = 0;
TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] +
(CCKSwingTable_Ch14[CCKSwingIndex][7]<<8);
}
write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal);
write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2);
write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3);
}
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
s32 TempCCk;
u8 CCK_index, CCK_index_old = 0;
u8 Action = 0; /* 0: no action, 1: even->odd, 2:odd->even */
s32 i = 0;
if (!IS_92C_SERIAL(pHalData->VersionID))
return;
if (beven && !pMptCtx->bMptIndexEven) {
/* odd->even */
Action = 2;
pMptCtx->bMptIndexEven = true;
} else if (!beven && pMptCtx->bMptIndexEven) {
/* even->odd */
Action = 1;
pMptCtx->bMptIndexEven = false;
}
if (Action != 0) {
/* Query CCK default setting From 0xa24 */
TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK;
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
if (!memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4)) {
CCK_index_old = (u8)i;
break;
}
} else {
if (!memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4)) {
CCK_index_old = (u8)i;
break;
}
}
}
if (Action == 1)
CCK_index = CCK_index_old - 1;
else
CCK_index = CCK_index_old + 1;
/* Adjust CCK according to gain index */
if (!pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
} else {
rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
}
}
}
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
/*
* SetChannel
* Description
* Use H2C command to change channel,
* not only modify rf register, but also other setting need to be done.
*/
void Hal_SetChannel(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mp_priv *pmp = &pAdapter->mppriv;
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
u8 eRFPath;
u8 channel = pmp->channel;
/* set RF channel register */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
_write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel);
Hal_mpt_SwitchRfSetting(pAdapter);
SelectChannel(pAdapter, channel);
if (pHalData->CurrentChannel == 14 && !pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
pDM_Odm->RFCalibrateInfo.bCCKinCH14 = true;
Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14);
} else if (pHalData->CurrentChannel != 14 && pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
pDM_Odm->RFCalibrateInfo.bCCKinCH14 = false;
Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14);
}
}
/*
* Notice
* Switch bandwitdth may change center frequency(channel)
*/
void Hal_SetBandwidth(struct adapter *pAdapter)
{
struct mp_priv *pmp = &pAdapter->mppriv;
SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset);
Hal_mpt_SwitchRfSetting(pAdapter);
}
void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 *TxPower)
{
u32 tmpval = 0;
/* rf-A cck tx power */
write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]);
tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A];
write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]);
tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B];
write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
RT_TRACE(_module_mp_, _drv_notice_,
("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n",
TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
}
void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 *TxPower)
{
u32 TxAGC = 0;
u8 tmpval = 0;
/* HT Tx-rf(A) */
tmpval = TxPower[RF_PATH_A];
TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
/* HT Tx-rf(B) */
tmpval = TxPower[RF_PATH_B];
TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
}
void Hal_SetAntennaPathPower(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
u8 TxPowerLevel[RF_PATH_MAX];
u8 rfPath;
TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
switch (pHalData->rf_chip) {
case RF_8225:
case RF_8256:
case RF_6052:
Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */
Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
break;
default:
break;
}
}
void Hal_SetTxPower(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
u8 TxPower = pAdapter->mppriv.txpoweridx;
u8 TxPowerLevel[RF_PATH_MAX];
u8 rf, rfPath;
for (rf = 0; rf < RF_PATH_MAX; rf++)
TxPowerLevel[rf] = TxPower;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
switch (pHalData->rf_chip) {
/* 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! */
/* We should call normal driver API later!! */
case RF_8225:
case RF_8256:
case RF_6052:
Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */
Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
break;
default:
break;
}
}
void Hal_SetDataRate(struct adapter *pAdapter)
{
Hal_mpt_SwitchRfSetting(pAdapter);
}
void Hal_SetAntenna(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct ant_sel_ofdm *p_ofdm_tx; /* OFDM Tx register */
struct ant_sel_cck *p_cck_txrx;
u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0;
u8 chgTx = 0, chgRx = 0;
u32 r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0;
p_ofdm_tx = (struct ant_sel_ofdm *)&r_ant_select_ofdm_val;
p_cck_txrx = (struct ant_sel_cck *)&r_ant_select_cck_val;
p_ofdm_tx->r_ant_ht1 = 0x1;
p_ofdm_tx->r_ant_ht2 = 0x2; /* Second TX RF path is A */
p_ofdm_tx->r_ant_non_ht = 0x3; /* 0x1+0x2=0x3 */
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
p_ofdm_tx->r_tx_antenna = 0x1;
r_ofdm_tx_en_val = 0x1;
p_ofdm_tx->r_ant_l = 0x1;
p_ofdm_tx->r_ant_ht_s1 = 0x1;
p_ofdm_tx->r_ant_non_ht_s1 = 0x1;
p_cck_txrx->r_ccktx_enable = 0x8;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF A=TX and B as standby */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1);
r_ofdm_tx_en_val = 0x3;
/* Power save */
/* We need to close RFB by SW control */
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0);
}
break;
case ANTENNA_B:
p_ofdm_tx->r_tx_antenna = 0x2;
r_ofdm_tx_en_val = 0x2;
p_ofdm_tx->r_ant_l = 0x2;
p_ofdm_tx->r_ant_ht_s1 = 0x2;
p_ofdm_tx->r_ant_non_ht_s1 = 0x2;
p_cck_txrx->r_ccktx_enable = 0x4;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF A as standby */
PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
/* Power save */
/* cosa r_ant_select_ofdm_val = 0x22222222; */
/* 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. */
/* 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control */
if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
}
break;
case ANTENNA_AB: /* For 8192S */
p_ofdm_tx->r_tx_antenna = 0x3;
r_ofdm_tx_en_val = 0x3;
p_ofdm_tx->r_ant_l = 0x3;
p_ofdm_tx->r_ant_ht_s1 = 0x3;
p_ofdm_tx->r_ant_non_ht_s1 = 0x3;
p_cck_txrx->r_ccktx_enable = 0xC;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF B as standby */
PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
/* Disable Power save */
/* cosa r_ant_select_ofdm_val = 0x3321333; */
/* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control */
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
}
break;
default:
break;
}
/* r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D */
/* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */
/* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */
switch (pAdapter->mppriv.antenna_rx) {
case ANTENNA_A:
r_rx_antenna_ofdm = 0x1; /* A */
p_cck_txrx->r_cckrx_enable = 0x0; /* default: A */
p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A */
chgRx = 1;
break;
case ANTENNA_B:
r_rx_antenna_ofdm = 0x2; /* B */
p_cck_txrx->r_cckrx_enable = 0x1; /* default: B */
p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option: B */
chgRx = 1;
break;
case ANTENNA_AB:
r_rx_antenna_ofdm = 0x3; /* AB */
p_cck_txrx->r_cckrx_enable = 0x0; /* default:A */
p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option:B */
chgRx = 1;
break;
default:
break;
}
if (chgTx && chgRx) {
switch (pHalData->rf_chip) {
case RF_8225:
case RF_8256:
case RF_6052:
/* r_ant_sel_cck_val = r_ant_select_cck_val; */
PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /* OFDM Tx */
PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /* OFDM Tx */
PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */
PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */
PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val); /* CCK TxRx */
break;
default:
break;
}
}
RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n"));
}
s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (!netif_running(pAdapter->pnetdev)) {
RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n"));
return _FAIL;
}
if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == false) {
RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n"));
return _FAIL;
}
target_ther &= 0xff;
if (target_ther < 0x07)
target_ther = 0x07;
else if (target_ther > 0x1d)
target_ther = 0x1d;
pHalData->EEPROMThermalMeter = target_ther;
return _SUCCESS;
}
void Hal_TriggerRFThermalMeter(struct adapter *pAdapter)
{
_write_rfreg(pAdapter, RF_PATH_A , RF_T_METER_88E , BIT17 | BIT16 , 0x03);
}
u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter)
{
u32 ThermalValue = 0;
ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER_88E, 0xfc00);
return (u8)ThermalValue;
}
void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value)
{
Hal_TriggerRFThermalMeter(pAdapter);
rtw_msleep_os(1000);
*value = Hal_ReadRFThermalMeter(pAdapter);
}
void Hal_SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bSingleCarrier = bStart;
if (bStart) {
/* Start Single Carrier. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test start\n"));
/* 1. if OFDM block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */
/* 2. set CCK test mode off, set to CCK normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
/* 3. turn on scramble setting */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
/* 4. Turn On Single Carrier Tx and turn off the other test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Single Carrier. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test stop\n"));
/* Turn off all test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
rtw_msleep_os(10);
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
u8 rfPath;
u32 reg58 = 0x0;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
pAdapter->mppriv.MptCtx.bSingleTone = bStart;
if (bStart) {
/* Start Single Tone. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleToneTx: test start\n"));
/* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */
if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask);
reg58 &= 0xFFFFFFF0;
reg58 += 2;
PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58);
}
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0);
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0);
if (is92C) {
_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01);
rtw_usleep_os(100);
if (rfPath == RF_PATH_A)
write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); /* PAD all on. */
else if (rfPath == RF_PATH_B)
write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); /* PAD all on. */
write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */
rtw_usleep_os(100);
} else {
write_rfreg(pAdapter, rfPath, 0x21, 0xd4000);
rtw_usleep_os(100);
write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */
rtw_usleep_os(100);
}
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Single Tone. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleToneTx: test stop\n"));
/* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */
/* <20120326, Kordan> Only in single tone mode. (asked by Edlu) */
if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask);
reg58 &= 0xFFFFFFF0;
PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58);
}
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1);
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
if (is92C) {
_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00);
rtw_usleep_os(100);
write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); /* PAD all on. */
write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); /* PAD all on. */
rtw_usleep_os(100);
} else {
write_rfreg(pAdapter, rfPath, 0x21, 0x54000);
rtw_usleep_os(100);
write_rfreg(pAdapter, rfPath, 0x00, 0x30000); /* PAD all on. */
rtw_usleep_os(100);
}
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart;
if (bStart) {
/* Start Carrier Suppression. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test start\n"));
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) {
/* 1. if CCK block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */
/* Turn Off All Test Mode */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /* turn off scramble setting */
/* Set CCK Tx Test Rate */
write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /* Set FTxRate to 1Mbps */
}
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Carrier Suppression. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test stop\n"));
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) {
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /* turn on scramble setting */
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
}
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart)
{
u32 cckrate;
if (bStart) {
RT_TRACE(_module_mp_, _drv_alert_,
("SetCCKContinuousTx: test start\n"));
/* 1. if CCK block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */
/* Turn Off All Test Mode */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* Set CCK Tx Test Rate */
cckrate = pAdapter->mppriv.rateidx;
write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
RT_TRACE(_module_mp_, _drv_info_,
("SetCCKContinuousTx: test stop\n"));
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
pAdapter->mppriv.MptCtx.bCckContTx = bStart;
pAdapter->mppriv.MptCtx.bOfdmContTx = false;
} /* mpt_StartCckContTx */
void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart)
{
if (bStart) {
RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));
/* 1. if OFDM block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */
/* 2. set CCK test mode off, set to CCK normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
/* 3. turn on scramble setting */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
/* 4. Turn On Continue Tx and turn off the other test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test stop\n"));
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* Delay 10 ms */
rtw_msleep_os(10);
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
pAdapter->mppriv.MptCtx.bCckContTx = false;
pAdapter->mppriv.MptCtx.bOfdmContTx = bStart;
} /* mpt_StartOfdmContTx */
void Hal_SetContinuousTx(struct adapter *pAdapter, u8 bStart)
{
RT_TRACE(_module_mp_, _drv_info_,
("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx));
pAdapter->mppriv.MptCtx.bStartContTx = bStart;
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
Hal_SetCCKContinuousTx(pAdapter, bStart);
else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) &&
(pAdapter->mppriv.rateidx <= MPT_RATE_MCS15))
Hal_SetOFDMContinuousTx(pAdapter, bStart);
}

614
hal/rtl8188e_phycfg.c
View file

@ -1,48 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188E_PHYCFG_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_iol.h>
#include <rtl8188e_hal.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtw_iol.h"
#include "../include/rtl8188e_hal.h"
/*---------------------------Define Local Constant---------------------------*/
/* Channel switch:The size of command tables for switch channel*/
#define MAX_PRECMD_CNT 16
#define MAX_RFDEPENDCMD_CNT 16
#define MAX_POSTCMD_CNT 16
#define MAX_DOZE_WAITING_TIMES_9x 64
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*--------------------Define export function prototype-----------------------*/
/* Please refer to header file */
/*--------------------Define export function prototype-----------------------*/
/*----------------------------Function Body----------------------------------*/
/* */
/* 1. BB register R/W API */
/* */
@ -63,7 +28,7 @@ static u32 phy_CalculateBitShift(u32 BitMask)
u32 i;
for (i = 0; i <= 31; i++) {
if (((BitMask>>i) & 0x1) == 1)
if (((BitMask >> i) & 0x1) == 1)
break;
}
return i;
@ -139,7 +104,6 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3
*
* Input:
* struct adapter *Adapter,
* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 Offset, The target address to be read
*
* Output: None
@ -154,13 +118,12 @@ void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u3
static u32
phy_RFSerialRead(
struct adapter *Adapter,
enum rf_radio_path eRFPath,
u32 Offset
)
{
u32 retValue = 0;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];
struct hal_data_8188e *pHalData = &Adapter->haldata;
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef;
u32 NewOffset;
u32 tmplong, tmplong2;
u8 RfPiEnable = 0;
@ -177,31 +140,25 @@ phy_RFSerialRead(
/* For 92S LSSI Read RFLSSIRead */
/* For RF A/B write 0x824/82c(does not work in the future) */
/* We must use 0x824 for RF A and B to execute read trigger */
tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
if (eRFPath == RF_PATH_A)
tmplong2 = tmplong;
else
tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord);
tmplong = rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
tmplong2 = tmplong;
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; /* T65 RF */
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge));
rtw_udelay_os(10);/* PlatformStallExecution(10); */
rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong & (~bLSSIReadEdge));
udelay(10);/* PlatformStallExecution(10); */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
rtw_udelay_os(100);/* PlatformStallExecution(100); */
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
udelay(100);/* PlatformStallExecution(100); */
rtw_udelay_os(10);/* PlatformStallExecution(10); */
udelay(10);/* PlatformStallExecution(10); */
if (eRFPath == RF_PATH_A)
RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8);
else if (eRFPath == RF_PATH_B)
RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8);
RfPiEnable = (u8)rtl8188e_PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT(8));
if (RfPiEnable) { /* Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF */
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData);
} else { /* Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF */
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
retValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData);
}
return retValue;
}
@ -252,14 +209,13 @@ phy_RFSerialRead(
static void
phy_RFSerialWrite(
struct adapter *Adapter,
enum rf_radio_path eRFPath,
u32 Offset,
u32 Data
)
{
u32 DataAndAddr = 0;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef[eRFPath];
struct hal_data_8188e *pHalData = &Adapter->haldata;
struct bb_reg_def *pPhyReg = &pHalData->PHYRegDef;
u32 NewOffset;
/* 2009/06/17 MH We can not execute IO for power save or other accident mode. */
@ -274,12 +230,12 @@ phy_RFSerialWrite(
/* */
/* Put write addr in [5:0] and write data in [31:16] */
/* */
DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; /* T65 RF */
DataAndAddr = ((NewOffset << 20) | (Data & 0x000fffff)) & 0x0fffffff; /* T65 RF */
/* */
/* Write Operation */
/* */
PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
}
/**
@ -289,7 +245,6 @@ phy_RFSerialWrite(
*
* Input:
* struct adapter *Adapter,
* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 RegAddr, The target address to be read
* u32 BitMask The target bit position in the target address
* to be read
@ -298,12 +253,11 @@ phy_RFSerialWrite(
* Return: u32 Readback value
* Note: This function is equal to "GetRFRegSetting" in PHY programming guide
*/
u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask)
u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
{
u32 Original_Value, Readback_Value, BitShift;
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
Original_Value = phy_RFSerialRead(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Readback_Value = (Original_Value & BitMask) >> BitShift;
@ -317,7 +271,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
*
* Input:
* struct adapter *Adapter,
* enum rf_radio_path eRFPath, Radio path of A/B/C/D
* u32 RegAddr, The target address to be modified
* u32 BitMask The target bit position in the target address
* to be modified
@ -331,7 +284,6 @@ u32 rtl8188e_PHY_QueryRFReg(struct adapter *Adapter, enum rf_radio_path eRFPath,
void
rtl8188e_PHY_SetRFReg(
struct adapter *Adapter,
enum rf_radio_path eRFPath,
u32 RegAddr,
u32 BitMask,
u32 Data
@ -341,12 +293,12 @@ rtl8188e_PHY_SetRFReg(
/* RF data is 12 bits only */
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
Original_Value = phy_RFSerialRead(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
}
phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
phy_RFSerialWrite(Adapter, RegAddr, Data);
}
/* */
@ -371,13 +323,13 @@ rtl8188e_PHY_SetRFReg(
*---------------------------------------------------------------------------*/
s32 PHY_MACConfig8188E(struct adapter *Adapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
int rtStatus = _SUCCESS;
/* */
/* Config MAC */
/* */
if (HAL_STATUS_FAILURE == ODM_ConfigMACWithHeaderFile(&pHalData->odmpriv))
if (HAL_STATUS_FAILURE == ODM_ReadAndConfig_MAC_REG_8188E(&pHalData->odmpriv))
rtStatus = _FAIL;
/* 2010.07.13 AMPDU aggregation number B */
@ -403,108 +355,66 @@ phy_InitBBRFRegisterDefinition(
struct adapter *Adapter
)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
/* RF Interface Sowrtware Control */
pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) */
pHalData->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 LSBs if read 32-bit from 0x874 */
pHalData->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;/* 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) */
pHalData->PHYRegDef.rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
/* RF Interface Readback Value */
pHalData->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */
pHalData->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) */
pHalData->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 LSBs if read 32-bit from 0x8E4 */
pHalData->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;/* 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) */
pHalData->PHYRegDef.rfintfi = rFPGA0_XAB_RFInterfaceRB; /* 16 LSBs if read 32-bit from 0x8E0 */
/* RF Interface Output (and Enable) */
pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x864 */
pHalData->PHYRegDef.rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
/* RF Interface (Output and) Enable */
pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) */
pHalData->PHYRegDef.rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
/* Addr of LSSI. Wirte RF register by driver */
pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
pHalData->PHYRegDef.rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
/* RF parameter */
pHalData->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */
pHalData->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
pHalData->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
pHalData->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
pHalData->PHYRegDef.rfLSSI_Select = rFPGA0_XAB_RFParameter; /* BB Band Select */
/* Tx AGC Gain Stage (same for all path. Should we remove this?) */
pHalData->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
pHalData->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
pHalData->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
pHalData->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
pHalData->PHYRegDef.rfTxGainStage = rFPGA0_TxGainStage; /* Tx gain stage */
/* Tranceiver A~D HSSI Parameter-1 */
pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */
pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; /* wire control parameter1 */
pHalData->PHYRegDef.rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; /* wire control parameter1 */
/* Tranceiver A~D HSSI Parameter-2 */
pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */
pHalData->PHYRegDef.rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
/* RF switch Control */
pHalData->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */
pHalData->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
pHalData->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
pHalData->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
pHalData->PHYRegDef.rfSwitchControl = rFPGA0_XAB_SwitchControl; /* TR/Ant switch control */
/* AGC control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
pHalData->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
pHalData->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
pHalData->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
pHalData->PHYRegDef.rfAGCControl1 = rOFDM0_XAAGCCore1;
/* AGC control 2 */
pHalData->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
pHalData->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
pHalData->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
pHalData->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
pHalData->PHYRegDef.rfAGCControl2 = rOFDM0_XAAGCCore2;
/* RX AFE control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
pHalData->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
pHalData->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
pHalData->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;
pHalData->PHYRegDef.rfRxIQImbalance = rOFDM0_XARxIQImbalance;
/* RX AFE control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
pHalData->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
pHalData->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
pHalData->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;
pHalData->PHYRegDef.rfRxAFE = rOFDM0_XARxAFE;
/* Tx AFE control 1 */
pHalData->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
pHalData->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
pHalData->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
pHalData->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;
pHalData->PHYRegDef.rfTxIQImbalance = rOFDM0_XATxIQImbalance;
/* Tx AFE control 2 */
pHalData->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
pHalData->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
pHalData->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
pHalData->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;
pHalData->PHYRegDef.rfTxAFE = rOFDM0_XATxAFE;
/* Tranceiver LSSI Readback SI mode */
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
pHalData->PHYRegDef.rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
/* Tranceiver LSSI Readback PI mode */
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
pHalData->PHYRegDef.rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
}
void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMask, u32 Data)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
if (RegAddr == rTxAGC_A_Rate18_06)
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data;
@ -522,8 +432,7 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data;
if (RegAddr == rTxAGC_A_Mcs15_Mcs12) {
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data;
if (pHalData->rf_type == RF_1T1R)
pHalData->pwrGroupCnt++;
pHalData->pwrGroupCnt++;
}
if (RegAddr == rTxAGC_B_Rate18_06)
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data;
@ -539,49 +448,33 @@ void storePwrIndexDiffRateOffset(struct adapter *Adapter, u32 RegAddr, u32 BitMa
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data;
if (RegAddr == rTxAGC_B_Mcs11_Mcs08)
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data;
if (RegAddr == rTxAGC_B_Mcs15_Mcs12) {
if (RegAddr == rTxAGC_B_Mcs15_Mcs12)
pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data;
if (pHalData->rf_type != RF_1T1R)
pHalData->pwrGroupCnt++;
}
}
static int phy_BB8188E_Config_ParaFile(struct adapter *Adapter)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter);
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
struct eeprom_priv *pEEPROM = &Adapter->eeprompriv;
struct hal_data_8188e *pHalData = &Adapter->haldata;
/* */
/* 1. Read PHY_REG.TXT BB INIT!! */
/* We will separate as 88C / 92C according to chip version */
/* */
if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG))
rtStatus = _FAIL;
if (rtStatus != _SUCCESS)
goto phy_BB8190_Config_ParaFile_Fail;
if (HAL_STATUS_FAILURE == ODM_ReadAndConfig_PHY_REG_1T_8188E(&pHalData->odmpriv))
return _FAIL;
/* 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */
if (!pEEPROM->bautoload_fail_flag) {
pHalData->pwrGroupCnt = 0;
if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG))
rtStatus = _FAIL;
ODM_ReadAndConfig_PHY_REG_PG_8188E(&pHalData->odmpriv);
}
if (rtStatus != _SUCCESS)
goto phy_BB8190_Config_ParaFile_Fail;
/* 3. BB AGC table Initialization */
if (HAL_STATUS_FAILURE == ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_AGC_TAB))
rtStatus = _FAIL;
if (HAL_STATUS_FAILURE == ODM_ReadAndConfig_AGC_TAB_1T_8188E(&pHalData->odmpriv))
return _FAIL;
if (rtStatus != _SUCCESS)
goto phy_BB8190_Config_ParaFile_Fail;
phy_BB8190_Config_ParaFile_Fail:
return rtStatus;
return _SUCCESS;
}
int
@ -590,7 +483,7 @@ PHY_BBConfig8188E(
)
{
int rtStatus = _SUCCESS;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
u32 RegVal;
u8 CrystalCap;
@ -598,11 +491,11 @@ PHY_BBConfig8188E(
/* Enable BB and RF */
RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN);
rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1));
rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal | BIT(13) | BIT(0) | BIT(1)));
/* 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. */
rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
rtw_write8(Adapter, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
@ -611,7 +504,7 @@ PHY_BBConfig8188E(
/* write 0x24[16:11] = 0x24[22:17] = CrystalCap */
CrystalCap = pHalData->CrystalCap & 0x3F;
PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6)));
rtl8188e_PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, 0x7ff800, (CrystalCap | (CrystalCap << 6)));
return rtStatus;
}
@ -625,251 +518,23 @@ int PHY_RFConfig8188E(struct adapter *Adapter)
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: PHY_ConfigRFWithParaFile()
*
* Overview: This function read RF parameters from general file format, and do RF 3-wire
*
* Input: struct adapter *Adapter
* ps8 pFileName
* enum rf_radio_path eRFPath
*
* Output: NONE
*
* Return: RT_STATUS_SUCCESS: configuration file exist
*
* Note: Delay may be required for RF configuration
*---------------------------------------------------------------------------*/
int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *Adapter, u8 *pFileName, enum rf_radio_path eRFPath)
{
return _SUCCESS;
}
void
rtl8192c_PHY_GetHWRegOriginalValue(
struct adapter *Adapter
)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
/* read rx initial gain */
pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0);
pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0);
pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0);
pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0);
/* read framesync */
pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0);
pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord);
}
/* */
/* Description: */
/* Map dBm into Tx power index according to */
/* current HW model, for example, RF and PA, and */
/* current wireless mode. */
/* By Bruce, 2008-01-29. */
/* */
static u8 phy_DbmToTxPwrIdx(struct adapter *Adapter, enum wireless_mode WirelessMode, int PowerInDbm)
{
u8 TxPwrIdx = 0;
int Offset = 0;
/* */
/* Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to */
/* 3dbm, and OFDM HT equals to 0dbm respectively. */
/* Note: */
/* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */
/* By Bruce, 2008-01-29. */
/* */
switch (WirelessMode) {
case WIRELESS_MODE_B:
Offset = -7;
break;
case WIRELESS_MODE_G:
case WIRELESS_MODE_N_24G:
default:
Offset = -8;
break;
}
if ((PowerInDbm - Offset) > 0)
TxPwrIdx = (u8)((PowerInDbm - Offset) * 2);
else
TxPwrIdx = 0;
/* Tx Power Index is too large. */
if (TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S)
TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S;
return TxPwrIdx;
}
/* */
/* Description: */
/* Map Tx power index into dBm according to */
/* current HW model, for example, RF and PA, and */
/* current wireless mode. */
/* By Bruce, 2008-01-29. */
/* */
static int phy_TxPwrIdxToDbm(struct adapter *Adapter, enum wireless_mode WirelessMode, u8 TxPwrIdx)
{
int Offset = 0;
int PwrOutDbm = 0;
/* */
/* Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. */
/* Note: */
/* The mapping may be different by different NICs. Do not use this formula for what needs accurate result. */
/* By Bruce, 2008-01-29. */
/* */
switch (WirelessMode) {
case WIRELESS_MODE_B:
Offset = -7;
break;
case WIRELESS_MODE_G:
case WIRELESS_MODE_N_24G:
default:
Offset = -8;
break;
}
PwrOutDbm = TxPwrIdx / 2 + Offset; /* Discard the decimal part. */
return PwrOutDbm;
}
/*-----------------------------------------------------------------------------
* Function: GetTxPowerLevel8190()
*
* Overview: This function is export to "common" moudule
*
* Input: struct adapter *Adapter
* psByte Power Level
*
* Output: NONE
*
* Return: NONE
*
*---------------------------------------------------------------------------*/
void PHY_GetTxPowerLevel8188E(struct adapter *Adapter, u32 *powerlevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u8 TxPwrLevel = 0;
int TxPwrDbm;
/* */
/* Because the Tx power indexes are different, we report the maximum of them to */
/* meet the CCX TPC request. By Bruce, 2008-01-31. */
/* */
/* CCK */
TxPwrLevel = pHalData->CurrentCckTxPwrIdx;
TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel);
/* Legacy OFDM */
TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff;
/* Compare with Legacy OFDM Tx power. */
if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm)
TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel);
/* HT OFDM */
TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx;
/* Compare with HT OFDM Tx power. */
if (phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm)
TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel);
*powerlevel = TxPwrDbm;
}
static void getTxPowerIndex88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel,
u8 *ofdmPowerLevel, u8 *BW20PowerLevel,
u8 *BW40PowerLevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
u8 index = (channel - 1);
u8 TxCount = 0, path_nums;
if ((RF_1T2R == pHalData->rf_type) || (RF_1T1R == pHalData->rf_type))
path_nums = 1;
else
path_nums = 2;
for (TxCount = 0; TxCount < path_nums; TxCount++) {
if (TxCount == RF_PATH_A) {
/* 1. CCK */
cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index];
/* 2. OFDM */
ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->OFDM_24G_Diff[TxCount][RF_PATH_A];
/* 1. BW20 */
BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[TxCount][RF_PATH_A];
/* 2. BW40 */
BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_B) {
/* 1. CCK */
cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index];
/* 2. OFDM */
ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[TxCount][index];
/* 1. BW20 */
BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[TxCount][RF_PATH_A]+
pHalData->BW20_24G_Diff[TxCount][index];
/* 2. BW40 */
BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_C) {
/* 1. CCK */
cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index];
/* 2. OFDM */
ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_B][index]+
pHalData->BW20_24G_Diff[TxCount][index];
/* 1. BW20 */
BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_B][index]+
pHalData->BW20_24G_Diff[TxCount][index];
/* 2. BW40 */
BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index];
} else if (TxCount == RF_PATH_D) {
/* 1. CCK */
cckPowerLevel[TxCount] = pHalData->Index24G_CCK_Base[TxCount][index];
/* 2. OFDM */
ofdmPowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_B][index]+
pHalData->BW20_24G_Diff[RF_PATH_C][index]+
pHalData->BW20_24G_Diff[TxCount][index];
/* 1. BW20 */
BW20PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_A][index]+
pHalData->BW20_24G_Diff[RF_PATH_B][index]+
pHalData->BW20_24G_Diff[RF_PATH_C][index]+
pHalData->BW20_24G_Diff[TxCount][index];
/* 2. BW40 */
BW40PowerLevel[TxCount] = pHalData->Index24G_BW40_Base[TxCount][index];
}
}
}
static void phy_PowerIndexCheck88E(struct adapter *Adapter, u8 channel, u8 *cckPowerLevel,
u8 *ofdmPowerLevel, u8 *BW20PowerLevel, u8 *BW40PowerLevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0];
pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0];
pHalData->CurrentBW2024GTxPwrIdx = BW20PowerLevel[0];
pHalData->CurrentBW4024GTxPwrIdx = BW40PowerLevel[0];
/* 1. CCK */
cckPowerLevel[RF_PATH_A] = pHalData->Index24G_CCK_Base[index];
/* 2. OFDM */
ofdmPowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index] +
pHalData->OFDM_24G_Diff[RF_PATH_A];
/* 1. BW20 */
BW20PowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index] +
pHalData->BW20_24G_Diff[RF_PATH_A];
/* 2. BW40 */
BW40PowerLevel[RF_PATH_A] = pHalData->Index24G_BW40_Base[index];
}
/*-----------------------------------------------------------------------------
@ -902,57 +567,10 @@ PHY_SetTxPowerLevel8188E(
getTxPowerIndex88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]);
phy_PowerIndexCheck88E(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0]);
rtl8188e_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], &BW20PowerLevel[0], &BW40PowerLevel[0], channel);
}
/* */
/* Description: */
/* Update transmit power level of all channel supported. */
/* */
/* TODO: */
/* A mode. */
/* By Bruce, 2008-02-04. */
/* */
bool
PHY_UpdateTxPowerDbm8188E(
struct adapter *Adapter,
int powerInDbm
)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u8 idx;
u8 rf_path;
/* TODO: A mode Tx power. */
u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm);
u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm);
if (OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0)
OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff;
else
OfdmTxPwrIdx = 0;
for (idx = 0; idx < 14; idx++) {
for (rf_path = 0; rf_path < 2; rf_path++) {
pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx;
pHalData->TxPwrLevelHT40_1S[rf_path][idx] =
pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx;
}
}
return true;
}
void
PHY_ScanOperationBackup8188E(
struct adapter *Adapter,
u8 Operation
)
{
}
/*-----------------------------------------------------------------------------
* Function: PHY_SetBWModeCallback8192C()
*
@ -973,17 +591,10 @@ _PHY_SetBWMode92C(
struct adapter *Adapter
)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
u8 regBwOpMode;
u8 regRRSR_RSC;
if (pHalData->rf_chip == RF_PSEUDO_11N)
return;
/* There is no 40MHz mode in RF_8225. */
if (pHalData->rf_chip == RF_8225)
return;
if (Adapter->bDriverStopped)
return;
@ -992,7 +603,7 @@ _PHY_SetBWMode92C(
/* 3 */
regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE);
regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2);
regRRSR_RSC = rtw_read8(Adapter, REG_RRSR + 2);
switch (pHalData->CurrentChannelBW) {
case HT_CHANNEL_WIDTH_20:
@ -1004,8 +615,8 @@ _PHY_SetBWMode92C(
regBwOpMode &= ~BW_OPMODE_20MHZ;
/* 2007/02/07 Mark by Emily because we have not verify whether this register works */
rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode);
regRRSR_RSC = (regRRSR_RSC&0x90) | (pHalData->nCur40MhzPrimeSC<<5);
rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC);
regRRSR_RSC = (regRRSR_RSC & 0x90) | (pHalData->nCur40MhzPrimeSC << 5);
rtw_write8(Adapter, REG_RRSR + 2, regRRSR_RSC);
break;
default:
break;
@ -1017,17 +628,17 @@ _PHY_SetBWMode92C(
switch (pHalData->CurrentChannelBW) {
/* 20 MHz channel*/
case HT_CHANNEL_WIDTH_20:
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0);
rtl8188e_PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0);
break;
/* 40 MHz channel*/
case HT_CHANNEL_WIDTH_40:
PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
rtl8188e_PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1);
rtl8188e_PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1);
/* Set Control channel to upper or lower. These settings are required only for 40MHz */
PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1));
PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
PHY_SetBBReg(Adapter, 0x818, (BIT26 | BIT27),
rtl8188e_PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC >> 1));
rtl8188e_PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC);
rtl8188e_PHY_SetBBReg(Adapter, 0x818, (BIT(26) | BIT(27)),
(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
break;
default:
@ -1035,24 +646,7 @@ _PHY_SetBWMode92C(
}
/* Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 */
/* 3<3>Set RF related register */
switch (pHalData->rf_chip) {
case RF_8225:
break;
case RF_8256:
/* Please implement this function in Hal8190PciPhy8256.c */
break;
case RF_8258:
/* Please implement this function in Hal8190PciPhy8258.c */
break;
case RF_PSEUDO_11N:
break;
case RF_6052:
rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW);
break;
default:
break;
}
rtl8188e_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW);
}
/*-----------------------------------------------------------------------------
@ -1072,7 +666,7 @@ _PHY_SetBWMode92C(
void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth, /* 20M or 40M */
unsigned char Offset) /* Upper, Lower, or Don't care */
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
enum ht_channel_width tmpBW = pHalData->CurrentChannelBW;
pHalData->CurrentChannelBW = Bandwidth;
@ -1087,12 +681,8 @@ void PHY_SetBWMode8188E(struct adapter *Adapter, enum ht_channel_width Bandwidth
static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
{
u8 eRFPath;
u32 param1, param2;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
if (Adapter->bNotifyChannelChange)
DBG_88E("[%s] ch = %d\n", __func__, channel);
struct hal_data_8188e *pHalData = &Adapter->haldata;
/* s1. pre common command - CmdID_SetTxPowerLevel */
PHY_SetTxPowerLevel8188E(Adapter, channel);
@ -1100,36 +690,20 @@ static void _PHY_SwChnl8192C(struct adapter *Adapter, u8 channel)
/* s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel */
param1 = RF_CHNLBW;
param2 = channel;
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2);
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]);
}
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffffc00) | param2);
rtl8188e_PHY_SetRFReg(Adapter, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal);
}
void PHY_SwChnl8188E(struct adapter *Adapter, u8 channel)
{
/* Call after initialization */
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u8 tmpchannel = pHalData->CurrentChannel;
bool bResult = true;
if (pHalData->rf_chip == RF_PSEUDO_11N)
return; /* return immediately if it is peudo-phy */
struct hal_data_8188e *pHalData = &Adapter->haldata;
if (channel == 0)
channel = 1;
pHalData->CurrentChannel = channel;
if ((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) {
pHalData->CurrentChannel = channel;
_PHY_SwChnl8192C(Adapter, channel);
if (bResult)
;
else
pHalData->CurrentChannel = tmpchannel;
} else {
pHalData->CurrentChannel = tmpchannel;
}
}

342
hal/rtl8188e_rf6052.c
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
/******************************************************************************
*
*
@ -41,53 +25,9 @@
#define _RTL8188E_RF6052_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
/*---------------------------Define Local Constant---------------------------*/
/* Define local structure for debug!!!!! */
struct rf_shadow {
/* Shadow register value */
u32 Value;
/* Compare or not flag */
u8 Compare;
/* Record If it had ever modified unpredicted */
u8 ErrorOrNot;
/* Recorver Flag */
u8 Recorver;
/* */
u8 Driver_Write;
};
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*-----------------------------------------------------------------------------
* Function: RF_ChangeTxPath
*
* Overview: For RL6052, we must change some RF settign for 1T or 2T.
*
* Input: u16 DataRate 0x80-8f, 0x90-9f
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 09/25/2008 MHC Create Version 0.
* Firmwaer support the utility later.
*
*---------------------------------------------------------------------------*/
void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate)
{
/* We do not support gain table change inACUT now !!!! Delete later !!! */
} /* RF_ChangeTxPath */
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtl8188e_hal.h"
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetBandwidth()
@ -106,16 +46,16 @@ void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate)
void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
enum ht_channel_width Bandwidth)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
switch (Bandwidth) {
case HT_CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10) | BIT(11));
rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
break;
case HT_CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10));
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
pHalData->RfRegChnlVal = ((pHalData->RfRegChnlVal & 0xfffff3ff) | BIT(10));
rtl8188e_PHY_SetRFReg(Adapter, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal);
break;
default:
break;
@ -144,66 +84,40 @@ rtl8188e_PHY_RF6052SetCckTxPower(
struct adapter *Adapter,
u8 *pPowerlevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct hal_data_8188e *pHalData = &Adapter->haldata;
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
bool TurboScanOff = false;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
/* FOR CE ,must disable turbo scan */
TurboScanOff = true;
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
TxAGC[RF_PATH_A] = 0x3f3f3f3f;
TxAGC[RF_PATH_B] = 0x3f3f3f3f;
TurboScanOff = true;/* disable turbo scan */
if (TurboScanOff) {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
/* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */
if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
TxAGC[idx1] = 0x20;
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) |
(pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24);
}
} else {
/* Driver dynamic Tx power shall not affect Tx power.
* It shall be determined by power training mechanism.
i * Currently, we cannot fully disable driver dynamic
* tx power mechanism because it is referenced by BT
* coexist mechanism.
* In the future, two mechanism shall be separated from
* each other and maintained independently. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
TxAGC[RF_PATH_A] = 0x10101010;
TxAGC[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
TxAGC[RF_PATH_A] = 0x00000000;
TxAGC[RF_PATH_B] = 0x00000000;
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
}
if (pHalData->EEPROMRegulatory == 0) {
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
TxAGC[RF_PATH_A] += tmpval;
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1] << 8) |
(pPowerlevel[idx1] << 16) | (pPowerlevel[idx1] << 24);
}
if (pHalData->EEPROMRegulatory == 0) {
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7] << 8);
TxAGC[RF_PATH_A] += tmpval;
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);
TxAGC[RF_PATH_B] += tmpval;
}
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][15] << 24);
TxAGC[RF_PATH_B] += tmpval;
}
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
ptr = (u8 *)(&(TxAGC[idx1]));
ptr = (u8 *)(&TxAGC[idx1]);
for (idx2 = 0; idx2 < 4; idx2++) {
if (*ptr > RF6052_MAX_TX_PWR)
*ptr = RF6052_MAX_TX_PWR;
@ -223,16 +137,16 @@ i * Currently, we cannot fully disable driver dynamic
}
/* rf-A cck tx power */
tmpval = TxAGC[RF_PATH_A]&0xff;
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
tmpval = TxAGC[RF_PATH_A]>>8;
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
tmpval = TxAGC[RF_PATH_A] & 0xff;
rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
tmpval = TxAGC[RF_PATH_A] >> 8;
rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
tmpval = TxAGC[RF_PATH_B]>>24;
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
tmpval = TxAGC[RF_PATH_B]&0x00ffffff;
PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
tmpval = TxAGC[RF_PATH_B] >> 24;
rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
tmpval = TxAGC[RF_PATH_B] & 0x00ffffff;
rtl8188e_PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
} /* PHY_RF6052SetCckTxPower */
/* */
@ -242,33 +156,31 @@ i * Currently, we cannot fully disable driver dynamic
static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 Channel, u32 *OfdmBase, u32 *MCSBase)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
u32 powerBase0, powerBase1;
u8 i, powerlevel[2];
u8 i;
for (i = 0; i < 2; i++) {
powerBase0 = pPowerLevelOFDM[i];
powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0;
*(OfdmBase+i) = powerBase0;
}
for (i = 0; i < pHalData->NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerlevel[i] = pPowerLevelBW20[i];
else
powerlevel[i] = pPowerLevelBW40[i];
powerBase1 = powerlevel[i];
powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1;
*(MCSBase+i) = powerBase1;
powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) | (powerBase0 << 8) | powerBase0;
*(OfdmBase + i) = powerBase0;
}
/* Check HT20 to HT40 diff */
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerBase1 = pPowerLevelBW20[0];
else
powerBase1 = pPowerLevelBW40[0];
powerBase1 = (powerBase1 << 24) | (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
*MCSBase = powerBase1;
}
static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
u8 index, u32 *powerBase0, u32 *powerBase1,
u32 *pOutWriteVal)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct hal_data_8188e *pHalData = &Adapter->haldata;
u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
s8 pwr_diff = 0;
u32 writeVal, customer_limit, rf;
@ -281,14 +193,14 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
case 0: /* Realtek better performance */
/* increase power diff defined by Realtek for large power */
chnlGroup = 0;
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] +
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
case 1: /* Realtek regulatory */
/* increase power diff defined by Realtek for regulatory */
if (pHalData->pwrGroupCnt == 1)
chnlGroup = 0;
if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) {
if (pHalData->pwrGroupCnt >= MAX_PG_GROUP) {
if (Channel < 3) /* Channel 1-2 */
chnlGroup = 0;
else if (Channel < 6) /* Channel 3-5 */
@ -302,7 +214,7 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
else if (Channel == 14) /* Channel 14 */
chnlGroup = 5;
}
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] +
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
case 2: /* Better regulatory */
@ -314,14 +226,14 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
chnlGroup = 0;
if (index < 2)
pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1];
pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel - 1];
else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1];
pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel - 1];
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1];
customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel - 1];
else
customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1];
customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel - 1];
if (pwr_diff >= customer_pwr_limit)
pwr_diff = 0;
@ -329,42 +241,27 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
pwr_diff = customer_pwr_limit - pwr_diff;
for (i = 0; i < 4; i++) {
pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)]&(0x7f<<(i*8)))>>(i*8));
pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] & (0x7f << (i * 8))) >> (i * 8));
if (pwr_diff_limit[i] > pwr_diff)
pwr_diff_limit[i] = pwr_diff;
}
customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
customer_limit = (pwr_diff_limit[3] << 24) | (pwr_diff_limit[2] << 16) |
(pwr_diff_limit[1] << 8) | (pwr_diff_limit[0]);
writeVal = customer_limit + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
default:
chnlGroup = 0;
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index + (rf ? 8 : 0)] +
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
}
/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
/* 92d do not need this */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
writeVal = 0x14141414;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
writeVal = 0x00000000;
/* 20100628 Joseph: High power mode for BT-Coexist mechanism. */
/* This mechanism is only applied when Driver-Highpower-Mechanism is OFF. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
writeVal = writeVal - 0x06060606;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
writeVal = writeVal;
*(pOutWriteVal+rf) = writeVal;
*(pOutWriteVal + rf) = writeVal;
}
}
static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u16 regoffset_a[6] = {
rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
@ -380,24 +277,21 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
for (rf = 0; rf < 2; rf++) {
writeVal = pValue[rf];
for (i = 0; i < 4; i++) {
pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
pwr_val[i] = (u8)((writeVal & (0x7f << (i * 8))) >> (i * 8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) | (pwr_val[1]<<8) | pwr_val[0];
writeVal = (pwr_val[3] << 24) | (pwr_val[2] << 16) | (pwr_val[1] << 8) | pwr_val[0];
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal);
rtl8188e_PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal);
/* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */
if (((pHalData->rf_type == RF_2T2R) &&
(regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) ||
((pHalData->rf_type != RF_2T2R) &&
(regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) {
if (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04) {
writeVal = pwr_val[3];
if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04)
regoffset = 0xc90;
@ -405,10 +299,10 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
regoffset = 0xc98;
for (i = 0; i < 3; i++) {
if (i != 2)
writeVal = (writeVal > 8) ? (writeVal-8) : 0;
writeVal = (writeVal > 8) ? (writeVal - 8) : 0;
else
writeVal = (writeVal > 6) ? (writeVal-6) : 0;
rtw_write8(Adapter, (u32)(regoffset+i), (u8)writeVal);
writeVal = (writeVal > 6) ? (writeVal - 6) : 0;
rtw_write8(Adapter, (u32)(regoffset + i), (u8)writeVal);
}
}
}
@ -445,7 +339,7 @@ rtl8188e_PHY_RF6052SetOFDMTxPower(
u8 *pPowerLevelBW40,
u8 Channel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
@ -475,92 +369,46 @@ rtl8188e_PHY_RF6052SetOFDMTxPower(
static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
{
struct bb_reg_def *pPhyReg;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct hal_data_8188e *pHalData = &Adapter->haldata;
u32 u4RegValue = 0;
u8 eRFPath;
int rtStatus = _SUCCESS;
/* 3----------------------------------------------------------------- */
/* 3 <2> Initialize RF */
/* 3----------------------------------------------------------------- */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/* Initialize RF */
/*----Store original RFENV control type----*/
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF_PATH_B:
case RF_PATH_D:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
break;
}
/*----Set RF_ENV enable----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
rtw_udelay_os(1);/* PlatformStallExecution(1); */
pPhyReg = &pHalData->PHYRegDef;
/*----Set RF_ENV output high----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Store original RFENV control type----*/
u4RegValue = rtl8188e_PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
/* Set bit number of Address and Data for RF register */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Set RF_ENV enable----*/
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV << 16, 0x1);
udelay(1);/* PlatformStallExecution(1); */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Set RF_ENV output high----*/
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
udelay(1);/* PlatformStallExecution(1); */
/*----Initialize RF fom connfiguration file----*/
switch (eRFPath) {
case RF_PATH_A:
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))
rtStatus = _FAIL;
break;
case RF_PATH_B:
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum rf_radio_path)eRFPath, (enum rf_radio_path)eRFPath))
rtStatus = _FAIL;
break;
case RF_PATH_C:
break;
case RF_PATH_D:
break;
}
/*----Restore RFENV control type----*/;
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF_PATH_B:
case RF_PATH_D:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
break;
}
if (rtStatus != _SUCCESS)
goto phy_RF6052_Config_ParaFile_Fail;
}
return rtStatus;
/* Set bit number of Address and Data for RF register */
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
udelay(1);/* PlatformStallExecution(1); */
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
udelay(1);/* PlatformStallExecution(1); */
/*----Initialize RF fom connfiguration file----*/
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv))
rtStatus = _FAIL;
/*----Restore RFENV control type----*/;
rtl8188e_PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}
int PHY_RF6052_Config8188E(struct adapter *Adapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
/* */
/* Initialize general global value */
/* */
/* TODO: Extend RF_PATH_C and RF_PATH_D in the future */
if (pHalData->rf_type == RF_1T1R)
pHalData->NumTotalRFPath = 1;
else
pHalData->NumTotalRFPath = 2;
/* */
/* Config BB and RF */
/* */

114
hal/rtl8188e_rxdesc.c
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188E_REDESC_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtl8188e_hal.h"
static void process_rssi(struct adapter *padapter, struct recv_frame *prframe)
{
@ -44,7 +28,7 @@ static void process_link_qual(struct adapter *padapter, struct recv_frame *prfra
struct rx_pkt_attrib *pattrib;
struct signal_stat *signal_stat;
if (prframe == NULL || padapter == NULL)
if (!prframe || !padapter)
return;
pattrib = &prframe->attrib;
@ -61,7 +45,7 @@ static void process_link_qual(struct adapter *padapter, struct recv_frame *prfra
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
}
void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
static void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
{
struct recv_frame *precvframe = (struct recv_frame *)prframe;
@ -73,63 +57,47 @@ void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
void update_recvframe_attrib_88e(struct recv_frame *precvframe, struct recv_stat *prxstat)
{
struct rx_pkt_attrib *pattrib;
struct recv_stat report;
report.rxdw0 = prxstat->rxdw0;
report.rxdw1 = prxstat->rxdw1;
report.rxdw2 = prxstat->rxdw2;
report.rxdw3 = prxstat->rxdw3;
report.rxdw4 = prxstat->rxdw4;
report.rxdw5 = prxstat->rxdw5;
pattrib = &precvframe->attrib;
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);;/* u8)prxreport->crc32; */
pattrib->crc_err = (le32_to_cpu(prxstat->rxdw0) >> 14) & 0x1;
/* update rx report to recv_frame attribute */
pattrib->pkt_rpt_type = (u8)((le32_to_cpu(report.rxdw3) >> 14) & 0x3);/* prxreport->rpt_sel; */
pattrib->pkt_rpt_type = (le32_to_cpu(prxstat->rxdw3) >> 14) & 0x3;
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */
pattrib->drvinfo_sz = (u8)((le32_to_cpu(report.rxdw0) >> 16) & 0xf) * 8;/* u8)(prxreport->drvinfosize << 3); */
if (pattrib->pkt_rpt_type == NORMAL_RX) {
pattrib->pkt_len = le32_to_cpu(prxstat->rxdw0) & 0x00003fff;
pattrib->drvinfo_sz = ((le32_to_cpu(prxstat->rxdw0) >> 16) & 0xf) * 8;
pattrib->physt = (u8)((le32_to_cpu(report.rxdw0) >> 26) & 0x1);/* u8)prxreport->physt; */
pattrib->physt = (le32_to_cpu(prxstat->rxdw0) >> 26) & 0x1;
pattrib->bdecrypted = (le32_to_cpu(report.rxdw0) & BIT(27)) ? 0 : 1;/* u8)(prxreport->swdec ? 0 : 1); */
pattrib->encrypt = (u8)((le32_to_cpu(report.rxdw0) >> 20) & 0x7);/* u8)prxreport->security; */
pattrib->bdecrypted = (le32_to_cpu(prxstat->rxdw0) & BIT(27)) ? 0 : 1;
pattrib->encrypt = (le32_to_cpu(prxstat->rxdw0) >> 20) & 0x7;
pattrib->qos = (u8)((le32_to_cpu(report.rxdw0) >> 23) & 0x1);/* u8)prxreport->qos; */
pattrib->priority = (u8)((le32_to_cpu(report.rxdw1) >> 8) & 0xf);/* u8)prxreport->tid; */
pattrib->qos = (le32_to_cpu(prxstat->rxdw0) >> 23) & 0x1;
pattrib->priority = (le32_to_cpu(prxstat->rxdw1) >> 8) & 0xf;
pattrib->amsdu = (u8)((le32_to_cpu(report.rxdw1) >> 13) & 0x1);/* u8)prxreport->amsdu; */
pattrib->amsdu = (le32_to_cpu(prxstat->rxdw1) >> 13) & 0x1;
pattrib->seq_num = (u16)(le32_to_cpu(report.rxdw2) & 0x00000fff);/* u16)prxreport->seq; */
pattrib->frag_num = (u8)((le32_to_cpu(report.rxdw2) >> 12) & 0xf);/* u8)prxreport->frag; */
pattrib->mfrag = (u8)((le32_to_cpu(report.rxdw1) >> 27) & 0x1);/* u8)prxreport->mf; */
pattrib->mdata = (u8)((le32_to_cpu(report.rxdw1) >> 26) & 0x1);/* u8)prxreport->md; */
pattrib->seq_num = le32_to_cpu(prxstat->rxdw2) & 0x00000fff;
pattrib->frag_num = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;
pattrib->mfrag = (le32_to_cpu(prxstat->rxdw1) >> 27) & 0x1;
pattrib->mdata = (le32_to_cpu(prxstat->rxdw1) >> 26) & 0x1;
pattrib->mcs_rate = (u8)(le32_to_cpu(report.rxdw3) & 0x3f);/* u8)prxreport->rxmcs; */
pattrib->rxht = (u8)((le32_to_cpu(report.rxdw3) >> 6) & 0x1);/* u8)prxreport->rxht; */
pattrib->mcs_rate = le32_to_cpu(prxstat->rxdw3) & 0x3f;
pattrib->rxht = (le32_to_cpu(prxstat->rxdw3) >> 6) & 0x1;
pattrib->icv_err = (u8)((le32_to_cpu(report.rxdw0) >> 15) & 0x1);/* u8)prxreport->icverr; */
pattrib->shift_sz = (u8)((le32_to_cpu(report.rxdw0) >> 24) & 0x3);
pattrib->icv_err = (le32_to_cpu(prxstat->rxdw0) >> 15) & 0x1;
pattrib->shift_sz = (le32_to_cpu(prxstat->rxdw0) >> 24) & 0x3;
} else if (pattrib->pkt_rpt_type == TX_REPORT1) { /* CCX */
pattrib->pkt_len = TX_RPT1_PKT_LEN;
pattrib->drvinfo_sz = 0;
} else if (pattrib->pkt_rpt_type == TX_REPORT2) { /* TX RPT */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x3FF);/* Rx length[9:0] */
pattrib->drvinfo_sz = 0;
} else if (pattrib->pkt_rpt_type == TX_REPORT2) {
pattrib->pkt_len = le32_to_cpu(prxstat->rxdw0) & 0x3FF;
/* */
/* Get TX report MAC ID valid. */
/* */
pattrib->MacIDValidEntry[0] = le32_to_cpu(report.rxdw4);
pattrib->MacIDValidEntry[1] = le32_to_cpu(report.rxdw5);
pattrib->MacIDValidEntry[0] = le32_to_cpu(prxstat->rxdw4);
pattrib->MacIDValidEntry[1] = le32_to_cpu(prxstat->rxdw5);
} else if (pattrib->pkt_rpt_type == HIS_REPORT) { /* USB HISR RPT */
pattrib->pkt_len = (u16)(le32_to_cpu(report.rxdw0) & 0x00003fff);/* u16)prxreport->pktlen; */
} else if (pattrib->pkt_rpt_type == HIS_REPORT) {
pattrib->pkt_len = le32_to_cpu(prxstat->rxdw0) & 0x00003fff;
}
}
@ -142,20 +110,14 @@ void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, struct phy_stat
{
struct adapter *padapter = precvframe->adapter;
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info);
u8 *wlanhdr;
struct hal_data_8188e *pHalData = &padapter->haldata;
struct phy_info *pPHYInfo = &pattrib->phy_info;
u8 *wlanhdr = precvframe->rx_data;
struct odm_per_pkt_info pkt_info;
u8 *sa = NULL;
struct sta_priv *pstapriv;
struct sta_info *psta;
pkt_info.bPacketMatchBSSID = false;
pkt_info.bPacketToSelf = false;
pkt_info.bPacketBeacon = false;
wlanhdr = get_recvframe_data(precvframe);
pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) &&
!pattrib->icv_err && !pattrib->crc_err &&
!memcmp(get_hdr_bssid(wlanhdr),
@ -193,7 +155,7 @@ void update_recvframe_phyinfo_88e(struct recv_frame *precvframe, struct phy_stat
rtl8188e_process_phy_info(padapter, precvframe);
}
} else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) {
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) {
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
if (psta)
precvframe->psta = psta;
}

80
hal/rtl8188e_sreset.c
View file

@ -1,80 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_SRESET_C_
#include <rtl8188e_sreset.h>
#include <rtl8188e_hal.h>
void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter)
{
}
void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0x00) {
DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
}
/* total xmit irp = 4 */
current_time = jiffies;
if (0 == pxmitpriv->free_xmitbuf_cnt) {
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if (diff_time > 2000) {
if (psrtpriv->last_tx_complete_time == 0) {
psrtpriv->last_tx_complete_time = current_time;
} else {
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
DBG_88E("%s tx hang\n", __func__);
rtl8188e_silentreset_for_specific_platform(padapter);
}
}
}
}
}
void rtl8188e_sreset_linked_status_check(struct adapter *padapter)
{
u32 rx_dma_status = 0;
u8 fw_status = 0;
rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
if (rx_dma_status != 0x00) {
DBG_88E("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status);
rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status);
}
fw_status = rtw_read8(padapter, REG_FMETHR);
if (fw_status != 0x00) {
if (fw_status == 1)
DBG_88E("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status);
else if (fw_status == 2)
DBG_88E("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status);
}
}

81
hal/rtl8188e_xmit.c
View file

@ -1,49 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188E_XMIT_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
void dump_txrpt_ccx_88e(void *buf)
{
struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
DBG_88E("%s:\n"
"tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n"
"mac_id:%u, pkt_ok:%u, bmc:%u\n"
"retry_cnt:%u, lifetime_over:%u, retry_over:%u\n"
"ccx_qtime:%u\n"
"final_data_rate:0x%02x\n"
"qsel:%u, sw:0x%03x\n",
__func__, txrpt_ccx->tag1, txrpt_ccx->pkt_num,
txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt,
txrpt_ccx->int_tri, txrpt_ccx->int_ccx,
txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc,
txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over,
txrpt_ccx->retry_over, txrpt_ccx_qtime_88e(txrpt_ccx),
txrpt_ccx->final_data_rate, txrpt_ccx->qsel,
txrpt_ccx_sw_88e(txrpt_ccx)
);
}
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/rtl8188e_hal.h"
void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf)
{
@ -58,34 +20,3 @@ void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf)
RTW_SCTX_DONE_CCX_PKT_FAIL);
}
}
void _dbg_dump_tx_info(struct adapter *padapter, int frame_tag,
struct tx_desc *ptxdesc)
{
u8 dmp_txpkt;
bool dump_txdesc = false;
rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(dmp_txpkt));
if (dmp_txpkt == 1) {/* dump txdesc for data frame */
DBG_88E("dump tx_desc for data frame\n");
if ((frame_tag & 0x0f) == DATA_FRAMETAG)
dump_txdesc = true;
} else if (dmp_txpkt == 2) {/* dump txdesc for mgnt frame */
DBG_88E("dump tx_desc for mgnt frame\n");
if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
dump_txdesc = true;
}
if (dump_txdesc) {
DBG_88E("=====================================\n");
DBG_88E("txdw0(0x%08x)\n", ptxdesc->txdw0);
DBG_88E("txdw1(0x%08x)\n", ptxdesc->txdw1);
DBG_88E("txdw2(0x%08x)\n", ptxdesc->txdw2);
DBG_88E("txdw3(0x%08x)\n", ptxdesc->txdw3);
DBG_88E("txdw4(0x%08x)\n", ptxdesc->txdw4);
DBG_88E("txdw5(0x%08x)\n", ptxdesc->txdw5);
DBG_88E("txdw6(0x%08x)\n", ptxdesc->txdw6);
DBG_88E("txdw7(0x%08x)\n", ptxdesc->txdw7);
DBG_88E("=====================================\n");
}
}

111
hal/rtl8188eu_led.c
View file

@ -1,111 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
#include <rtl8188e_led.h>
/* LED object. */
/* LED_819xUsb routines. */
/* Description: */
/* Turn on LED according to LedPin specified. */
void SwLedOn(struct adapter *padapter, struct LED_871x *pLed)
{
u8 LedCfg;
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch (pLed->LedPin) {
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); /* SW control led1 on. */
break;
default:
break;
}
pLed->bLedOn = true;
}
/* Description: */
/* Turn off LED according to LedPin specified. */
void SwLedOff(struct adapter *padapter, struct LED_871x *pLed)
{
u8 LedCfg;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
goto exit;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */
switch (pLed->LedPin) {
case LED_PIN_LED0:
if (pHalData->bLedOpenDrain) {
/* Open-drain arrangement for controlling the LED) */
LedCfg &= 0x90; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else {
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
}
break;
case LED_PIN_LED1:
LedCfg &= 0x0f; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
break;
default:
break;
}
exit:
pLed->bLedOn = false;
}
/* Interface to manipulate LED objects. */
/* Default LED behavior. */
/* Description: */
/* Initialize all LED_871x objects. */
void rtl8188eu_InitSwLeds(struct adapter *padapter)
{
struct led_priv *pledpriv = &(padapter->ledpriv);
pledpriv->LedControlHandler = LedControl8188eu;
InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
InitLed871x(padapter, &(pledpriv->SwLed1), LED_PIN_LED1);
}
/* Description: */
/* DeInitialize all LED_819xUsb objects. */
void rtl8188eu_DeInitSwLeds(struct adapter *padapter)
{
struct led_priv *ledpriv = &(padapter->ledpriv);
DeInitLed871x(&(ledpriv->SwLed0));
DeInitLed871x(&(ledpriv->SwLed1));
}

77
hal/rtl8188eu_recv.c
View file

@ -1,51 +1,16 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188EU_RECV_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
#include <ip.h>
#include <if_ether.h>
#include <ethernet.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/recv_osdep.h"
#include "../include/mlme_osdep.h"
#include <usb_ops.h>
#include <wifi.h>
#include "../include/usb_ops.h"
#include "../include/wifi.h"
#include <rtl8188e_hal.h>
void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
precvbuf->len = 0;
precvbuf->ref_cnt = 0;
if (precvbuf->pbuf) {
precvbuf->pdata = precvbuf->pbuf;
precvbuf->phead = precvbuf->pbuf;
precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
}
}
#include "../include/rtl8188e_hal.h"
int rtl8188eu_init_recv_priv(struct adapter *padapter)
{
@ -54,32 +19,27 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
struct recv_buf *precvbuf;
tasklet_init(&precvpriv->recv_tasklet,
(void *)rtl8188eu_recv_tasklet,
rtl8188eu_recv_tasklet,
(unsigned long)padapter);
/* init recv_buf */
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4);
if (precvpriv->pallocated_recv_buf == NULL) {
precvpriv->pallocated_recv_buf = kzalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4,
GFP_KERNEL);
if (!precvpriv->pallocated_recv_buf) {
res = _FAIL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n"));
goto exit;
}
memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF * sizeof(struct recv_buf) + 4);
precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(precvpriv->pallocated_recv_buf), 4);
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
INIT_LIST_HEAD(&precvbuf->list);
spin_lock_init(&precvbuf->recvbuf_lock);
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if (res == _FAIL)
break;
precvbuf->ref_cnt = 0;
precvbuf->adapter = padapter;
precvbuf++;
}
@ -98,7 +58,7 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
if (pskb) {
pskb->dev = padapter->pnetdev;
tmpaddr = (size_t)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
@ -125,12 +85,7 @@ void rtl8188eu_free_recv_priv(struct adapter *padapter)
kfree(precvpriv->pallocated_recv_buf);
if (skb_queue_len(&precvpriv->rx_skb_queue))
DBG_88E(KERN_WARNING "rx_skb_queue not empty\n");
skb_queue_purge(&precvpriv->rx_skb_queue);
if (skb_queue_len(&precvpriv->free_recv_skb_queue))
DBG_88E(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
skb_queue_purge(&precvpriv->free_recv_skb_queue);
}

181
hal/rtl8188eu_xmit.c
View file

@ -1,53 +1,24 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#define _RTL8188E_XMIT_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <wifi.h>
#include <osdep_intf.h>
#include <usb_ops.h>
#include <rtl8188e_hal.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/wifi.h"
#include "../include/osdep_intf.h"
#include "../include/usb_ops.h"
#include "../include/rtl8188e_hal.h"
s32 rtl8188eu_init_xmit_priv(struct adapter *adapt)
{
struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
tasklet_init(&pxmitpriv->xmit_tasklet,
(void *)rtl8188eu_xmit_tasklet,
rtl8188eu_xmit_tasklet,
(unsigned long)adapt);
return _SUCCESS;
}
void rtl8188eu_free_xmit_priv(struct adapter *adapt)
{
}
static u8 urb_zero_packet_chk(struct adapter *adapt, int sz)
{
u8 set_tx_desc_offset;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
set_tx_desc_offset = (((sz + TXDESC_SIZE) % haldata->UsbBulkOutSize) == 0) ? 1 : 0;
return set_tx_desc_offset;
}
static void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
{
u16 *usptr = (u16 *)ptxdesc;
@ -77,12 +48,12 @@ void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u
/* offset 0 */
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000); /* 32 bytes for TX Desc */
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); /* 32 bytes for TX Desc */
ptxdesc->txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); /* Buffer size + command header */
ptxdesc->txdw0 |= cpu_to_le32(BufferLen & 0x0000ffff); /* Buffer size + command header */
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<<QSEL_SHT)&0x00001f00); /* Fixed queue of Mgnt queue */
ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT << QSEL_SHT) & 0x00001f00); /* Fixed queue of Mgnt queue */
/* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. */
if (ispspoll) {
@ -110,16 +81,16 @@ static void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxd
/* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
case _WEP40_:
case _WEP104_:
ptxdesc->txdw1 |= cpu_to_le32((0x01<<SEC_TYPE_SHT)&0x00c00000);
ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
case _TKIP_:
case _TKIP_WTMIC_:
ptxdesc->txdw1 |= cpu_to_le32((0x01<<SEC_TYPE_SHT)&0x00c00000);
ptxdesc->txdw1 |= cpu_to_le32((0x01 << SEC_TYPE_SHT) & 0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
case _AES_:
ptxdesc->txdw1 |= cpu_to_le32((0x03<<SEC_TYPE_SHT)&0x00c00000);
ptxdesc->txdw1 |= cpu_to_le32((0x03 << SEC_TYPE_SHT) & 0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
case _NO_PRIVACY_:
@ -146,7 +117,7 @@ static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw)
*pdw |= cpu_to_le32(HW_RTS_EN);
/* Set RTS BW */
if (pattrib->ht_en) {
*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0;
*pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(27)) : 0;
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01 << 28) & 0x30000000);
@ -163,7 +134,7 @@ static void fill_txdesc_vcs(struct pkt_attrib *pattrib, __le32 *pdw)
static void fill_txdesc_phy(struct pkt_attrib *pattrib, __le32 *pdw)
{
if (pattrib->ht_en) {
*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0;
*pdw |= (pattrib->bwmode & HT_CHANNEL_WIDTH_40) ? cpu_to_le32(BIT(25)) : 0;
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01 << DATA_SC_SHT) & 0x003f0000);
@ -183,18 +154,10 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
u8 data_rate, pwr_status, offset;
struct adapter *adapt = pxmitframe->padapter;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct hal_data_8188e *haldata = &adapt->haldata;
struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
int bmcst = IS_MCAST(pattrib->ra);
if (adapt->registrypriv.mp_mode == 0) {
if ((!bagg_pkt) && (urb_zero_packet_chk(adapt, sz) == 0)) {
ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
pull = 1;
}
}
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
memset(ptxdesc, 0, sizeof(struct tx_desc));
@ -206,16 +169,9 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */
if (bmcst)
if (is_multicast_ether_addr(pattrib->ra))
ptxdesc->txdw0 |= cpu_to_le32(BMC);
if (adapt->registrypriv.mp_mode == 0) {
if (!bagg_pkt) {
if ((pull) && (pxmitframe->pkt_offset > 0))
pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1;
}
}
/* pkt_offset, unit:8 bytes padding */
if (pxmitframe->pkt_offset > 0)
ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000);
@ -283,11 +239,11 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw4 |= cpu_to_le32(BIT(24));/* DATA_SHORT */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
}
} else if ((pxmitframe->frame_tag&0x0f) == MGNT_FRAMETAG) {
} else if ((pxmitframe->frame_tag & 0x0f) == MGNT_FRAMETAG) {
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id & 0x3f);
qsel = (uint)(pattrib->qsel&0x0000001f);
qsel = (uint)(pattrib->qsel & 0x0000001f);
ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000f0000);
@ -298,7 +254,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw2 |= cpu_to_le32(BIT(19));
/* offset 12 */
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<SEQ_SHT)&0x0FFF0000);
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0FFF0000);
/* offset 20 */
ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);/* retry limit enable */
@ -308,14 +264,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw5 |= cpu_to_le32(0x00300000);/* retry limit = 12 */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
} else if ((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) {
DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
} else if (((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) &&
(adapt->registrypriv.mp_mode == 1)) {
fill_txdesc_for_mp(adapt, ptxdesc);
} else {
DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
} else if ((pxmitframe->frame_tag & 0x0f) != TXAGG_FRAMETAG) {
/* offset 4 */
ptxdesc->txdw1 |= cpu_to_le32((4) & 0x3f);/* CAM_ID(MAC_ID) */
@ -324,7 +273,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
/* offset 8 */
/* offset 12 */
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<SEQ_SHT)&0x0fff0000);
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0x0fff0000);
/* offset 20 */
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
@ -346,7 +295,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ODM_SetTxAntByTxInfo_88E(&haldata->odmpriv, pmem, pattrib->mac_id);
rtl8188eu_cal_txdesc_chksum(ptxdesc);
_dbg_dump_tx_info(adapt, pxmitframe->frame_tag, ptxdesc);
return pull;
}
@ -370,15 +318,11 @@ static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
rtw_issue_addbareq_cmd(adapt, pxmitframe);
mem_addr = pxmitframe->buf_addr;
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_dump_xframe()\n"));
for (t = 0; t < pattrib->nr_frags; t++) {
if (inner_ret != _SUCCESS && ret == _SUCCESS)
ret = _FAIL;
if (t != (pattrib->nr_frags - 1)) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("pattrib->nr_frags=%d\n", pattrib->nr_frags));
sz = pxmitpriv->frag_len;
sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);
} else {
@ -401,8 +345,6 @@ static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
rtw_count_tx_stats(adapt, pxmitframe, sz);
RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_write_port, w_sz=%d\n", w_sz));
mem_addr += w_sz;
mem_addr = (u8 *)RND4(((size_t)(mem_addr)));
@ -434,9 +376,9 @@ static u32 xmitframe_need_length(struct xmit_frame *pxmitframe)
return len;
}
s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
bool rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapt);
struct xmit_frame *pxmitframe = NULL;
struct xmit_frame *pfirstframe = NULL;
@ -450,51 +392,50 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
u32 pbuf_tail; /* last pkt tail */
u32 len; /* packet length, except TXDESC_SIZE and PKT_OFFSET */
u32 bulksize = haldata->UsbBulkOutSize;
u32 bulksize;
u8 desc_cnt;
u32 bulkptr;
/* dump frame variable */
u32 ff_hwaddr;
RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n"));
if (pdvobjpriv->pusbdev->speed == USB_SPEED_HIGH)
bulksize = USB_HIGH_SPEED_BULK_SIZE;
else
bulksize = USB_FULL_SPEED_BULK_SIZE;
/* check xmitbuffer is ok */
if (pxmitbuf == NULL) {
if (!pxmitbuf) {
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (pxmitbuf == NULL)
if (!pxmitbuf)
return false;
}
/* 3 1. pick up first frame */
do {
rtw_free_xmitframe(pxmitpriv, pxmitframe);
rtw_free_xmitframe(pxmitpriv, pxmitframe);
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
if (pxmitframe == NULL) {
/* no more xmit frame, release xmit buffer */
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
return false;
}
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
if (!pxmitframe) {
/* no more xmit frame, release xmit buffer */
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
return false;
}
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
/* always return ndis_packet after rtw_xmitframe_coalesce */
rtw_os_xmit_complete(adapt, pxmitframe);
break;
} while (1);
/* always return ndis_packet after rtw_xmitframe_coalesce */
rtw_os_xmit_complete(adapt, pxmitframe);
/* 3 2. aggregate same priority and same DA(AP or STA) frames */
pfirstframe = pxmitframe;
len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset*PACKET_OFFSET_SZ);
len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
pbuf_tail = len;
pbuf = _RND8(pbuf_tail);
@ -513,23 +454,23 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
switch (pfirstframe->attrib.priority) {
case 1:
case 2:
ptxservq = &(psta->sta_xmitpriv.bk_q);
ptxservq = &psta->sta_xmitpriv.bk_q;
phwxmit = pxmitpriv->hwxmits + 3;
break;
case 4:
case 5:
ptxservq = &(psta->sta_xmitpriv.vi_q);
ptxservq = &psta->sta_xmitpriv.vi_q;
phwxmit = pxmitpriv->hwxmits + 1;
break;
case 6:
case 7:
ptxservq = &(psta->sta_xmitpriv.vo_q);
ptxservq = &psta->sta_xmitpriv.vo_q;
phwxmit = pxmitpriv->hwxmits;
break;
case 0:
case 3:
default:
ptxservq = &(psta->sta_xmitpriv.be_q);
ptxservq = &psta->sta_xmitpriv.be_q;
phwxmit = pxmitpriv->hwxmits + 2;
break;
}
@ -545,7 +486,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
pxmitframe->agg_num = 0; /* not first frame of aggregation */
pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset*PACKET_OFFSET_SZ);
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ);
if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) {
pxmitframe->agg_num = 1;
@ -578,7 +519,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
if (pbuf < bulkptr) {
desc_cnt++;
if (desc_cnt == haldata->UsbTxAggDescNum)
if (desc_cnt == USB_TXAGG_DESC_NUM)
break;
} else {
desc_cnt = 0;
@ -627,8 +568,7 @@ static s32 xmitframe_direct(struct adapter *adapt, struct xmit_frame *pxmitframe
res = rtw_xmitframe_coalesce(adapt, pxmitframe->pkt, pxmitframe);
if (res == _SUCCESS)
rtw_dump_xframe(adapt, pxmitframe);
else
DBG_88E("==> %s xmitframe_coalsece failed\n", __func__);
return res;
}
@ -650,11 +590,11 @@ static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0)
goto enqueue;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == true)
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING))
goto enqueue;
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (pxmitbuf == NULL)
if (!pxmitbuf)
goto enqueue;
spin_unlock_bh(&pxmitpriv->lock);
@ -675,7 +615,6 @@ enqueue:
spin_unlock_bh(&pxmitpriv->lock);
if (res != _SUCCESS) {
RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));
rtw_free_xmitframe(pxmitpriv, pxmitframe);
/* Trick, make the statistics correct */

1234
hal/usb_halinit.c
View file

File diff suppressed because it is too large Load diff

565
hal/usb_ops_linux.c
View file

@ -1,307 +1,186 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _HCI_OPS_OS_C_
// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <usb_ops.h>
#include <recv_osdep.h>
#include <rtl8188e_hal.h>
#include "../include/osdep_service.h"
#include "../include/drv_types.h"
#include "../include/osdep_intf.h"
#include "../include/usb_ops.h"
#include "../include/recv_osdep.h"
#include "../include/rtl8188e_hal.h"
static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
static int usb_read(struct intf_hdl *intf, u16 value, void *data, u8 size)
{
struct adapter *adapt = pintfhdl->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct adapter *adapt = intf->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
unsigned int pipe;
int status = 0;
u8 reqtype;
u8 *pIo_buf;
int vendorreq_times = 0;
int status;
u8 io_buf[4];
if ((adapt->bSurpriseRemoved) || (adapt->pwrctrlpriv.pnp_bstop_trx)) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usbctrl_vendorreq:(adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
status = -EPERM;
goto exit;
if (adapt->bSurpriseRemoved || adapt->pwrctrlpriv.pnp_bstop_trx)
return -EPERM;
status = usb_control_msg_recv(udev, 0, REALTEK_USB_VENQT_CMD_REQ,
REALTEK_USB_VENQT_READ, value,
REALTEK_USB_VENQT_CMD_IDX, io_buf,
size, RTW_USB_CONTROL_MSG_TIMEOUT,
GFP_KERNEL);
if (status == -ESHUTDOWN ||
status == -ENODEV ||
status == -ENOENT) {
/*
* device or controller has been disabled due to
* some problem that could not be worked around,
* device or bus doesn’t exist, endpoint does not
* exist or is not enabled.
*/
adapt->bSurpriseRemoved = true;
return status;
}
if (len > MAX_VENDOR_REQ_CMD_SIZE) {
DBG_88E("[%s] Buffer len error ,vendor request failed\n", __func__);
status = -EINVAL;
goto exit;
if (status < 0) {
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv))
adapt->bSurpriseRemoved = true;
return status;
}
_enter_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL);
rtw_reset_continual_urb_error(dvobjpriv);
memcpy(data, io_buf, size);
/* Acquire IO memory for vendorreq */
pIo_buf = dvobjpriv->usb_vendor_req_buf;
if (pIo_buf == NULL) {
DBG_88E("[%s] pIo_buf == NULL\n", __func__);
status = -ENOMEM;
goto release_mutex;
}
while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) {
memset(pIo_buf, 0, len);
if (requesttype == 0x01) {
pipe = usb_rcvctrlpipe(udev, 0);/* read_in */
reqtype = REALTEK_USB_VENQT_READ;
} else {
pipe = usb_sndctrlpipe(udev, 0);/* write_out */
reqtype = REALTEK_USB_VENQT_WRITE;
memcpy(pIo_buf, pdata, len);
}
status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);
if (status == len) { /* Success this control transfer. */
rtw_reset_continual_urb_error(dvobjpriv);
if (requesttype == 0x01)
memcpy(pdata, pIo_buf, len);
} else { /* error cases */
DBG_88E("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n",
value, (requesttype == 0x01) ? "read" : "write",
len, status, *(u32 *)pdata, vendorreq_times);
if (status < 0) {
if (status == (-ESHUTDOWN) || status == -ENODEV) {
adapt->bSurpriseRemoved = true;
} else {
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;
}
} else { /* status != len && status >= 0 */
if (status > 0) {
if (requesttype == 0x01) {
/* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */
memcpy(pdata, pIo_buf, len);
}
}
}
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) {
adapt->bSurpriseRemoved = true;
break;
}
}
/* firmware download is checksumed, don't retry */
if ((value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len)
break;
}
release_mutex:
_exit_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL);
exit:
return status;
}
static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
static int usb_write(struct intf_hdl *intf, u16 value, void *data, u8 size)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 data = 0;
struct adapter *adapt = intf->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
int status;
u8 io_buf[VENDOR_CMD_MAX_DATA_LEN];
if (adapt->bSurpriseRemoved || adapt->pwrctrlpriv.pnp_bstop_trx)
return -EPERM;
request = 0x05;
requesttype = 0x01;/* read_in */
index = 0;/* n/a */
memcpy(io_buf, data, size);
status = usb_control_msg_send(udev, 0, REALTEK_USB_VENQT_CMD_REQ,
REALTEK_USB_VENQT_WRITE, value,
REALTEK_USB_VENQT_CMD_IDX, io_buf,
size, RTW_USB_CONTROL_MSG_TIMEOUT,
GFP_KERNEL);
wvalue = (u16)(addr&0x0000ffff);
len = 1;
if (status == -ESHUTDOWN ||
status == -ENODEV ||
status == -ENOENT) {
/*
* device or controller has been disabled due to
* some problem that could not be worked around,
* device or bus doesn’t exist, endpoint does not
* exist or is not enabled.
*/
adapt->bSurpriseRemoved = true;
return status;
}
usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
if (status < 0) {
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv))
adapt->bSurpriseRemoved = true;
return status;
}
rtw_reset_continual_urb_error(dvobjpriv);
return status;
}
u8 rtw_read8(struct adapter *adapter, u32 addr)
{
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
u8 data;
usb_read(intf, value, &data, 1);
return data;
}
static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
u16 rtw_read16(struct adapter *adapter, u32 addr)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le16 data;
request = 0x05;
requesttype = 0x01;/* read_in */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 2;
usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
usb_read(intf, value, &data, 2);
return (u16)(le32_to_cpu(data)&0xffff);
return le16_to_cpu(data);
}
static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
u32 rtw_read32(struct adapter *adapter, u32 addr)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le32 data;
request = 0x05;
requesttype = 0x01;/* read_in */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 4;
usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
usb_read(intf, value, &data, 4);
return le32_to_cpu(data);
}
static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
int rtw_write8(struct adapter *adapter, u32 addr, u8 val)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 data;
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
int ret;
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 1;
data = val;
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
return ret;
ret = usb_write(intf, value, &val, 1);
return RTW_STATUS_CODE(ret);
}
static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
int rtw_write16(struct adapter *adapter, u32 addr, u16 val)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le16 data = cpu_to_le16(val);
int ret;
ret = usb_write(intf, value, &data, 2);
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 2;
data = cpu_to_le32(val & 0x0000ffff);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
return ret;
return RTW_STATUS_CODE(ret);
}
static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
int rtw_write32(struct adapter *adapter, u32 addr, u32 val)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
__le32 data = cpu_to_le32(val);
int ret;
ret = usb_write(intf, value, &data, 4);
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 4;
data = cpu_to_le32(val);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
return ret;
return RTW_STATUS_CODE(ret);
}
static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
int rtw_writeN(struct adapter *adapter, u32 addr, u32 length, u8 *data)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0};
struct io_priv *io_priv = &adapter->iopriv;
struct intf_hdl *intf = &io_priv->intf;
u16 value = addr & 0xffff;
int ret;
if (length > VENDOR_CMD_MAX_DATA_LEN)
return _FAIL;
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
ret = usb_write(intf, value, data, length);
wvalue = (u16)(addr&0x0000ffff);
len = length;
memcpy(buf, pdata, len);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype);
return ret;
}
static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) {
DBG_88E("%s Invalid interrupt content length (%d)!\n", __func__, pkt_len);
return;
}
/* HISR */
memcpy(&(haldata->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
memcpy(&(haldata->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
/* C2H Event */
if (pbuf[0] != 0)
memcpy(&(haldata->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16);
return RTW_STATUS_CODE(ret);
}
static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
@ -316,7 +195,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
struct sk_buff *pkt_copy = NULL;
struct recv_frame *precvframe = NULL;
struct rx_pkt_attrib *pattrib = NULL;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct hal_data_8188e *haldata = &adapt->haldata;
struct recv_priv *precvpriv = &adapt->recvpriv;
struct __queue *pfree_recv_queue = &precvpriv->free_recv_queue;
@ -327,18 +206,11 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff;
do {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if (precvframe == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("recvbuf2recvframe: precvframe==NULL\n"));
DBG_88E("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __func__, __LINE__);
if (!precvframe)
goto _exit_recvbuf2recvframe;
}
INIT_LIST_HEAD(&precvframe->list);
precvframe->precvbuf = NULL; /* can't access the precvbuf for new arch. */
@ -349,8 +221,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pattrib = &precvframe->attrib;
if ((pattrib->crc_err) || (pattrib->icv_err)) {
DBG_88E("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __func__, pattrib->crc_err, pattrib->icv_err);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@ -361,8 +231,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recvbuf2recvframe: pkt_len<=0\n"));
DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __func__, __LINE__);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@ -403,7 +271,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
precvframe->rx_data = pkt_copy->data;
} else {
if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) {
DBG_88E("recvbuf2recvframe: alloc_skb fail , drop frag frame\n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@ -414,7 +281,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
precvframe->rx_data = precvframe->rx_tail;
precvframe->rx_end = pbuf + pattrib->drvinfo_sz + RXDESC_SIZE + alloc_sz;
} else {
DBG_88E("recvbuf2recvframe: skb_clone fail\n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
@ -422,25 +288,12 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
recvframe_put(precvframe, skb_len);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
case USB_RX_AGG_MIX:
pkt_offset = (u16)_RND128(pkt_offset);
break;
case USB_RX_AGG_USB:
pkt_offset = (u16)_RND4(pkt_offset);
break;
case USB_RX_AGG_DISABLE:
default:
break;
}
pkt_offset = (u16)_RND128(pkt_offset);
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
if (pattrib->physt)
update_recvframe_phyinfo_88e(precvframe, (struct phy_stat *)pphy_status);
if (rtw_recv_entry(precvframe) != _SUCCESS) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
}
rtw_recv_entry(precvframe);
} else {
/* enqueue recvframe to txrtp queue */
if (pattrib->pkt_rpt_type == TX_REPORT1) {
@ -454,8 +307,6 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pattrib->MacIDValidEntry[0],
pattrib->MacIDValidEntry[1]
);
} else if (pattrib->pkt_rpt_type == HIS_REPORT) {
interrupt_handler_8188eu(adapt, pattrib->pkt_len, precvframe->rx_data);
}
rtw_free_recvframe(precvframe, pfree_recv_queue);
}
@ -466,7 +317,7 @@ static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
pkt_copy = NULL;
if (transfer_len > 0 && pkt_cnt == 0)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff;
} while ((transfer_len > 0) && (pkt_cnt > 0));
@ -475,7 +326,7 @@ _exit_recvbuf2recvframe:
return _SUCCESS;
}
void rtl8188eu_recv_tasklet(void *priv)
void rtl8188eu_recv_tasklet(unsigned long priv)
{
struct sk_buff *pskb;
struct adapter *adapt = (struct adapter *)priv;
@ -483,7 +334,6 @@ void rtl8188eu_recv_tasklet(void *priv)
while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) {
if ((adapt->bDriverStopped) || (adapt->bSurpriseRemoved)) {
DBG_88E("recv_tasklet => bDriverStopped or bSurpriseRemoved\n");
dev_kfree_skb_any(pskb);
break;
}
@ -500,33 +350,20 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
struct adapter *adapt = (struct adapter *)precvbuf->adapter;
struct recv_priv *precvpriv = &adapt->recvpriv;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete!!!\n"));
precvpriv->rx_pending_cnt--;
if (adapt->bSurpriseRemoved || adapt->bDriverStopped || adapt->bReadPortCancel) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
adapt->bDriverStopped, adapt->bSurpriseRemoved));
precvbuf->reuse = true;
DBG_88E("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n",
__func__, adapt->bDriverStopped,
adapt->bSurpriseRemoved, adapt->bReadPortCancel);
return;
}
if (purb->status == 0) { /* SUCCESS */
if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
precvbuf->reuse = true;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__);
rtw_read_port(adapt, (unsigned char *)precvbuf);
} else {
rtw_reset_continual_urb_error(adapter_to_dvobj(adapt));
precvbuf->transfer_len = purb->actual_length;
skb_put(precvbuf->pskb, purb->actual_length);
skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb);
@ -535,12 +372,9 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
precvbuf->pskb = NULL;
precvbuf->reuse = false;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
rtw_read_port(adapt, (unsigned char *)precvbuf);
}
} else {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete : purb->status(%d) != 0\n", purb->status));
DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
skb_put(precvbuf->pskb, purb->actual_length);
precvbuf->pskb = NULL;
@ -552,23 +386,15 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
case -EPIPE:
case -ENODEV:
case -ESHUTDOWN:
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bSurpriseRemoved=true\n"));
__attribute__((__fallthrough__));
case -ENOENT:
adapt->bDriverStopped = true;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bDriverStopped=true\n"));
break;
case -EPROTO:
case -EOVERFLOW:
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;
}
precvbuf->reuse = true;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
rtw_read_port(adapt, (unsigned char *)precvbuf);
break;
case -EINPROGRESS:
DBG_88E("ERROR: URB IS IN PROGRESS!/n");
break;
default:
break;
@ -576,11 +402,10 @@ static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
}
}
static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
u32 rtw_read_port(struct adapter *adapter, u8 *rmem)
{
struct urb *purb = NULL;
struct recv_buf *precvbuf = (struct recv_buf *)rmem;
struct adapter *adapter = pintfhdl->padapter;
struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter);
struct recv_priv *precvpriv = &adapter->recvpriv;
struct usb_device *pusbd = pdvobj->pusbdev;
@ -591,81 +416,52 @@ static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
u32 ret = _SUCCESS;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved ||
adapter->pwrctrlpriv.pnp_bstop_trx) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port:(adapt->bDriverStopped ||adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
adapter->pwrctrlpriv.pnp_bstop_trx)
return _FAIL;
}
if (!precvbuf) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port:precvbuf==NULL\n"));
if (!precvbuf)
return _FAIL;
}
if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) {
if (!precvbuf->reuse || !precvbuf->pskb) {
precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue);
if (NULL != precvbuf->pskb)
if (precvbuf->pskb)
precvbuf->reuse = true;
}
rtl8188eu_init_recvbuf(adapter, precvbuf);
/* re-assign for linux based on skb */
if (!precvbuf->reuse || !precvbuf->pskb) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (!precvbuf->pskb)
return _FAIL;
/* re-assign for linux based on skb */
if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (precvbuf->pskb == NULL) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n"));
DBG_88E("#### usb_read_port() alloc_skb fail!#####\n");
return _FAIL;
}
tmpaddr = (size_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
} else { /* reuse skb */
precvbuf->reuse = false;
}
tmpaddr = (size_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
precvpriv->rx_pending_cnt++;
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
} else { /* reuse skb */
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
purb = precvbuf->purb;
precvbuf->reuse = false;
}
/* translate DMA FIFO addr to pipehandle */
pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe);
precvpriv->rx_pending_cnt++;
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pskb->data,
MAX_RECVBUF_SZ,
usb_read_port_complete,
precvbuf);/* context is precvbuf */
purb = precvbuf->purb;
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pbuf,
MAX_RECVBUF_SZ,
usb_read_port_complete,
precvbuf);/* context is precvbuf */
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM))) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x",
err, purb->status));
DBG_88E("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",
err, purb->status);
ret = _FAIL;
}
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM)))
ret = _FAIL;
return ret;
}
void rtl8188eu_xmit_tasklet(void *priv)
void rtl8188eu_xmit_tasklet(unsigned long priv)
{
int ret = false;
struct adapter *adapt = (struct adapter *)priv;
@ -677,10 +473,8 @@ void rtl8188eu_xmit_tasklet(void *priv)
while (1) {
if ((adapt->bDriverStopped) ||
(adapt->bSurpriseRemoved) ||
(adapt->bWritePortCancel)) {
DBG_88E("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
(adapt->bWritePortCancel))
break;
}
ret = rtl8188eu_xmitframe_complete(adapt, pxmitpriv, NULL);
@ -688,30 +482,3 @@ void rtl8188eu_xmit_tasklet(void *priv)
break;
}
}
void rtl8188eu_set_intf_ops(struct _io_ops *pops)
{
memset((u8 *)pops, 0, sizeof(struct _io_ops));
pops->_read8 = &usb_read8;
pops->_read16 = &usb_read16;
pops->_read32 = &usb_read32;
pops->_read_mem = &usb_read_mem;
pops->_read_port = &usb_read_port;
pops->_write8 = &usb_write8;
pops->_write16 = &usb_write16;
pops->_write32 = &usb_write32;
pops->_writeN = &usb_writeN;
pops->_write_mem = &usb_write_mem;
pops->_write_port = &usb_write_port;
pops->_read_port_cancel = &usb_read_port_cancel;
pops->_write_port_cancel = &usb_write_port_cancel;
}
void rtl8188eu_set_hw_type(struct adapter *adapt)
{
adapt->chip_type = RTL8188E;
adapt->HardwareType = HARDWARE_TYPE_RTL8188EU;
DBG_88E("CHIP TYPE: RTL8188E\n");
}

183
include/Hal8188EPhyCfg.h
View file

@ -1,73 +1,14 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_HAL8188EPHYCFG_H__
#define __INC_HAL8188EPHYCFG_H__
/*--------------------------Define Parameters-------------------------------*/
#define LOOP_LIMIT 5
#define MAX_STALL_TIME 50 /* us */
#define AntennaDiversityValue 0x80
#define MAX_TXPWR_IDX_NMODE_92S 63
#define Reset_Cnt_Limit 3
#define IQK_MAC_REG_NUM 4
#define IQK_ADDA_REG_NUM 16
#define IQK_BB_REG_NUM 9
#define HP_THERMAL_NUM 8
#define MAX_AGGR_NUM 0x07
/*--------------------------Define Parameters-------------------------------*/
/*------------------------------Define structure----------------------------*/
enum sw_chnl_cmd_id {
CmdID_End,
CmdID_SetTxPowerLevel,
CmdID_BBRegWrite10,
CmdID_WritePortUlong,
CmdID_WritePortUshort,
CmdID_WritePortUchar,
CmdID_RF_WriteReg,
};
/* 1. Switch channel related */
struct sw_chnl_cmd {
enum sw_chnl_cmd_id CmdID;
u32 Para1;
u32 Para2;
u32 msDelay;
};
enum hw90_block {
HW90_BLOCK_MAC = 0,
HW90_BLOCK_PHY0 = 1,
HW90_BLOCK_PHY1 = 2,
HW90_BLOCK_RF = 3,
HW90_BLOCK_MAXIMUM = 4, /* Never use this */
};
enum rf_radio_path {
RF_PATH_A = 0, /* Radio Path A */
RF_PATH_B = 1, /* Radio Path B */
RF_PATH_C = 2, /* Radio Path C */
RF_PATH_D = 3, /* Radio Path D */
};
#define MAX_PG_GROUP 13
@ -79,39 +20,6 @@ enum rf_radio_path {
#define MAX_CHNL_GROUP_24G 6 /* ch1~2, ch3~5, ch6~8,
*ch9~11, ch12~13, CH 14
* total three groups */
#define CHANNEL_GROUP_MAX_88E 6
enum wireless_mode {
WIRELESS_MODE_UNKNOWN = 0x00,
WIRELESS_MODE_A = BIT2,
WIRELESS_MODE_B = BIT0,
WIRELESS_MODE_G = BIT1,
WIRELESS_MODE_AUTO = BIT5,
WIRELESS_MODE_N_24G = BIT3,
WIRELESS_MODE_N_5G = BIT4,
WIRELESS_MODE_AC = BIT6
};
enum phy_rate_tx_offset_area {
RA_OFFSET_LEGACY_OFDM1,
RA_OFFSET_LEGACY_OFDM2,
RA_OFFSET_HT_OFDM1,
RA_OFFSET_HT_OFDM2,
RA_OFFSET_HT_OFDM3,
RA_OFFSET_HT_OFDM4,
RA_OFFSET_HT_CCK,
};
/* BB/RF related */
enum RF_TYPE_8190P {
RF_TYPE_MIN, /* 0 */
RF_8225 = 1, /* 1 11b/g RF for verification only */
RF_8256 = 2, /* 2 11b/g/n */
RF_8258 = 3, /* 3 11a/b/g/n RF */
RF_6052 = 4, /* 4 11b/g/n RF */
/* TODO: We should remove this psudo PHY RF after we get new RF. */
RF_PSEUDO_11N = 5, /* 5, It is a temporality RF. */
};
struct bb_reg_def {
u32 rfintfs; /* set software control: */
@ -161,43 +69,12 @@ struct bb_reg_def {
* Path A and B */
};
struct ant_sel_ofdm {
u32 r_tx_antenna:4;
u32 r_ant_l:4;
u32 r_ant_non_ht:4;
u32 r_ant_ht1:4;
u32 r_ant_ht2:4;
u32 r_ant_ht_s1:4;
u32 r_ant_non_ht_s1:4;
u32 OFDM_TXSC:2;
u32 reserved:2;
};
struct ant_sel_cck {
u8 r_cckrx_enable_2:2;
u8 r_cckrx_enable:2;
u8 r_ccktx_enable:4;
};
/*------------------------------Define structure----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export global variable----------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*------------------------Export Marco Definition---------------------------*/
/*--------------------------Exported Function prototype---------------------*/
/* */
/* BB and RF register read/write */
/* */
u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, u32 regaddr, u32 mask, u32 data);
/* Initialization related function */
/* MAC/BB/RF HAL config */
@ -205,21 +82,8 @@ int PHY_MACConfig8188E(struct adapter *adapter);
int PHY_BBConfig8188E(struct adapter *adapter);
int PHY_RFConfig8188E(struct adapter *adapter);
/* RF config */
int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *adapter, u8 *filename,
enum rf_radio_path rfpath);
int rtl8188e_PHY_ConfigRFWithHeaderFile(struct adapter *adapter,
enum rf_radio_path rfpath);
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue(struct adapter *adapter);
/* BB TX Power R/W */
void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 *powerlevel);
void PHY_SetTxPowerLevel8188E(struct adapter *adapter, u8 channel);
bool PHY_UpdateTxPowerDbm8188E(struct adapter *adapter, int power);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
/* Switch bandwidth for 8192S */
void PHY_SetBWMode8188E(struct adapter *adapter,
@ -227,43 +91,8 @@ void PHY_SetBWMode8188E(struct adapter *adapter,
/* channel switch related funciton */
void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
/* Call after initialization */
void ChkFwCmdIoDone(struct adapter *adapter);
/* BB/MAC/RF other monitor API */
void PHY_SetRFPathSwitch_8188E(struct adapter *adapter, bool main);
void PHY_SwitchEphyParameter(struct adapter *adapter);
void PHY_EnableHostClkReq(struct adapter *adapter);
bool SetAntennaConfig92C(struct adapter *adapter, u8 defaultant);
void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
u32 mask, u32 data);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_QueryBBReg(adapt, regaddr, mask) \
rtl8188e_PHY_QueryBBReg((adapt), (regaddr), (mask))
#define PHY_SetBBReg(adapt, regaddr, bitmask, data) \
rtl8188e_PHY_SetBBReg((adapt), (regaddr), (bitmask), (data))
#define PHY_QueryRFReg(adapt, rfpath, regaddr, bitmask) \
rtl8188e_PHY_QueryRFReg((adapt), (rfpath), (regaddr), (bitmask))
#define PHY_SetRFReg(adapt, rfpath, regaddr, bitmask, data) \
rtl8188e_PHY_SetRFReg((adapt), (rfpath), (regaddr), (bitmask), (data))
#define PHY_SetMacReg PHY_SetBBReg
#define SIC_HW_SUPPORT 0
#define SIC_MAX_POLL_CNT 5
#define SIC_CMD_READY 0
#define SIC_CMD_WRITE 1
#define SIC_CMD_READ 2
#define SIC_CMD_REG 0x1EB /* 1byte */
#define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */
#define SIC_DATA_REG 0x1EC /* 1bc~1bf */
#endif /* __INC_HAL8192CPHYCFG_H */
#endif

22
include/Hal8188EPhyReg.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_HAL8188EPHYREG_H__
#define __INC_HAL8188EPHYREG_H__
/*--------------------------Define Parameters-------------------------------*/

170
include/Hal8188EPwrSeq.h
View file

@ -1,173 +1,13 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL8188EPWRSEQ_H__
#define __HAL8188EPWRSEQ_H__
#include "HalPwrSeqCmd.h"
/*
Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
There are 6 HW Power States:
0: POFF--Power Off
1: PDN--Power Down
2: CARDEMU--Card Emulation
3: ACT--Active Mode
4: LPS--Low Power State
5: SUS--Suspend
The transision from different states are defined below
TRANS_CARDEMU_TO_ACT
TRANS_ACT_TO_CARDEMU
TRANS_CARDEMU_TO_SUS
TRANS_SUS_TO_CARDEMU
TRANS_CARDEMU_TO_PDN
TRANS_ACT_TO_LPS
TRANS_LPS_TO_ACT
TRANS_END
PWR SEQ Version: rtl8188E_PwrSeq_V09.h
*/
#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10
#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10
#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10
#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15
#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15
#define RTL8188E_TRANS_END_STEPS 1
#define RTL8188E_TRANS_CARDEMU_TO_ACT \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \
{0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \
{0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*SDIO Driving*/ \
#define RTL8188E_TRANS_ACT_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \
#define RTL8188E_TRANS_CARDEMU_TO_SUS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
#define RTL8188E_TRANS_SUS_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/
#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8188E_TRANS_CARDEMU_TO_PDN \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/
#define RTL8188E_TRANS_PDN_TO_CARDEMU \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
#define RTL8188E_TRANS_ACT_TO_LPS \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \
{0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \
#define RTL8188E_TRANS_LPS_TO_ACT \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here */ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\
{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\
{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\
{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/
#define RTL8188E_TRANS_END \
/* format */ \
/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, comments here*/ \
{0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0, PWR_CMD_END, 0, 0}, /* */
extern struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_power_on_flow[];
extern struct wl_pwr_cfg rtl8188E_card_disable_flow[];
extern struct wl_pwr_cfg rtl8188E_enter_lps_flow[];
#endif /* __HAL8188EPWRSEQ_H__ */

63
include/Hal8188ERateAdaptive.h
View file

@ -1,19 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright (c) 2011 Realtek Semiconductor Corp. */
#ifndef __INC_RA_H
#define __INC_RA_H
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
/* Module Name: RateAdaptive.h
* Abstract: Prototype of RA and related data structure.
*/
Module Name:
RateAdaptive.h
Abstract:
Prototype of RA and related data structure.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-08-12 Page Create.
--*/
#include <linux/bitfield.h>
/* Rate adaptive define */
#define PERENTRY 23
@ -21,35 +15,28 @@ Major Change History:
#define RATESIZE 28
#define TX_RPT2_ITEM_SIZE 8
/* */
/* TX report 2 format in Rx desc */
/* */
#define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 9)
#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 32)
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc) \
LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
#define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr) \
LE_BITS_TO_4BYTE(__pAddr, 0, 16)
#define GET_TX_REPORT_TYPE1_RERTY_1(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+2, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_2(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+3, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_3(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4+1, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4+2, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) \
LE_BITS_TO_1BYTE(__pAddr+4+3, 0, 8)
#define GET_TX_RPT2_DESC_PKT_LEN_88E(__rxstatusdesc) \
le32_get_bits(*(__le32 *)__rxstatusdesc, GENMASK(8, 0))
#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__rxstatusdesc) \
le32_to_cpu((*(__le32 *)(__rxstatusdesc + 16))
#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__rxstatusdesc) \
le32_to_cpu((*(__le32 *)(__rxstatusdesc + 20))
#define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) \
le16_get_bits(*(__le16 *)__paddr, GENMASK(15, 0))
#define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 2, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 3, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 4, 0, 8)
#define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 5, 0, 8)
#define GET_TX_REPORT_TYPE1_DROP_0(__paddr) \
LE_BITS_TO_1BYTE(__paddr + 6, 0, 8)
/* End rate adaptive define */
void ODM_RASupport_Init(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID);

44
include/Hal8188EReg.h
View file

@ -1,44 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* */
/* File Name: Hal8188EReg.h */
/* */
/* Description: */
/* */
/* This file is for RTL8188E register definition. */
/* */
/* */
/* */
#ifndef __HAL_8188E_REG_H__
#define __HAL_8188E_REG_H__
/* */
/* Register Definition */
/* */
#define TRX_ANTDIV_PATH 0x860
#define RX_ANTDIV_PATH 0xb2c
#define ODM_R_A_AGC_CORE1_8188E 0xc50
/* */
/* Bitmap Definition */
/* */
#define BIT_FA_RESET_8188E BIT0
#endif

21
include/HalHWImg8188E_BB.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_BB_8188E_HW_IMG_H
#define __INC_BB_8188E_HW_IMG_H

33
include/HalHWImg8188E_FW.h
View file

@ -1,33 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __INC_FW_8188E_HW_IMG_H
#define __INC_FW_8188E_HW_IMG_H
/******************************************************************************
* FW_AP.TXT
******************************************************************************/
/******************************************************************************
* FW_WoWLAN.TXT
******************************************************************************/
#define ArrayLength_8188E_FW_WoWLAN 15764
extern const u8 Array_8188E_FW_WoWLAN[ArrayLength_8188E_FW_WoWLAN];
#endif

21
include/HalHWImg8188E_MAC.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_MAC_8188E_HW_IMG_H
#define __INC_MAC_8188E_HW_IMG_H

21
include/HalHWImg8188E_RF.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_RF_8188E_HW_IMG_H
#define __INC_RF_8188E_HW_IMG_H

30
include/HalPhyRf.h
View file

@ -1,30 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL_PHY_RF_H__
#define __HAL_PHY_RF_H__
#define ODM_TARGET_CHNL_NUM_2G_5G 59
void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm);
u8 ODM_GetRightChnlPlaceforIQK(u8 chnl);
#endif /* #ifndef __HAL_PHY_RF_H__ */

26
include/HalPhyRf_8188e.h
View file

@ -1,22 +1,5 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL_PHY_RF_8188E_H__
#define __HAL_PHY_RF_8188E_H__
@ -47,12 +30,7 @@ void PHY_DigitalPredistortion_8188E(struct adapter *pAdapter);
void _PHY_SaveADDARegisters(struct adapter *pAdapter, u32 *ADDAReg,
u32 *ADDABackup, u32 RegisterNum);
void _PHY_PathADDAOn(struct adapter *pAdapter, u32 *ADDAReg,
bool isPathAOn, bool is2T);
void _PHY_MACSettingCalibration(struct adapter *pAdapter, u32 *MACReg,
u32 *MACBackup);
void _PHY_PathAStandBy(struct adapter *pAdapter);
#endif /* #ifndef __HAL_PHY_RF_8188E_H__ */

77
include/HalPwrSeqCmd.h
View file

@ -1,35 +1,14 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HALPWRSEQCMD_H__
#define __HALPWRSEQCMD_H__
#include <drv_types.h>
#include "drv_types.h"
/*---------------------------------------------*/
/* 3 The value of cmd: 4 bits */
/*---------------------------------------------*/
#define PWR_CMD_READ 0x00
/* offset: the read register offset */
/* msk: the mask of the read value */
/* value: N/A, left by 0 */
/* note: dirver shall implement this function by read & msk */
#define PWR_CMD_WRITE 0x01
/* offset: the read register offset */
@ -57,43 +36,6 @@
/* msk: N/A */
/* value: N/A */
/*---------------------------------------------*/
/* 3 The value of base: 4 bits */
/*---------------------------------------------*/
/* define the base address of each block */
#define PWR_BASEADDR_MAC 0x00
#define PWR_BASEADDR_USB 0x01
#define PWR_BASEADDR_PCIE 0x02
#define PWR_BASEADDR_SDIO 0x03
/*---------------------------------------------*/
/* 3 The value of interface_msk: 4 bits */
/*---------------------------------------------*/
#define PWR_INTF_SDIO_MSK BIT(0)
#define PWR_INTF_USB_MSK BIT(1)
#define PWR_INTF_PCI_MSK BIT(2)
#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
/* 3 The value of fab_msk: 4 bits */
/*---------------------------------------------*/
#define PWR_FAB_TSMC_MSK BIT(0)
#define PWR_FAB_UMC_MSK BIT(1)
#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/*---------------------------------------------*/
/* 3 The value of cut_msk: 8 bits */
/*---------------------------------------------*/
#define PWR_CUT_TESTCHIP_MSK BIT(0)
#define PWR_CUT_A_MSK BIT(1)
#define PWR_CUT_B_MSK BIT(2)
#define PWR_CUT_C_MSK BIT(3)
#define PWR_CUT_D_MSK BIT(4)
#define PWR_CUT_E_MSK BIT(5)
#define PWR_CUT_F_MSK BIT(6)
#define PWR_CUT_G_MSK BIT(7)
#define PWR_CUT_ALL_MSK 0xFF
enum pwrseq_cmd_delat_unit {
PWRSEQ_DELAY_US,
PWRSEQ_DELAY_MS,
@ -101,26 +43,17 @@ enum pwrseq_cmd_delat_unit {
struct wl_pwr_cfg {
u16 offset;
u8 cut_msk;
u8 fab_msk:4;
u8 interface_msk:4;
u8 base:4;
u8 cmd:4;
u8 msk;
u8 value;
};
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk
#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk
#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk
#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
/* Prototype of protected function. */
u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 CutVersion, u8 FabVersion,
u8 InterfaceType, struct wl_pwr_cfg PwrCfgCmd[]);
u8 HalPwrSeqCmdParsing(struct adapter *padapter, struct wl_pwr_cfg PwrCfgCmd[]);
#endif

127
include/HalVerDef.h
View file

@ -1,43 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL_VERSION_DEF_H__
#define __HAL_VERSION_DEF_H__
enum HAL_IC_TYPE {
CHIP_8192S = 0,
CHIP_8188C = 1,
CHIP_8192C = 2,
CHIP_8192D = 3,
CHIP_8723A = 4,
CHIP_8188E = 5,
CHIP_8881A = 6,
CHIP_8812A = 7,
CHIP_8821A = 8,
CHIP_8723B = 9,
CHIP_8192E = 10,
};
enum HAL_CHIP_TYPE {
TEST_CHIP = 0,
NORMAL_CHIP = 1,
FPGA = 2,
};
enum HAL_CUT_VERSION {
@ -46,8 +14,6 @@ enum HAL_CUT_VERSION {
C_CUT_VERSION = 2,
D_CUT_VERSION = 3,
E_CUT_VERSION = 4,
F_CUT_VERSION = 5,
G_CUT_VERSION = 6,
};
enum HAL_VENDOR {
@ -55,112 +21,23 @@ enum HAL_VENDOR {
CHIP_VENDOR_UMC = 1,
};
enum HAL_RF_TYPE {
RF_TYPE_1T1R = 0,
RF_TYPE_1T2R = 1,
RF_TYPE_2T2R = 2,
RF_TYPE_2T3R = 3,
RF_TYPE_2T4R = 4,
RF_TYPE_3T3R = 5,
RF_TYPE_3T4R = 6,
RF_TYPE_4T4R = 7,
};
struct HAL_VERSION {
enum HAL_IC_TYPE ICType;
enum HAL_CHIP_TYPE ChipType;
enum HAL_CUT_VERSION CUTVersion;
enum HAL_VENDOR VendorType;
enum HAL_RF_TYPE RFType;
u8 ROMVer;
};
/* Get element */
#define GET_CVID_IC_TYPE(version) (((version).ICType))
#define GET_CVID_CHIP_TYPE(version) (((version).ChipType))
#define GET_CVID_RF_TYPE(version) (((version).RFType))
#define GET_CVID_MANUFACTUER(version) (((version).VendorType))
#define GET_CVID_CUT_VERSION(version) (((version).CUTVersion))
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
/* Common Macro. -- */
/* HAL_VERSION VersionID */
/* HAL_IC_TYPE_E */
#define IS_81XXC(version) \
(((GET_CVID_IC_TYPE(version) == CHIP_8192C) || \
(GET_CVID_IC_TYPE(version) == CHIP_8188C)) ? true : false)
#define IS_8723_SERIES(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8723A) ? true : false)
#define IS_92D(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8192D) ? true : false)
#define IS_8188E(version) \
((GET_CVID_IC_TYPE(version) == CHIP_8188E) ? true : false)
/* HAL_CHIP_TYPE_E */
#define IS_TEST_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == TEST_CHIP) ? true : false)
#define IS_NORMAL_CHIP(version) \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false)
/* HAL_CUT_VERSION_E */
#define IS_A_CUT(version) \
((GET_CVID_CUT_VERSION(version) == A_CUT_VERSION) ? true : false)
#define IS_B_CUT(version) \
((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? true : false)
#define IS_C_CUT(version) \
((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? true : false)
#define IS_D_CUT(version) \
((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? true : false)
#define IS_E_CUT(version) \
((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? true : false)
/* HAL_VENDOR_E */
#define IS_CHIP_VENDOR_TSMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_TSMC) ? true : false)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
/* HAL_RF_TYPE_E */
#define IS_1T1R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
#define IS_1T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
#define IS_2T2R(version) \
((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
/* Chip version Macro. -- */
#define IS_81XXC_TEST_CHIP(version) \
((IS_81XXC(version) && (!IS_NORMAL_CHIP(version))) ? true : false)
#define IS_92C_SERIAL(version) \
((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_A_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_B_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_B_CUT(version) ? true : false) : false) : false)
#define IS_81xxC_VENDOR_UMC_C_CUT(version) \
(IS_81XXC(version) ? (IS_CHIP_VENDOR_UMC(version) ? \
(IS_C_CUT(version) ? true : false) : false) : false)
#define IS_NORMAL_CHIP92D(version) \
((IS_92D(version)) ? \
((GET_CVID_CHIP_TYPE(version) == NORMAL_CHIP) ? true : false) : false)
#define IS_92D_SINGLEPHY(version) \
((IS_92D(version)) ? (IS_2T2R(version) ? true : false) : false)
#define IS_92D_C_CUT(version) \
((IS_92D(version)) ? (IS_C_CUT(version) ? true : false) : false)
#define IS_92D_D_CUT(version) \
((IS_92D(version)) ? (IS_D_CUT(version) ? true : false) : false)
#define IS_92D_E_CUT(version) \
((IS_92D(version)) ? (IS_E_CUT(version) ? true : false) : false)
#define IS_8723A_A_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_A_CUT(version) ? true : false) : false)
#define IS_8723A_B_CUT(version) \
((IS_8723_SERIES(version)) ? (IS_B_CUT(version) ? true : false) : false)
#endif

43
include/autoconf.h
View file

@ -1,43 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* temporarily flag ******* */
/*
* Public General Config
*/
#define RTL871X_MODULE_NAME "88EU"
#define DRV_NAME "rtl8188eu"
/*
* Internal General Config
*/
#define CONFIG_AP_MODE
#define CONFIG_P2P
#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */
#define CONFIG_BR_EXT_BRNAME "br0"
/*
* Debug Related Config
*/
#define DBG 1

67
include/basic_types.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __BASIC_TYPES_H__
#define __BASIC_TYPES_H__
@ -133,51 +117,6 @@ value to host byte ordering.*/
BIT_LEN_MASK_8(__bitlen) \
)
/* Description:
* Mask subfield (continuous bits in little-endian) of 4-byte value
* and return the result in 4-byte value in host byte ordering.
*/
#define LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P4BYTE_TO_HOST_4BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen)) \
)
#define LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P2BYTE_TO_HOST_2BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen)) \
)
#define LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
( \
LE_P1BYTE_TO_HOST_1BYTE(__pstart) & \
(~BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen)) \
)
/* Description:
* Set subfield of little-endian 4-byte value to specified value.
*/
#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u32 *)(__pstart)) = \
( \
LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
)
#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u16 *)(__pstart)) = \
( \
LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
);
#define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
*((u8 *)(__pstart)) = EF1BYTE \
( \
LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) | \
((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
)
/* Get the N-bytes aligment offset from the current length */
#define N_BYTE_ALIGMENT(__value, __aligment) ((__aligment == 1) ? \
(__value) : (((__value + __aligment - 1) / __aligment) * __aligment))

32
include/cmd_osdep.h
View file

@ -1,32 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CMD_OSDEP_H_
#define __CMD_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
extern int _rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
extern int _rtw_init_evt_priv(struct evt_priv *pevtpriv);
extern void _rtw_free_cmd_priv(struct cmd_priv *pcmdpriv);
extern int _rtw_enqueue_cmd(struct __queue *queue, struct cmd_obj *obj);
extern struct cmd_obj *_rtw_dequeue_cmd(struct __queue *queue);
#endif

179
include/drv_types.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
/*-----------------------------------------------------------------------------
For type defines and data structure defines
@ -27,54 +11,32 @@
#define __DRV_TYPES_H__
#define DRV_NAME "r8188eu"
#define CONFIG_88EU_AP_MODE 1
#define CONFIG_88EU_P2P 1
#include <osdep_service.h>
#include <wlan_bssdef.h>
#include <drv_types_linux.h>
#include <rtw_ht.h>
#include <rtw_cmd.h>
#include <rtw_xmit.h>
#include <rtw_recv.h>
#include <hal_intf.h>
#include <hal_com.h>
#include <rtw_qos.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
#include <rtw_debug.h>
#include <rtw_rf.h>
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_p2p.h>
#include <rtw_ap.h>
#include <rtw_mp.h>
#include <rtw_br_ext.h>
#include "osdep_service.h"
#include "wlan_bssdef.h"
#include "rtw_ht.h"
#include "rtw_cmd.h"
#include "rtw_xmit.h"
#include "rtw_recv.h"
#include "hal_intf.h"
#include "hal_com.h"
#include "rtw_security.h"
#include "rtw_pwrctrl.h"
#include "rtw_io.h"
#include "rtw_eeprom.h"
#include "sta_info.h"
#include "rtw_mlme.h"
#include "rtw_debug.h"
#include "rtw_rf.h"
#include "rtw_event.h"
#include "rtw_led.h"
#include "rtw_mlme_ext.h"
#include "rtw_p2p.h"
#include "rtw_ap.h"
#include "rtw_br_ext.h"
#include "rtl8188e_hal.h"
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
#define SPEC_DEV_ID_ENABLE_PS BIT(2)
#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3)
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id {
u32 flags;
u16 idVendor;
u16 idProduct;
};
#define DRIVERVERSION "v4.1.4_6773.20130222"
struct registry_priv {
u8 chip_version;
@ -101,7 +63,6 @@ struct registry_priv {
u8 short_retry_lmt;
u16 busy_thresh;
u8 ack_policy;
u8 mp_mode;
u8 software_encrypt;
u8 software_decrypt;
u8 acm_method;
@ -125,7 +86,6 @@ struct registry_priv {
u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
u8 lowrate_two_xmit;
u8 rf_config;
u8 low_power;
u8 wifi_spec;/* !turbo_mode */
@ -154,55 +114,35 @@ struct registry_priv {
u8 notch_filter;
};
/* For registry parameters */
#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field))
#define RGTRY_SZ(field) sizeof(((struct registry_priv *)0)->field)
#define BSSID_OFT(field) ((u32)FIELD_OFFSET(struct wlan_bssid_ex, field))
#define BSSID_SZ(field) sizeof(((struct wlan_bssid_ex *)0)->field)
#define MAX_CONTINUAL_URB_ERR 4
struct rt_firmware {
u8 *szFwBuffer;
u32 ulFwLength;
u8 *data;
u32 size;
};
struct dvobj_priv {
struct adapter *if1;
struct adapter *if2;
/* For 92D, DMDP have 2 interface. */
u8 InterfaceNumber;
u8 NumInterfaces;
/* In /Out Pipe information */
int RtInPipe[2];
int RtInPipe;
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
u8 irq_alloc;
struct rt_firmware firmware;
/*-------- below is for USB INTERFACE --------*/
u8 nr_endpoint;
u8 ishighspeed;
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; /* endpoint number */
int RegUsbSS;
struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
u8 *usb_alloc_vendor_req_buf;
u8 *usb_vendor_req_buf;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
ATOMIC_T continual_urb_error;
u8 signal_strength;
atomic_t continual_urb_error;
};
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
@ -212,32 +152,8 @@ static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
return &dvobj->pusbintf->dev;
};
enum _IFACE_TYPE {
IFACE_PORT0, /* mapping to port0 for C/D series chips */
IFACE_PORT1, /* mapping to port1 for C/D series chip */
MAX_IFACE_PORT,
};
enum _ADAPTER_TYPE {
PRIMARY_ADAPTER,
SECONDARY_ADAPTER,
MAX_ADAPTER,
};
enum driver_state {
DRIVER_NORMAL = 0,
DRIVER_DISAPPEAR = 1,
DRIVER_REPLACE_DONGLE = 2,
};
struct adapter {
int DriverState;/* for disable driver using module, use dongle toi
* replace module. */
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
int bDongle;/* build-in module or external dongle */
u16 chip_type;
u16 HardwareType;
u16 interface_type;/* USB,SDIO,SPI,PCI */
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
@ -253,36 +169,18 @@ struct adapter {
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
struct mp_priv mppriv;
#ifdef CONFIG_88EU_AP_MODE
struct hostapd_priv *phostapdpriv;
#endif
struct wifidirect_info wdinfo;
void *HalData;
u32 hal_data_sz;
struct hal_ops HalFunc;
struct hal_data_8188e haldata;
s32 bDriverStopped;
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 bDriverIsGoingToUnload;
u8 init_adpt_in_progress;
u8 bHaltInProgress;
s8 signal_strength;
void *cmdThread;
void *evtThread;
void *xmitThread;
void *recvThread;
void (*intf_start)(struct adapter *adapter);
void (*intf_stop)(struct adapter *adapter);
struct net_device *pnetdev;
@ -302,18 +200,15 @@ struct adapter {
int net_closed;
u8 bFWReady;
u8 bBTFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
/* The driver will show up the desired channel number
* when this flag is 1. */
u8 bNotifyChannelChange;
#ifdef CONFIG_88EU_P2P
/* The driver will show the current P2P status when the
* upper application reads it. */
u8 bShowGetP2PState;
#endif
struct adapter *pbuddy_adapter;
struct mutex *hw_init_mutex;
@ -321,17 +216,13 @@ struct adapter {
spinlock_t br_ext_lock;
struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
int pppoe_connection_in_progress;
unsigned char pppoe_addr[MACADDRLEN];
unsigned char scdb_mac[MACADDRLEN];
unsigned char pppoe_addr[ETH_ALEN];
unsigned char scdb_mac[ETH_ALEN];
unsigned char scdb_ip[4];
struct nat25_network_db_entry *scdb_entry;
unsigned char br_mac[MACADDRLEN];
unsigned char br_mac[ETH_ALEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;
u8 fix_rate;
unsigned char in_cta_test;
};
#define adapter_to_dvobj(adapter) (adapter->dvobj)

23
include/drv_types_linux.h
View file

@ -1,23 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __DRV_TYPES_LINUX_H__
#define __DRV_TYPES_LINUX_H__
#endif

41
include/ethernet.h
View file

@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*! \file */
#ifndef __INC_ETHERNET_H
#define __INC_ETHERNET_H
#define ETHERNET_ADDRESS_LENGTH 6 /* Ethernet Address Length */
#define ETHERNET_HEADER_SIZE 14 /* Ethernet Header Length */
#define LLC_HEADER_SIZE 6 /* LLC Header Length */
#define TYPE_LENGTH_FIELD_SIZE 2 /* Type/Length Size */
#define MINIMUM_ETHERNET_PACKET_SIZE 60 /* Min Ethernet Packet Size */
#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 /* Max Ethernet Packet Size */
/* Is Multicast Address? */
#define RT_ETH_IS_MULTICAST(_addr) ((((u8 *)(_addr))[0]&0x01) != 0)
#define RT_ETH_IS_BROADCAST(_addr) ( \
((u8 *)(_addr))[0] == 0xff && \
((u8 *)(_addr))[1] == 0xff && \
((u8 *)(_addr))[2] == 0xff && \
((u8 *)(_addr))[3] == 0xff && \
((u8 *)(_addr))[4] == 0xff && \
((u8 *)(_addr))[5] == 0xff) /* Is Broadcast Address? */
#endif /* #ifndef __INC_ETHERNET_H */

32
include/h2clbk.h
View file

@ -1,32 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _H2CLBK_H_
#include <rtl8711_spec.h>
#include <TypeDef.h>
void _lbk_cmd(struct adapter *adapter);
void _lbk_rsp(struct adapter *adapter);
void _lbk_evt(IN struct adapter *adapter);
void h2c_event_callback(unsigned char *dev, unsigned char *pbuf);

25
include/hal_com.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
@ -164,9 +148,6 @@ void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg);
bool Hal_MappingOutPipe(struct adapter *pAdapter, u8 NumOutPipe);
void hal_init_macaddr(struct adapter *adapter);
void c2h_evt_clear(struct adapter *adapter);
s32 c2h_evt_read(struct adapter *adapter, u8 *buf);
#endif /* __HAL_COMMON_H__ */

393
include/hal_intf.h
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@ -1,113 +1,41 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2012 Realtek Corporation. */
#ifndef __HAL_INTF_H__
#define __HAL_INTF_H__
#include <osdep_service.h>
#include <drv_types.h>
#include <Hal8188EPhyCfg.h>
enum RTL871X_HCI_TYPE {
RTW_PCIE = BIT0,
RTW_USB = BIT1,
RTW_SDIO = BIT2,
RTW_GSPI = BIT3,
};
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
RTL8188C_8192C,
RTL8192D,
RTL8723A,
RTL8188E,
MAX_CHIP_TYPE
};
#include "osdep_service.h"
#include "drv_types.h"
#include "Hal8188EPhyCfg.h"
enum hw_variables {
HW_VAR_MEDIA_STATUS,
HW_VAR_MEDIA_STATUS1,
HW_VAR_SET_OPMODE,
HW_VAR_MAC_ADDR,
HW_VAR_BSSID,
HW_VAR_INIT_RTS_RATE,
HW_VAR_BASIC_RATE,
HW_VAR_TXPAUSE,
HW_VAR_BCN_FUNC,
HW_VAR_CORRECT_TSF,
HW_VAR_CHECK_BSSID,
HW_VAR_MLME_DISCONNECT,
HW_VAR_MLME_SITESURVEY,
HW_VAR_MLME_JOIN,
HW_VAR_BEACON_INTERVAL,
HW_VAR_SLOT_TIME,
HW_VAR_RESP_SIFS,
HW_VAR_ACK_PREAMBLE,
HW_VAR_SEC_CFG,
HW_VAR_BCN_VALID,
HW_VAR_RF_TYPE,
HW_VAR_DM_FLAG,
HW_VAR_DM_FUNC_OP,
HW_VAR_DM_FUNC_SET,
HW_VAR_DM_FUNC_CLR,
HW_VAR_CAM_EMPTY_ENTRY,
HW_VAR_CAM_INVALID_ALL,
HW_VAR_CAM_WRITE,
HW_VAR_CAM_READ,
HW_VAR_AC_PARAM_VO,
HW_VAR_AC_PARAM_VI,
HW_VAR_AC_PARAM_BE,
HW_VAR_AC_PARAM_BK,
HW_VAR_ACM_CTRL,
HW_VAR_AMPDU_MIN_SPACE,
HW_VAR_AMPDU_FACTOR,
HW_VAR_RXDMA_AGG_PG_TH,
HW_VAR_SET_RPWM,
HW_VAR_H2C_FW_PWRMODE,
HW_VAR_H2C_FW_JOINBSSRPT,
HW_VAR_FWLPS_RF_ON,
HW_VAR_H2C_FW_P2P_PS_OFFLOAD,
HW_VAR_TDLS_WRCR,
HW_VAR_TDLS_INIT_CH_SEN,
HW_VAR_TDLS_RS_RCR,
HW_VAR_TDLS_DONE_CH_SEN,
HW_VAR_INITIAL_GAIN,
HW_VAR_TRIGGER_GPIO_0,
HW_VAR_BT_SET_COEXIST,
HW_VAR_BT_ISSUE_DELBA,
HW_VAR_CURRENT_ANTENNA,
HW_VAR_ANTENNA_DIVERSITY_LINK,
HW_VAR_ANTENNA_DIVERSITY_SELECT,
HW_VAR_SWITCH_EPHY_WoWLAN,
HW_VAR_EFUSE_USAGE,
HW_VAR_EFUSE_BYTES,
HW_VAR_EFUSE_BT_USAGE,
HW_VAR_EFUSE_BT_BYTES,
HW_VAR_FIFO_CLEARN_UP,
HW_VAR_CHECK_TXBUF,
HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation,
* power control for MAC only */
/* The valid upper nav range for the HW updating, if the true value is
* larger than the upper range, the HW won't update it. */
/* Unit in microsecond. 0 means disable this function. */
HW_VAR_NAV_UPPER,
HW_VAR_RPT_TIMER_SETTING,
HW_VAR_TX_RPT_MAX_MACID,
HW_VAR_H2C_MEDIA_STATUS_RPT,
@ -115,315 +43,52 @@ enum hw_variables {
};
enum hal_def_variable {
HAL_DEF_UNDERCORATEDSMOOTHEDPWDB,
HAL_DEF_IS_SUPPORT_ANT_DIV,
HAL_DEF_CURRENT_ANTENNA,
HAL_DEF_DRVINFO_SZ,
HAL_DEF_MAX_RECVBUF_SZ,
HAL_DEF_RX_PACKET_OFFSET,
HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */
HAL_DEF_DBG_DM_FUNC,/* for dbg */
HAL_DEF_RA_DECISION_RATE,
HAL_DEF_RA_SGI,
HAL_DEF_PT_PWR_STATUS,
HW_VAR_MAX_RX_AMPDU_FACTOR,
HW_DEF_RA_INFO_DUMP,
HAL_DEF_DBG_DUMP_TXPKT,
HW_DEF_FA_CNT_DUMP,
HW_DEF_ODM_DBG_FLAG,
};
enum hal_odm_variable {
HAL_ODM_STA_INFO,
HAL_ODM_P2P_STATE,
HAL_ODM_WIFI_DISPLAY_STATE,
};
enum hal_intf_ps_func {
HAL_USB_SELECT_SUSPEND,
HAL_MAX_ID,
};
typedef s32 (*c2h_id_filter)(u8 id);
struct hal_ops {
u32 (*hal_power_on)(struct adapter *padapter);
u32 (*hal_init)(struct adapter *padapter);
u32 (*hal_deinit)(struct adapter *padapter);
void (*free_hal_data)(struct adapter *padapter);
u32 (*inirp_init)(struct adapter *padapter);
u32 (*inirp_deinit)(struct adapter *padapter);
s32 (*init_xmit_priv)(struct adapter *padapter);
void (*free_xmit_priv)(struct adapter *padapter);
s32 (*init_recv_priv)(struct adapter *padapter);
void (*free_recv_priv)(struct adapter *padapter);
void (*InitSwLeds)(struct adapter *padapter);
void (*DeInitSwLeds)(struct adapter *padapter);
void (*dm_init)(struct adapter *padapter);
void (*dm_deinit)(struct adapter *padapter);
void (*read_chip_version)(struct adapter *padapter);
void (*init_default_value)(struct adapter *padapter);
void (*intf_chip_configure)(struct adapter *padapter);
void (*read_adapter_info)(struct adapter *padapter);
void (*enable_interrupt)(struct adapter *padapter);
void (*disable_interrupt)(struct adapter *padapter);
s32 (*interrupt_handler)(struct adapter *padapter);
void (*set_bwmode_handler)(struct adapter *padapter,
enum ht_channel_width Bandwidth,
u8 Offset);
void (*set_channel_handler)(struct adapter *padapter, u8 channel);
void (*hal_dm_watchdog)(struct adapter *padapter);
void (*SetHwRegHandler)(struct adapter *padapter, u8 variable,
u8 *val);
void (*GetHwRegHandler)(struct adapter *padapter, u8 variable,
u8 *val);
u8 (*GetHalDefVarHandler)(struct adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
u8 (*SetHalDefVarHandler)(struct adapter *padapter,
enum hal_def_variable eVariable,
void *pValue);
void (*GetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*SetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*UpdateRAMaskHandler)(struct adapter *padapter,
u32 mac_id, u8 rssi_level);
void (*SetBeaconRelatedRegistersHandler)(struct adapter *padapter);
void (*Add_RateATid)(struct adapter *adapter, u32 bitmap, u8 arg,
u8 rssi_level);
void (*run_thread)(struct adapter *adapter);
void (*cancel_thread)(struct adapter *adapter);
u8 (*AntDivBeforeLinkHandler)(struct adapter *adapter);
void (*AntDivCompareHandler)(struct adapter *adapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
u8 (*interface_ps_func)(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 (*hal_xmit)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 (*hal_xmitframe_enqueue)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask);
void (*write_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask);
void (*write_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
void (*EfusePowerSwitch)(struct adapter *padapter, u8 bWrite,
u8 PwrState);
void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset,
u16 _size_byte, u8 *pbuf, bool bPseudoTest);
void (*EFUSEGetEfuseDefinition)(struct adapter *padapter, u8 efuseType,
u8 type, void *pOut, bool bPseudoTest);
u16 (*EfuseGetCurrentSize)(struct adapter *padapter, u8 efuseType,
bool bPseudoTest);
int (*Efuse_PgPacketRead)(struct adapter *adapter, u8 offset,
u8 *data, bool bPseudoTest);
int (*Efuse_PgPacketWrite)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter,
u16 efuse_addr, u8 word_en,
u8 *data, bool bPseudoTest);
bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool test);
void (*sreset_init_value)(struct adapter *padapter);
void (*sreset_reset_value)(struct adapter *padapter);
void (*silentreset)(struct adapter *padapter);
void (*sreset_xmit_status_check)(struct adapter *padapter);
void (*sreset_linked_status_check) (struct adapter *padapter);
u8 (*sreset_get_wifi_status)(struct adapter *padapter);
int (*IOL_exec_cmds_sync)(struct adapter *padapter,
struct xmit_frame *frame, u32 max_wait,
u32 bndy_cnt);
void (*hal_notch_filter)(struct adapter *adapter, bool enable);
void (*hal_reset_security_engine)(struct adapter *adapter);
s32 (*c2h_handler)(struct adapter *padapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
};
enum rt_eeprom_type {
EEPROM_93C46,
EEPROM_93C56,
EEPROM_BOOT_EFUSE,
};
#define RF_CHANGE_BY_INIT 0
#define RF_CHANGE_BY_IPS BIT28
#define RF_CHANGE_BY_PS BIT29
#define RF_CHANGE_BY_HW BIT30
#define RF_CHANGE_BY_SW BIT31
enum hardware_type {
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723AE,
HARDWARE_TYPE_RTL8723AU,
HARDWARE_TYPE_RTL8723AS,
HARDWARE_TYPE_RTL8188EE,
HARDWARE_TYPE_RTL8188EU,
HARDWARE_TYPE_RTL8188ES,
HARDWARE_TYPE_MAX,
};
/* RTL8188E Series */
#define IS_HARDWARE_TYPE_8188EE(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EE)
#define IS_HARDWARE_TYPE_8188EU(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EU)
#define IS_HARDWARE_TYPE_8188ES(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188ES)
#define IS_HARDWARE_TYPE_8188E(_Adapter) \
(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || \
IS_HARDWARE_TYPE_8188ES(_Adapter))
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
void rtw_hal_def_value_init(struct adapter *padapter);
void rtl8188eu_interface_configure(struct adapter *adapt);
void ReadAdapterInfo8188EU(struct adapter *Adapter);
void rtl8188eu_init_default_value(struct adapter *adapt);
void rtl8188e_SetHalODMVar(struct adapter *Adapter, void *pValue1, bool bSet);
u32 rtl8188eu_InitPowerOn(struct adapter *adapt);
void rtl8188e_EfusePowerSwitch(struct adapter *pAdapter, u8 PwrState);
void rtl8188e_ReadEFuse(struct adapter *Adapter, u16 _offset, u16 _size_byte, u8 *pbuf);
void rtw_hal_free_data(struct adapter *padapter);
void hal_notch_filter_8188e(struct adapter *adapter, bool enable);
void rtw_hal_dm_init(struct adapter *padapter);
void rtw_hal_dm_deinit(struct adapter *padapter);
void rtw_hal_sw_led_init(struct adapter *padapter);
void rtw_hal_sw_led_deinit(struct adapter *padapter);
void SetBeaconRelatedRegisters8188EUsb(struct adapter *adapt);
void UpdateHalRAMask8188EUsb(struct adapter *adapt, u32 mac_id, u8 rssi_level);
int rtl8188e_IOL_exec_cmds_sync(struct adapter *adapter,
struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt);
void SetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
void GetHalDefVar8188EUsb(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue);
unsigned int rtl8188eu_inirp_init(struct adapter *Adapter);
void SetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
void GetHwReg8188EU(struct adapter *Adapter, u8 variable, u8 *val);
u32 rtw_hal_power_on(struct adapter *padapter);
uint rtw_hal_init(struct adapter *padapter);
uint rtw_hal_deinit(struct adapter *padapter);
void rtw_hal_stop(struct adapter *padapter);
void rtw_hal_set_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val);
void rtw_hal_chip_configure(struct adapter *padapter);
void rtw_hal_read_chip_info(struct adapter *padapter);
void rtw_hal_read_chip_version(struct adapter *padapter);
u8 rtw_hal_set_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
u8 rtw_hal_get_def_var(struct adapter *padapter,
enum hal_def_variable eVariable, void *pValue);
void rtw_hal_set_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable, void *pValue1,
bool bSet);
void rtw_hal_get_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void rtw_hal_enable_interrupt(struct adapter *padapter);
void rtw_hal_disable_interrupt(struct adapter *padapter);
u32 rtw_hal_inirp_init(struct adapter *padapter);
u32 rtw_hal_inirp_deinit(struct adapter *padapter);
u8 rtw_hal_intf_ps_func(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 rtw_hal_init_xmit_priv(struct adapter *padapter);
void rtw_hal_free_xmit_priv(struct adapter *padapter);
s32 rtw_hal_init_recv_priv(struct adapter *padapter);
void rtw_hal_free_recv_priv(struct adapter *padapter);
u32 rtl8188eu_hal_init(struct adapter *Adapter);
u32 rtl8188eu_hal_deinit(struct adapter *Adapter);
void rtw_hal_update_ra_mask(struct adapter *padapter, u32 mac_id, u8 level);
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg, u8 level);
void rtw_hal_clone_data(struct adapter *dst_adapt,
struct adapter *src_adapt);
void rtw_hal_start_thread(struct adapter *padapter);
void rtw_hal_stop_thread(struct adapter *padapter);
void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
u32 rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
s32 rtw_hal_interrupt_handler(struct adapter *padapter);
void rtw_hal_set_bwmode(struct adapter *padapter,
enum ht_channel_width Bandwidth, u8 Offset);
void rtw_hal_set_chan(struct adapter *padapter, u8 channel);
void rtw_hal_dm_watchdog(struct adapter *padapter);
u8 rtw_hal_antdiv_before_linked(struct adapter *padapter);
void rtw_hal_antdiv_rssi_compared(struct adapter *padapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
void rtw_hal_sreset_init(struct adapter *padapter);
void rtw_hal_sreset_reset(struct adapter *padapter);
void rtw_hal_sreset_reset_value(struct adapter *padapter);
void rtw_hal_sreset_xmit_status_check(struct adapter *padapter);
void rtw_hal_sreset_linked_status_check(struct adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status(struct adapter *padapter);
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt);
void rtw_hal_notch_filter(struct adapter *adapter, bool enable);
void rtw_hal_reset_security_engine(struct adapter *adapter);
s32 rtw_hal_c2h_handler(struct adapter *adapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter);
void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_do_join(struct adapter *padapter);

400
include/ieee80211.h
View file

@ -1,68 +1,21 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __IEEE80211_H
#define __IEEE80211_H
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
#include "wifi.h"
#include <linux/wireless.h>
#define MGMT_QUEUE_NUM 5
#define ETH_ALEN 6
#define ETH_TYPE_LEN 2
#define PAYLOAD_TYPE_LEN 1
#ifdef CONFIG_88EU_AP_MODE
#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28)
/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */
enum {
RTL871X_HOSTAPD_FLUSH = 1,
RTL871X_HOSTAPD_ADD_STA = 2,
RTL871X_HOSTAPD_REMOVE_STA = 3,
RTL871X_HOSTAPD_GET_INFO_STA = 4,
/* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */
RTL871X_HOSTAPD_GET_WPAIE_STA = 5,
RTL871X_SET_ENCRYPTION = 6,
RTL871X_GET_ENCRYPTION = 7,
RTL871X_HOSTAPD_SET_FLAGS_STA = 8,
RTL871X_HOSTAPD_GET_RID = 9,
RTL871X_HOSTAPD_SET_RID = 10,
RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11,
RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12,
RTL871X_HOSTAPD_MLME = 13,
RTL871X_HOSTAPD_SCAN_REQ = 14,
RTL871X_HOSTAPD_STA_CLEAR_STATS = 15,
RTL871X_HOSTAPD_SET_BEACON = 16,
RTL871X_HOSTAPD_SET_WPS_BEACON = 17,
RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18,
RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19,
RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20,
RTL871X_HOSTAPD_SET_MACADDR_ACL = 21,
RTL871X_HOSTAPD_ACL_ADD_STA = 22,
RTL871X_HOSTAPD_ACL_REMOVE_STA = 23,
};
/* STA flags */
#define WLAN_STA_AUTH BIT(0)
#define WLAN_STA_ASSOC BIT(1)
@ -80,8 +33,6 @@ enum {
#define WLAN_STA_MAYBE_WPS BIT(13)
#define WLAN_STA_NONERP BIT(31)
#endif
#define IEEE_CMD_SET_WPA_PARAM 1
#define IEEE_CMD_SET_WPA_IE 2
#define IEEE_CMD_SET_ENCRYPTION 3
@ -161,53 +112,34 @@ enum NETWORK_TYPE {
/* Sub-Element */
WIRELESS_11B = BIT(0), /* tx:cck only, rx:cck only, hw: cck */
WIRELESS_11G = BIT(1), /* tx:ofdm only, rx:ofdm & cck, hw:cck & ofdm*/
WIRELESS_11A = BIT(2), /* tx:ofdm only, rx: ofdm only, hw:ofdm only */
WIRELESS_11_24N = BIT(3), /* tx:MCS only, rx:MCS & cck, hw:MCS & cck */
WIRELESS_11_5N = BIT(4), /* tx:MCS only, rx:MCS & ofdm, hw:ofdm only */
WIRELESS_AC = BIT(6),
/* Combination */
/* tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm */
WIRELESS_11BG = (WIRELESS_11B | WIRELESS_11G),
/* tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm */
WIRELESS_11G_24N = (WIRELESS_11G | WIRELESS_11_24N),
/* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11A_5N = (WIRELESS_11A | WIRELESS_11_5N),
/* tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck */
WIRELESS_11BG_24N = (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N),
/* tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only */
WIRELESS_11AGN = (WIRELESS_11A | WIRELESS_11G | WIRELESS_11_24N |
WIRELESS_11_5N),
WIRELESS_11ABGN = (WIRELESS_11A | WIRELESS_11B | WIRELESS_11G |
WIRELESS_11_24N | WIRELESS_11_5N),
};
#define SUPPORTED_24G_NETTYPE_MSK \
(WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N)
#define SUPPORTED_5G_NETTYPE_MSK \
(WIRELESS_11A | WIRELESS_11_5N)
#define IsSupported24G(NetType) \
((NetType) & SUPPORTED_24G_NETTYPE_MSK ? true : false)
#define IsSupported5G(NetType) \
((NetType) & SUPPORTED_5G_NETTYPE_MSK ? true : false)
#define IsEnableHWCCK(NetType) \
IsSupported24G(NetType)
#define IsEnableHWOFDM(NetType) \
((NetType) & (WIRELESS_11G | WIRELESS_11_24N | \
SUPPORTED_5G_NETTYPE_MSK) ? true : false)
#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType)
#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType)
#define IsSupportedTxCCK(NetType) \
((NetType) & (WIRELESS_11B) ? true : false)
#define IsSupportedTxOFDM(NetType) \
((NetType) & (WIRELESS_11G|WIRELESS_11A) ? true : false)
((NetType) & (WIRELESS_11G) ? true : false)
#define IsSupportedTxMCS(NetType) \
((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? true : false)
((NetType) & (WIRELESS_11_24N) ? true : false)
struct ieee_param {
u32 cmd;
@ -220,7 +152,7 @@ struct ieee_param {
struct {
u32 len;
u8 reserved[32];
u8 data[0];
u8 data[];
} wpa_ie;
struct {
int command;
@ -233,9 +165,8 @@ struct ieee_param {
u8 idx;
u8 seq[8]; /* sequence counter (set: RX, get: TX) */
u16 key_len;
u8 key[0];
u8 key[];
} crypt;
#ifdef CONFIG_88EU_AP_MODE
struct {
u16 aid;
u16 capability;
@ -245,37 +176,11 @@ struct ieee_param {
} add_sta;
struct {
u8 reserved[2];/* for set max_num_sta */
u8 buf[0];
u8 buf[];
} bcn_ie;
#endif
} u;
};
#ifdef CONFIG_88EU_AP_MODE
struct ieee_param_ex {
u32 cmd;
u8 sta_addr[ETH_ALEN];
u8 data[0];
};
struct sta_data {
u16 aid;
u16 capability;
int flags;
u32 sta_set;
u8 tx_supp_rates[16];
u32 tx_supp_rates_len;
struct ieee80211_ht_cap ht_cap;
u64 rx_pkts;
u64 rx_bytes;
u64 rx_drops;
u64 tx_pkts;
u64 tx_bytes;
u64 tx_drops;
};
#endif
#define IEEE80211_DATA_LEN 2304
/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section
6.2.1.1.2.
@ -291,14 +196,6 @@ struct sta_data {
/* this is stolen from ipw2200 driver */
#define IEEE_IBSS_MAC_HASH_SIZE 31
struct ieee_ibss_seq {
u8 mac[ETH_ALEN];
u16 seq_num;
u16 frag_num;
unsigned long packet_time;
struct list_head list;
};
struct rtw_ieee80211_hdr {
__le16 frame_ctl;
__le16 duration_id;
@ -318,17 +215,6 @@ struct rtw_ieee80211_hdr_3addr {
u16 seq_ctl;
} __packed;
struct rtw_ieee80211_hdr_qos {
__le16 frame_ctl;
__le16 duration_id;
u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN];
u8 addr3[ETH_ALEN];
u16 seq_ctl;
u8 addr4[ETH_ALEN];
u16 qc;
} __packed;
struct rtw_ieee80211_hdr_3addr_qos {
__le16 frame_ctl;
__le16 duration_id;
@ -339,22 +225,6 @@ struct rtw_ieee80211_hdr_3addr_qos {
u16 qc;
} __packed;
struct eapol {
u8 snap[6];
u16 ethertype;
u8 version;
u8 type;
u16 length;
} __packed;
enum eap_type {
EAP_PACKET = 0,
EAPOL_START,
EAPOL_LOGOFF,
EAPOL_KEY,
EAPOL_ENCAP_ASF_ALERT
};
#define IEEE80211_3ADDR_LEN 24
#define IEEE80211_4ADDR_LEN 30
#define IEEE80211_FCS_LEN 4
@ -629,83 +499,12 @@ struct ieee80211_snap_hdr {
#define IEEE80211_NUM_CCK_RATES 4
#define IEEE80211_OFDM_SHIFT_MASK_A 4
/* NOTE: This data is for statistical purposes; not all hardware provides this
* information for frames received. Not setting these will not cause
* any adverse affects. */
struct ieee80211_rx_stats {
/* u32 mac_time[2]; */
s8 rssi;
u8 signal;
u8 noise;
u8 received_channel;
u16 rate; /* in 100 kbps */
/* u8 control; */
u8 mask;
u8 freq;
u16 len;
};
/* IEEE 802.11 requires that STA supports concurrent reception of at least
* three fragmented frames. This define can be increased to support more
* concurrent frames, but it should be noted that each entry can consume about
* 2 kB of RAM and increasing cache size will slow down frame reassembly. */
#define IEEE80211_FRAG_CACHE_LEN 4
struct ieee80211_frag_entry {
u32 first_frag_time;
uint seq;
uint last_frag;
uint qos; /* jackson */
uint tid; /* jackson */
struct sk_buff *skb;
u8 src_addr[ETH_ALEN];
u8 dst_addr[ETH_ALEN];
};
struct ieee80211_stats {
uint tx_unicast_frames;
uint tx_multicast_frames;
uint tx_fragments;
uint tx_unicast_octets;
uint tx_multicast_octets;
uint tx_deferred_transmissions;
uint tx_single_retry_frames;
uint tx_multiple_retry_frames;
uint tx_retry_limit_exceeded;
uint tx_discards;
uint rx_unicast_frames;
uint rx_multicast_frames;
uint rx_fragments;
uint rx_unicast_octets;
uint rx_multicast_octets;
uint rx_fcs_errors;
uint rx_discards_no_buffer;
uint tx_discards_wrong_sa;
uint rx_discards_undecryptable;
uint rx_message_in_msg_fragments;
uint rx_message_in_bad_msg_fragments;
};
struct ieee80211_softmac_stats {
uint rx_ass_ok;
uint rx_ass_err;
uint rx_probe_rq;
uint tx_probe_rs;
uint tx_beacons;
uint rx_auth_rq;
uint rx_auth_rs_ok;
uint rx_auth_rs_err;
uint tx_auth_rq;
uint no_auth_rs;
uint no_ass_rs;
uint tx_ass_rq;
uint rx_ass_rq;
uint tx_probe_rq;
uint reassoc;
uint swtxstop;
uint swtxawake;
};
#define SEC_KEY_1 (1<<0)
#define SEC_KEY_2 (1<<1)
#define SEC_KEY_3 (1<<2)
@ -725,18 +524,6 @@ struct ieee80211_softmac_stats {
#define WEP_KEYS 4
#define WEP_KEY_LEN 13
struct ieee80211_security {
u16 active_key:2,
enabled:1,
auth_mode:2,
auth_algo:4,
unicast_uses_group:1;
u8 key_sizes[WEP_KEYS];
u8 keys[WEP_KEYS][WEP_KEY_LEN];
u8 level;
u16 flags;
} __packed;
/*
802.11 data frame from AP
@ -752,15 +539,6 @@ Total: 28-2340 bytes
*/
struct ieee80211_header_data {
u16 frame_ctl;
u16 duration_id;
u8 addr1[6];
u8 addr2[6];
u8 addr3[6];
u16 seq_ctrl;
};
#define BEACON_PROBE_SSID_ID_POSITION 12
/* Management Frame Information Element Types */
@ -777,17 +555,6 @@ struct ieee80211_header_data {
#define MFIE_TYPE_RATES_EX 50
#define MFIE_TYPE_GENERIC 221
struct ieee80211_info_element_hdr {
u8 id;
u8 len;
} __packed;
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
} __packed;
/*
* These are the data types that can make up management packets
*
@ -808,49 +575,6 @@ struct ieee80211_info_element {
#define IEEE80211_DEFAULT_TX_ESSID "Penguin"
#define IEEE80211_DEFAULT_BASIC_RATE 10
struct ieee80211_authentication {
struct ieee80211_header_data header;
u16 algorithm;
u16 transaction;
u16 status;
/* struct ieee80211_info_element_hdr info_element; */
} __packed;
struct ieee80211_probe_response {
struct ieee80211_header_data header;
u32 time_stamp[2];
u16 beacon_interval;
u16 capability;
struct ieee80211_info_element info_element;
} __packed;
struct ieee80211_probe_request {
struct ieee80211_header_data header;
} __packed;
struct ieee80211_assoc_request_frame {
struct rtw_ieee80211_hdr_3addr header;
u16 capability;
u16 listen_interval;
struct ieee80211_info_element_hdr info_element;
} __packed;
struct ieee80211_assoc_response_frame {
struct rtw_ieee80211_hdr_3addr header;
u16 capability;
u16 status;
u16 aid;
} __packed;
struct ieee80211_txb {
u8 nr_frags;
u8 encrypted;
u16 reserved;
u16 frag_size;
u16 payload_size;
struct sk_buff *fragments[0];
};
/* SWEEP TABLE ENTRIES NUMBER*/
#define MAX_SWEEP_TAB_ENTRIES 42
#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7
@ -893,44 +617,6 @@ join_res:
> 0: TID
*/
enum ieee80211_state {
/* the card is not linked at all */
IEEE80211_NOLINK = 0,
/* IEEE80211_ASSOCIATING* are for BSS client mode
* the driver shall not perform RX filtering unless
* the state is LINKED.
* The driver shall just check for the state LINKED and
* defaults to NOLINK for ALL the other states (including
* LINKED_SCANNING)
*/
/* the association procedure will start (wq scheduling)*/
IEEE80211_ASSOCIATING,
IEEE80211_ASSOCIATING_RETRY,
/* the association procedure is sending AUTH request*/
IEEE80211_ASSOCIATING_AUTHENTICATING,
/* the association procedure has successfully authentcated
* and is sending association request
*/
IEEE80211_ASSOCIATING_AUTHENTICATED,
/* the link is ok. the card associated to a BSS or linked
* to a ibss cell or acting as an AP and creating the bss
*/
IEEE80211_LINKED,
/* same as LINKED, but the driver shall apply RX filter
* rules as we are in NO_LINK mode. As the card is still
* logically linked, but it is doing a syncro site survey
* then it will be back to LINKED state.
*/
IEEE80211_LINKED_SCANNING,
};
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
@ -948,11 +634,6 @@ static inline int is_broadcast_mac_addr(const u8 *addr)
#define CFG_IEEE80211_RESERVE_FCS (1<<0)
#define CFG_IEEE80211_COMPUTE_FCS (1<<1)
struct tx_pending {
int frag;
struct ieee80211_txb *txb;
};
#define MAXTID 16
#define IEEE_A (1<<0)
@ -960,10 +641,6 @@ struct tx_pending {
#define IEEE_G (1<<2)
#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G)
/* Baron move to ieee80211.c */
int ieee80211_is_empty_essid(const char *essid, int essid_len);
int ieee80211_get_hdrlen(u16 fc);
/* Action category code */
enum rtw_ieee80211_category {
RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0,
@ -1017,26 +694,6 @@ enum rtw_ieee80211_back_actioncode {
RTW_WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum rtw_ieee80211_ht_actioncode {
RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
RTW_WLAN_ACTION_SM_PS = 1,
RTW_WLAN_ACTION_PSPM = 2,
RTW_WLAN_ACTION_PCO_PHASE = 3,
RTW_WLAN_ACTION_MIMO_CSI_MX = 4,
RTW_WLAN_ACTION_MIMO_NONCP_BF = 5,
RTW_WLAN_ACTION_MIMP_CP_BF = 6,
RTW_WLAN_ACTION_ASEL_INDICATES_FB = 7,
RTW_WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum rtw_ieee80211_back_parties {
RTW_WLAN_BACK_RECIPIENT = 0,
RTW_WLAN_BACK_INITIATOR = 1,
RTW_WLAN_BACK_TIMER = 2,
};
#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs)
* 00:50:F2 */
#define WME_OUI_TYPE 2
@ -1165,26 +822,7 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len,
unsigned char *source, unsigned int *frlen);
u8 *rtw_set_ie(u8 *pbuf, int index, uint len, u8 *source, uint *frlen);
enum secondary_ch_offset {
SCN = 0, /* no secondary channel */
SCA = 1, /* secondary channel above */
SCB = 3, /* secondary channel below */
};
u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset);
u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset);
u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
u8 new_ch, u8 ch_switch_cnt);
u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len,
u8 secondary_ch_offset);
u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl,
u8 flags, u16 reason, u16 precedence);
u8 *rtw_get_ie(u8 *pbuf, int index, int *len, int limit);
u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui,
u8 oui_len, u8 *ie, uint *ielen);
int rtw_ies_remove_ie(u8 *ies, uint *ies_len, uint offset,
u8 eid, u8 *oui, u8 oui_len);
void rtw_set_supported_rate(u8 *SupportedRates, uint mode);
@ -1218,11 +856,6 @@ u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
for (ie = (void *)buf; (((u8 *)ie) - ((u8 *)buf) + 1) < buf_len; \
ie = (void *)(((u8 *)ie) + *(((u8 *)ie)+1) + 2))
void dump_ies(u8 *buf, u32 buf_len);
void dump_wps_ie(u8 *ie, u32 ie_len);
#ifdef CONFIG_88EU_P2P
void dump_p2p_ie(u8 *ie, u32 ie_len);
u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen);
u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id,
u8 *buf_attr, u32 *len_attr);
@ -1232,8 +865,6 @@ u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len,
u8 *pdata_attr);
void rtw_wlan_bssid_ex_remove_p2p_attr(struct wlan_bssid_ex *bss_ex,
u8 attr_id);
#endif
uint rtw_get_rateset_len(u8 *rateset);
struct registry_priv;
@ -1241,9 +872,9 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv);
int rtw_get_bit_value_from_ieee_value(u8 val);
uint rtw_is_cckrates_included(u8 *rate);
bool rtw_is_cckrates_included(u8 *rate);
uint rtw_is_cckratesonly_included(u8 *rate);
bool rtw_is_cckratesonly_included(u8 *rate);
int rtw_check_network_type(unsigned char *rate, int ratelen, int channel);
@ -1251,11 +882,6 @@ void rtw_get_bcn_info(struct wlan_network *pnetwork);
void rtw_macaddr_cfg(u8 *mac_addr);
u16 rtw_mcs_rate(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
unsigned char *MCS_rate);
int rtw_action_frame_parse(const u8 *frame, u32 frame_len, u8 *category,
u8 *action);
const char *action_public_str(u8 action);
u16 rtw_mcs_rate(u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40, unsigned char *MCS_rate);
#endif /* IEEE80211_H */

287
include/ieee80211_ext.h
View file

@ -1,287 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __IEEE80211_EXT_H
#define __IEEE80211_EXT_H
#include <osdep_service.h>
#include <drv_types.h>
#define WMM_OUI_TYPE 2
#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0
#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1
#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2
#define WMM_VERSION 1
#define WPA_PROTO_WPA BIT(0)
#define WPA_PROTO_RSN BIT(1)
#define WPA_KEY_MGMT_IEEE8021X BIT(0)
#define WPA_KEY_MGMT_PSK BIT(1)
#define WPA_KEY_MGMT_NONE BIT(2)
#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3)
#define WPA_KEY_MGMT_WPA_NONE BIT(4)
#define WPA_CAPABILITY_PREAUTH BIT(0)
#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6)
#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9)
#define PMKID_LEN 16
struct wpa_ie_hdr {
u8 elem_id;
u8 len;
u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
u8 version[2]; /* little endian */
} __packed;
struct rsn_ie_hdr {
u8 elem_id; /* WLAN_EID_RSN */
u8 len;
u8 version[2]; /* little endian */
} __packed;
struct wme_ac_parameter {
#if defined(__LITTLE_ENDIAN)
/* byte 1 */
u8 aifsn:4,
acm:1,
aci:2,
reserved:1;
/* byte 2 */
u8 eCWmin:4,
eCWmax:4;
#elif defined(__BIG_ENDIAN)
/* byte 1 */
u8 reserved:1,
aci:2,
acm:1,
aifsn:4;
/* byte 2 */
u8 eCWmax:4,
eCWmin:4;
#else
#error "Please fix <endian.h>"
#endif
/* bytes 3 & 4 */
u16 txopLimit;
} __packed;
struct wme_parameter_element {
/* required fields for WME version 1 */
u8 oui[3];
u8 oui_type;
u8 oui_subtype;
u8 version;
u8 acInfo;
u8 reserved;
struct wme_ac_parameter ac[4];
} __packed;
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define WPA_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *)(a), (val))
/* Action category code */
enum ieee80211_category {
WLAN_CATEGORY_SPECTRUM_MGMT = 0,
WLAN_CATEGORY_QOS = 1,
WLAN_CATEGORY_DLS = 2,
WLAN_CATEGORY_BACK = 3,
WLAN_CATEGORY_HT = 7,
WLAN_CATEGORY_WMM = 17,
};
/* SPECTRUM_MGMT action code */
enum ieee80211_spectrum_mgmt_actioncode {
WLAN_ACTION_SPCT_MSR_REQ = 0,
WLAN_ACTION_SPCT_MSR_RPRT = 1,
WLAN_ACTION_SPCT_TPC_REQ = 2,
WLAN_ACTION_SPCT_TPC_RPRT = 3,
WLAN_ACTION_SPCT_CHL_SWITCH = 4,
WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5,
};
/* BACK action code */
enum ieee80211_back_actioncode {
WLAN_ACTION_ADDBA_REQ = 0,
WLAN_ACTION_ADDBA_RESP = 1,
WLAN_ACTION_DELBA = 2,
};
/* HT features action code */
enum ieee80211_ht_actioncode {
WLAN_ACTION_NOTIFY_CH_WIDTH = 0,
WLAN_ACTION_SM_PS = 1,
WLAN_ACTION_PSPM = 2,
WLAN_ACTION_PCO_PHASE = 3,
WLAN_ACTION_MIMO_CSI_MX = 4,
WLAN_ACTION_MIMO_NONCP_BF = 5,
WLAN_ACTION_MIMP_CP_BF = 6,
WLAN_ACTION_ASEL_INDICATES_FB = 7,
WLAN_ACTION_HI_INFO_EXCHG = 8,
};
/* BACK (block-ack) parties */
enum ieee80211_back_parties {
WLAN_BACK_RECIPIENT = 0,
WLAN_BACK_INITIATOR = 1,
WLAN_BACK_TIMER = 2,
};
struct ieee80211_mgmt {
u16 frame_control;
u16 duration;
u8 da[6];
u8 sa[6];
u8 bssid[6];
u16 seq_ctrl;
union {
struct {
u16 auth_alg;
u16 auth_transaction;
u16 status_code;
/* possibly followed by Challenge text */
u8 variable[0];
} __packed auth;
struct {
u16 reason_code;
} __packed deauth;
struct {
u16 capab_info;
u16 listen_interval;
/* followed by SSID and Supported rates */
u8 variable[0];
} __packed assoc_req;
struct {
u16 capab_info;
u16 status_code;
u16 aid;
/* followed by Supported rates */
u8 variable[0];
} __packed assoc_resp, reassoc_resp;
struct {
u16 capab_info;
u16 listen_interval;
u8 current_ap[6];
/* followed by SSID and Supported rates */
u8 variable[0];
} __packed reassoc_req;
struct {
u16 reason_code;
} __packed disassoc;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params, TIM */
u8 variable[0];
} __packed beacon;
struct {
/* only variable items: SSID, Supported rates */
u8 variable[0];
} __packed probe_req;
struct {
__le64 timestamp;
u16 beacon_int;
u16 capab_info;
/* followed by some of SSID, Supported rates,
* FH Params, DS Params, CF Params, IBSS Params */
u8 variable[0];
} __packed probe_resp;
struct {
u8 category;
union {
struct {
u8 action_code;
u8 dialog_token;
u8 status_code;
u8 variable[0];
} __packed wme_action;
struct {
u8 action_code;
u8 dialog_token;
u16 capab;
u16 timeout;
u16 start_seq_num;
} __packed addba_req;
struct {
u8 action_code;
u8 dialog_token;
u16 status;
u16 capab;
u16 timeout;
} __packed addba_resp;
struct {
u8 action_code;
u16 params;
u16 reason_code;
} __packed delba;
structi {
u8 action_code;
/* capab_info for open and confirm,
* reason for close
*/
u16 aux;
/* Followed in plink_confirm by status
* code, AID and supported rates,
* and directly by supported rates in
* plink_open and plink_close
*/
u8 variable[0];
} __packed plink_action;
struct{
u8 action_code;
u8 variable[0];
} __packed mesh_action;
} __packed u;
} __packed action;
} __packed u;
} __packed;
/* mgmt header + 1 byte category code */
#define IEEE80211_MIN_ACTION_SIZE \
FIELD_OFFSET(struct ieee80211_mgmt, u.action.u)
#endif

111
include/if_ether.h
View file

@ -1,111 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_IF_ETHER_H
#define _LINUX_IF_ETHER_H
/*
* IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble
* and FCS/CRC (frame check sequence).
*/
#define ETH_ALEN 6 /* Octets in one ethernet addr */
#define ETH_HLEN 14 /* Total octets in header. */
#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */
#define ETH_DATA_LEN 1500 /* Max. octets in payload */
#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */
/*
* These are the defined Ethernet Protocol ID's.
*/
#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */
#define ETH_P_PUP 0x0200 /* Xerox PUP packet */
#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
#define ETH_P_X25 0x0805 /* CCITT X.25 */
#define ETH_P_ARP 0x0806 /* Address Resolution packet */
#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet */
#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */
#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP */
#define ETH_P_DEC 0x6000 /* DEC Assigned proto */
#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */
#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */
#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */
#define ETH_P_LAT 0x6004 /* DEC LAT */
#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */
#define ETH_P_CUST 0x6006 /* DEC Customer use */
#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */
#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */
#define ETH_P_ATALK 0x809B /* Appletalk DDP */
#define ETH_P_AARP 0x80F3 /* Appletalk AARP */
#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
#define ETH_P_IPX 0x8137 /* IPX over DIX */
#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */
#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */
#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */
#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */
#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport
* over Ethernet
*/
/*
* Non DIX types. Won't clash for 1500 types.
*/
#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */
#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */
#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */
#define ETH_P_802_2 0x0004 /* 802.2 frames */
#define ETH_P_SNAP 0x0005 /* Internal only */
#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */
#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/
#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */
#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */
#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/
#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */
#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */
#define ETH_P_CONTROL 0x0016 /* Card specific control frames */
#define ETH_P_IRDA 0x0017 /* Linux-IrDA */
#define ETH_P_ECONET 0x0018 /* Acorn Econet */
/*
* This is an Ethernet frame header.
*/
struct ethhdr {
unsigned char h_dest[ETH_ALEN]; /* destination eth addr */
unsigned char h_source[ETH_ALEN]; /* source ether addr */
unsigned short h_proto; /* packet type ID field */
};
struct _vlan {
unsigned short h_vlan_TCI; /* Encap prio and VLAN ID */
unsigned short h_vlan_encapsulated_proto;
};
#define get_vlan_id(pvlan) \
((ntohs((unsigned short)pvlan->h_vlan_TCI)) & 0xfff)
#define get_vlan_priority(pvlan) \
((ntohs((unsigned short)pvlan->h_vlan_TCI))>>13)
#define get_vlan_encap_proto(pvlan) \
(ntohs((unsigned short)pvlan->h_vlan_encapsulated_proto))
#endif /* _LINUX_IF_ETHER_H */

24
include/ioctl_cfg80211.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. i*/
#ifndef __IOCTL_CFG80211_H__
#define __IOCTL_CFG80211_H__
@ -77,13 +61,11 @@ void rtw_cfg80211_indicate_disconnect(struct adapter *padapter);
void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv,
bool aborted);
#ifdef CONFIG_88EU_AP_MODE
void rtw_cfg80211_indicate_sta_assoc(struct adapter *padapter,
u8 *pmgmt_frame, uint frame_len);
void rtw_cfg80211_indicate_sta_disassoc(struct adapter *padapter,
unsigned char *da,
unsigned short reason);
#endif /* CONFIG_88EU_AP_MODE */
void rtw_cfg80211_issue_p2p_provision_request(struct adapter *padapter,
const u8 *buf, size_t len);

125
include/ip.h
View file

@ -1,125 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _LINUX_IP_H
#define _LINUX_IP_H
/* SOL_IP socket options */
#define IPTOS_TOS_MASK 0x1E
#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK)
#define IPTOS_LOWDELAY 0x10
#define IPTOS_THROUGHPUT 0x08
#define IPTOS_RELIABILITY 0x04
#define IPTOS_MINCOST 0x02
#define IPTOS_PREC_MASK 0xE0
#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK)
#define IPTOS_PREC_NETCONTROL 0xe0
#define IPTOS_PREC_INTERNETCONTROL 0xc0
#define IPTOS_PREC_CRITIC_ECP 0xa0
#define IPTOS_PREC_FLASHOVERRIDE 0x80
#define IPTOS_PREC_FLASH 0x60
#define IPTOS_PREC_IMMEDIATE 0x40
#define IPTOS_PREC_PRIORITY 0x20
#define IPTOS_PREC_ROUTINE 0x00
/* IP options */
#define IPOPT_COPY 0x80
#define IPOPT_CLASS_MASK 0x60
#define IPOPT_NUMBER_MASK 0x1f
#define IPOPT_COPIED(o) ((o)&IPOPT_COPY)
#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK)
#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK)
#define IPOPT_CONTROL 0x00
#define IPOPT_RESERVED1 0x20
#define IPOPT_MEASUREMENT 0x40
#define IPOPT_RESERVED2 0x60
#define IPOPT_END (0 | IPOPT_CONTROL)
#define IPOPT_NOOP (1 | IPOPT_CONTROL)
#define IPOPT_SEC (2 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_LSRR (3 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_TIMESTAMP (4 | IPOPT_MEASUREMENT)
#define IPOPT_RR (7 | IPOPT_CONTROL)
#define IPOPT_SID (8 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_SSRR (9 | IPOPT_CONTROL | IPOPT_COPY)
#define IPOPT_RA (20 | IPOPT_CONTROL | IPOPT_COPY)
#define IPVERSION 4
#define MAXTTL 255
#define IPDEFTTL 64
#define IPOPT_OPTVAL 0
#define IPOPT_OLEN 1
#define IPOPT_OFFSET 2
#define IPOPT_MINOFF 4
#define MAX_IPOPTLEN 40
#define IPOPT_NOP IPOPT_NOOP
#define IPOPT_EOL IPOPT_END
#define IPOPT_TS IPOPT_TIMESTAMP
#define IPOPT_TS_TSONLY 0 /* timestamps only */
#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */
#define IPOPT_TS_PRESPEC 3 /* specified modules only */
struct ip_options {
__u32 faddr; /* Saved first hop address */
unsigned char optlen;
unsigned char srr;
unsigned char rr;
unsigned char ts;
unsigned char is_setbyuser:1, /* Set by setsockopt? */
is_data:1, /* Options in __data, rather than skb*/
is_strictroute:1,/* Strict source route */
srr_is_hit:1, /* Packet destn addr was ours */
is_changed:1, /* IP checksum more not valid */
rr_needaddr:1, /* Need to record addr of out dev*/
ts_needtime:1, /* Need to record timestamp */
ts_needaddr:1; /* Need to record addr of out dev */
unsigned char router_alert;
unsigned char __pad1;
unsigned char __pad2;
unsigned char __data[0];
};
#define optlength(opt) (sizeof(struct ip_options) + opt->optlen)
struct iphdr {
#if defined(__LITTLE_ENDIAN_BITFIELD)
__u8 ihl:4,
version:4;
#elif defined(__BIG_ENDIAN_BITFIELD)
__u8 version:4,
ihl:4;
#endif
__u8 tos;
__u16 tot_len;
__u16 id;
__u16 frag_off;
__u8 ttl;
__u8 protocol;
__u16 check;
__u32 saddr;
__u32 daddr;
/*The options start here. */
};
#endif /* _LINUX_IP_H */

26
include/mlme_osdep.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __MLME_OSDEP_H_
#define __MLME_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
void rtw_init_mlme_timer(struct adapter *padapter);
void rtw_os_indicate_disconnect(struct adapter *adapter);

349
include/mp_custom_oid.h
View file

@ -1,349 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __CUSTOM_OID_H
#define __CUSTOM_OID_H
/* by Owen */
/* 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit */
/* 0xFF818500 - 0xFF81850F RTL8185 Setup Utility */
/* 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility */
/* */
/* by Owen for Production Kit */
/* For Production Kit with Agilent Equipments */
/* in order to make our custom oids hopefully somewhat unique */
/* we will use 0xFF (indicating implementation specific OID) */
/* 81(first byte of non zero Realtek unique identifier) */
/* 80 (second byte of non zero Realtek unique identifier) */
/* XX (the custom OID number - providing 255 possible custom oids) */
#define OID_RT_PRO_RESET_DUT 0xFF818000
#define OID_RT_PRO_SET_DATA_RATE 0xFF818001
#define OID_RT_PRO_START_TEST 0xFF818002
#define OID_RT_PRO_STOP_TEST 0xFF818003
#define OID_RT_PRO_SET_PREAMBLE 0xFF818004
#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005
#define OID_RT_PRO_SET_FILTER_BB 0xFF818006
#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007
#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008
#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009
#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A
#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D
#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E
#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F
#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010
#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011
#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012
#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013
#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014
#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015
#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016
#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017
#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018
#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019
#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A
#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B
#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C
#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D
#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E
#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F
#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020
#define OID_RT_PRO_WRITE_EEPROM 0xFF818021
#define OID_RT_PRO_READ_EEPROM 0xFF818022
#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023
#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024
#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025
#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026
#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027
#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028
#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029
#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A
#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C
/* added by Owen on 04/08/03 for Cameo's request */
#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D
#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E
#define OID_RT_PRO_SET_MODULATION 0xFF81802F
/* */
/* Sean */
#define OID_RT_DRIVER_OPTION 0xFF818080
#define OID_RT_RF_OFF 0xFF818081
#define OID_RT_AUTH_STATUS 0xFF818082
/* */
#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B
#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C
#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B
#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043
/* */
/* by Owen for RTL8185 Phy Status Report Utility */
#define OID_RT_UTILITY_false_ALARM_COUNTERS 0xFF818580
#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581
#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582
#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583
#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584
#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS \
0xFF818585
#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586
/* */
/* by Owen on 03/09/19-03/09/22 for RTL8185 */
#define OID_RT_WIRELESS_MODE 0xFF818500
#define OID_RT_SUPPORTED_RATES 0xFF818501
#define OID_RT_DESIRED_RATES 0xFF818502
#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503
/* */
#define OID_RT_GET_CONNECT_STATE 0xFF030001
#define OID_RT_RESCAN 0xFF030002
#define OID_RT_SET_KEY_LENGTH 0xFF030003
#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004
#define OID_RT_SET_CHANNEL 0xFF010182
#define OID_RT_SET_SNIFFER_MODE 0xFF010183
#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184
#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185
#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186
#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187
#define OID_RT_GET_TX_RETRY 0xFF010188
#define OID_RT_GET_RX_RETRY 0xFF010189
#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A/* S */
#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B/* S */
#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190
#define OID_RT_GET_TX_BEACON_OK 0xFF010191
#define OID_RT_GET_TX_BEACON_ERR 0xFF010192
#define OID_RT_GET_RX_ICV_ERR 0xFF010193
#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194
#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195
#define OID_RT_GET_PREAMBLE_MODE 0xFF010196
#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197
#define OID_RT_GET_AP_IP 0xFF010198
#define OID_RT_GET_CHANNELPLAN 0xFF010199
#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A
#define OID_RT_SET_BCN_INTVL 0xFF01019B
#define OID_RT_GET_RF_VENDER 0xFF01019C
#define OID_RT_DEDICATE_PROBE 0xFF01019D
#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E
#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F
#define OID_RT_GET_CCA_ERR 0xFF0101A0
#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1
#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2
#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3
#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4
/* by Owen on 03/31/03 for Cameo's request */
#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5
/* */
#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5
#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6
#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7
#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8
#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9
#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA
#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB
#define OID_RT_GET_CHANNEL 0xFF0101AC
#define OID_RT_SET_CHANNELPLAN 0xFF0101AD
#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE
#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF
#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0
#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1
#define OID_RT_GET_IS_ROAMING 0xFF0101B2
#define OID_RT_GET_IS_PRIVACY 0xFF0101B3
#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4
#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5
#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6
#define OID_RT_RESET_LOG 0xFF0101B7
#define OID_RT_GET_LOG 0xFF0101B8
#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9
#define OID_RT_GET_HEADER_FAIL 0xFF0101BA
#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB
#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC
#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD
#define OID_RT_GET_TX_INFO 0xFF0101BE
#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF
#define OID_RT_RF_READ_WRITE 0xFF0101C0
/* For Netgear request. 2005.01.13, by rcnjko. */
#define OID_RT_FORCED_DATA_RATE 0xFF0101C1
#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2
/* For Netgear request. 2005.02.17, by rcnjko. */
#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3
/* For AZ project. 2005.06.27, by rcnjko. */
#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4
/* Vincent 8185MP */
#define OID_RT_PRO_RX_FILTER 0xFF0111C0
#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1
#define OID_CE_USB_READ_REGISTRY 0xFF0111C2
#define OID_RT_PRO_SET_INITIAL_GA 0xFF0111C3
#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4
#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5
#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6
#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7
#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8
#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9
#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA
/* AP OID */
#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300
#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301
#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302
#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303
/* Determine if driver supports AP mode. */
#define OID_RT_AP_SUPPORTED 0xFF010304
/* Set WPA-PSK passphrase into authenticator. */
#define OID_RT_AP_SET_PASSPHRASE 0xFF010305
/* 8187MP. 2004.09.06, by rcnjko. */
#define OID_RT_PRO8187_WI_POLL 0xFF818780
#define OID_RT_PRO_WRITE_BB_REG 0xFF818781
#define OID_RT_PRO_READ_BB_REG 0xFF818782
#define OID_RT_PRO_WRITE_RF_REG 0xFF818783
#define OID_RT_PRO_READ_RF_REG 0xFF818784
/* Meeting House. added by Annie, 2005-07-20. */
#define OID_RT_MH_VENDER_ID 0xFFEDC100
/* 8711 MP OID added 20051230. */
#define OID_RT_PRO8711_JOIN_BSS 0xFF871100/* S */
#define OID_RT_PRO_READ_REGISTER 0xFF871101 /* Q */
#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 /* S */
#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 /* Q */
#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 /* S */
#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 /* S */
#define OID_RT_PRO_READ16_EEPROM 0xFF871106 /* Q */
#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 /* S */
#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 /* S */
#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 /* Q */
#define OID_RT_PRO8711_WI_POLL 0xFF87110A /* Q */
#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B /* Q */
#define OID_RT_RD_ATTRIB_MEM 0xFF87110C/* Q */
#define OID_RT_WR_ATTRIB_MEM 0xFF87110D/* S */
/* Method 2 for H2C/C2H */
#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 /* S */
#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 /* Q */
#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 /* S */
#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 /* Q */
#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114/* Q */
#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 /* Q, S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 /* S */
#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 /* Q,S */
#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 /* Q */
#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 /* Q */
#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A /* S */
#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B /* Q */
#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C /* S */
#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D /* Q */
#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E /* S */
#define OID_RT_POLL_RX_STATUS 0xFF87111F /* Q */
#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 /* Q,S */
#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121/* S */
#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122/* S */
#define OID_RT_PRO_READ_TSSI 0xFF871123/* S */
#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124/* S */
#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 /* Q */
#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 /* S */
/* Method 2 , using workitem */
#define OID_RT_SET_READ_REG 0xFF871181 /* S */
#define OID_RT_SET_WRITE_REG 0xFF871182 /* S */
#define OID_RT_SET_BURST_READ_REG 0xFF871183 /* S */
#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 /* S */
#define OID_RT_SET_WRITE_TXCMD 0xFF871185 /* S */
#define OID_RT_SET_READ16_EEPROM 0xFF871186 /* S */
#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 /* S */
#define OID_RT_QRY_POLL_WKITEM 0xFF871188 /* Q */
/* For SDIO INTERFACE only */
#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 /* Q, S */
#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1
/* For USB INTERFACE only */
#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 /* Q, S */
#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 /* S */
#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 /* S */
#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 /* Q */
#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 /* Q */
#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB /* S */
#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC /* S */
#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE
#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 /* Q, S */
#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 /* S */
#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 /* S */
#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 /* Q */
#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 /* Q, S */
#define OID_RT_PRO_READ_EFUSE 0xFF871205 /* Q */
#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 /* S */
#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 /* Q, S */
#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 /* Q */
#define OID_RT_SET_BANDWIDTH 0xFF871209 /* S */
#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A /* S */
#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B /* S */
#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C /* Q */
#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D /* S */
#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E /* S */
#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F /* S */
#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 /* Q */
#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 /* S */
#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 /* Q */
#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 /* Q */
#define OID_RT_SET_POWER_DOWN 0xFF871214 /* S */
#define OID_RT_GET_POWER_MODE 0xFF871215 /* Q */
#define OID_RT_PRO_EFUSE 0xFF871216 /* Q, S */
#define OID_RT_PRO_EFUSE_MAP 0xFF871217 /* Q, S */
#endif /* ifndef __CUSTOM_OID_H */

41
include/nic_spec.h
View file

@ -1,41 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __NIC_SPEC_H__
#define __NIC_SPEC_H__
#define RTL8711_MCTRL_ (0x20000)
#define RTL8711_UART_ (0x30000)
#define RTL8711_TIMER_ (0x40000)
#define RTL8711_FINT_ (0x50000)
#define RTL8711_HINT_ (0x50000)
#define RTL8711_GPIO_ (0x60000)
#define RTL8711_WLANCTRL_ (0x200000)
#define RTL8711_WLANFF_ (0xe00000)
#define RTL8711_HCICTRL_ (0x600000)
#define RTL8711_SYSCFG_ (0x620000)
#define RTL8711_SYSCTRL_ (0x620000)
#define RTL8711_MCCTRL_ (0x020000)
#include <rtl8711_regdef.h>
#include <rtl8711_bitdef.h>
#endif /* __RTL8711_SPEC_H__ */

797
include/odm.h
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File diff suppressed because it is too large Load diff

71
include/odm_HWConfig.h
View file

@ -1,62 +1,16 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __HALHWOUTSRC_H__
#define __HALHWOUTSRC_H__
/* Definition */
/* CCK Rates, TxHT = 0 */
#define DESC92C_RATE1M 0x00
#define DESC92C_RATE2M 0x01
#define DESC92C_RATE5_5M 0x02
#define DESC92C_RATE11M 0x03
/* OFDM Rates, TxHT = 0 */
#define DESC92C_RATE6M 0x04
#define DESC92C_RATE9M 0x05
#define DESC92C_RATE12M 0x06
#define DESC92C_RATE18M 0x07
#define DESC92C_RATE24M 0x08
#define DESC92C_RATE36M 0x09
#define DESC92C_RATE48M 0x0a
#define DESC92C_RATE54M 0x0b
/* MCS Rates, TxHT = 1 */
#define DESC92C_RATEMCS0 0x0c
#define DESC92C_RATEMCS1 0x0d
#define DESC92C_RATEMCS2 0x0e
#define DESC92C_RATEMCS3 0x0f
#define DESC92C_RATEMCS4 0x10
#define DESC92C_RATEMCS5 0x11
#define DESC92C_RATEMCS6 0x12
#define DESC92C_RATEMCS7 0x13
#define DESC92C_RATEMCS8 0x14
#define DESC92C_RATEMCS9 0x15
#define DESC92C_RATEMCS10 0x16
#define DESC92C_RATEMCS11 0x17
#define DESC92C_RATEMCS12 0x18
#define DESC92C_RATEMCS13 0x19
#define DESC92C_RATEMCS14 0x1a
#define DESC92C_RATEMCS15 0x1b
#define DESC92C_RATEMCS15_SG 0x1c
#define DESC92C_RATEMCS32 0x20
/* structure and define */
@ -106,28 +60,11 @@ struct phy_status_rpt {
#endif
};
void odm_Init_RSSIForDM(struct odm_dm_struct *pDM_Odm);
void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm,
struct odm_phy_status_info *pPhyInfo,
struct phy_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt);
void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm,
u8 *pMacStatus,
u8 MacID,
bool bPacketMatchBSSID,
bool bPacketToSelf,
bool bPacketBeacon);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum rf_radio_path Content,
enum rf_radio_path eRFPath);
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum odm_bb_config_type ConfigType);
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *pDM_Odm);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm);
#endif

34
include/odm_RTL8188E.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_RTL8188E_H__
#define __ODM_RTL8188E_H__
@ -27,8 +11,6 @@
#define MAIN_ANT_CGCS_RX 0
#define AUX_ANT_CGCS_RX 1
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
@ -43,14 +25,4 @@ void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u8 antsel_tr_mux,
void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingCallback(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm);
void odm_PrimaryCCA_Init(struct odm_dm_struct *pDM_Odm);
bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *pDM_Odm);
void odm_DynamicPrimaryCCA(struct odm_dm_struct *pDM_Odm);
#endif

28
include/odm_RegConfig8188E.h
View file

@ -1,34 +1,12 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __INC_ODM_REGCONFIG_H_8188E
#define __INC_ODM_REGCONFIG_H_8188E
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data,
enum rf_radio_path RF_PATH, u32 RegAddr);
void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm,
u32 Addr, u32 Data);
void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm,
u32 Addr, u32 Data);
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data);
void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,

46
include/odm_RegDefine11AC.h
View file

@ -1,46 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_REGDEFINE11AC_H__
#define __ODM_REGDEFINE11AC_H__
/* 2 RF REG LIST */
/* 2 BB REG LIST */
/* PAGE 8 */
/* PAGE 9 */
#define ODM_REG_OFDM_FA_RST_11AC 0x9A4
/* PAGE A */
#define ODM_REG_CCK_CCA_11AC 0xA0A
#define ODM_REG_CCK_FA_RST_11AC 0xA2C
#define ODM_REG_CCK_FA_11AC 0xA5C
/* PAGE C */
#define ODM_REG_IGI_A_11AC 0xC50
/* PAGE E */
#define ODM_REG_IGI_B_11AC 0xE50
/* PAGE F */
#define ODM_REG_OFDM_FA_11AC 0xF48
/* 2 MAC REG LIST */
/* DIG Related */
#define ODM_BIT_IGI_11AC 0xFFFFFFFF
#endif

133
include/odm_RegDefine11N.h
View file

@ -1,76 +1,23 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_REGDEFINE11N_H__
#define __ODM_REGDEFINE11N_H__
/* 2 RF REG LIST */
#define ODM_REG_RF_MODE_11N 0x00
#define ODM_REG_RF_0B_11N 0x0B
#define ODM_REG_CHNBW_11N 0x18
#define ODM_REG_T_METER_11N 0x24
#define ODM_REG_RF_25_11N 0x25
#define ODM_REG_RF_26_11N 0x26
#define ODM_REG_RF_27_11N 0x27
#define ODM_REG_RF_2B_11N 0x2B
#define ODM_REG_RF_2C_11N 0x2C
#define ODM_REG_RXRF_A3_11N 0x3C
#define ODM_REG_T_METER_92D_11N 0x42
#define ODM_REG_T_METER_88E_11N 0x42
/* 2 BB REG LIST */
/* PAGE 8 */
#define ODM_REG_BB_CTRL_11N 0x800
#define ODM_REG_RF_PIN_11N 0x804
#define ODM_REG_PSD_CTRL_11N 0x808
#define ODM_REG_TX_ANT_CTRL_11N 0x80C
#define ODM_REG_BB_PWR_SAV5_11N 0x818
#define ODM_REG_CCK_RPT_FORMAT_11N 0x824
#define ODM_REG_RX_DEFUALT_A_11N 0x858
#define ODM_REG_RX_DEFUALT_B_11N 0x85A
#define ODM_REG_BB_PWR_SAV3_11N 0x85C
#define ODM_REG_ANTSEL_CTRL_11N 0x860
#define ODM_REG_RX_ANT_CTRL_11N 0x864
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_BB_PWR_SAV1_11N 0x874
#define ODM_REG_ANTSEL_PATH_11N 0x878
#define ODM_REG_BB_3WIRE_11N 0x88C
#define ODM_REG_SC_CNT_11N 0x8C4
#define ODM_REG_PSD_DATA_11N 0x8B4
#define ODM_REG_PIN_CTRL_11N 0x870
#define ODM_REG_SC_CNT_11N 0x8C4
/* PAGE 9 */
#define ODM_REG_ANT_MAPPING1_11N 0x914
#define ODM_REG_ANT_MAPPING2_11N 0x918
/* PAGE A */
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_ANTDIV_PARA3_11N 0xA10
#define ODM_REG_CCK_ANTDIV_PARA4_11N 0xA14
#define ODM_REG_CCK_FILTER_PARA1_11N 0xA22
#define ODM_REG_CCK_FILTER_PARA2_11N 0xA23
#define ODM_REG_CCK_FILTER_PARA3_11N 0xA24
#define ODM_REG_CCK_FILTER_PARA4_11N 0xA25
#define ODM_REG_CCK_FILTER_PARA5_11N 0xA26
#define ODM_REG_CCK_FILTER_PARA6_11N 0xA27
#define ODM_REG_CCK_FILTER_PARA7_11N 0xA28
#define ODM_REG_CCK_FILTER_PARA8_11N 0xA29
#define ODM_REG_CCK_ANTDIV_PARA1_11N 0xA00
#define ODM_REG_CCK_CCA_11N 0xA0A
#define ODM_REG_CCK_ANTDIV_PARA2_11N 0xA0C
#define ODM_REG_CCK_FA_RST_11N 0xA2C
#define ODM_REG_CCK_FA_MSB_11N 0xA58
#define ODM_REG_CCK_FA_LSB_11N 0xA5C
@ -78,28 +25,10 @@
#define ODM_REG_BB_PWR_SAV4_11N 0xA74
/* PAGE B */
#define ODM_REG_LNA_SWITCH_11N 0xB2C
#define ODM_REG_PATH_SWITCH_11N 0xB30
#define ODM_REG_RSSI_CTRL_11N 0xB38
#define ODM_REG_CONFIG_ANTA_11N 0xB68
#define ODM_REG_RSSI_BT_11N 0xB9C
/* PAGE C */
#define ODM_REG_OFDM_FA_HOLDC_11N 0xC00
#define ODM_REG_RX_PATH_11N 0xC04
#define ODM_REG_TRMUX_11N 0xC08
#define ODM_REG_OFDM_FA_RSTC_11N 0xC0C
#define ODM_REG_RXIQI_MATRIX_11N 0xC14
#define ODM_REG_TXIQK_MATRIX_LSB1_11N 0xC4C
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA2_11N 0xC54
#define ODM_REG_IGI_B_11N 0xC58
#define ODM_REG_ANTDIV_PARA3_11N 0xC5C
#define ODM_REG_BB_PWR_SAV2_11N 0xC70
#define ODM_REG_RX_OFF_11N 0xC7C
#define ODM_REG_TXIQK_MATRIXA_11N 0xC80
#define ODM_REG_TXIQK_MATRIXB_11N 0xC88
#define ODM_REG_TXIQK_MATRIXA_LSB2_11N 0xC94
#define ODM_REG_TXIQK_MATRIXB_LSB2_11N 0xC9C
#define ODM_REG_RXIQK_MATRIX_LSB_11N 0xCA0
#define ODM_REG_IGI_A_11N 0xC50
#define ODM_REG_ANTDIV_PARA1_11N 0xCA4
#define ODM_REG_OFDM_FA_TYPE1_11N 0xCF0
/* PAGE D */
@ -107,54 +36,12 @@
#define ODM_REG_OFDM_FA_TYPE2_11N 0xDA0
#define ODM_REG_OFDM_FA_TYPE3_11N 0xDA4
#define ODM_REG_OFDM_FA_TYPE4_11N 0xDA8
/* PAGE E */
#define ODM_REG_TXAGC_A_6_18_11N 0xE00
#define ODM_REG_TXAGC_A_24_54_11N 0xE04
#define ODM_REG_TXAGC_A_1_MCS32_11N 0xE08
#define ODM_REG_TXAGC_A_MCS0_3_11N 0xE10
#define ODM_REG_TXAGC_A_MCS4_7_11N 0xE14
#define ODM_REG_TXAGC_A_MCS8_11_11N 0xE18
#define ODM_REG_TXAGC_A_MCS12_15_11N 0xE1C
#define ODM_REG_FPGA0_IQK_11N 0xE28
#define ODM_REG_TXIQK_TONE_A_11N 0xE30
#define ODM_REG_RXIQK_TONE_A_11N 0xE34
#define ODM_REG_TXIQK_PI_A_11N 0xE38
#define ODM_REG_RXIQK_PI_A_11N 0xE3C
#define ODM_REG_TXIQK_11N 0xE40
#define ODM_REG_RXIQK_11N 0xE44
#define ODM_REG_IQK_AGC_PTS_11N 0xE48
#define ODM_REG_IQK_AGC_RSP_11N 0xE4C
#define ODM_REG_BLUETOOTH_11N 0xE6C
#define ODM_REG_RX_WAIT_CCA_11N 0xE70
#define ODM_REG_TX_CCK_RFON_11N 0xE74
#define ODM_REG_TX_CCK_BBON_11N 0xE78
#define ODM_REG_OFDM_RFON_11N 0xE7C
#define ODM_REG_OFDM_BBON_11N 0xE80
#define ODM_REG_TX2RX_11N 0xE84
#define ODM_REG_TX2TX_11N 0xE88
#define ODM_REG_RX_CCK_11N 0xE8C
#define ODM_REG_RX_OFDM_11N 0xED0
#define ODM_REG_RX_WAIT_RIFS_11N 0xED4
#define ODM_REG_RX2RX_11N 0xED8
#define ODM_REG_STANDBY_11N 0xEDC
#define ODM_REG_SLEEP_11N 0xEE0
#define ODM_REG_PMPD_ANAEN_11N 0xEEC
/* 2 MAC REG LIST */
#define ODM_REG_BB_RST_11N 0x02
#define ODM_REG_ANTSEL_PIN_11N 0x4C
#define ODM_REG_EARLY_MODE_11N 0x4D0
#define ODM_REG_RSSI_MONITOR_11N 0x4FE
#define ODM_REG_EDCA_VO_11N 0x500
#define ODM_REG_EDCA_VI_11N 0x504
#define ODM_REG_EDCA_BE_11N 0x508
#define ODM_REG_EDCA_BK_11N 0x50C
#define ODM_REG_TXPAUSE_11N 0x522
#define ODM_REG_RESP_TX_11N 0x6D8
#define ODM_REG_ANT_TRAIN_PARA1_11N 0x7b0
#define ODM_REG_ANT_TRAIN_PARA2_11N 0x7b4
#define ODM_REG_RESP_TX_11N 0x6D8
/* DIG Related */
#define ODM_BIT_IGI_11N 0x0000007F
#define ODM_BIT_IGI_11N 0x0000007F
#endif

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_DBG_H__
#define __ODM_DBG_H__
/* */
/* Define the debug levels */
/* */
/* 1. DBG_TRACE and DBG_LOUD are used for normal cases. */
/* They can help SW engineer to develop or trace states changed */
/* and also help HW enginner to trace every operation to and from HW, */
/* e.g IO, Tx, Rx. */
/* */
/* 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, */
/* which help us to debug SW or HW. */
/* Never used in a call to ODM_RT_TRACE()! */
#define ODM_DBG_OFF 1
/* Fatal bug. */
/* For example, Tx/Rx/IO locked up, OS hangs, memory access violation, */
/* resource allocation failed, unexpected HW behavior, HW BUG and so on. */
#define ODM_DBG_SERIOUS 2
/* Abnormal, rare, or unexpeted cases. */
/* For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. */
#define ODM_DBG_WARNING 3
/* Normal case with useful information about current SW or HW state. */
/* For example, Tx/Rx descriptor to fill, Tx/Rx descr. completed status, */
/* SW protocol state change, dynamic mechanism state change and so on. */
/* */
#define ODM_DBG_LOUD 4
/* Normal case with detail execution flow or information. */
#define ODM_DBG_TRACE 5
/* Define the tracing components */
/* BB Functions */
#define ODM_COMP_DIG BIT0
#define ODM_COMP_RA_MASK BIT1
#define ODM_COMP_DYNAMIC_TXPWR BIT2
#define ODM_COMP_FA_CNT BIT3
#define ODM_COMP_RSSI_MONITOR BIT4
#define ODM_COMP_CCK_PD BIT5
#define ODM_COMP_ANT_DIV BIT6
#define ODM_COMP_PWR_SAVE BIT7
#define ODM_COMP_PWR_TRA BIT8
#define ODM_COMP_RATE_ADAPTIVE BIT9
#define ODM_COMP_PATH_DIV BIT10
#define ODM_COMP_PSD BIT11
#define ODM_COMP_DYNAMIC_PRICCA BIT12
#define ODM_COMP_RXHP BIT13
/* MAC Functions */
#define ODM_COMP_EDCA_TURBO BIT16
#define ODM_COMP_EARLY_MODE BIT17
/* RF Functions */
#define ODM_COMP_TX_PWR_TRACK BIT24
#define ODM_COMP_RX_GAIN_TRACK BIT25
#define ODM_COMP_CALIBRATION BIT26
/* Common Functions */
#define ODM_COMP_COMMON BIT30
#define ODM_COMP_INIT BIT31
/*------------------------Export Marco Definition---------------------------*/
#define DbgPrint pr_info
#define RT_PRINTK(fmt, args...) \
DbgPrint( "%s(): " fmt, __func__, ## args);
#ifndef ASSERT
#define ASSERT(expr)
#endif
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
if (pDM_Odm->SupportICType == ODM_RTL8192C) \
DbgPrint("[ODM-92C] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8192D) \
DbgPrint("[ODM-92D] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8723A) \
DbgPrint("[ODM-8723A] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8188E) \
DbgPrint("[ODM-8188E] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8812) \
DbgPrint("[ODM-8812] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8821) \
DbgPrint("[ODM-8821] "); \
RT_PRINTK fmt; \
}
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
RT_PRINTK fmt; \
}
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
if (!(expr)) { \
DbgPrint( "Assertion failed! %s at ......\n", #expr); \
DbgPrint( " ......%s,%s,line=%d\n", __FILE__, \
__func__, __LINE__); \
RT_PRINTK fmt; \
ASSERT(false); \
}
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __func__); }
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __func__); }
#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __func__, str); }
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
int __i; \
u8 *__ptr = (u8 *)ptr; \
DbgPrint("[ODM] "); \
DbgPrint(title_str); \
DbgPrint(" "); \
for (__i = 0; __i < 6; __i++) \
DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-");\
DbgPrint("\n"); \
}
void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm);
#endif /* __ODM_DBG_H__ */

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_INTERFACE_H__
#define __ODM_INTERFACE_H__
/* */
/* =========== Constant/Structure/Enum/... Define */
/* */
/* */
/* =========== Macro Define */
/* */
#define _reg_all(_name) ODM_##_name
#define _reg_ic(_name, _ic) ODM_##_name##_ic
#define _bit_all(_name) BIT_##_name
#define _bit_ic(_name, _ic) BIT_##_name##_ic
/* _cat: implemented by Token-Pasting Operator. */
/*===================================
#define ODM_REG_DIG_11N 0xC50
#define ODM_REG_DIG_11AC 0xDDD
ODM_REG(DIG,_pDM_Odm)
=====================================*/
#define _reg_11N(_name) ODM_REG_##_name##_11N
#define _reg_11AC(_name) ODM_REG_##_name##_11AC
#define _bit_11N(_name) ODM_BIT_##_name##_11N
#define _bit_11AC(_name) ODM_BIT_##_name##_11AC
#define _cat(_name, _ic_type, _func) \
( \
((_ic_type) & ODM_IC_11N_SERIES) ? _func##_11N(_name) : \
_func##_11AC(_name) \
)
/* _name: name of register or bit. */
/* Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)" */
/* gets "ODM_R_A_AGC_CORE1" or "ODM_R_A_AGC_CORE1_8192C",
* depends on SupportICType. */
#define ODM_REG(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _reg)
#define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
enum odm_h2c_cmd {
ODM_H2C_RSSI_REPORT = 0,
ODM_H2C_PSD_RESULT= 1,
ODM_H2C_PathDiv = 2,
ODM_MAX_H2CCMD
};
/* 2012/02/17 MH For non-MP compile pass only. Linux does not support workitem. */
/* Suggest HW team to use thread instead of workitem. Windows also support the feature. */
typedef void (*RT_WORKITEM_CALL_BACK)(void *pContext);
/* =========== Extern Variable ??? It should be forbidden. */
/* =========== EXtern Function Prototype */
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data);
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data);
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data);
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr,
u32 BitMask, u32 Data);
u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr,
u32 BitMask, u32 Data);
u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
/* Memory Relative Function. */
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length);
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length);
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2,
u32 length);
/* ODM MISC-spin lock relative API. */
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type);
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm,
enum RT_SPINLOCK_TYPE type);
/* ODM MISC-workitem relative API. */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID);
void ODM_StartWorkItem(void *pRtWorkItem);
void ODM_StopWorkItem(void *pRtWorkItem);
void ODM_FreeWorkItem(void *pRtWorkItem);
void ODM_ScheduleWorkItem(void *pRtWorkItem);
void ODM_IsWorkItemScheduled(void *pRtWorkItem);
/* ODM Timer relative API. */
void ODM_StallExecution(u32 usDelay);
void ODM_delay_ms(u32 ms);
void ODM_delay_us(u32 us);
void ODM_sleep_ms(u32 ms);
void ODM_sleep_us(u32 us);
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer,
u32 msDelay);
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm,
struct timer_list *pTimer, void *CallBackFunc,
void *pContext, const char *szID);
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen, u8 **pCmbBuffer,
u8 *CmdStartSeq);
#endif /* __ODM_INTERFACE_H__ */

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include/odm_precomp.h
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __ODM_PRECOMP_H__
#define __ODM_PRECOMP_H__
#include "odm_types.h"
#define TEST_FALG___ 1
/* 2 Config Flags and Structs - defined by each ODM Type */
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
/* 2 OutSrc Header Files */
#include "odm.h"
#include "odm_HWConfig.h"
#include "odm_debug.h"
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#include "HalPhyRf.h"
#include "HalPhyRf_8188e.h"/* for IQK,LCK,Power-tracking */
#include "Hal8188ERateAdaptive.h"/* for RA,Power training */
#include "rtl8188e_hal.h"
#include "odm_interface.h"
#include "odm_reg.h"
#include "HalHWImg8188E_MAC.h"
#include "HalHWImg8188E_RF.h"
#include "HalHWImg8188E_BB.h"
#include "Hal8188EReg.h"
#include "odm_RegConfig8188E.h"
#include "odm_RTL8188E.h"
void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm);
void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm);
void odm_DIGInit(struct odm_dm_struct *pDM_Odm);
void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSavingInit(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm);
void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm);
void odm_GlobalAdapterCheck(void);
void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm);
void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm);
void odm_DIG(struct odm_dm_struct *pDM_Odm);
void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step);
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm);
void odm_1R_CCA(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm);
void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm);
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext);
#else
void odm_SwAntDivChkAntSwitchCallback(struct timer_list *t);
#endif
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm);
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm);
#endif /* __ODM_PRECOMP_H__ */

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include/odm_reg.h
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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* */
/* File Name: odm_reg.h */
/* */
/* Description: */
/* */
/* This file is for general register definition. */
/* */
/* */
/* */
#ifndef __HAL_ODM_REG_H__
#define __HAL_ODM_REG_H__
/* */
/* Register Definition */
/* */
/* MAC REG */
#define ODM_BB_RESET 0x002
#define ODM_DUMMY 0x4fe
#define ODM_EDCA_VO_PARAM 0x500
#define ODM_EDCA_VI_PARAM 0x504
#define ODM_EDCA_BE_PARAM 0x508
#define ODM_EDCA_BK_PARAM 0x50C
#define ODM_TXPAUSE 0x522
/* BB REG */
#define ODM_FPGA_PHY0_PAGE8 0x800
#define ODM_PSD_SETTING 0x808
#define ODM_AFE_SETTING 0x818
#define ODM_TXAGC_B_6_18 0x830
#define ODM_TXAGC_B_24_54 0x834
#define ODM_TXAGC_B_MCS32_5 0x838
#define ODM_TXAGC_B_MCS0_MCS3 0x83c
#define ODM_TXAGC_B_MCS4_MCS7 0x848
#define ODM_TXAGC_B_MCS8_MCS11 0x84c
#define ODM_ANALOG_REGISTER 0x85c
#define ODM_RF_INTERFACE_OUTPUT 0x860
#define ODM_TXAGC_B_MCS12_MCS15 0x868
#define ODM_TXAGC_B_11_A_2_11 0x86c
#define ODM_AD_DA_LSB_MASK 0x874
#define ODM_ENABLE_3_WIRE 0x88c
#define ODM_PSD_REPORT 0x8b4
#define ODM_R_ANT_SELECT 0x90c
#define ODM_CCK_ANT_SELECT 0xa07
#define ODM_CCK_PD_THRESH 0xa0a
#define ODM_CCK_RF_REG1 0xa11
#define ODM_CCK_MATCH_FILTER 0xa20
#define ODM_CCK_RAKE_MAC 0xa2e
#define ODM_CCK_CNT_RESET 0xa2d
#define ODM_CCK_TX_DIVERSITY 0xa2f
#define ODM_CCK_FA_CNT_MSB 0xa5b
#define ODM_CCK_FA_CNT_LSB 0xa5c
#define ODM_CCK_NEW_FUNCTION 0xa75
#define ODM_OFDM_PHY0_PAGE_C 0xc00
#define ODM_OFDM_RX_ANT 0xc04
#define ODM_R_A_RXIQI 0xc14
#define ODM_R_A_AGC_CORE1 0xc50
#define ODM_R_A_AGC_CORE2 0xc54
#define ODM_R_B_AGC_CORE1 0xc58
#define ODM_R_AGC_PAR 0xc70
#define ODM_R_HTSTF_AGC_PAR 0xc7c
#define ODM_TX_PWR_TRAINING_A 0xc90
#define ODM_TX_PWR_TRAINING_B 0xc98
#define ODM_OFDM_FA_CNT1 0xcf0
#define ODM_OFDM_PHY0_PAGE_D 0xd00
#define ODM_OFDM_FA_CNT2 0xda0
#define ODM_OFDM_FA_CNT3 0xda4
#define ODM_OFDM_FA_CNT4 0xda8
#define ODM_TXAGC_A_6_18 0xe00
#define ODM_TXAGC_A_24_54 0xe04
#define ODM_TXAGC_A_1_MCS32 0xe08
#define ODM_TXAGC_A_MCS0_MCS3 0xe10
#define ODM_TXAGC_A_MCS4_MCS7 0xe14
#define ODM_TXAGC_A_MCS8_MCS11 0xe18
#define ODM_TXAGC_A_MCS12_MCS15 0xe1c
/* RF REG */
#define ODM_GAIN_SETTING 0x00
#define ODM_CHANNEL 0x18
/* Ant Detect Reg */
#define ODM_DPDT 0x300
/* PSD Init */
#define ODM_PSDREG 0x808
/* 92D Path Div */
#define PATHDIV_REG 0xB30
#define PATHDIV_TRI 0xBA0
/* */
/* Bitmap Definition */
/* */
#define BIT_FA_RESET BIT0
#endif

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include/odm_types.h
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@ -1,61 +1,21 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
/* */
/* Define Different SW team support */
/* */
#define ODM_AP 0x01 /* BIT0 */
#define ODM_ADSL 0x02 /* BIT1 */
#define ODM_CE 0x04 /* BIT2 */
#define ODM_MP 0x08 /* BIT3 */
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
#define RT_SDIO_INTERFACE 3
#define ODM_CE 0x04 /* BIT(2) */
enum HAL_STATUS {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
};
enum RT_SPINLOCK_TYPE {
RT_TEMP = 1,
};
#include <basic_types.h>
#define DEV_BUS_TYPE RT_USB_INTERFACE
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
/* define useless flag to avoid compile warning */
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define BT_30_SUPPORT 0
#define FPGA_TWO_MAC_VERIFICATION 0
#define SET_TX_DESC_ANTSEL_A_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(24))
#define SET_TX_DESC_ANTSEL_B_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(25))
#define SET_TX_DESC_ANTSEL_C_88E(__ptxdesc, __value) \
le32p_replace_bits((__le32 *)(__ptxdesc + 28), __value, BIT(29))
#endif /* __ODM_TYPES_H__ */

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include/osdep_intf.h
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@ -1,28 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __OSDEP_INTF_H_
#define __OSDEP_INTF_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
struct intf_priv {
u8 *intf_dev;
@ -51,7 +34,6 @@ The protection mechanism is through the pending queue.
struct urb *piorw_urb;
u8 io_irp_cnt;
u8 bio_irp_pending;
struct semaphore io_retevt;
struct timer_list io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
@ -65,19 +47,13 @@ u32 rtw_start_drv_threads(struct adapter *padapter);
void rtw_stop_drv_threads (struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname);
struct net_device *rtw_init_netdev(struct adapter *padapter);
u16 rtw_recv_select_queue(struct sk_buff *skb);
void rtw_proc_init_one(struct net_device *dev);
void rtw_proc_remove_one(struct net_device *dev);
void rtw_ips_dev_unload(struct adapter *padapter);
int rtw_ips_pwr_up(struct adapter *padapter);
void rtw_ips_pwr_down(struct adapter *padapter);
int rtw_hw_suspend(struct adapter *padapter);
int rtw_hw_resume(struct adapter *padapter);
#endif /* _OSDEP_INTF_H_ */

314
include/osdep_service.h
View file

@ -1,30 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __OSDEP_SERVICE_H_
#define __OSDEP_SERVICE_H_
#include <linux/version.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
#include <linux/sched/signal.h>
#endif
#include <basic_types.h>
#include "basic_types.h"
#define _FAIL 0
#define _SUCCESS 1
@ -58,6 +39,7 @@
#include <linux/interrupt.h> /* for struct tasklet_struct */
#include <linux/ip.h>
#include <linux/kthread.h>
#include <linux/vmalloc.h>
#include <linux/usb.h>
#include <linux/usb/ch9.h>
@ -67,89 +49,14 @@ struct __queue {
spinlock_t lock;
};
#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 17, 0)
#define thread_exit() complete_and_exit(NULL, 0)
#else
#define thread_exit() kthread_complete_and_exit(NULL, 0)
#endif
static inline struct list_head *get_list_head(struct __queue *queue)
{
return (&(queue->queue));
}
static inline int _enter_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
int ret;
ret = mutex_lock_interruptible(pmutex);
return ret;
}
static inline void _exit_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
mutex_unlock(pmutex);
}
static inline void rtw_list_delete(struct list_head *plist)
{
list_del_init(plist);
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0)
static inline void _init_timer(struct timer_list *ptimer,struct net_device *nic_hdl,void *pfunc,void* cntx)
{
ptimer->function = pfunc;
ptimer->data = (unsigned long)cntx;
init_timer(ptimer);
}
#endif
static inline void _set_timer(struct timer_list *ptimer,u32 delay_time)
{
mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));
}
static inline void _cancel_timer(struct timer_list *ptimer,u8 *bcancelled)
{
del_timer_sync(ptimer);
*bcancelled= true;/* true ==1; false==0 */
}
#define RTW_TIMER_HDL_ARGS void *FunctionContext
#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
static inline void _init_workitem(struct work_struct *pwork, void *pfunc, void * cntx)
{
INIT_WORK(pwork, pfunc);
}
static inline void _set_workitem(struct work_struct *pwork)
{
schedule_work(pwork);
}
static inline void _cancel_workitem_sync(struct work_struct *pwork)
{
cancel_work_sync(pwork);
}
/* */
/* Global Mutex: can only be used at PASSIVE level. */
/* */
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
msleep(10); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
mod_timer(ptimer, jiffies + msecs_to_jiffies(delay_time));
}
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
@ -160,154 +67,33 @@ static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3));
}
static inline void rtw_netif_wake_queue(struct net_device *pnetdev)
{
netif_tx_wake_all_queues(pnetdev);
}
static inline void rtw_netif_start_queue(struct net_device *pnetdev)
{
netif_tx_start_all_queues(pnetdev);
}
static inline void rtw_netif_stop_queue(struct net_device *pnetdev)
{
netif_tx_stop_all_queues(pnetdev);
}
#ifndef BIT
#define BIT(x) ( 1 << (x))
#endif
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
#define BIT3 0x00000008
#define BIT4 0x00000010
#define BIT5 0x00000020
#define BIT6 0x00000040
#define BIT7 0x00000080
#define BIT8 0x00000100
#define BIT9 0x00000200
#define BIT10 0x00000400
#define BIT11 0x00000800
#define BIT12 0x00001000
#define BIT13 0x00002000
#define BIT14 0x00004000
#define BIT15 0x00008000
#define BIT16 0x00010000
#define BIT17 0x00020000
#define BIT18 0x00040000
#define BIT19 0x00080000
#define BIT20 0x00100000
#define BIT21 0x00200000
#define BIT22 0x00400000
#define BIT23 0x00800000
#define BIT24 0x01000000
#define BIT25 0x02000000
#define BIT26 0x04000000
#define BIT27 0x08000000
#define BIT28 0x10000000
#define BIT29 0x20000000
#define BIT30 0x40000000
#define BIT31 0x80000000
#define BIT32 0x0100000000
#define BIT33 0x0200000000
#define BIT34 0x0400000000
#define BIT35 0x0800000000
#define BIT36 0x1000000000
extern int RTW_STATUS_CODE(int error_code);
/* flags used for rtw_update_mem_stat() */
enum {
MEM_STAT_VIR_ALLOC_SUCCESS,
MEM_STAT_VIR_ALLOC_FAIL,
MEM_STAT_VIR_FREE,
MEM_STAT_PHY_ALLOC_SUCCESS,
MEM_STAT_PHY_ALLOC_FAIL,
MEM_STAT_PHY_FREE,
MEM_STAT_TX, /* used to distinguish TX/RX, asigned from caller */
MEM_STAT_TX_ALLOC_SUCCESS,
MEM_STAT_TX_ALLOC_FAIL,
MEM_STAT_TX_FREE,
MEM_STAT_RX, /* used to distinguish TX/RX, asigned from caller */
MEM_STAT_RX_ALLOC_SUCCESS,
MEM_STAT_RX_ALLOC_FAIL,
MEM_STAT_RX_FREE
};
extern unsigned char MCS_rate_2R[16];
extern unsigned char MCS_rate_1R[16];
extern unsigned char RTW_WPA_OUI[];
extern unsigned char WPA_TKIP_CIPHER[4];
extern unsigned char RSN_TKIP_CIPHER[4];
#define rtw_update_mem_stat(flag, sz) do {} while (0)
u8 *_rtw_vmalloc(u32 sz);
u8 *_rtw_zvmalloc(u32 sz);
void _rtw_vmfree(u8 *pbuf, u32 sz);
u8 *_rtw_zmalloc(u32 sz);
u8 *_rtw_malloc(u32 sz);
void _rtw_mfree(u8 *pbuf, u32 sz);
#define rtw_vmalloc(sz) _rtw_vmalloc((sz))
#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz))
#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz))
#define rtw_malloc(sz) _rtw_malloc((sz))
#define rtw_zmalloc(sz) _rtw_zmalloc((sz))
#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz))
void *rtw_malloc2d(int h, int w, int size);
void rtw_mfree2d(void *pbuf, int h, int w, int size);
u32 _rtw_down_sema(struct semaphore *sema);
void _rtw_mutex_init(struct mutex *pmutex);
void _rtw_mutex_free(struct mutex *pmutex);
void _rtw_spinlock_free(spinlock_t *plock);
void _rtw_init_queue(struct __queue *pqueue);
#define rtw_init_queue(q) \
do { \
INIT_LIST_HEAD(&((q)->queue)); \
spin_lock_init(&((q)->lock)); \
} while (0)
u32 rtw_systime_to_ms(u32 systime);
u32 rtw_ms_to_systime(u32 ms);
s32 rtw_get_passing_time_ms(u32 start);
s32 rtw_get_time_interval_ms(u32 start, u32 end);
void rtw_sleep_schedulable(int ms);
void rtw_msleep_os(int ms);
void rtw_usleep_os(int us);
u32 rtw_atoi(u8 *s);
void rtw_mdelay_os(int ms);
void rtw_udelay_os(int us);
void rtw_yield_os(void);
static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
{
return del_timer_sync(ptimer);
}
static __inline void thread_enter(char *name)
{
#ifdef daemonize
daemonize("%s", name);
#endif
allow_signal(SIGTERM);
}
static inline void flush_signals_thread(void)
{
if (signal_pending (current))
flush_signals(current);
}
static inline int res_to_status(int res)
{
return res;
}
#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r))
#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2)
@ -351,37 +137,6 @@ static inline u32 _RND512(u32 sz)
return val;
}
static inline u32 bitshift(u32 bitmask)
{
u32 i;
for (i = 0; i <= 31; i++)
if (((bitmask>>i) & 0x1) == 1) break;
return i;
}
/* limitation of path length */
#define PATH_LENGTH_MAX PATH_MAX
void rtw_suspend_lock_init(void);
void rtw_suspend_lock_uninit(void);
void rtw_lock_suspend(void);
void rtw_unlock_suspend(void);
/* Atomic integer operations */
#define ATOMIC_T atomic_t
void ATOMIC_SET(ATOMIC_T *v, int i);
int ATOMIC_READ(ATOMIC_T *v);
void ATOMIC_ADD(ATOMIC_T *v, int i);
void ATOMIC_SUB(ATOMIC_T *v, int i);
void ATOMIC_INC(ATOMIC_T *v);
void ATOMIC_DEC(ATOMIC_T *v);
int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i);
int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i);
int ATOMIC_INC_RETURN(ATOMIC_T *v);
int ATOMIC_DEC_RETURN(ATOMIC_T *v);
struct rtw_netdev_priv_indicator {
void *priv;
u32 sizeof_priv;
@ -405,9 +160,6 @@ void rtw_free_netdev(struct net_device *netdev);
#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1)
u64 rtw_modular64(u64 x, u64 y);
u64 rtw_division64(u64 x, u64 y);
/* Macros for handling unaligned memory accesses */
#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1]))
@ -425,15 +177,7 @@ u64 rtw_division64(u64 x, u64 y);
#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
((u32) (a)[2]))
#define RTW_PUT_BE24(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[2] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
(((u32) (a)[2]) << 8) | ((u32) (a)[3]))
#define RTW_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
@ -442,50 +186,16 @@ u64 rtw_division64(u64 x, u64 y);
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \
(((u32) (a)[1]) << 8) | ((u32) (a)[0]))
#define RTW_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \
(((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \
(((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \
(((u64) (a)[6]) << 8) | ((u64) (a)[7]))
#define RTW_PUT_BE64(a, val) \
do { \
(a)[0] = (u8) (((u64) (val)) >> 56); \
(a)[1] = (u8) (((u64) (val)) >> 48); \
(a)[2] = (u8) (((u64) (val)) >> 40); \
(a)[3] = (u8) (((u64) (val)) >> 32); \
(a)[4] = (u8) (((u64) (val)) >> 24); \
(a)[5] = (u8) (((u64) (val)) >> 16); \
(a)[6] = (u8) (((u64) (val)) >> 8); \
(a)[7] = (u8) (((u64) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \
(((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \
(((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \
(((u64) (a)[1]) << 8) | ((u64) (a)[0]))
void rtw_buf_free(u8 **buf, u32 *buf_len);
void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len);
struct rtw_cbuf {
u32 write;
u32 read;
u32 size;
void *bufs[0];
void *bufs[];
};
bool rtw_cbuf_full(struct rtw_cbuf *cbuf);
bool rtw_cbuf_empty(struct rtw_cbuf *cbuf);
bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf);
void *rtw_cbuf_pop(struct rtw_cbuf *cbuf);
struct rtw_cbuf *rtw_cbuf_alloc(u32 size);
int wifirate2_ratetbl_inx(unsigned char rate);

34
include/recv_osdep.h
View file

@ -1,27 +1,11 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RECV_OSDEP_H_
#define __RECV_OSDEP_H_
#include <osdep_service.h>
#include <drv_types.h>
#include "osdep_service.h"
#include "drv_types.h"
int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void _rtw_free_recv_priv(struct recv_priv *precvpriv);
@ -30,23 +14,15 @@ s32 rtw_recv_entry(struct recv_frame *precv_frame);
int rtw_recv_indicatepkt(struct adapter *adapter, struct recv_frame *recv_frame);
void rtw_recv_returnpacket(struct net_device *cnxt, struct sk_buff *retpkt);
void rtw_hostapd_mlme_rx(struct adapter *padapter, struct recv_frame *recv_fr);
void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup);
int rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void rtw_free_recv_priv(struct recv_priv *precvpriv);
int rtw_os_recv_resource_init(struct recv_priv *recvpr, struct adapter *adapt);
int rtw_os_recv_resource_alloc(struct adapter *adapt, struct recv_frame *recvfr);
void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recvbuf_resource_alloc(struct adapter *adapt, struct recv_buf *buf);
int rtw_os_recvbuf_resource_free(struct adapter *adapt, struct recv_buf *buf);
void rtw_os_read_port(struct adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
int nat25_handle_frame(struct adapter *priv, struct sk_buff *skb);
int _netdev_open(struct net_device *pnetdev);
int netdev_open(struct net_device *pnetdev);
int netdev_close(struct net_device *pnetdev);

38
include/rtl8188e_cmd.h
View file

@ -1,22 +1,6 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/* Copyright(c) 2007 - 2011 Realtek Corporation. */
#ifndef __RTL8188E_CMD_H__
#define __RTL8188E_CMD_H__
@ -43,15 +27,6 @@ enum RTL8188E_H2C_CMD_ID {
/* Class DM */
H2C_DM_MACID_CFG = 0x40,
H2C_DM_TXBF = 0x41,
/* Class BT */
H2C_BT_COEX_MASK = 0x60,
H2C_BT_COEX_GPIO_MODE = 0x61,
H2C_BT_DAC_SWING_VAL = 0x62,
H2C_BT_PSD_RST = 0x63,
/* Class */
H2C_RESET_TSF = 0xc0,
};
struct cmd_msg_parm {
@ -60,10 +35,6 @@ struct cmd_msg_parm {
u8 buf[6];
};
enum {
PWRS
};
struct setpwrmode_parm {
u8 Mode;/* 0:Active,1:LPS,2:WMMPS */
u8 SmartPS_RLBM;/* LPS= 0:PS_Poll,1:PS_Poll,2:NullData,WMM= 0:PS_Poll,1:NullData */
@ -107,14 +78,11 @@ struct P2P_PS_CTWPeriod_t {
/* host message to firmware cmd */
void rtl8188e_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus);
u8 rtl8188e_set_rssi_cmd(struct adapter *padapter, u8 *param);
u8 rtl8188e_set_raid_cmd(struct adapter *padapter, u32 mask);
void rtl8188e_Add_RateATid(struct adapter *padapter, u32 bitmap, u8 arg,
u8 rssi_level);
#ifdef CONFIG_88EU_P2P
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state);
#endif /* CONFIG_88EU_P2P */
void CheckFwRsvdPageContent(struct adapter *adapt);
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt);

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