mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Remove dead code inside #if 0 ... #endif
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
3ad757d04a
commit
77e736c66a
64 changed files with 98 additions and 7692 deletions
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@ -36,27 +36,8 @@ ODM_ReadFirmware_8188E_FW_AP(
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#else
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/******************************************************************************
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* FW_NIC.TXT
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******************************************************************************/
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#if 0
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void
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ODM_ReadFirmware_8188E_FW_NIC(
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IN PDM_ODM_T pDM_Odm,
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OUT u1Byte *pFirmware,
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OUT u4Byte *pFirmwareSize
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);
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#endif
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/******************************************************************************
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* FW_WoWLAN.TXT
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******************************************************************************/
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#if 0
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void
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ODM_ReadFirmware_8188E_FW_WoWLAN(
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IN PDM_ODM_T pDM_Odm,
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OUT u1Byte *pFirmware,
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OUT u4Byte *pFirmwareSize
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);
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#endif
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#define ArrayLength_8188E_FW_WoWLAN 15764
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extern const u8 Array_8188E_FW_WoWLAN[ArrayLength_8188E_FW_WoWLAN];
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#endif
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@ -65,17 +65,6 @@ typedef struct _USB_EXTENSION {
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LPCUSB_FUNCS _lpUsbFuncs;
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USB_HANDLE _hDevice;
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PVOID pAdapter;
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#if 0
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USB_ENDPOINT_DESCRIPTOR _endpACLIn;
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USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh;
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USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal;
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USB_PIPE pPipeIn;
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USB_PIPE pPipeOutNormal;
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USB_PIPE pPipeOutHigh;
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#endif
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} USB_EXTENSION, *PUSB_EXTENSION;
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#endif
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@ -1088,49 +1088,6 @@ struct ieee80211_txb {
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#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST
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#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST
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#define IW_ESSID_MAX_SIZE 32
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#if 0
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struct ieee80211_network {
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/* These entries are used to identify a unique network */
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u8 bssid[ETH_ALEN];
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u8 channel;
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/* Ensure null-terminated for any debug msgs */
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u8 ssid[IW_ESSID_MAX_SIZE + 1];
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u8 ssid_len;
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u8 rssi; //relative signal strength
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u8 sq; //signal quality
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/* These are network statistics */
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//struct ieee80211_rx_stats stats;
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u16 capability;
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u16 aid;
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u8 rates[MAX_RATES_LENGTH];
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u8 rates_len;
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u8 rates_ex[MAX_RATES_EX_LENGTH];
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u8 rates_ex_len;
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u8 edca_parmsets[18];
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u8 mode;
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u8 flags;
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u8 time_stamp[8];
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u16 beacon_interval;
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u16 listen_interval;
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u16 atim_window;
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u8 wpa_ie[MAX_WPA_IE_LEN];
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size_t wpa_ie_len;
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u8 rsn_ie[MAX_WPA_IE_LEN];
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size_t rsn_ie_len;
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u8 country[6];
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u8 dtim_period;
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u8 dtim_data;
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u8 power_constraint;
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u8 qosinfo;
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u8 qbssload[5];
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u8 network_type;
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int join_res;
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unsigned long last_scanned;
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};
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#endif
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/*
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join_res:
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-1: authentication fail
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@ -1224,19 +1181,6 @@ typedef struct tx_pending_t{
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int ieee80211_is_empty_essid(const char *essid, int essid_len);
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int ieee80211_get_hdrlen(u16 fc);
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#if 0
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/* Action frame categories (IEEE 802.11-2007, 7.3.1.11, Table 7-24) */
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#define WLAN_ACTION_SPECTRUM_MGMT 0
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#define WLAN_ACTION_QOS 1
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#define WLAN_ACTION_DLS 2
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#define WLAN_ACTION_BLOCK_ACK 3
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#define WLAN_ACTION_RADIO_MEASUREMENT 5
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#define WLAN_ACTION_FT 6
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#define WLAN_ACTION_SA_QUERY 8
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#define WLAN_ACTION_WMM 17
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#endif
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/* Action category code */
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enum rtw_ieee80211_category {
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RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0,
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@ -272,21 +272,6 @@ struct ieee80211_mgmt {
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u8 status_code;
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u8 variable[0];
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} __attribute__ ((packed)) wme_action;
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#if 0
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struct{
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u8 action_code;
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u8 element_id;
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u8 length;
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struct ieee80211_channel_sw_ie sw_elem;
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} __attribute__ ((packed)) chan_switch;
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struct{
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u8 action_code;
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u8 dialog_token;
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u8 element_id;
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u8 length;
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struct ieee80211_msrment_ie msr_elem;
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} __attribute__ ((packed)) measurement;
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#endif
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struct{
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u8 action_code;
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u8 dialog_token;
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@ -376,29 +361,6 @@ struct ieee80211_mgmt {
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struct {
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u16 reason_code;
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} disassoc;
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#if 0
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struct {
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__le64 timestamp;
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u16 beacon_int;
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u16 capab_info;
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/* followed by some of SSID, Supported rates,
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* FH Params, DS Params, CF Params, IBSS Params, TIM */
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u8 variable[0];
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} beacon;
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struct {
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/* only variable items: SSID, Supported rates */
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u8 variable[0];
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} probe_req;
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struct {
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__le64 timestamp;
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u16 beacon_int;
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u16 capab_info;
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/* followed by some of SSID, Supported rates,
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* FH Params, DS Params, CF Params, IBSS Params */
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u8 variable[0];
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} probe_resp;
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#endif
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struct {
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u8 category;
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union {
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@ -408,21 +370,6 @@ struct ieee80211_mgmt {
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u8 status_code;
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u8 variable[0];
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} wme_action;
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/*
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struct{
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u8 action_code;
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u8 element_id;
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u8 length;
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struct ieee80211_channel_sw_ie sw_elem;
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} chan_switch;
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struct{
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u8 action_code;
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u8 dialog_token;
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u8 element_id;
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u8 length;
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struct ieee80211_msrment_ie msr_elem;
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} measurement;
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*/
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struct{
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u8 action_code;
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u8 dialog_token;
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@ -509,48 +509,11 @@ typedef struct _ODM_STA_INFO{
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u1Byte RXEVM[4];
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u1Byte RXSNR[4];
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// ODM Write
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//1 TX_INFO (may changed by IC)
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//TX_INFO_T pTxInfo; // Define in IC folder. Move lower layer.
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#if 0
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u1Byte ANTSEL_A; //in Jagar: 4bit; others: 2bit
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u1Byte ANTSEL_B; //in Jagar: 4bit; others: 2bit
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u1Byte ANTSEL_C; //only in Jagar: 4bit
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u1Byte ANTSEL_D; //only in Jagar: 4bit
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u1Byte TX_ANTL; //not in Jagar: 2bit
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u1Byte TX_ANT_HT; //not in Jagar: 2bit
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u1Byte TX_ANT_CCK; //not in Jagar: 2bit
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u1Byte TXAGC_A; //not in Jagar: 4bit
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u1Byte TXAGC_B; //not in Jagar: 4bit
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u1Byte TXPWR_OFFSET; //only in Jagar: 3bit
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u1Byte TX_ANT; //only in Jagar: 4bit for TX_ANTL/TX_ANTHT/TX_ANT_CCK
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#endif
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//
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// Please use compile flag to disabe the strcutrue for other IC except 88E.
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// Please use compile flag to disable the struictrue for other IC except 88E.
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// Move To lower layer.
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//
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// ODM Write Wilson will handle this part(said by Luke.Lee)
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//TX_RPT_T pTxRpt; // Define in IC folder. Move lower layer.
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#if 0
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//1 For 88E RA (don't redefine the naming)
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u1Byte rate_id;
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u1Byte rate_SGI;
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u1Byte rssi_sta_ra;
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u1Byte SGI_enable;
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u1Byte Decision_rate;
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u1Byte Pre_rate;
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u1Byte Active;
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// Driver write Wilson handle.
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//1 TX_RPT (don't redefine the naming)
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u2Byte RTY[4]; // ???
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u2Byte TOTAL; // ???
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u2Byte DROP; // ???
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//
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// Please use compile flag to disabe the strcutrue for other IC except 88E.
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//
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#endif
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}ODM_STA_INFO_T, *PODM_STA_INFO_T;
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#endif
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@ -1521,16 +1484,6 @@ typedef enum tag_DIG_Connect_Definition
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#define TxHighPwrLevel_70 8
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#define TxHighPwrLevel_100 9
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//3===========================================================
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//3 Tx Power Tracking
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//3===========================================================
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#if 0 //mask this, since these have been defined in typdef.h, vivi
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#define OFDM_TABLE_SIZE 37
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#define OFDM_TABLE_SIZE_92D 43
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#define CCK_TABLE_SIZE 33
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#endif
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//3===========================================================
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//3 Rate Adaptive
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//3===========================================================
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@ -168,738 +168,6 @@
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#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr)
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#endif
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VOID
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ODM_InitDebugSetting(
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IN PDM_ODM_T pDM_Odm
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);
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#if 0
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#if DBG
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#define DbgPrint printk
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#define PRINT_DATA(_TitleString, _HexData, _HexDataLen) \
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{ \
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char *szTitle = _TitleString; \
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pu1Byte pbtHexData = _HexData; \
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u4Byte u4bHexDataLen = _HexDataLen; \
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u4Byte __i; \
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DbgPrint("%s", szTitle); \
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for (__i=0;__i<u4bHexDataLen;__i++) \
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{ \
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if ((__i & 15) == 0) \
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{ \
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DbgPrint("\n"); \
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} \
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DbgPrint("%02X%s", pbtHexData[__i], ( ((__i&3)==3) ? " " : " ") ); \
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} \
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DbgPrint("\n"); \
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}
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// RT_PRINT_XXX macros: implemented for debugging purpose.
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// Added by Annie, 2005-11-21.
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#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
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if (((_Comp) & ODM_GlobalDebugComponents) && (_Level <= ODM_GlobalDebugLevel)) \
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{ \
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int __i; \
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pu1Byte ptr = (pu1Byte)_HexData; \
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DbgPrint("Rtl819x: "); \
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DbgPrint(_TitleString); \
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for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
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{ \
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DbgPrint("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \
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if (((__i + 1) % 16) == 0) DbgPrint("\n"); \
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} \
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DbgPrint("\n"); \
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}
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#define RT_PRINT_ADDR(_Comp, _Level, _TitleString, _Ptr) \
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if (((_Comp) & ODM_GlobalDebugComponents) && (_Level <= ODM_GlobalDebugLevel)) \
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{ \
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int __i; \
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pu1Byte ptr = (pu1Byte)_Ptr; \
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DbgPrint("Rtl819x: "); \
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DbgPrint(_TitleString); \
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DbgPrint(" "); \
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for ( __i=0; __i<6; __i++ ) \
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DbgPrint("%02X%s", ptr[__i], (__i==5)?"":"-"); \
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DbgPrint("\n"); \
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}
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#define RT_PRINT_ADDRS(_Comp, _Level, _TitleString, _Ptr, _AddNum) \
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if (((_Comp) & ODM_GlobalDebugComponents) && (_Level <= ODM_GlobalDebugLevel)) \
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{ \
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int __i, __j; \
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pu1Byte ptr = (pu1Byte)_Ptr; \
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DbgPrint("Rtl819x: "); \
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DbgPrint(_TitleString); \
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DbgPrint("\n"); \
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for ( __i=0; __i<(int)_AddNum; __i++ ) \
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{ \
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for ( __j=0; __j<6; __j++ ) \
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DbgPrint("%02X%s", ptr[__i*6+__j], (__j==5)?"":"-"); \
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DbgPrint("\n"); \
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} \
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}
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// Added by Annie, 2005-11-22.
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#define MAX_STR_LEN 64
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#define PRINTABLE(_ch) (_ch>=' ' &&_ch<='~' ) // I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.
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#define RT_PRINT_STR(_Comp, _Level, _TitleString, _Ptr, _Len) \
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if (((_Comp) & ODM_GlobalDebugComponents) && (_Level <= ODM_GlobalDebugLevel)) \
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{ \
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int __i; \
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u1Byte buffer[MAX_STR_LEN]; \
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int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
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PlatformZeroMemory( buffer, MAX_STR_LEN ); \
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PlatformMoveMemory( buffer, (pu1Byte)_Ptr, length ); \
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for ( __i=0; __i<MAX_STR_LEN; __i++ ) \
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{ \
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if ( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
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} \
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buffer[length] = '\0'; \
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DbgPrint("Rtl819x: "); \
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DbgPrint(_TitleString); \
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DbgPrint(": %d, <%s>\n", _Len, buffer); \
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}
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#else // of #if DBG
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#define DbgPrint(...)
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#define PRINT_DATA(_TitleString, _HexData, _HexDataLen)
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#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen)
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#define RT_PRINT_ADDR(_Comp, _Level, _TitleString, _Ptr)
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#define RT_PRINT_ADDRS(_Comp, _Level, _TitleString, _Ptr, _AddNum)
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#define RT_PRINT_STR(_Comp, _Level, _TitleString, _Ptr, _Len)
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#endif // of #if DBG
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#endif
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#if 0
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/* Define debug print header for every service module.*/
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typedef struct tag_ODM_DBGP_Service_Module_Header_Name_Structure
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{
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const char *pMANS;
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const char *pRTOS;
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const char *pALM;
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const char *pPEM;
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const char *pCMPK;
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const char *pRAPD;
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const char *pTXPB;
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const char *pQUMG;
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}ODM_DBGP_HEAD_T;
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/* Define different debug flag for dedicated service modules in debug flag array. */
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// Each module has independt 32 bit debug flag you cnn define the flag as yout require.
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typedef enum tag_ODM_DBGP_Flag_Type_Definition
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{
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ODM_FTX = 0,
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ODM_FRX ,
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ODM_FPHY ,
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ODM_FPWR ,
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ODM_FDM ,
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ODM_FC2H ,
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ODM_FBT ,
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ODM_DBGP_TYPE_MAX
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}ODM_DBGP_FLAG_E;
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// Define TX relative debug bit --> FTX
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#define ODM_TX_DESC BIT0
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#define ODM_TX_DESC_TID BIT1
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#define ODM_TX_PATH BIT2
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// Define RX relative debug bit --> FRX
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#define ODM_RX_DATA BIT0
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#define ODM_RX_PHY_STS BIT1
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#define ODM_RX_PHY_SS BIT2
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#define ODM_RX_PHY_SQ BIT3
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#define ODM_RX_PHY_ASTS BIT4
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#define ODM_RX_ERR_LEN BIT5
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#define ODM_RX_DEFRAG BIT6
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#define ODM_RX_ERR_RATE BIT7
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#define ODM_RX_PATH BIT8
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#define ODM_RX_BEACON BIT9
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// Define PHY-BB/RF/MAC check module bit --> FPHY
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#define ODM_PHY_BBR BIT0
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#define ODM_PHY_BBW BIT1
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#define ODM_PHY_RFR BIT2
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#define ODM_PHY_RFW BIT3
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#define ODM_PHY_MACR BIT4
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#define ODM_PHY_MACW BIT5
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#define ODM_PHY_ALLR BIT6
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#define ODM_PHY_ALLW BIT7
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#define ODM_PHY_TXPWR BIT8
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#define ODM_PHY_PWRDIFF BIT9
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#define ODM_PHY_SICR BIT10
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#define ODM_PHY_SICW BIT11
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extern u4Byte ODM_GlobalDebugLevel;
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#if DBG
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extern u8Byte ODM_GlobalDebugComponents;
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#endif
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#endif
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#if 0
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//-----------------------------------------------------------------------------
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// Define the debug levels
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//
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// 1. DBG_TRACE and DBG_LOUD are used for normal cases.
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// So that, they can help SW engineer to develope or trace states changed
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// and also help HW enginner to trace every operation to and from HW,
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// e.g IO, Tx, Rx.
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//
|
||||
// 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases,
|
||||
// which help us to debug SW or HW.
|
||||
//
|
||||
//-----------------------------------------------------------------------------
|
||||
//
|
||||
// Never used in a call to ODM_RT_TRACE(pDM_Odm,)!
|
||||
//
|
||||
#define DBG_OFF 0
|
||||
|
||||
//
|
||||
// Deprecated! Don't use it!
|
||||
// TODO: fix related debug message!
|
||||
//
|
||||
//#define DBG_SEC 1
|
||||
|
||||
//
|
||||
// Fatal bug.
|
||||
// For example, Tx/Rx/IO locked up, OS hangs, memory access violation,
|
||||
// resource allocation failed, unexpected HW behavior, HW BUG and so on.
|
||||
//
|
||||
#define DBG_SERIOUS 2
|
||||
|
||||
//
|
||||
// Abnormal, rare, or unexpeted cases.
|
||||
// For example, IRP/Packet/OID canceled, device suprisely unremoved and so on.
|
||||
//
|
||||
#define DBG_WARNING 3
|
||||
|
||||
//
|
||||
// Normal case with useful information about current SW or HW state.
|
||||
// For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status,
|
||||
// SW protocol state change, dynamic mechanism state change and so on.
|
||||
//
|
||||
#define DBG_LOUD 4
|
||||
|
||||
//
|
||||
// Normal case with detail execution flow or information.
|
||||
//
|
||||
#define DBG_TRACE 5
|
||||
|
||||
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
// Define the tracing components
|
||||
//
|
||||
//-----------------------------------------------------------------------------
|
||||
#define COMP_TRACE BIT0 // For function call tracing.
|
||||
#define COMP_DBG BIT1 // Only for temporary debug message.
|
||||
#define COMP_INIT BIT2 // during driver initialization / halt / reset.
|
||||
#define COMP_OID_QUERY BIT3 // Query OID.
|
||||
#define COMP_OID_SET BIT4 // Set OID.
|
||||
#define COMP_RECV BIT5 // Reveive part data path.
|
||||
#define COMP_SEND BIT6 // Send part path.
|
||||
#define COMP_IO BIT7 // I/O Related. Added by Annie, 2006-03-02.
|
||||
#define COMP_POWER BIT8 // 802.11 Power Save mode or System/Device Power state related.
|
||||
#define COMP_MLME BIT9 // 802.11 link related: join/start BSS, leave BSS.
|
||||
#define COMP_SCAN BIT10 // For site survey.
|
||||
#define COMP_SYSTEM BIT11 // For general platform function.
|
||||
#define COMP_SEC BIT12 // For Security.
|
||||
#define COMP_AP BIT13 // For AP mode related.
|
||||
#define COMP_TURBO BIT14 // For Turbo Mode related. By Annie, 2005-10-21.
|
||||
#define COMP_QOS BIT15 // For QoS.
|
||||
#define COMP_AUTHENTICATOR BIT16 // For AP mode Authenticator. Added by Annie, 2006-01-30.
|
||||
#define COMP_BEACON BIT17 // For Beacon related, by rcnjko.
|
||||
#define COMP_ANTENNA BIT18 // For Antenna diversity related, by rcnjko.
|
||||
#define COMP_RATE BIT19 // For Rate Adaptive mechanism, 2006.07.02, by rcnjko. #define COMP_EVENTS 0x00000080 // Event handling
|
||||
#define COMP_EVENTS BIT20 // Event handling
|
||||
#define COMP_FPGA BIT21 // For FPGA verfication
|
||||
#define COMP_RM BIT22 // For Radio Measurement.
|
||||
#define COMP_MP BIT23 // For mass production test, by shien chang, 2006.07.13
|
||||
#define COMP_RXDESC BIT24 // Show Rx desc information for SD3 debug. Added by Annie, 2006-07-15.
|
||||
#define COMP_CKIP BIT25 // For CCX 1 S13: CKIP. Added by Annie, 2006-08-14.
|
||||
#define COMP_DIG BIT26 // For DIG, 2006.09.25, by rcnjko.
|
||||
#define COMP_TXAGC BIT27 // For Tx power, 060928, by rcnjko.
|
||||
#define COMP_HIPWR BIT28 // For High Power Mechanism, 060928, by rcnjko.
|
||||
#define COMP_HALDM BIT29 // For HW Dynamic Mechanism, 061010, by rcnjko.
|
||||
#define COMP_RSNA BIT30 // For RSNA IBSS , 061201, by CCW.
|
||||
#define COMP_INDIC BIT31 // For link indication
|
||||
#define COMP_LED BIT32 // For LED.
|
||||
#define COMP_RF BIT33 // For RF.
|
||||
//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
|
||||
//1//1Attention Please!!!<11n or 8190 specific code should be put below this line>
|
||||
//1!!!!!!!!!!!!!!!!!!!!!!!!!!!
|
||||
|
||||
#define COMP_HT BIT34 // For 802.11n HT related information. by Emily 2006-8-11
|
||||
#define COMP_POWER_TRACKING BIT35 //FOR 8190 TX POWER TRACKING
|
||||
#define COMP_RX_REORDER BIT36 // 8190 Rx Reorder
|
||||
#define COMP_AMSDU BIT37 // For A-MSDU Debugging
|
||||
#define COMP_WPS BIT38 //WPS Debug Message
|
||||
#define COMP_RATR BIT39
|
||||
#define COMP_RESET BIT40
|
||||
// For debug command to print on dbgview!!
|
||||
#define COMP_CMD BIT41
|
||||
#define COMP_EFUSE BIT42
|
||||
#define COMP_MESH_INTERWORKING BIT43
|
||||
#define COMP_CCX BIT44 //CCX Debug Flag
|
||||
#define COMP_IOCTL BIT45 // IO Control
|
||||
#define COMP_GP BIT46 // For generic parser.
|
||||
#define COMP_TXAGG BIT47
|
||||
#define COMP_HVL BIT48 // For Ndis 6.2 Context Swirch and Hardware Virtualiztion Layer
|
||||
#define COMP_TEST BIT49
|
||||
#define COMP_BB_POWERSAVING BIT50
|
||||
#define COMP_SWAS BIT51 // For SW Antenna Switch
|
||||
#define COMP_P2P BIT52
|
||||
#define COMP_MUX BIT53
|
||||
#define COMP_FUNC BIT54
|
||||
#define COMP_TDLS BIT55
|
||||
#define COMP_OMNIPEEK BIT56
|
||||
#define COMP_DUALMACSWITCH BIT60 // 2010/12/27 Add for Dual mac mode debug
|
||||
#define COMP_EASY_CONCURRENT BIT61 // 2010/12/27 Add for easy cncurrent mode debug
|
||||
#define COMP_PSD BIT63 //2011/3/9 Add for WLAN PSD for BT AFH
|
||||
|
||||
#define COMP_DFS BIT62
|
||||
|
||||
#define COMP_ALL UINT64_C(0xFFFFFFFFFFFFFFFF) // All components
|
||||
// For debug print flag to use
|
||||
/*------------------------------Define structure----------------------------*/
|
||||
/* 2007/07/13 MH *//*------For DeBuG Print modeue------*/
|
||||
|
||||
/* Defnie structure to store different debug flag variable. Every debug flag
|
||||
is a UINT32 integer and you can assign 32 different events. */
|
||||
typedef struct tag_DBGP_Debug_Flag_Structure
|
||||
{
|
||||
u4Byte Mans; /* Main Scheduler module. */
|
||||
u4Byte Rtos; /* RTOS module. */
|
||||
u4Byte Alarm; /* Alarm module. */
|
||||
u4Byte Pm; /* Performance monitor module. */
|
||||
}DBGP_FLAG_T;
|
||||
|
||||
/* Define debug print header for every service module.*/
|
||||
typedef struct tag_DBGP_Service_Module_Header_Name_Structure
|
||||
{
|
||||
const char *pMANS;
|
||||
const char *pRTOS;
|
||||
const char *pALM;
|
||||
const char *pPEM;
|
||||
const char *pCMPK;
|
||||
const char *pRAPD;
|
||||
const char *pTXPB;
|
||||
const char *pQUMG;
|
||||
}DBGP_HEAD_T;
|
||||
|
||||
|
||||
/* Define different debug flag for dedicated service modules in debug flag array. */
|
||||
// Each module has independt 32 bit debug flag you cnn define the flag as yout require.
|
||||
typedef enum tag_DBGP_Flag_Type_Definition
|
||||
{
|
||||
FQoS = 0,
|
||||
FTX = 1,
|
||||
FRX = 2,
|
||||
FSEC = 3,
|
||||
FMGNT = 4,
|
||||
FMLME = 5,
|
||||
FRESOURCE = 6,
|
||||
FBEACON = 7,
|
||||
FISR = 8,
|
||||
FPHY = 9,
|
||||
FMP = 10,
|
||||
FEEPROM = 11,
|
||||
FPWR = 12,
|
||||
FDM = 13,
|
||||
FDBG_CTRL = 14,
|
||||
FC2H = 15,
|
||||
FBT = 16,
|
||||
FINIT = 17,
|
||||
FIOCTL = 18,
|
||||
FSHORT_CUT = 19,
|
||||
DBGP_TYPE_MAX
|
||||
}DBGP_FLAG_E;
|
||||
|
||||
|
||||
// Define Qos Relative debug flag bit --> FQoS
|
||||
#define QoS_INIT BIT0
|
||||
#define QoS_VISTA BIT1
|
||||
|
||||
// Define TX relative debug bit --> FTX
|
||||
#define TX_DESC BIT0
|
||||
#define TX_DESC_TID BIT1
|
||||
#define TX_PATH BIT2
|
||||
|
||||
// Define RX relative debug bit --> FRX
|
||||
#define RX_DATA BIT0
|
||||
#define RX_PHY_STS BIT1
|
||||
#define RX_PHY_SS BIT2
|
||||
#define RX_PHY_SQ BIT3
|
||||
#define RX_PHY_ASTS BIT4
|
||||
#define RX_ERR_LEN BIT5
|
||||
#define RX_DEFRAG BIT6
|
||||
#define RX_ERR_RATE BIT7
|
||||
#define RX_PATH BIT8
|
||||
#define RX_BEACON BIT9
|
||||
|
||||
// Define Security relative debug bit --> FSEC
|
||||
|
||||
// Define MGNT relative debug bit --> FMGNT
|
||||
|
||||
// Define MLME relative debug bit --> FMLME
|
||||
#define MEDIA_STS BIT0
|
||||
#define LINK_STS BIT1
|
||||
|
||||
// Define OS resource check module bit --> FRESOURCE
|
||||
#define OS_CHK BIT0
|
||||
|
||||
// Define beacon content check module bit --> FBEACON
|
||||
#define BCN_SHOW BIT0
|
||||
#define BCN_PEER BIT1
|
||||
|
||||
// Define ISR/IMR check module bit --> FISR
|
||||
#define ISR_CHK BIT0
|
||||
|
||||
// Define PHY-BB/RF/MAC check module bit --> FPHY
|
||||
#define PHY_BBR BIT0
|
||||
#define PHY_BBW BIT1
|
||||
#define PHY_RFR BIT2
|
||||
#define PHY_RFW BIT3
|
||||
#define PHY_MACR BIT4
|
||||
#define PHY_MACW BIT5
|
||||
#define PHY_ALLR BIT6
|
||||
#define PHY_ALLW BIT7
|
||||
#define PHY_TXPWR BIT8
|
||||
#define PHY_PWRDIFF BIT9
|
||||
#define PHY_SICR BIT10
|
||||
#define PHY_SICW BIT11
|
||||
|
||||
// Define MPT driver check module bit --> FMP
|
||||
#define MP_RX BIT0
|
||||
#define MP_SWICH_CH BIT1
|
||||
|
||||
// Define EEPROM and EFUSE check module bit --> FEEPROM
|
||||
#define EEPROM_W BIT0
|
||||
#define EFUSE_PG BIT1
|
||||
#define EFUSE_READ_ALL BIT2
|
||||
#define EFUSE_ANALYSIS BIT3
|
||||
#define EFUSE_PG_DETAIL BIT4
|
||||
|
||||
// Define power save check module bit --> FPWR
|
||||
#define LPS BIT0
|
||||
#define IPS BIT1
|
||||
#define PWRSW BIT2
|
||||
#define PWRHW BIT3
|
||||
#define PWRHAL BIT4
|
||||
|
||||
// Define Dynamic Mechanism check module bit --> FDM
|
||||
#define WA_IOT BIT0
|
||||
#define DM_PWDB BIT1
|
||||
#define DM_Monitor BIT2
|
||||
#define DM_DIG BIT3
|
||||
#define DM_EDCA_Turbo BIT4
|
||||
#define DM_BT30 BIT5
|
||||
|
||||
// Define Dbg Control module bit --> FDBG_CTRL
|
||||
#define DBG_CTRL_TRACE BIT0
|
||||
#define DBG_CTRL_INBAND_NOISE BIT1
|
||||
|
||||
// Define FW C2H Cmd check module bit --> FC2H
|
||||
#define C2H_Summary BIT0
|
||||
#define C2H_PacketData BIT1
|
||||
#define C2H_ContentData BIT2
|
||||
// Define BT Cmd check module bit --> FBT
|
||||
#define BT_TRACE BIT0
|
||||
#define BT_RFPoll BIT1
|
||||
|
||||
// Define init check for module bit --> FINIT
|
||||
#define INIT_EEPROM BIT0
|
||||
#define INIT_TxPower BIT1
|
||||
#define INIT_IQK BIT2
|
||||
#define INIT_RF BIT3
|
||||
|
||||
// Define IOCTL Cmd check module bit --> FIOCTL
|
||||
// section 1 : IRP related
|
||||
#define IOCTL_IRP BIT0
|
||||
#define IOCTL_IRP_DETAIL BIT1
|
||||
#define IOCTL_IRP_STATISTICS BIT2
|
||||
#define IOCTL_IRP_HANDLE BIT3
|
||||
// section 2 : HCI command/event
|
||||
#define IOCTL_BT_HCICMD BIT8
|
||||
#define IOCTL_BT_HCICMD_DETAIL BIT9
|
||||
#define IOCTL_BT_HCICMD_EXT BIT10
|
||||
#define IOCTL_BT_EVENT BIT11
|
||||
#define IOCTL_BT_EVENT_DETAIL BIT12
|
||||
#define IOCTL_BT_EVENT_PERIODICAL BIT13
|
||||
// section 3 : BT tx/rx data and throughput
|
||||
#define IOCTL_BT_TX_ACLDATA BIT16
|
||||
#define IOCTL_BT_TX_ACLDATA_DETAIL BIT17
|
||||
#define IOCTL_BT_RX_ACLDATA BIT18
|
||||
#define IOCTL_BT_RX_ACLDATA_DETAIL BIT19
|
||||
#define IOCTL_BT_TP BIT20
|
||||
// section 4 : BT connection state machine.
|
||||
#define IOCTL_STATE BIT21
|
||||
#define IOCTL_BT_LOGO BIT22
|
||||
// section 5 : BT function trace
|
||||
#define IOCTL_CALLBACK_FUN BIT24
|
||||
#define IOCTL_PARSE_BT_PKT BIT25
|
||||
#define IOCTL_BT_TX_PKT BIT26
|
||||
#define IOCTL_BT_FLAG_MON BIT27
|
||||
|
||||
//
|
||||
// Define init check for module bit --> FSHORT_CUT
|
||||
// 2011/07/20 MH Add for short but definition.
|
||||
//
|
||||
#define SHCUT_TX BIT0
|
||||
#define SHCUT_RX BIT1
|
||||
|
||||
|
||||
/* 2007/07/13 MH *//*------For DeBuG Print modeue------*/
|
||||
/*------------------------------Define structure----------------------------*/
|
||||
|
||||
|
||||
/*------------------------Export Marco Definition---------------------------*/
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_MP)
|
||||
#define RT_PRINTK(fmt, args...) printk( "%s(): " fmt, __func__, ## args);
|
||||
|
||||
#if DBG
|
||||
#define ODM_RT_TRACE(pDM_Odm,comp, level, fmt) \
|
||||
if (((comp) & GlobalDebugComponents) && (level <= GlobalDebugLevel)) \
|
||||
{ \
|
||||
RT_PRINTK fmt; \
|
||||
}
|
||||
|
||||
#define RT_TRACE_F(comp, level, fmt) \
|
||||
if (((comp) & GlobalDebugComponents) && (level <= GlobalDebugLevel)) \
|
||||
{ \
|
||||
RT_PRINTK fmt; \
|
||||
}
|
||||
|
||||
#define RT_ASSERT(expr,fmt) \
|
||||
if (!(expr)) { \
|
||||
printk( "Assertion failed! %s at ......\n", #expr); \
|
||||
printk( " ......%s,%s,line=%d\n",__FILE__,__func__,__LINE__); \
|
||||
}
|
||||
#define dbg_enter() { printk("==> %s\n", __func__); }
|
||||
#define dbg_exit() { printk("<== %s\n", __func__); }
|
||||
#define dbg_trace(str) { printk("%s:%s\n", __func__, str); }
|
||||
#else
|
||||
#define ODM_RT_TRACE(pDM_Odm,comp, level, fmt)
|
||||
#define RT_TRACE_F(comp, level, fmt)
|
||||
#define RT_ASSERT(expr, fmt)
|
||||
#define dbg_enter()
|
||||
#define dbg_exit()
|
||||
#define dbg_trace(str)
|
||||
#endif
|
||||
|
||||
#if DBG
|
||||
#define DbgPrint printk
|
||||
|
||||
#define PRINT_DATA(_TitleString, _HexData, _HexDataLen) \
|
||||
{ \
|
||||
char *szTitle = _TitleString; \
|
||||
pu1Byte pbtHexData = _HexData; \
|
||||
u4Byte u4bHexDataLen = _HexDataLen; \
|
||||
u4Byte __i; \
|
||||
DbgPrint("%s", szTitle); \
|
||||
for (__i=0;__i<u4bHexDataLen;__i++) \
|
||||
{ \
|
||||
if ((__i & 15) == 0) \
|
||||
{ \
|
||||
DbgPrint("\n"); \
|
||||
} \
|
||||
DbgPrint("%02X%s", pbtHexData[__i], ( ((__i&3)==3) ? " " : " ") ); \
|
||||
} \
|
||||
DbgPrint("\n"); \
|
||||
}
|
||||
|
||||
// RT_PRINT_XXX macros: implemented for debugging purpose.
|
||||
// Added by Annie, 2005-11-21.
|
||||
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \
|
||||
if (((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \
|
||||
{ \
|
||||
int __i; \
|
||||
pu1Byte ptr = (pu1Byte)_HexData; \
|
||||
DbgPrint("Rtl819x: "); \
|
||||
DbgPrint(_TitleString); \
|
||||
for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
|
||||
{ \
|
||||
DbgPrint("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \
|
||||
if (((__i + 1) % 16) == 0) DbgPrint("\n"); \
|
||||
} \
|
||||
DbgPrint("\n"); \
|
||||
}
|
||||
|
||||
#define RT_PRINT_ADDR(_Comp, _Level, _TitleString, _Ptr) \
|
||||
if (((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \
|
||||
{ \
|
||||
int __i; \
|
||||
pu1Byte ptr = (pu1Byte)_Ptr; \
|
||||
DbgPrint("Rtl819x: "); \
|
||||
DbgPrint(_TitleString); \
|
||||
DbgPrint(" "); \
|
||||
for ( __i=0; __i<6; __i++ ) \
|
||||
DbgPrint("%02X%s", ptr[__i], (__i==5)?"":"-"); \
|
||||
DbgPrint("\n"); \
|
||||
}
|
||||
|
||||
#define RT_PRINT_ADDRS(_Comp, _Level, _TitleString, _Ptr, _AddNum) \
|
||||
if (((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \
|
||||
{ \
|
||||
int __i, __j; \
|
||||
pu1Byte ptr = (pu1Byte)_Ptr; \
|
||||
DbgPrint("Rtl819x: "); \
|
||||
DbgPrint(_TitleString); \
|
||||
DbgPrint("\n"); \
|
||||
for ( __i=0; __i<(int)_AddNum; __i++ ) \
|
||||
{ \
|
||||
for ( __j=0; __j<6; __j++ ) \
|
||||
DbgPrint("%02X%s", ptr[__i*6+__j], (__j==5)?"":"-"); \
|
||||
DbgPrint("\n"); \
|
||||
} \
|
||||
}
|
||||
|
||||
// Added by Annie, 2005-11-22.
|
||||
#define MAX_STR_LEN 64
|
||||
#define PRINTABLE(_ch) (_ch>=' ' &&_ch<='~' ) // I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.
|
||||
|
||||
#define RT_PRINT_STR(_Comp, _Level, _TitleString, _Ptr, _Len) \
|
||||
if (((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \
|
||||
{ \
|
||||
int __i; \
|
||||
u1Byte buffer[MAX_STR_LEN]; \
|
||||
int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
|
||||
PlatformZeroMemory( buffer, MAX_STR_LEN ); \
|
||||
PlatformMoveMemory( buffer, (pu1Byte)_Ptr, length ); \
|
||||
for ( __i=0; __i<MAX_STR_LEN; __i++ ) \
|
||||
{ \
|
||||
if ( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
|
||||
} \
|
||||
buffer[length] = '\0'; \
|
||||
DbgPrint("Rtl819x: "); \
|
||||
DbgPrint(_TitleString); \
|
||||
DbgPrint(": %d, <%s>\n", _Len, buffer); \
|
||||
}
|
||||
|
||||
#else // of #if DBG
|
||||
#define DbgPrint(...)
|
||||
#define PRINT_DATA(_TitleString, _HexData, _HexDataLen)
|
||||
#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen)
|
||||
#define RT_PRINT_ADDR(_Comp, _Level, _TitleString, _Ptr)
|
||||
#define RT_PRINT_ADDRS(_Comp, _Level, _TitleString, _Ptr, _AddNum)
|
||||
#define RT_PRINT_STR(_Comp, _Level, _TitleString, _Ptr, _Len)
|
||||
#endif // of #if DBG
|
||||
|
||||
|
||||
|
||||
#endif // #if (DM_ODM_SUPPORT_TYPE != ODM_MP)
|
||||
|
||||
#define DEBUG_PRINT 1
|
||||
|
||||
// Please add new OS's print API by yourself
|
||||
|
||||
//#if (RT_PLATFORM==PLATFORM_WINDOWS)
|
||||
#if (DEBUG_PRINT == 1) && DBG
|
||||
#define RTPRINT(dbgtype, dbgflag, printstr)\
|
||||
{\
|
||||
if (DBGP_Type[dbgtype] & dbgflag)\
|
||||
{\
|
||||
DbgPrint printstr;\
|
||||
}\
|
||||
}
|
||||
|
||||
#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)\
|
||||
{\
|
||||
if (DBGP_Type[dbgtype] & dbgflag)\
|
||||
{\
|
||||
int __i; \
|
||||
pu1Byte ptr = (pu1Byte)_Ptr; \
|
||||
DbgPrint printstr; \
|
||||
DbgPrint(" "); \
|
||||
for ( __i=0; __i<6; __i++ ) \
|
||||
DbgPrint("%02X%s", ptr[__i], (__i==5)?"":"-"); \
|
||||
DbgPrint("\n"); \
|
||||
}\
|
||||
}
|
||||
|
||||
#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)\
|
||||
{\
|
||||
if (DBGP_Type[dbgtype] & dbgflag)\
|
||||
{\
|
||||
int __i; \
|
||||
pu1Byte ptr = (pu1Byte)_HexData; \
|
||||
DbgPrint(_TitleString); \
|
||||
for ( __i=0; __i<(int)_HexDataLen; __i++ ) \
|
||||
{ \
|
||||
DbgPrint("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" ");\
|
||||
if (((__i + 1) % 16) == 0) DbgPrint("\n");\
|
||||
} \
|
||||
DbgPrint("\n"); \
|
||||
}\
|
||||
}
|
||||
#define FuncEntry FunctionIn(COMP_FUNC)
|
||||
#define FuncExit FunctionOut(COMP_FUNC)
|
||||
|
||||
#define FunctionIn(_comp) ODM_RT_TRACE(pDM_Odm,(_comp), DBG_LOUD, ("==========> %s\n", __func__))
|
||||
#define FunctionOut(_comp) ODM_RT_TRACE(pDM_Odm,(_comp), DBG_LOUD, ("<========== %s\n", __func__))
|
||||
|
||||
|
||||
#else
|
||||
|
||||
#define DBGP(dbgtype, dbgflag, printstr)
|
||||
#define RTPRINT(dbgtype, dbgflag, printstr)
|
||||
#define RTPRINT_ADDR(dbgtype, dbgflag, printstr, _Ptr)
|
||||
#define RTPRINT_DATA(dbgtype, dbgflag, _TitleString, _HexData, _HexDataLen)
|
||||
#define FuncEntry
|
||||
#define FuncExit
|
||||
#define FunctionIn(_comp)
|
||||
#define FunctionOut(_comp)
|
||||
#endif
|
||||
/*------------------------Export Marco Definition---------------------------*/
|
||||
|
||||
|
||||
/*------------------------Export global variable----------------------------*/
|
||||
extern u4Byte DBGP_Type[DBGP_TYPE_MAX];
|
||||
extern DBGP_HEAD_T DBGP_Head;
|
||||
|
||||
/*------------------------Export global variable----------------------------*/
|
||||
|
||||
|
||||
/*--------------------------Exported Function prototype---------------------*/
|
||||
extern void DBGP_Flag_Init(void);
|
||||
extern void DBG_PrintAllFlag(void);
|
||||
extern void DBG_PrintAllComp(void);
|
||||
extern void DBG_PrintFlagEvent(u1Byte DbgFlag);
|
||||
extern void DBG_DumpMem(const u1Byte DbgComp,
|
||||
const u1Byte DbgLevel,
|
||||
pu1Byte pMem,
|
||||
u2Byte Len);
|
||||
|
||||
/*--------------------------Exported Function prototype---------------------*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
extern u4Byte GlobalDebugLevel;
|
||||
extern u8Byte GlobalDebugComponents;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
VOID ODM_InitDebugSetting(PDM_ODM_T pDM_Odm);
|
||||
|
||||
#endif // __ODM_DBG_H__
|
||||
|
||||
|
|
|
|||
|
|
@ -40,12 +40,6 @@
|
|||
#define _bit_ic(_name, _ic) BIT_##_name##_ic
|
||||
|
||||
// _cat: implemented by Token-Pasting Operator.
|
||||
#if 0
|
||||
#define _cat(_name, _ic_type, _func) \
|
||||
( \
|
||||
_func##_all(_name) \
|
||||
)
|
||||
#endif
|
||||
|
||||
/*===================================
|
||||
|
||||
|
|
@ -67,17 +61,6 @@ ODM_REG(DIG,_pDM_Odm)
|
|||
_func##_11AC(_name) \
|
||||
)
|
||||
#endif
|
||||
#if 0 // only sample code
|
||||
#define _cat(_name, _ic_type, _func) \
|
||||
( \
|
||||
((_ic_type) & ODM_RTL8192C)? _func##_ic(_name, _8192C): \
|
||||
((_ic_type) & ODM_RTL8192D)? _func##_ic(_name, _8192D): \
|
||||
((_ic_type) & ODM_RTL8192S)? _func##_ic(_name, _8192S): \
|
||||
((_ic_type) & ODM_RTL8723A)? _func##_ic(_name, _8723A): \
|
||||
((_ic_type) & ODM_RTL8188E)? _func##_ic(_name, _8188E): \
|
||||
_func##_ic(_name, _8195) \
|
||||
)
|
||||
#endif
|
||||
|
||||
// _name: name of register or bit.
|
||||
// Example: "ODM_REG(R_A_AGC_CORE1, pDM_Odm)"
|
||||
|
|
@ -102,26 +85,6 @@ typedef enum _ODM_H2C_CMD
|
|||
typedef void *PRT_WORK_ITEM ;
|
||||
typedef void RT_WORKITEM_HANDLE,*PRT_WORKITEM_HANDLE;
|
||||
typedef VOID (*RT_WORKITEM_CALL_BACK)(PVOID pContext);
|
||||
|
||||
#if 0
|
||||
typedef struct tasklet_struct RT_WORKITEM_HANDLE, *PRT_WORKITEM_HANDLE;
|
||||
|
||||
typedef struct _RT_WORK_ITEM
|
||||
{
|
||||
|
||||
RT_WORKITEM_HANDLE Handle; // Platform-dependent handle for this workitem, e.g. Ndis Workitem object.
|
||||
PVOID Adapter; // Pointer to Adapter object.
|
||||
PVOID pContext; // Parameter to passed to CallBackFunc().
|
||||
RT_WORKITEM_CALL_BACK CallbackFunc; // Callback function of the workitem.
|
||||
u1Byte RefCount; // 0: driver is going to unload, 1: No such workitem scheduled, 2: one workitem is schedueled.
|
||||
PVOID pPlatformExt; // Pointer to platform-dependent extension.
|
||||
BOOLEAN bFree;
|
||||
char szID[36]; // An identity string of this workitem.
|
||||
}RT_WORK_ITEM, *PRT_WORK_ITEM;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
//
|
||||
|
|
|
|||
|
|
@ -169,16 +169,6 @@ typedef enum _RT_SPINLOCK_TYPE{
|
|||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#include <basic_types.h>
|
||||
|
||||
#if 0
|
||||
typedef u8 u1Byte, *pu1Byte;
|
||||
typedef u16 u2Byte,*pu2Byte;
|
||||
typedef u32 u4Byte,*pu4Byte;
|
||||
typedef u64 u8Byte,*pu8Byte;
|
||||
typedef s8 s1Byte,*ps1Byte;
|
||||
typedef s16 s2Byte,*ps2Byte;
|
||||
typedef s32 s4Byte,*ps4Byte;
|
||||
typedef s64 s8Byte,*ps8Byte;
|
||||
#else
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
|
|
@ -203,7 +193,6 @@ typedef enum _RT_SPINLOCK_TYPE{
|
|||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
#endif
|
||||
#ifdef CONFIG_USB_HCI
|
||||
#define DEV_BUS_TYPE RT_USB_INTERFACE
|
||||
#elif defined(CONFIG_PCI_HCI)
|
||||
|
|
|
|||
|
|
@ -20,24 +20,6 @@
|
|||
#ifndef __RTL8188E_CMD_H__
|
||||
#define __RTL8188E_CMD_H__
|
||||
|
||||
#if 0
|
||||
enum cmd_msg_element_id
|
||||
{
|
||||
NONE_CMDMSG_EID,
|
||||
AP_OFFLOAD_EID = 0,
|
||||
SET_PWRMODE_EID = 1,
|
||||
JOINBSS_RPT_EID = 2,
|
||||
RSVD_PAGE_EID = 3,
|
||||
RSSI_4_EID = 4,
|
||||
RSSI_SETTING_EID = 5,
|
||||
MACID_CONFIG_EID = 6,
|
||||
MACID_PS_MODE_EID = 7,
|
||||
P2P_PS_OFFLOAD_EID = 8,
|
||||
SELECTIVE_SUSPEND_ROF_CMD = 9,
|
||||
P2P_PS_CTW_CMD_EID = 32,
|
||||
MAX_CMDMSG_EID
|
||||
};
|
||||
#else
|
||||
typedef enum _RTL8188E_H2C_CMD_ID
|
||||
{
|
||||
//Class Common
|
||||
|
|
@ -83,9 +65,6 @@ typedef enum _RTL8188E_H2C_CMD_ID
|
|||
H2C_RESET_TSF =0xc0,
|
||||
}RTL8188E_H2C_CMD_ID;
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
struct cmd_msg_parm {
|
||||
u8 eid; //element id
|
||||
u8 sz; // sz
|
||||
|
|
@ -98,7 +77,6 @@ enum{
|
|||
|
||||
typedef struct _SETPWRMODE_PARM {
|
||||
u8 Mode;//0:Active,1:LPS,2:WMMPS
|
||||
//u8 RLBM:4;//0:Min,1:Max,2: User define
|
||||
u8 SmartPS_RLBM;//LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData
|
||||
u8 AwakeInterval; // unit: beacon interval
|
||||
u8 bAllQueueUAPSD;
|
||||
|
|
|
|||
|
|
@ -44,134 +44,21 @@ struct dm_priv
|
|||
int MinUndecoratedPWDBForDM;
|
||||
int LastMinUndecoratedPWDBForDM;
|
||||
|
||||
//###### duplicate code,will move to ODM #########
|
||||
/*
|
||||
//for DIG
|
||||
u8 bDMInitialGainEnable;
|
||||
u8 binitialized; // for dm_initial_gain_Multi_STA use.
|
||||
DIG_T DM_DigTable;
|
||||
|
||||
PS_T DM_PSTable;
|
||||
|
||||
FALSE_ALARM_STATISTICS FalseAlmCnt;
|
||||
|
||||
//for rate adaptive, in fact, 88c/92c fw will handle this
|
||||
u8 bUseRAMask;
|
||||
RATE_ADAPTIVE RateAdaptive;
|
||||
*/
|
||||
//for High Power
|
||||
u8 bDynamicTxPowerEnable;
|
||||
u8 LastDTPLvl;
|
||||
u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06
|
||||
u8 PowerIndex_backup[6];
|
||||
#if 0
|
||||
//for tx power tracking
|
||||
u8 bTXPowerTracking;
|
||||
u8 TXPowercount;
|
||||
u8 bTXPowerTrackingInit;
|
||||
u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default
|
||||
u8 TM_Trigger;
|
||||
|
||||
u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1
|
||||
u8 ThermalValue;
|
||||
u8 ThermalValue_LCK;
|
||||
u8 ThermalValue_IQK;
|
||||
u8 ThermalValue_DPK;
|
||||
|
||||
u8 bRfPiEnable;
|
||||
|
||||
//for APK
|
||||
u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a
|
||||
u8 bAPKdone;
|
||||
u8 bAPKThermalMeterIgnore;
|
||||
u8 bDPdone;
|
||||
u8 bDPPathAOK;
|
||||
u8 bDPPathBOK;
|
||||
|
||||
//for IQK
|
||||
u32 RegC04;
|
||||
u32 Reg874;
|
||||
u32 RegC08;
|
||||
u32 RegB68;
|
||||
u32 RegB6C;
|
||||
u32 Reg870;
|
||||
u32 Reg860;
|
||||
u32 Reg864;
|
||||
u32 ADDA_backup[IQK_ADDA_REG_NUM];
|
||||
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
|
||||
u32 IQK_BB_backup_recover[9];
|
||||
u32 IQK_BB_backup[IQK_BB_REG_NUM];
|
||||
|
||||
|
||||
u8 bCCKinCH14;
|
||||
|
||||
u8 CCK_index;
|
||||
u8 OFDM_index[2];
|
||||
|
||||
u8 bDoneTxpower;
|
||||
u8 CCK_index_HP;
|
||||
u8 OFDM_index_HP[2];
|
||||
u8 ThermalValue_HP[HP_THERMAL_NUM];
|
||||
u8 ThermalValue_HP_index;
|
||||
|
||||
//for TxPwrTracking
|
||||
s32 RegE94;
|
||||
s32 RegE9C;
|
||||
s32 RegEB4;
|
||||
s32 RegEBC;
|
||||
|
||||
u32 TXPowerTrackingCallbackCnt; //cosa add for debug
|
||||
|
||||
u32 prv_traffic_idx; // edca turbo
|
||||
|
||||
/*
|
||||
// for dm_RF_Saving
|
||||
u8 initialize;
|
||||
u32 rf_saving_Reg874;
|
||||
u32 rf_saving_RegC70;
|
||||
u32 rf_saving_Reg85C;
|
||||
u32 rf_saving_RegA74;
|
||||
*/
|
||||
//for Antenna diversity
|
||||
#ifdef CONFIG_ANTENNA_DIVERSITY
|
||||
// SWAT_T DM_SWAT_Table;
|
||||
#endif
|
||||
#ifdef CONFIG_SW_ANTENNA_DIVERSITY
|
||||
// _timer SwAntennaSwitchTimer;
|
||||
/*
|
||||
u64 lastTxOkCnt;
|
||||
u64 lastRxOkCnt;
|
||||
u64 TXByteCnt_A;
|
||||
u64 TXByteCnt_B;
|
||||
u64 RXByteCnt_A;
|
||||
u64 RXByteCnt_B;
|
||||
u8 DoubleComfirm;
|
||||
u8 TrafficLoad;
|
||||
*/
|
||||
#endif
|
||||
|
||||
s32 OFDM_Pkt_Cnt;
|
||||
u8 RSSI_Select;
|
||||
// u8 DIG_Dynamic_MIN ;
|
||||
//###### duplicate code,will move to ODM #########
|
||||
#endif
|
||||
// Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas
|
||||
//u8 INIDATA_RATE[32];
|
||||
};
|
||||
|
||||
|
||||
void rtl8188e_init_dm_priv(IN PADAPTER Adapter);
|
||||
void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter);
|
||||
void rtl8188e_InitHalDm(IN PADAPTER Adapter);
|
||||
void rtl8188e_HalDmWatchDog(IN PADAPTER Adapter);
|
||||
|
||||
//VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter);
|
||||
|
||||
//void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal);
|
||||
|
||||
#ifdef CONFIG_ANTENNA_DIVERSITY
|
||||
void AntDivCompare8188E(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
|
||||
u8 AntDivBeforeLink8188E(PADAPTER Adapter );
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -63,11 +63,6 @@
|
|||
//---------------------------------------------------------------------
|
||||
// RTL8188E From header
|
||||
//---------------------------------------------------------------------
|
||||
#if 0
|
||||
#define Rtl8188E_PHY_REG_Array_PG Rtl8188ESPHY_REG_Array_PG
|
||||
#define Rtl8188E_PHY_REG_Array_PGLength Rtl8188ESPHY_REG_Array_PGLength
|
||||
|
||||
#endif
|
||||
|
||||
//---------------------------------------------------------------------
|
||||
// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
|
||||
|
|
@ -92,12 +87,6 @@
|
|||
#define RTL8188E_PHY_REG_PG "rtl8188E\\PHY_REG_PG.txt"
|
||||
#define RTL8188E_PHY_REG_MP "rtl8188E\\PHY_REG_MP.txt"
|
||||
|
||||
#if 0
|
||||
#define Rtl8188E_PHY_REG_Array_PG Rtl8188EUPHY_REG_Array_PG
|
||||
#define Rtl8188E_PHY_REG_Array_PGLength Rtl8188EUPHY_REG_Array_PGLength
|
||||
|
||||
#endif
|
||||
|
||||
//---------------------------------------------------------------------
|
||||
// RTL8188E Power Configuration CMDs for USB/SDIO interfaces
|
||||
//---------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -1452,18 +1452,6 @@ Current IOREG MAP
|
|||
#define SDIO_TX_FREE_PG_QUEUE 4 // The number of Tx FIFO free page
|
||||
#define SDIO_TX_FIFO_PAGE_SZ 128
|
||||
|
||||
/* move to rtl8188e_xmit.h
|
||||
#if DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
||||
#define MAX_TX_AGG_PACKET_NUMBER 0x8
|
||||
#else
|
||||
#define MAX_TX_AGG_PACKET_NUMBER 0xFF
|
||||
#endif
|
||||
*/
|
||||
|
||||
// vivi added for new cam search flow, 20091028
|
||||
//#define SCR_TxUseBroadcastDK BIT6 // Force Tx Use Broadcast Default Key
|
||||
//#define SCR_RxUseBroadcastDK BIT7 // Force Rx Use Broadcast Default Key
|
||||
|
||||
//-----------------------------------------------------
|
||||
//
|
||||
// 0xFE00h ~ 0xFE55h USB Configuration
|
||||
|
|
@ -1518,84 +1506,13 @@ Current IOREG MAP
|
|||
//========================================================
|
||||
// General definitions
|
||||
//========================================================
|
||||
//#if (HAL_8195A_USB == 1)
|
||||
//#define LAST_ENTRY_OF_TX_PKT_BUFFER 255
|
||||
//#else
|
||||
#define LAST_ENTRY_OF_TX_PKT_BUFFER 176 // 22k 22528 bytes
|
||||
//#endif
|
||||
|
||||
#define POLLING_LLT_THRESHOLD 20
|
||||
//#if RTL8188E_FOR_MP_TEST == 1
|
||||
//#define POLLING_READY_TIMEOUT_COUNT 3000
|
||||
//#else
|
||||
#define POLLING_READY_TIMEOUT_COUNT 1000
|
||||
//#endif
|
||||
// GPIO BIT
|
||||
#define HAL_8192C_HW_GPIO_WPS_BIT BIT2
|
||||
|
||||
#if 0//(RTL8188E_SUPPORT == 1)
|
||||
////////////////////////////////ONLY for 88EE/////////////////////////////////
|
||||
//
|
||||
// Host Interrupt Status Registers (Offset: 0x00B4-00B7, 0x00BC-00BF)
|
||||
// Host Interrupt Mask Registers (Offset: 0x00B0-00B3, 0x00B8-00BB)
|
||||
//
|
||||
//----------------------------------------------------------------------------
|
||||
// 8188 IMR/ISR bits
|
||||
//----------------------------------------------------------------------------
|
||||
#define IMR_DISABLED_88E 0x0
|
||||
// IMR DW0(0x00B0-00B3) Bit 0-31
|
||||
#define IMR_TXCCK_88E BIT30 // TXRPT interrupt when CCX bit of the packet is set
|
||||
#define IMR_PSTIMEOUT_88E BIT29 // Power Save Time Out Interrupt
|
||||
#define IMR_GTINT4_88E BIT28 // When GTIMER4 expires, this bit is set to 1
|
||||
#define IMR_GTINT3_88E BIT27 // When GTIMER3 expires, this bit is set to 1
|
||||
#define IMR_TBDER_88E BIT26 // Transmit Beacon0 Error
|
||||
#define IMR_TBDOK_88E BIT25 // Transmit Beacon0 OK
|
||||
#define IMR_TSF_BIT32_TOGGLE_88E BIT24 // TSF Timer BIT32 toggle indication interrupt
|
||||
#define IMR_BcnInt_88E BIT20 // Beacon DMA Interrupt 0
|
||||
#define IMR_BDOK_88E BIT16 // Beacon Queue DMA OK0
|
||||
#define IMR_HSISR_IND_ON_INT_88E BIT15 // HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1)
|
||||
#define IMR_BCNDMAINT_E_88E BIT14 // Beacon DMA Interrupt Extension for Win7
|
||||
#define IMR_ATIMEND_88E BIT12 // CTWidnow End or ATIM Window End
|
||||
#define IMR_HISR1_IND_INT_88E BIT11 // HISR1 Indicator (HISR1 & HIMR1 is true, this bit is set to 1)
|
||||
#define IMR_C2HCMD_88E BIT10 // CPU to Host Command INT Status, Write 1 clear
|
||||
#define IMR_CPWM2_88E BIT9 // CPU power Mode exchange INT Status, Write 1 clear
|
||||
#define IMR_CPWM_88E BIT8 // CPU power Mode exchange INT Status, Write 1 clear
|
||||
#define IMR_HIGHDOK_88E BIT7 // High Queue DMA OK
|
||||
#define IMR_MGNTDOK_88E BIT6 // Management Queue DMA OK
|
||||
#define IMR_BKDOK_88E BIT5 // AC_BK DMA OK
|
||||
#define IMR_BEDOK_88E BIT4 // AC_BE DMA OK
|
||||
#define IMR_VIDOK_88E BIT3 // AC_VI DMA OK
|
||||
#define IMR_VODOK_88E BIT2 // AC_VO DMA OK
|
||||
#define IMR_RDU_88E BIT1 // Rx Descriptor Unavailable
|
||||
#define IMR_ROK_88E BIT0 // Receive DMA OK
|
||||
|
||||
// IMR DW1(0x00B8-00BB) Bit 0-31
|
||||
#define IMR_BCNDMAINT7_88E BIT27 // Beacon DMA Interrupt 7
|
||||
#define IMR_BCNDMAINT6_88E BIT26 // Beacon DMA Interrupt 6
|
||||
#define IMR_BCNDMAINT5_88E BIT25 // Beacon DMA Interrupt 5
|
||||
#define IMR_BCNDMAINT4_88E BIT24 // Beacon DMA Interrupt 4
|
||||
#define IMR_BCNDMAINT3_88E BIT23 // Beacon DMA Interrupt 3
|
||||
#define IMR_BCNDMAINT2_88E BIT22 // Beacon DMA Interrupt 2
|
||||
#define IMR_BCNDMAINT1_88E BIT21 // Beacon DMA Interrupt 1
|
||||
#define IMR_BCNDOK7_88E BIT20 // Beacon Queue DMA OK Interrup 7
|
||||
#define IMR_BCNDOK6_88E BIT19 // Beacon Queue DMA OK Interrup 6
|
||||
#define IMR_BCNDOK5_88E BIT18 // Beacon Queue DMA OK Interrup 5
|
||||
#define IMR_BCNDOK4_88E BIT17 // Beacon Queue DMA OK Interrup 4
|
||||
#define IMR_BCNDOK3_88E BIT16 // Beacon Queue DMA OK Interrup 3
|
||||
#define IMR_BCNDOK2_88E BIT15 // Beacon Queue DMA OK Interrup 2
|
||||
#define IMR_BCNDOK1_88E BIT14 // Beacon Queue DMA OK Interrup 1
|
||||
#define IMR_ATIMEND_E_88E BIT13 // ATIM Window End Extension for Win7
|
||||
#define IMR_TXERR_88E BIT11 // Tx Error Flag Interrupt Status, write 1 clear.
|
||||
#define IMR_RXERR_88E BIT10 // Rx Error Flag INT Status, Write 1 clear
|
||||
#define IMR_TXFOVW_88E BIT9 // Transmit FIFO Overflow
|
||||
#define IMR_RXFOVW_88E BIT8 // Receive FIFO Overflow
|
||||
|
||||
|
||||
|
||||
////////////////////////////////ONLY for 88EE/////////////////////////////////
|
||||
#endif //(RTL8188E_SUPPORT == 1)
|
||||
|
||||
|
||||
//----------------------------------------------------------------------------
|
||||
// 8192C EEPROM/EFUSE share register definition.
|
||||
//----------------------------------------------------------------------------
|
||||
|
|
@ -1724,9 +1641,6 @@ Current IOREG MAP
|
|||
#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25.
|
||||
#define EEPROM_CID_QMI 0x0D
|
||||
#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108
|
||||
|
||||
|
||||
#define RTL_EEPROM_ID 0x8129
|
||||
|
||||
#endif //__RTL8188E_SPEC_H__
|
||||
|
||||
|
|
|
|||
|
|
@ -892,28 +892,6 @@ typedef enum _BOARD_TYPE_8192CUSB{
|
|||
#define EEPROM_USB_DEVICE_PWR BIT(2)
|
||||
#define EEPROM_EP_NUMBER (BIT(3)|BIT(4))
|
||||
|
||||
#if 0
|
||||
#define EEPROM_CHANNEL_PLAN_FCC 0x0
|
||||
#define EEPROM_CHANNEL_PLAN_IC 0x1
|
||||
#define EEPROM_CHANNEL_PLAN_ETSI 0x2
|
||||
#define EEPROM_CHANNEL_PLAN_SPAIN 0x3
|
||||
#define EEPROM_CHANNEL_PLAN_FRANCE 0x4
|
||||
#define EEPROM_CHANNEL_PLAN_MKK 0x5
|
||||
#define EEPROM_CHANNEL_PLAN_MKK1 0x6
|
||||
#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7
|
||||
#define EEPROM_CHANNEL_PLAN_TELEC 0x8
|
||||
#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9
|
||||
#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA
|
||||
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
|
||||
|
||||
#define EEPROM_CID_DEFAULT 0x0
|
||||
|
||||
#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108
|
||||
|
||||
|
||||
#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25.
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -930,30 +930,7 @@ Default: 00b.
|
|||
#define EEPROM_USB_DEVICE_PWR BIT(2)
|
||||
#define EEPROM_EP_NUMBER (BIT(3)|BIT(4))
|
||||
|
||||
#if 0
|
||||
#define EEPROM_CHANNEL_PLAN_FCC 0x0
|
||||
#define EEPROM_CHANNEL_PLAN_IC 0x1
|
||||
#define EEPROM_CHANNEL_PLAN_ETSI 0x2
|
||||
#define EEPROM_CHANNEL_PLAN_SPAIN 0x3
|
||||
#define EEPROM_CHANNEL_PLAN_FRANCE 0x4
|
||||
#define EEPROM_CHANNEL_PLAN_MKK 0x5
|
||||
#define EEPROM_CHANNEL_PLAN_MKK1 0x6
|
||||
#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7
|
||||
#define EEPROM_CHANNEL_PLAN_TELEC 0x8
|
||||
#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9
|
||||
#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA
|
||||
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
|
||||
|
||||
#define EEPROM_CID_DEFAULT 0x0
|
||||
|
||||
#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108
|
||||
|
||||
|
||||
#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25.
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/*===================================================================
|
||||
=====================================================================
|
||||
|
|
|
|||
|
|
@ -66,31 +66,6 @@ void BT_LpsLeave(PADAPTER padapter);
|
|||
#define TKIP_ENC_KEY_POS 32 //(KEK_LEN+KEK_LEN)
|
||||
#define MAXRSNIELEN 256
|
||||
|
||||
// HEADER/QoSType.h
|
||||
#if 0
|
||||
//
|
||||
// BSS QOS data.
|
||||
// Ref: BssDscr in 8185 code. [def. in BssDscr.h]
|
||||
//
|
||||
typedef struct _BSS_QOS
|
||||
{
|
||||
// Part 0. Ref. 8185 QoS code (From Emily)
|
||||
QOS_MODE bdQoSMode;
|
||||
u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
|
||||
OCTET_STRING bdWMMIE;
|
||||
|
||||
QOS_ELE_SUBTYPE EleSubType;
|
||||
|
||||
// Part 2. EDCA Parameter (perAC)
|
||||
u8 *pWMMInfoEle;
|
||||
u8 *pWMMParamEle;
|
||||
|
||||
// QBSS Load.
|
||||
u8 QBssLoad[QBSS_LOAD_SIZE];
|
||||
u8 bQBssLoadValid;
|
||||
} BSS_QOS, *PBSS_QOS;
|
||||
#endif
|
||||
|
||||
// COMMON/Protocol802_11.h
|
||||
//----------------------------------------------------------------------------
|
||||
// 802.11 Management frame Status Code field
|
||||
|
|
|
|||
|
|
@ -70,17 +70,10 @@ typedef struct _SETPWRMODE_PARM
|
|||
u8 AwakeInterval; // unit: beacon interval
|
||||
u8 bAllQueueUAPSD;
|
||||
|
||||
#if 0
|
||||
u8 LowRxBCN:1;
|
||||
u8 AutoAntSwitch:1;
|
||||
u8 PSAllowBTHighPriority:1;
|
||||
u8 rsvd43:5;
|
||||
#else
|
||||
#define SETPM_LOWRXBCN BIT(0)
|
||||
#define SETPM_AUTOANTSWITCH BIT(1)
|
||||
#define SETPM_PSALLOWBTHIGHPRI BIT(2)
|
||||
u8 BcnAntMode;
|
||||
#endif
|
||||
}__attribute__((__packed__)) SETPWRMODE_PARM, *PSETPWRMODE_PARM;
|
||||
|
||||
struct H2C_SS_RFOFF_PARAM{
|
||||
|
|
@ -119,16 +112,6 @@ struct P2P_PS_CTWPeriod_t {
|
|||
|
||||
typedef struct _B_TYPE_TDMA_PARM
|
||||
{
|
||||
#if 0
|
||||
u8 En:1;
|
||||
u8 FixAntennaInBTSide:1;
|
||||
u8 TxPspoll:1;
|
||||
u8 val870:1; // value of 870, when disable
|
||||
u8 AutoWakeUp:1;
|
||||
u8 NoPS:1;
|
||||
u8 WlanHighPriority:1;
|
||||
u8 rsvd07:1;
|
||||
#else
|
||||
#define B_TDMA_EN BIT(0)
|
||||
#define B_TDMA_FIXANTINBT BIT(1)
|
||||
#define B_TDMA_TXPSPOLL BIT(2)
|
||||
|
|
@ -137,7 +120,6 @@ typedef struct _B_TYPE_TDMA_PARM
|
|||
#define B_TDMA_NOPS BIT(5)
|
||||
#define B_TDMA_WLANHIGHPRI BIT(6)
|
||||
u8 option;
|
||||
#endif
|
||||
|
||||
u8 TBTTOnPeriod;
|
||||
u8 MedPeriod;
|
||||
|
|
@ -145,45 +127,16 @@ typedef struct _B_TYPE_TDMA_PARM
|
|||
}__attribute__((__packed__)) B_TYPE_TDMA_PARM, *PB_TYPE_TDMA_PARM;
|
||||
|
||||
typedef struct _SCAN_EN_PARM {
|
||||
#if 0
|
||||
u8 En:1;
|
||||
u8 rsvd01:7;
|
||||
#else
|
||||
u8 En;
|
||||
#endif
|
||||
}__attribute__((__packed__)) SCAN_EN_PARM, *PSCAN_EN_PARM;
|
||||
|
||||
// BT_PWR
|
||||
#define SET_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
|
||||
#define SET_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT(__pH2CCmd, 0, 8, __Value)
|
||||
|
||||
// BT_FW_PATCH
|
||||
#if 0
|
||||
#define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
|
||||
#define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value)
|
||||
#else
|
||||
#define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 0, 8, __Value) // SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
|
||||
#define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 8, 16, __Value) // SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value)
|
||||
#endif
|
||||
#define SET_H2CCMD_BT_FW_PATCH_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 0, 8, __Value) // SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value)
|
||||
#define SET_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_4BYTE(__pH2CCmd, 8, 16, __Value) // SET_BITS_TO_LE_2BYTE((__pH2CCmd)+1, 0, 16, __Value)
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* H2C_LOWPWR_LPS
|
||||
* h2c cmd = 71
|
||||
* byte1[6:0]= bcn count : how many bcn not recevied should return to old mechanism
|
||||
* byte1[7] = enable : enable mechanism
|
||||
* byte2=bcn period : bcn recv time of this AP, unit 32 us
|
||||
* byte3= drop threshold : how many pkts be droped, rx dma should be release
|
||||
* byte4 = max early period
|
||||
* byte5 = max bcn timeout period
|
||||
*/
|
||||
#define SET_H2CCMD_LOWPWR_LPS_BCN_COUNT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value)
|
||||
#define SET_H2CCMD_LOWPWR_LPS_TB_BCN_THRESH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 3, __Value)
|
||||
#define SET_H2CCMD_LOWPWR_LPS_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 7, 1, __Value)
|
||||
#define SET_H2CCMD_LOWPWR_LPS_BCN_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+1, 0, 8, __Value)
|
||||
#define SET_H2CCMD_LOWPWR_LPS_BCN_DROP_THRESH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+2, 0, 8, __Value)
|
||||
#define SET_H2CCMD_LOWPWR_LPS_MAX_EARLY_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+3, 0, 8, __Value)
|
||||
#define SET_H2CCMD_LOWPWR_LPS_MAX_BCN_TO_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE_8BIT((__pH2CCmd)+4, 0, 8, __Value)
|
||||
#else
|
||||
typedef struct _LOWPWR_LPS_PARM
|
||||
{
|
||||
u8 bcn_count:4;
|
||||
|
|
@ -194,7 +147,6 @@ typedef struct _LOWPWR_LPS_PARM
|
|||
u8 max_early_period;
|
||||
u8 max_bcn_timeout_period;
|
||||
}__attribute__((__packed__)) LOWPWR_LPS_PARM, *PLOWPWR_LPS_PARM;
|
||||
#endif
|
||||
|
||||
|
||||
// host message to firmware cmd
|
||||
|
|
@ -204,17 +156,12 @@ void rtl8723a_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus);
|
|||
void rtl8723a_set_BTCoex_AP_mode_FwRsvdPkt_cmd(PADAPTER padapter);
|
||||
#endif
|
||||
u8 rtl8192c_set_rssi_cmd(PADAPTER padapter, u8 *param);
|
||||
//u8 rtl8723a_set_rssi_cmd(PADAPTER padapter, u8 *param);
|
||||
u8 rtl8192c_set_raid_cmd(PADAPTER padapter, u32 mask, u8 arg);
|
||||
//u8 rtl8723a_set_raid_cmd(PADAPTER padapter, u32 mask, u8 arg);
|
||||
void rtl8192c_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 arg, u8 rssi_level);
|
||||
//void rtl8723a_Add_RateATid(PADAPTER padapter, u32 bitmap, u8 arg);
|
||||
u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period);
|
||||
//u8 rtl8723a_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period);
|
||||
|
||||
#ifdef CONFIG_P2P
|
||||
void rtl8192c_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
|
||||
//void rtl8723a_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state);
|
||||
#endif //CONFIG_P2P
|
||||
|
||||
void CheckFwRsvdPageContent(PADAPTER padapter);
|
||||
|
|
|
|||
|
|
@ -647,12 +647,7 @@ typedef struct hal_data_8723a
|
|||
#endif
|
||||
} HAL_DATA_8723A, *PHAL_DATA_8723A;
|
||||
|
||||
#if 0
|
||||
#define HAL_DATA_TYPE HAL_DATA_8723A
|
||||
#define PHAL_DATA_TYPE PHAL_DATA_8723A
|
||||
#else
|
||||
typedef struct hal_data_8723a HAL_DATA_TYPE, *PHAL_DATA_TYPE;
|
||||
#endif
|
||||
|
||||
#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData))
|
||||
#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type)
|
||||
|
|
|
|||
|
|
@ -89,37 +89,6 @@ typedef struct _TxPowerInfo
|
|||
u8 TSSI_B_5G[3];
|
||||
} TxPowerInfo, *PTxPowerInfo;
|
||||
|
||||
#if 0
|
||||
#define MAX_RF_PATH 4
|
||||
#define MAX_CHNL_GROUP_24G 6
|
||||
#define MAX_CHNL_GROUP_5G 14
|
||||
|
||||
// It must always set to 4, otherwise read efuse table secquence will be wrong.
|
||||
#define MAX_TX_COUNT 4
|
||||
|
||||
typedef struct _TxPowerInfo24G
|
||||
{
|
||||
u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
|
||||
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
|
||||
//If only one tx, only BW20 and OFDM are used.
|
||||
s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
} TxPowerInfo24G, *PTxPowerInfo24G;
|
||||
|
||||
typedef struct _TxPowerInfo5G
|
||||
{
|
||||
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G];
|
||||
//If only one tx, only BW20, OFDM, BW80 and BW160 are used.
|
||||
s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
} TxPowerInfo5G, *PTxPowerInfo5G;
|
||||
#endif
|
||||
|
||||
typedef enum _BT_Ant_NUM
|
||||
{
|
||||
Ant_x2 = 0,
|
||||
|
|
|
|||
109
include/rtw_mp.h
109
include/rtw_mp.h
|
|
@ -82,39 +82,6 @@
|
|||
#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3
|
||||
#endif /* #ifndef PLATFORM_WINDOWS */
|
||||
|
||||
#if 0
|
||||
#define MPT_NOOP 0
|
||||
#define MPT_READ_MAC_1BYTE 1
|
||||
#define MPT_READ_MAC_2BYTE 2
|
||||
#define MPT_READ_MAC_4BYTE 3
|
||||
#define MPT_WRITE_MAC_1BYTE 4
|
||||
#define MPT_WRITE_MAC_2BYTE 5
|
||||
#define MPT_WRITE_MAC_4BYTE 6
|
||||
#define MPT_READ_BB_CCK 7
|
||||
#define MPT_WRITE_BB_CCK 8
|
||||
#define MPT_READ_BB_OFDM 9
|
||||
#define MPT_WRITE_BB_OFDM 10
|
||||
#define MPT_READ_RF 11
|
||||
#define MPT_WRITE_RF 12
|
||||
#define MPT_READ_EEPROM_1BYTE 13
|
||||
#define MPT_WRITE_EEPROM_1BYTE 14
|
||||
#define MPT_READ_EEPROM_2BYTE 15
|
||||
#define MPT_WRITE_EEPROM_2BYTE 16
|
||||
#define MPT_SET_CSTHRESHOLD 21
|
||||
#define MPT_SET_INITGAIN 22
|
||||
#define MPT_SWITCH_BAND 23
|
||||
#define MPT_SWITCH_CHANNEL 24
|
||||
#define MPT_SET_DATARATE 25
|
||||
#define MPT_SWITCH_ANTENNA 26
|
||||
#define MPT_SET_TX_POWER 27
|
||||
#define MPT_SET_CONT_TX 28
|
||||
#define MPT_SET_SINGLE_CARRIER 29
|
||||
#define MPT_SET_CARRIER_SUPPRESSION 30
|
||||
#define MPT_GET_RATE_TABLE 31
|
||||
#define MPT_READ_TSSI 32
|
||||
#define MPT_GET_THERMAL_METER 33
|
||||
#endif
|
||||
|
||||
typedef enum _ANTENNA_PATH{
|
||||
ANTENNA_NONE = 0x00,
|
||||
ANTENNA_D ,
|
||||
|
|
@ -508,30 +475,9 @@ struct bb_reg_param {
|
|||
#define RAISE _FALSE
|
||||
|
||||
/* Hardware Registers */
|
||||
#if 0
|
||||
#if 0
|
||||
#define IOCMD_CTRL_REG 0x102502C0
|
||||
#define IOCMD_DATA_REG 0x102502C4
|
||||
#else
|
||||
#define IOCMD_CTRL_REG 0x10250370
|
||||
#define IOCMD_DATA_REG 0x10250374
|
||||
#endif
|
||||
|
||||
#define IOCMD_GET_THERMAL_METER 0xFD000028
|
||||
|
||||
#define IOCMD_CLASS_BB_RF 0xF0
|
||||
#define IOCMD_BB_READ_IDX 0x00
|
||||
#define IOCMD_BB_WRITE_IDX 0x01
|
||||
#define IOCMD_RF_READ_IDX 0x02
|
||||
#define IOCMD_RF_WRIT_IDX 0x03
|
||||
#endif
|
||||
#define BB_REG_BASE_ADDR 0x800
|
||||
|
||||
/* MP variables */
|
||||
#if 0
|
||||
#define _2MAC_MODE_ 0
|
||||
#define _LOOPBOOK_MODE_ 1
|
||||
#endif
|
||||
typedef enum _MP_MODE_ {
|
||||
MP_OFF,
|
||||
MP_ON,
|
||||
|
|
@ -589,14 +535,6 @@ typedef enum _MPT_RATE_INDEX
|
|||
MPT_RATE_LAST
|
||||
}MPT_RATE_E, *PMPT_RATE_E;
|
||||
|
||||
#if 0
|
||||
// Represent Channel Width in HT Capabilities
|
||||
typedef enum _HT_CHANNEL_WIDTH {
|
||||
HT_CHANNEL_WIDTH_20 = 0,
|
||||
HT_CHANNEL_WIDTH_40 = 1,
|
||||
}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH;
|
||||
#endif
|
||||
|
||||
#define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F
|
||||
|
||||
typedef enum _POWER_MODE_ {
|
||||
|
|
@ -609,42 +547,6 @@ typedef enum _POWER_MODE_ {
|
|||
#define RX_PKT_DEST_ADDR 2
|
||||
#define RX_PKT_PHY_MATCH 3
|
||||
|
||||
#if 0
|
||||
#define RPTMaxCount 0x000FFFFF;
|
||||
|
||||
// parameter 1 : BitMask
|
||||
// bit 0 : OFDM PPDU
|
||||
// bit 1 : OFDM False Alarm
|
||||
// bit 2 : OFDM MPDU OK
|
||||
// bit 3 : OFDM MPDU Fail
|
||||
// bit 4 : CCK PPDU
|
||||
// bit 5 : CCK False Alarm
|
||||
// bit 6 : CCK MPDU ok
|
||||
// bit 7 : CCK MPDU fail
|
||||
// bit 8 : HT PPDU counter
|
||||
// bit 9 : HT false alarm
|
||||
// bit 10 : HT MPDU total
|
||||
// bit 11 : HT MPDU OK
|
||||
// bit 12 : HT MPDU fail
|
||||
// bit 15 : RX full drop
|
||||
typedef enum _RXPHY_BITMASK_
|
||||
{
|
||||
OFDM_PPDU_BIT = 0,
|
||||
OFDM_FALSE_BIT,
|
||||
OFDM_MPDU_OK_BIT,
|
||||
OFDM_MPDU_FAIL_BIT,
|
||||
CCK_PPDU_BIT,
|
||||
CCK_FALSE_BIT,
|
||||
CCK_MPDU_OK_BIT,
|
||||
CCK_MPDU_FAIL_BIT,
|
||||
HT_PPDU_BIT,
|
||||
HT_FALSE_BIT,
|
||||
HT_MPDU_BIT,
|
||||
HT_MPDU_OK_BIT,
|
||||
HT_MPDU_FAIL_BIT,
|
||||
} RXPHY_BITMASK;
|
||||
#endif
|
||||
|
||||
typedef enum _ENCRY_CTRL_STATE_ {
|
||||
HW_CONTROL, //hw encryption& decryption
|
||||
SW_CONTROL, //sw encryption& decryption
|
||||
|
|
@ -665,17 +567,6 @@ extern s32 mp_start_test(PADAPTER padapter);
|
|||
extern void mp_stop_test(PADAPTER padapter);
|
||||
|
||||
//=======================================================================
|
||||
//extern void IQCalibrateBcut(PADAPTER pAdapter);
|
||||
|
||||
//extern u32 bb_reg_read(PADAPTER Adapter, u16 offset);
|
||||
//extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value);
|
||||
//extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset);
|
||||
//extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value);
|
||||
|
||||
//extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask);
|
||||
//extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value);
|
||||
//extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask);
|
||||
//extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value);
|
||||
|
||||
extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
|
||||
extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
|
||||
|
|
|
|||
|
|
@ -29,13 +29,6 @@
|
|||
#include <rtw_efuse.h>
|
||||
#include <rtw_mp.h>
|
||||
|
||||
#if 0
|
||||
#define TESTFWCMDNUMBER 1000000
|
||||
#define TEST_H2CINT_WAIT_TIME 500
|
||||
#define TEST_C2HINT_WAIT_TIME 500
|
||||
#define HCI_TEST_SYSCFG_HWMASK 1
|
||||
#define _BUSCLK_40M (4 << 2)
|
||||
#endif
|
||||
//------------------------------------------------------------------------------
|
||||
typedef struct CFG_DBG_MSG_STRUCT {
|
||||
u32 DebugLevel;
|
||||
|
|
|
|||
|
|
@ -1063,15 +1063,6 @@
|
|||
#define bWMACControl 0x1
|
||||
#define bWNICControl 0x2
|
||||
|
||||
#if 0
|
||||
#define ANTENNA_A 0x1 // Useless
|
||||
#define ANTENNA_B 0x2
|
||||
#define ANTENNA_AB 0x3 // ANTENNA_A|ANTENNA_B
|
||||
|
||||
#define ANTENNA_C 0x4
|
||||
#define ANTENNA_D 0x8
|
||||
#endif
|
||||
|
||||
#define RCR_AAP BIT(0) // accept all physical address
|
||||
#define RCR_APM BIT(1) // accept physical match
|
||||
#define RCR_AM BIT(2) // accept multicast
|
||||
|
|
|
|||
|
|
@ -81,21 +81,14 @@ static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_S
|
|||
wdinfo->p2p_state = state;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state)
|
||||
{
|
||||
if (wdinfo->pre_p2p_state != state) {
|
||||
wdinfo->pre_p2p_state = state;
|
||||
}
|
||||
}
|
||||
#if 0
|
||||
static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo)
|
||||
{
|
||||
if (wdinfo->pre_p2p_state != -1) {
|
||||
wdinfo->p2p_state = wdinfo->pre_p2p_state;
|
||||
wdinfo->pre_p2p_state = -1;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role)
|
||||
{
|
||||
if (wdinfo->role != role) {
|
||||
|
|
|
|||
|
|
@ -234,58 +234,6 @@ struct hw_xmit {
|
|||
int accnt;
|
||||
};
|
||||
|
||||
#if 0
|
||||
struct pkt_attrib
|
||||
{
|
||||
u8 type;
|
||||
u8 subtype;
|
||||
u8 bswenc;
|
||||
u8 dhcp_pkt;
|
||||
u16 ether_type;
|
||||
int pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data)
|
||||
int pkt_hdrlen; //the original 802.3 pkt header len
|
||||
int hdrlen; //the WLAN Header Len
|
||||
int nr_frags;
|
||||
int last_txcmdsz;
|
||||
int encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith
|
||||
u8 iv[8];
|
||||
int iv_len;
|
||||
u8 icv[8];
|
||||
int icv_len;
|
||||
int priority;
|
||||
int ack_policy;
|
||||
int mac_id;
|
||||
int vcs_mode; //virtual carrier sense method
|
||||
|
||||
u8 dst[ETH_ALEN];
|
||||
u8 src[ETH_ALEN];
|
||||
u8 ta[ETH_ALEN];
|
||||
u8 ra[ETH_ALEN];
|
||||
|
||||
u8 key_idx;
|
||||
|
||||
u8 qos_en;
|
||||
u8 ht_en;
|
||||
u8 raid;//rate adpative id
|
||||
u8 bwmode;
|
||||
u8 ch_offset;//PRIME_CHNL_OFFSET
|
||||
u8 sgi;//short GI
|
||||
u8 ampdu_en;//tx ampdu enable
|
||||
u8 mdata;//more data bit
|
||||
u8 eosp;
|
||||
|
||||
u8 pctrl;//per packet txdesc control enable
|
||||
u8 triggered;//for ap mode handling Power Saving sta
|
||||
|
||||
u32 qsel;
|
||||
u16 seqnum;
|
||||
|
||||
struct sta_info * psta;
|
||||
#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX
|
||||
u8 hw_tcp_csum;
|
||||
#endif
|
||||
};
|
||||
#else
|
||||
//reduce size
|
||||
struct pkt_attrib
|
||||
{
|
||||
|
|
@ -334,22 +282,12 @@ struct pkt_attrib
|
|||
u8 hw_tcp_csum;
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef PLATFORM_FREEBSD
|
||||
#define ETH_ALEN 6 /* Octets in one ethernet addr */
|
||||
#define ETH_HLEN 14 /* Total octets in header. */
|
||||
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
|
||||
|
||||
/*struct rtw_ieee80211_hdr {
|
||||
uint16_t frame_control;
|
||||
uint16_t duration_id;
|
||||
u8 addr1[6];
|
||||
u8 addr2[6];
|
||||
u8 addr3[6];
|
||||
uint16_t seq_ctrl;
|
||||
u8 addr4[6];
|
||||
} ;*/
|
||||
#endif //PLATFORM_FREEBSD
|
||||
|
||||
#define WLANHDR_OFFSET 64
|
||||
|
|
|
|||
|
|
@ -133,8 +133,8 @@ enum WIFI_REASON_CODE {
|
|||
_RSON_TDLS_TEAR_UN_RSN_ = 26,
|
||||
};
|
||||
|
||||
/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22) */
|
||||
#if 0
|
||||
/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22)
|
||||
|
||||
#define WLAN_REASON_UNSPECIFIED 1
|
||||
#define WLAN_REASON_PREV_AUTH_NOT_VALID 2
|
||||
#define WLAN_REASON_DEAUTH_LEAVING 3
|
||||
|
|
@ -143,13 +143,12 @@ enum WIFI_REASON_CODE {
|
|||
#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6
|
||||
#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7
|
||||
#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8
|
||||
#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9
|
||||
#endif
|
||||
#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 */
|
||||
/* IEEE 802.11h */
|
||||
#define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10
|
||||
#define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11
|
||||
#if 0
|
||||
/* IEEE 802.11i */
|
||||
|
||||
/* IEEE 802.11i
|
||||
#define WLAN_REASON_INVALID_IE 13
|
||||
#define WLAN_REASON_MICHAEL_MIC_FAILURE 14
|
||||
#define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15
|
||||
|
|
@ -161,8 +160,7 @@ enum WIFI_REASON_CODE {
|
|||
#define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21
|
||||
#define WLAN_REASON_INVALID_RSN_IE_CAPAB 22
|
||||
#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23
|
||||
#define WLAN_REASON_CIPHER_SUITE_REJECTED 24
|
||||
#endif
|
||||
#define WLAN_REASON_CIPHER_SUITE_REJECTED 24 */
|
||||
|
||||
enum WIFI_STATUS_CODE {
|
||||
_STATS_SUCCESSFUL_ = 0,
|
||||
|
|
@ -178,8 +176,7 @@ enum WIFI_STATUS_CODE {
|
|||
_STATS_RATE_FAIL_ = 18,
|
||||
};
|
||||
|
||||
/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */
|
||||
#if 0
|
||||
/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23)
|
||||
#define WLAN_STATUS_SUCCESS 0
|
||||
#define WLAN_STATUS_UNSPECIFIED_FAILURE 1
|
||||
#define WLAN_STATUS_CAPS_UNSUPPORTED 10
|
||||
|
|
@ -190,8 +187,8 @@ enum WIFI_STATUS_CODE {
|
|||
#define WLAN_STATUS_CHALLENGE_FAIL 15
|
||||
#define WLAN_STATUS_AUTH_TIMEOUT 16
|
||||
#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17
|
||||
#define WLAN_STATUS_ASSOC_DENIED_RATES 18
|
||||
#endif
|
||||
#define WLAN_STATUS_ASSOC_DENIED_RATES 18 */
|
||||
|
||||
//entended
|
||||
/* IEEE 802.11b */
|
||||
#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19
|
||||
|
|
|
|||
|
|
@ -23,16 +23,9 @@
|
|||
|
||||
/***************************** INCLUDES *****************************/
|
||||
|
||||
#if 0
|
||||
#include <linux/types.h> /* for __u* and __s* typedefs */
|
||||
#include <linux/socket.h> /* for "struct sockaddr" et al */
|
||||
#include <linux/if.h> /* for IFNAMSIZ and co... */
|
||||
#else
|
||||
#define __user
|
||||
//typedef uint16_t __u16;
|
||||
#include <sys/socket.h> /* for "struct sockaddr" et al */
|
||||
#include <net/if.h> /* for IFNAMSIZ and co... */
|
||||
#endif
|
||||
|
||||
/****************************** TYPES ******************************/
|
||||
|
||||
|
|
|
|||
|
|
@ -123,31 +123,6 @@ Except the IELength, all other fields are fixed length. Therefore, we can define
|
|||
partial sum.
|
||||
|
||||
*/
|
||||
#if 0
|
||||
typedef struct _NDIS_WLAN_BSSID_EX
|
||||
{
|
||||
ULONG Length;
|
||||
NDIS_802_11_MAC_ADDRESS MacAddress;
|
||||
UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity;
|
||||
NDIS_802_11_SSID Ssid;
|
||||
ULONG Privacy;
|
||||
NDIS_802_11_RSSI Rssi;
|
||||
NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
|
||||
NDIS_802_11_CONFIGURATION Configuration;
|
||||
NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
|
||||
NDIS_802_11_RATES_EX SupportedRates;
|
||||
ULONG IELength;
|
||||
UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information)
|
||||
} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX;
|
||||
|
||||
|
||||
typedef struct _NDIS_802_11_BSSID_LIST_EX
|
||||
{
|
||||
ULONG NumberOfItems;
|
||||
NDIS_WLAN_BSSID_EX Bssid[1];
|
||||
} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX;
|
||||
#endif
|
||||
|
||||
typedef enum _NDIS_802_11_AUTHENTICATION_MODE
|
||||
{
|
||||
Ndis802_11AuthModeOpen,
|
||||
|
|
@ -395,30 +370,6 @@ Except the IELength, all other fields are fixed length. Therefore, we can define
|
|||
partial sum.
|
||||
|
||||
*/
|
||||
#if 0
|
||||
typedef struct _NDIS_WLAN_BSSID_EX
|
||||
{
|
||||
ULONG Length;
|
||||
NDIS_802_11_MAC_ADDRESS MacAddress;
|
||||
UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity;
|
||||
NDIS_802_11_SSID Ssid;
|
||||
ULONG Privacy;
|
||||
NDIS_802_11_RSSI Rssi;
|
||||
NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
|
||||
NDIS_802_11_CONFIGURATION Configuration;
|
||||
NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode;
|
||||
NDIS_802_11_RATES_EX SupportedRates;
|
||||
ULONG IELength;
|
||||
UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information)
|
||||
} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX;
|
||||
|
||||
|
||||
typedef struct _NDIS_802_11_BSSID_LIST_EX
|
||||
{
|
||||
ULONG NumberOfItems;
|
||||
NDIS_WLAN_BSSID_EX Bssid[1];
|
||||
} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX;
|
||||
#endif
|
||||
|
||||
typedef enum _NDIS_802_11_AUTHENTICATION_MODE
|
||||
{
|
||||
|
|
@ -624,28 +575,7 @@ WLAN_BSSID_EX, *PWLAN_BSSID_EX;
|
|||
|
||||
__inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss)
|
||||
{
|
||||
#if 0
|
||||
uint t_len;
|
||||
|
||||
t_len = sizeof (ULONG)
|
||||
+ sizeof (NDIS_802_11_MAC_ADDRESS)
|
||||
+ 2
|
||||
+ sizeof (NDIS_802_11_SSID)
|
||||
+ sizeof (ULONG)
|
||||
+ sizeof (NDIS_802_11_RSSI)
|
||||
+ sizeof (NDIS_802_11_NETWORK_TYPE)
|
||||
+ sizeof (NDIS_802_11_CONFIGURATION)
|
||||
+ sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE)
|
||||
+ sizeof (NDIS_802_11_RATES_EX)
|
||||
//all new member add here
|
||||
+ sizeof(WLAN_PHY_INFO)
|
||||
//all new member add here
|
||||
+ sizeof (ULONG)
|
||||
+ bss->IELength;
|
||||
return t_len;
|
||||
#else
|
||||
return (sizeof(WLAN_BSSID_EX) -MAX_IE_SZ + bss->IELength);
|
||||
#endif
|
||||
return sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + bss->IELength;
|
||||
}
|
||||
|
||||
struct wlan_network {
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue