mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-22 20:43:40 +00:00
rtl8188eu: Remove more dead code for DM_ODM_SUPPORT_TYPE
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
5a3f5f894a
commit
8576d2647a
13 changed files with 13 additions and 1916 deletions
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@ -24,7 +24,7 @@
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#ifdef LOAD_FW_HEADER_FROM_DRIVER
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#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
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#if (defined(CONFIG_AP_WOWLAN))
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u8 array_mp_8188e_s_fw_ap[] = {
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0xE3, 0x88, 0x20, 0x00, 0x1C, 0x00, 0x00, 0x00,
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@ -2038,9 +2038,7 @@ u8 array_mp_8188e_s_fw_ap[] = {
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u32 array_length_mp_8188e_s_fw_ap = 16054;
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#endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
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#endif /*defined(CONFIG_AP_WOWLAN) */
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u8 array_mp_8188e_s_fw_nic[] = {
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0xE3, 0x88, 0x10, 0x00, 0x1C, 0x00, 0x00, 0x00,
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@ -7296,8 +7294,6 @@ u32 array_length_mp_8188e_s_fw_wowlan = 22710;
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#endif /*CONFIG_WOWLAN*/
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#endif
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#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
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#endif /* end of CONFIG_SFW_SUPPORTED */
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@ -24,21 +24,18 @@
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#ifdef CONFIG_SFW_SUPPORTED
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#ifdef LOAD_FW_HEADER_FROM_DRIVER
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#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
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#if defined(CONFIG_AP_WOWLAN)
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extern u8 array_mp_8188e_s_fw_ap[16054];
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extern u32 array_length_mp_8188e_s_fw_ap;
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#endif
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
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extern u8 array_mp_8188e_s_fw_nic[19206];
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extern u32 array_length_mp_8188e_s_fw_nic;
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#ifdef CONFIG_WOWLAN
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extern u8 array_mp_8188e_s_fw_wowlan[22710];
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extern u32 array_length_mp_8188e_s_fw_wowlan;
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#endif /*CONFIG_WOWLAN*/
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#endif
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#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
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#endif /* end of CONFIG_SFW_SUPPORTED */
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#endif
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@ -23,7 +23,7 @@
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#ifdef LOAD_FW_HEADER_FROM_DRIVER
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#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
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#if (defined(CONFIG_AP_WOWLAN))
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u8 array_mp_8188e_t_fw_ap[] = {
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0xE1, 0x88, 0x20, 0x00, 0x1C, 0x00, 0x00, 0x00,
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@ -1968,9 +1968,7 @@ u8 array_mp_8188e_t_fw_ap[] = {
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u32 array_length_mp_8188e_t_fw_ap = 15502;
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#endif /*defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP))*/
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
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#endif /*defined(CONFIG_AP_WOWLAN)*/
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u8 array_mp_8188e_t_fw_nic[] = {
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0xE1, 0x88, 0x10, 0x00, 0x1C, 0x00, 0x00, 0x00,
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@ -7744,7 +7742,5 @@ u32 array_length_mp_8188e_t_fw_wowlan = 16388;
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#endif /*CONFIG_WOWLAN*/
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#endif
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#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
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@ -22,12 +22,11 @@
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#define _FW_HEADER_8188E_T_H
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#ifdef LOAD_FW_HEADER_FROM_DRIVER
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#if (defined(CONFIG_AP_WOWLAN) || (DM_ODM_SUPPORT_TYPE & (ODM_AP)))
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#if (defined(CONFIG_AP_WOWLAN))
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extern u8 array_mp_8188e_t_fw_ap[15502];
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extern u32 array_length_mp_8188e_t_fw_ap;
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#endif
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#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) || (DM_ODM_SUPPORT_TYPE & (ODM_CE))
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extern u8 array_mp_8188e_t_fw_nic[15262];
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extern u32 array_length_mp_8188e_t_fw_nic;
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extern u8 array_mp_8188e_t_fw_nic_89em[14364];
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@ -36,7 +35,6 @@ extern u32 array_length_mp_8188e_t_fw_nic_89em;
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extern u8 array_mp_8188e_t_fw_wowlan[16388];
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extern u32 array_length_mp_8188e_t_fw_wowlan;
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#endif /*CONFIG_WOWLAN*/
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#endif
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#endif /* end of LOAD_FW_HEADER_FROM_DRIVER */
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#endif
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File diff suppressed because it is too large
Load diff
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@ -10,348 +10,6 @@
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#include "txbf/haltxbfjaguar.h"
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#include "txbf/haltxbfinterface.h"
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#if (BEAMFORMING_SUPPORT == 1)
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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#define eq_mac_addr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
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#define cp_mac_addr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
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#endif
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#define MAX_BEAMFORMEE_SU 2
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#define MAX_BEAMFORMER_SU 2
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#if (RTL8822B_SUPPORT == 1)
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#define MAX_BEAMFORMEE_MU 6
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#define MAX_BEAMFORMER_MU 1
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#else
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#define MAX_BEAMFORMEE_MU 0
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#define MAX_BEAMFORMER_MU 0
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#endif
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#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU)
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#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU)
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#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
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/*for different naming between WIN and CE*/
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#define BEACON_QUEUE BCN_QUEUE_INX
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#define NORMAL_QUEUE MGT_QUEUE_INX
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#define RT_DISABLE_FUNC RTW_DISABLE_FUNC
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#define RT_ENABLE_FUNC RTW_ENABLE_FUNC
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#endif
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enum beamforming_entry_state {
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BEAMFORMING_ENTRY_STATE_UNINITIALIZE,
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BEAMFORMING_ENTRY_STATE_INITIALIZEING,
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BEAMFORMING_ENTRY_STATE_INITIALIZED,
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BEAMFORMING_ENTRY_STATE_PROGRESSING,
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BEAMFORMING_ENTRY_STATE_PROGRESSED
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};
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enum beamforming_notify_state {
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BEAMFORMING_NOTIFY_NONE,
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BEAMFORMING_NOTIFY_ADD,
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BEAMFORMING_NOTIFY_DELETE,
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BEAMFORMEE_NOTIFY_ADD_SU,
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BEAMFORMEE_NOTIFY_DELETE_SU,
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BEAMFORMEE_NOTIFY_ADD_MU,
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BEAMFORMEE_NOTIFY_DELETE_MU,
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BEAMFORMING_NOTIFY_RESET
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};
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enum beamforming_cap {
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BEAMFORMING_CAP_NONE = 0x0,
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BEAMFORMER_CAP_HT_EXPLICIT = BIT(1),
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BEAMFORMEE_CAP_HT_EXPLICIT = BIT(2),
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BEAMFORMER_CAP_VHT_SU = BIT(5), /* Self has er Cap, because Reg er & peer ee */
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BEAMFORMEE_CAP_VHT_SU = BIT(6), /* Self has ee Cap, because Reg ee & peer er */
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BEAMFORMER_CAP_VHT_MU = BIT(7), /* Self has er Cap, because Reg er & peer ee */
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BEAMFORMEE_CAP_VHT_MU = BIT(8), /* Self has ee Cap, because Reg ee & peer er */
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BEAMFORMER_CAP = BIT(9),
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BEAMFORMEE_CAP = BIT(10),
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};
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enum sounding_mode {
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SOUNDING_SW_VHT_TIMER = 0x0,
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SOUNDING_SW_HT_TIMER = 0x1,
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sounding_stop_all_timer = 0x2,
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SOUNDING_HW_VHT_TIMER = 0x3,
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SOUNDING_HW_HT_TIMER = 0x4,
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SOUNDING_STOP_OID_TIMER = 0x5,
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SOUNDING_AUTO_VHT_TIMER = 0x6,
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SOUNDING_AUTO_HT_TIMER = 0x7,
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SOUNDING_FW_VHT_TIMER = 0x8,
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SOUNDING_FW_HT_TIMER = 0x9,
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};
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struct _RT_BEAMFORM_STAINFO {
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u8 *ra;
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u16 aid;
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u16 mac_id;
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u8 my_mac_addr[6];
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WIRELESS_MODE wireless_mode;
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CHANNEL_WIDTH bw;
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enum beamforming_cap beamform_cap;
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u8 ht_beamform_cap;
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u16 vht_beamform_cap;
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u8 cur_beamform;
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u16 cur_beamform_vht;
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};
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struct _RT_BEAMFORMEE_ENTRY {
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bool is_used;
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bool is_txbf;
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bool is_sound;
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u16 aid; /*Used to construct AID field of NDPA packet.*/
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u16 mac_id; /*Used to Set Reg42C in IBSS mode. */
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u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
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u16 g_id; /*Used to fill Tx DESC*/
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u8 my_mac_addr[6];
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u8 mac_addr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/
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CHANNEL_WIDTH sound_bw; /*Sounding band_width*/
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u16 sound_period;
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enum beamforming_cap beamform_entry_cap;
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enum beamforming_entry_state beamform_entry_state;
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bool is_beamforming_in_progress;
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/*u8 log_seq; // Move to _RT_BEAMFORMER_ENTRY*/
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/*u16 log_retry_cnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/
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/*u16 LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/
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u16 log_status_fail_cnt:5; /* 0~21 */
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u16 default_csi_cnt:5; /* 0~21 */
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u8 csi_matrix[327];
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u16 csi_matrix_len;
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u8 num_of_sounding_dim;
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u8 comp_steering_num_of_bfer;
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u8 su_reg_index;
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/*For MU-MIMO*/
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bool is_mu_sta;
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u8 mu_reg_index;
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u8 gid_valid[8];
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u8 user_position[16];
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};
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struct _RT_BEAMFORMER_ENTRY {
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bool is_used;
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/*P_AID of BFer entry is probably not used*/
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u16 p_aid; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
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u16 g_id;
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u8 my_mac_addr[6];
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u8 mac_addr[6];
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enum beamforming_cap beamform_entry_cap;
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u8 num_of_sounding_dim;
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u8 clock_reset_times; /*Modified by Jeffery @2015-04-10*/
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u8 pre_log_seq; /*Modified by Jeffery @2015-03-30*/
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u8 log_seq; /*Modified by Jeffery @2014-10-29*/
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u16 log_retry_cnt:3; /*Modified by Jeffery @2014-10-29*/
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u16 log_success:2; /*Modified by Jeffery @2014-10-29*/
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u8 su_reg_index;
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/*For MU-MIMO*/
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bool is_mu_ap;
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u8 gid_valid[8];
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u8 user_position[16];
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u16 aid;
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};
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struct _RT_SOUNDING_INFO {
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u8 sound_idx;
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CHANNEL_WIDTH sound_bw;
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enum sounding_mode sound_mode;
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u16 sound_period;
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};
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struct _RT_BEAMFORMING_OID_INFO {
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u8 sound_oid_idx;
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CHANNEL_WIDTH sound_oid_bw;
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enum sounding_mode sound_oid_mode;
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u16 sound_oid_period;
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};
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struct _RT_BEAMFORMING_INFO {
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enum beamforming_cap beamform_cap;
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struct _RT_BEAMFORMEE_ENTRY beamformee_entry[BEAMFORMEE_ENTRY_NUM];
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struct _RT_BEAMFORMER_ENTRY beamformer_entry[BEAMFORMER_ENTRY_NUM];
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struct _RT_BEAMFORM_STAINFO beamform_sta_info;
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u8 beamformee_cur_idx;
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struct timer_list beamforming_timer;
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struct timer_list mu_timer;
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struct _RT_SOUNDING_INFO sounding_info;
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struct _RT_BEAMFORMING_OID_INFO beamforming_oid_info;
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struct _HAL_TXBF_INFO txbf_info;
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u8 sounding_sequence;
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u8 beamformee_su_cnt;
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u8 beamformer_su_cnt;
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u32 beamformee_su_reg_maping;
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u32 beamformer_su_reg_maping;
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/*For MU-MINO*/
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u8 beamformee_mu_cnt;
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u8 beamformer_mu_cnt;
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u32 beamformee_mu_reg_maping;
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u8 mu_ap_index;
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bool is_mu_sounding;
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u8 first_mu_bfee_index;
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bool is_mu_sounding_in_progress;
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bool dbg_disable_mu_tx;
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bool apply_v_matrix;
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bool snding3ss;
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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struct _ADAPTER *source_adapter;
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#endif
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/* Control register */
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u32 reg_mu_tx_ctrl; /* For USB/SDIO interfaces aync I/O */
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};
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struct _RT_NDPA_STA_INFO {
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u16 aid:12;
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u16 feedback_type:1;
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u16 nc_index:3;
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};
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enum phydm_acting_type {
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phydm_acting_as_ibss = 0,
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phydm_acting_as_ap = 1
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};
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enum beamforming_cap
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phydm_beamforming_get_entry_beam_cap_by_mac_id(
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void *p_dm_void,
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u8 mac_id
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);
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struct _RT_BEAMFORMEE_ENTRY *
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phydm_beamforming_get_bfee_entry_by_addr(
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void *p_dm_void,
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u8 *RA,
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u8 *idx
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);
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struct _RT_BEAMFORMER_ENTRY *
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phydm_beamforming_get_bfer_entry_by_addr(
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void *p_dm_void,
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u8 *TA,
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u8 *idx
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);
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void
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phydm_beamforming_notify(
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void *p_dm_void
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);
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bool
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phydm_acting_determine(
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void *p_dm_void,
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enum phydm_acting_type type
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);
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void
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beamforming_enter(
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void *p_dm_void,
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u16 sta_idx
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);
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void
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beamforming_leave(
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void *p_dm_void,
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u8 *RA
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);
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bool
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beamforming_start_fw(
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void *p_dm_void,
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u8 idx
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);
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void
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beamforming_check_sounding_success(
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void *p_dm_void,
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bool status
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);
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void
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phydm_beamforming_end_sw(
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void *p_dm_void,
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bool status
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);
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void
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beamforming_timer_callback(
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void *p_dm_void
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);
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void
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phydm_beamforming_init(
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void *p_dm_void
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);
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enum beamforming_cap
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phydm_beamforming_get_beam_cap(
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void *p_dm_void,
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struct _RT_BEAMFORMING_INFO *p_beam_info
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);
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bool
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beamforming_control_v1(
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void *p_dm_void,
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u8 *RA,
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u8 AID,
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u8 mode,
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CHANNEL_WIDTH BW,
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u8 rate
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);
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bool
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phydm_beamforming_control_v2(
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void *p_dm_void,
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u8 idx,
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u8 mode,
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CHANNEL_WIDTH BW,
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u16 period
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);
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void
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phydm_beamforming_watchdog(
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void *p_dm_void
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);
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void
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beamforming_sw_timer_callback(
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#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
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struct timer_list *p_timer
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#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
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void *function_context
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#endif
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);
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bool
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beamforming_send_ht_ndpa_packet(
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void *p_dm_void,
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u8 *RA,
|
||||
CHANNEL_WIDTH BW,
|
||||
u8 q_idx
|
||||
);
|
||||
|
||||
|
||||
bool
|
||||
beamforming_send_vht_ndpa_packet(
|
||||
void *p_dm_void,
|
||||
u8 *RA,
|
||||
u16 AID,
|
||||
CHANNEL_WIDTH BW,
|
||||
u8 q_idx
|
||||
);
|
||||
|
||||
#else
|
||||
#define beamforming_gid_paid(adapter, p_tcb)
|
||||
#define phydm_acting_determine(p_dm_odm, type) false
|
||||
#define beamforming_enter(p_dm_odm, sta_idx)
|
||||
|
|
@ -366,6 +24,4 @@ beamforming_send_vht_ndpa_packet(
|
|||
#define beamforming_watchdog(p_dm_odm)
|
||||
#define phydm_beamforming_watchdog(p_dm_odm)
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -25,17 +25,8 @@
|
|||
/*#define DYNAMIC_TXPWR_VERSION "1.3" */ /*2015.08.26, Add 8814 Dynamic TX power*/
|
||||
#define DYNAMIC_TXPWR_VERSION "1.4" /*2015.11.06, Add CE 8821A Dynamic TX power*/
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
|
||||
#endif
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
|
||||
|
||||
#define tx_high_pwr_level_normal 0
|
||||
#define tx_high_pwr_level_level1 1
|
||||
|
|
@ -64,7 +55,6 @@ odm_dynamic_tx_power_nic(
|
|||
void *p_dm_void
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
||||
void
|
||||
odm_dynamic_tx_power_save_power_index(
|
||||
void *p_dm_void
|
||||
|
|
@ -81,21 +71,6 @@ odm_dynamic_tx_power_8821(
|
|||
u8 *p_desc,
|
||||
u8 mac_id
|
||||
);
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
void
|
||||
odm_dynamic_tx_power_8814a(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
|
||||
void
|
||||
odm_set_tx_power_level8814(
|
||||
struct _ADAPTER *adapter,
|
||||
u8 channel,
|
||||
u8 pwr_lvl
|
||||
);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
void
|
||||
odm_dynamic_tx_power(
|
||||
|
|
|
|||
|
|
@ -275,45 +275,6 @@ odm_release_spin_lock(
|
|||
enum rt_spinlock_type type
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
/*
|
||||
* ODM MISC-workitem relative API.
|
||||
* */
|
||||
void
|
||||
odm_initialize_work_item(
|
||||
struct PHY_DM_STRUCT *p_dm_odm,
|
||||
PRT_WORK_ITEM p_rt_work_item,
|
||||
RT_WORKITEM_CALL_BACK rt_work_item_callback,
|
||||
void *p_context,
|
||||
const char *sz_id
|
||||
);
|
||||
|
||||
void
|
||||
odm_start_work_item(
|
||||
PRT_WORK_ITEM p_rt_work_item
|
||||
);
|
||||
|
||||
void
|
||||
odm_stop_work_item(
|
||||
PRT_WORK_ITEM p_rt_work_item
|
||||
);
|
||||
|
||||
void
|
||||
odm_free_work_item(
|
||||
PRT_WORK_ITEM p_rt_work_item
|
||||
);
|
||||
|
||||
void
|
||||
odm_schedule_work_item(
|
||||
PRT_WORK_ITEM p_rt_work_item
|
||||
);
|
||||
|
||||
bool
|
||||
odm_is_work_item_scheduled(
|
||||
PRT_WORK_ITEM p_rt_work_item
|
||||
);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* ODM Timer relative API.
|
||||
* */
|
||||
|
|
@ -387,14 +348,13 @@ u64
|
|||
odm_get_current_time(
|
||||
struct PHY_DM_STRUCT *p_dm_odm
|
||||
);
|
||||
|
||||
u64
|
||||
odm_get_progressing_time(
|
||||
struct PHY_DM_STRUCT *p_dm_odm,
|
||||
u64 start_time
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
|
||||
void
|
||||
phydm_set_hw_reg_handler_interface (
|
||||
struct PHY_DM_STRUCT *p_dm_odm,
|
||||
|
|
@ -407,10 +367,7 @@ phydm_get_hal_def_var_handler_interface (
|
|||
struct PHY_DM_STRUCT *p_dm_odm,
|
||||
enum _HAL_DEF_VARIABLE e_variable,
|
||||
void *p_value
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
);
|
||||
|
||||
#endif /* __ODM_INTERFACE_H__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -472,10 +472,6 @@ odm_txpowertracking_init(
|
|||
)
|
||||
{
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
if (!(p_dm_odm->support_ic_type & (ODM_RTL8814A | ODM_IC_11N_SERIES | ODM_RTL8822B)))
|
||||
return;
|
||||
#endif
|
||||
|
||||
odm_txpowertracking_thermal_meter_init(p_dm_odm);
|
||||
}
|
||||
|
|
@ -535,13 +531,6 @@ odm_txpowertracking_thermal_meter_init(
|
|||
u8 default_swing_index = get_swing_index(p_dm_odm);
|
||||
u8 p = 0;
|
||||
struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
||||
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
|
||||
|
||||
if (p_dm_odm->mp_mode == false)
|
||||
p_hal_data->txpowertrack_control = true;
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
||||
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
|
||||
|
||||
|
|
@ -559,17 +548,6 @@ odm_txpowertracking_thermal_meter_init(
|
|||
|
||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control));
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
#ifdef RTL8188E_SUPPORT
|
||||
{
|
||||
p_rf_calibrate_info->is_txpowertracking = _TRUE;
|
||||
p_rf_calibrate_info->tx_powercount = 0;
|
||||
p_rf_calibrate_info->is_txpowertracking_init = _FALSE;
|
||||
p_rf_calibrate_info->txpowertrack_control = _TRUE;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* p_dm_odm->rf_calibrate_info.txpowertrack_control = true; */
|
||||
p_rf_calibrate_info->thermal_value = p_hal_data->eeprom_thermal_meter;
|
||||
p_rf_calibrate_info->thermal_value_iqk = p_hal_data->eeprom_thermal_meter;
|
||||
|
|
@ -644,7 +622,6 @@ odm_txpowertracking_check_ce(
|
|||
)
|
||||
{
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
||||
|
||||
if (!(p_dm_odm->support_ability & ODM_RF_TX_PWR_TRACK))
|
||||
|
|
@ -670,8 +647,6 @@ odm_txpowertracking_check_ce(
|
|||
odm_txpowertracking_callback_thermal_meter(adapter);
|
||||
p_dm_odm->rf_calibrate_info.tm_trigger = 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
|
|
@ -680,66 +655,12 @@ odm_txpowertracking_check_mp(
|
|||
)
|
||||
{
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
struct _ADAPTER *adapter = p_dm_odm->adapter;
|
||||
|
||||
if (odm_check_power_status(adapter) == false) {
|
||||
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("===>odm_check_power_status() return false\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
odm_txpowertracking_thermal_meter_check(adapter);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
odm_txpowertracking_check_ap(
|
||||
void *p_dm_void
|
||||
)
|
||||
{
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
struct rtl8192cd_priv *priv = p_dm_odm->priv;
|
||||
|
||||
return;
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
void
|
||||
odm_txpowertracking_thermal_meter_check(
|
||||
struct _ADAPTER *adapter
|
||||
)
|
||||
{
|
||||
#ifndef AP_BUILD_WORKAROUND
|
||||
static u8 tm_trigger = 0;
|
||||
|
||||
if (!(GET_HAL_DATA(adapter)->DM_OutSrc.support_ability & ODM_RF_TX_PWR_TRACK)) {
|
||||
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD,
|
||||
("===>odm_txpowertracking_thermal_meter_check(),p_mgnt_info->is_txpowertracking is false, return!!\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
if (!tm_trigger) {
|
||||
if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_JAGUAR(adapter) || IS_HARDWARE_TYPE_8192E(adapter) ||
|
||||
IS_HARDWARE_TYPE_8723B(adapter) || IS_HARDWARE_TYPE_8814A(adapter) || IS_HARDWARE_TYPE_8188F(adapter)
|
||||
|| IS_HARDWARE_TYPE_8703B(adapter) || IS_HARDWARE_TYPE_8723D(adapter))
|
||||
phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER_88E, BIT(17) | BIT(16), 0x03);
|
||||
else
|
||||
phy_set_rf_reg(adapter, ODM_RF_PATH_A, RF_T_METER, RFREGOFFSETMASK, 0x60);
|
||||
|
||||
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Trigger Thermal Meter!!\n"));
|
||||
|
||||
tm_trigger = 1;
|
||||
return;
|
||||
} else {
|
||||
RT_TRACE(COMP_POWER_TRACKING, DBG_LOUD, ("Schedule TxPowerTracking direct call!!\n"));
|
||||
odm_txpowertracking_direct_call(adapter);
|
||||
tm_trigger = 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,299 +0,0 @@
|
|||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMPOWERTRACKING_H__
|
||||
#define __PHYDMPOWERTRACKING_H__
|
||||
|
||||
#define POWRTRACKING_VERSION "1.1"
|
||||
|
||||
#define DPK_DELTA_MAPPING_NUM 13
|
||||
#define index_mapping_HP_NUM 15
|
||||
#define TXSCALE_TABLE_SIZE 37
|
||||
#define CCK_TABLE_SIZE_8723D 41
|
||||
#define TXPWR_TRACK_TABLE_SIZE 30
|
||||
#define DELTA_SWINGIDX_SIZE 30
|
||||
#define DELTA_SWINTSSI_SIZE 61
|
||||
#define BAND_NUM 3
|
||||
#define MAX_RF_PATH 4
|
||||
#define CCK_TABLE_SIZE_88F 21
|
||||
|
||||
|
||||
#define dm_check_txpowertracking odm_txpowertracking_check
|
||||
|
||||
#define IQK_MATRIX_SETTINGS_NUM (14+24+21) /* Channels_2_4G_NUM + Channels_5G_20M_NUM + Channels_5G */
|
||||
#define AVG_THERMAL_NUM 8
|
||||
#define HP_THERMAL_NUM 8
|
||||
#define iqk_matrix_reg_num 8
|
||||
#define IQK_MAC_REG_NUM 4
|
||||
#define IQK_ADDA_REG_NUM 16
|
||||
|
||||
#define IQK_BB_REG_NUM 9
|
||||
|
||||
|
||||
extern u32 ofdm_swing_table[OFDM_TABLE_SIZE];
|
||||
extern u8 cck_swing_table_ch1_ch13[CCK_TABLE_SIZE][8];
|
||||
extern u8 cck_swing_table_ch14[CCK_TABLE_SIZE][8];
|
||||
|
||||
extern u32 ofdm_swing_table_new[OFDM_TABLE_SIZE];
|
||||
extern u8 cck_swing_table_ch1_ch13_new[CCK_TABLE_SIZE][8];
|
||||
extern u8 cck_swing_table_ch14_new[CCK_TABLE_SIZE][8];
|
||||
extern u8 cck_swing_table_ch1_ch14_88f[CCK_TABLE_SIZE_88F][16];
|
||||
extern u8 cck_swing_table_ch1_ch13_88f[CCK_TABLE_SIZE_88F][16];
|
||||
extern u8 cck_swing_table_ch14_88f[CCK_TABLE_SIZE_88F][16];
|
||||
extern u32 cck_swing_table_ch1_ch14_8723d[CCK_TABLE_SIZE_8723D];
|
||||
|
||||
extern u32 tx_scaling_table_jaguar[TXSCALE_TABLE_SIZE];
|
||||
|
||||
/* <20121018, Kordan> In case fail to read TxPowerTrack.txt, we use the table of 88E as the default table. */
|
||||
static u8 delta_swing_table_idx_2ga_p_8188e[] = {0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9};
|
||||
static u8 delta_swing_table_idx_2ga_n_8188e[] = {0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 11, 11};
|
||||
|
||||
void
|
||||
odm_txpowertracking_check(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
void
|
||||
odm_txpowertracking_check_ap(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
void
|
||||
odm_txpowertracking_thermal_meter_init(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
void
|
||||
odm_txpowertracking_init(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
void
|
||||
odm_txpowertracking_check_mp(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
|
||||
void
|
||||
odm_txpowertracking_check_ce(
|
||||
void *p_dm_void
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
|
||||
|
||||
|
||||
void
|
||||
odm_txpowertracking_thermal_meter_check(
|
||||
struct _ADAPTER *adapter
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
struct _IQK_MATRIX_REGS_SETTING {
|
||||
bool is_iqk_done;
|
||||
s32 value[3][iqk_matrix_reg_num];
|
||||
bool is_bw_iqk_result_saved[3];
|
||||
};
|
||||
|
||||
struct odm_rf_calibration_structure {
|
||||
/* for tx power tracking */
|
||||
|
||||
u32 rega24; /* for TempCCK */
|
||||
s32 rege94;
|
||||
s32 rege9c;
|
||||
s32 regeb4;
|
||||
s32 regebc;
|
||||
/* u8 is_txpowertracking; */
|
||||
u8 tx_powercount;
|
||||
bool is_txpowertracking_init;
|
||||
bool is_txpowertracking;
|
||||
u8 txpowertrack_control; /* for mp mode, turn off txpwrtracking as default */
|
||||
u8 tm_trigger;
|
||||
u8 internal_pa_5g[2]; /* pathA / pathB */
|
||||
|
||||
u8 thermal_meter[2]; /* thermal_meter, index 0 for RFIC0, and 1 for RFIC1 */
|
||||
u8 thermal_value;
|
||||
u8 thermal_value_lck;
|
||||
u8 thermal_value_iqk;
|
||||
s8 thermal_value_delta; /* delta of thermal_value and efuse thermal */
|
||||
u8 thermal_value_avg[AVG_THERMAL_NUM];
|
||||
u8 thermal_value_avg_index;
|
||||
u8 thermal_value_rx_gain;
|
||||
|
||||
bool is_reloadtxpowerindex;
|
||||
u8 is_rf_pi_enable;
|
||||
u32 txpowertracking_callback_cnt; /* cosa add for debug */
|
||||
|
||||
|
||||
/* ------------------------- Tx power Tracking ------------------------- */
|
||||
u8 is_cck_in_ch14;
|
||||
u8 CCK_index;
|
||||
u8 OFDM_index[MAX_RF_PATH];
|
||||
s8 power_index_offset[MAX_RF_PATH];
|
||||
s8 delta_power_index[MAX_RF_PATH];
|
||||
s8 delta_power_index_last[MAX_RF_PATH];
|
||||
bool is_tx_power_changed;
|
||||
s8 xtal_offset;
|
||||
s8 xtal_offset_last;
|
||||
|
||||
u8 thermal_value_hp[HP_THERMAL_NUM];
|
||||
u8 thermal_value_hp_index;
|
||||
struct _IQK_MATRIX_REGS_SETTING iqk_matrix_reg_setting[IQK_MATRIX_SETTINGS_NUM];
|
||||
u8 delta_lck;
|
||||
s8 bb_swing_diff_2g, bb_swing_diff_5g; /* Unit: dB */
|
||||
u8 delta_swing_table_idx_2g_cck_a_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_a_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_b_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_b_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_c_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_c_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_d_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2g_cck_d_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2ga_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2ga_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2gb_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2gb_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2gc_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2gc_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2gd_p[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2gd_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5ga_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5ga_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5gb_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5gb_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5gc_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5gc_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5gd_p[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_5gd_n[BAND_NUM][DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_tssi_table_2g_cck_a[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2g_cck_b[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2g_cck_c[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2g_cck_d[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2ga[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2gb[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2gc[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_2gd[DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_5ga[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_5gb[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_5gc[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
||||
u8 delta_swing_tssi_table_5gd[BAND_NUM][DELTA_SWINTSSI_SIZE];
|
||||
s8 delta_swing_table_xtal_p[DELTA_SWINGIDX_SIZE];
|
||||
s8 delta_swing_table_xtal_n[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2ga_p_8188e[DELTA_SWINGIDX_SIZE];
|
||||
u8 delta_swing_table_idx_2ga_n_8188e[DELTA_SWINGIDX_SIZE];
|
||||
|
||||
u8 bb_swing_idx_ofdm[MAX_RF_PATH];
|
||||
u8 bb_swing_idx_ofdm_current;
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
||||
u8 bb_swing_idx_ofdm_base[MAX_RF_PATH];
|
||||
#else
|
||||
u8 bb_swing_idx_ofdm_base;
|
||||
#endif
|
||||
bool default_bb_swing_index_flag;
|
||||
bool bb_swing_flag_ofdm;
|
||||
u8 bb_swing_idx_cck;
|
||||
u8 bb_swing_idx_cck_current;
|
||||
u8 bb_swing_idx_cck_base;
|
||||
u8 default_ofdm_index;
|
||||
u8 default_cck_index;
|
||||
bool bb_swing_flag_cck;
|
||||
|
||||
s8 absolute_ofdm_swing_idx[MAX_RF_PATH];
|
||||
s8 remnant_ofdm_swing_idx[MAX_RF_PATH];
|
||||
s8 absolute_cck_swing_idx[MAX_RF_PATH];
|
||||
s8 remnant_cck_swing_idx;
|
||||
s8 modify_tx_agc_value; /*Remnat compensate value at tx_agc */
|
||||
bool modify_tx_agc_flag_path_a;
|
||||
bool modify_tx_agc_flag_path_b;
|
||||
bool modify_tx_agc_flag_path_c;
|
||||
bool modify_tx_agc_flag_path_d;
|
||||
bool modify_tx_agc_flag_path_a_cck;
|
||||
|
||||
s8 kfree_offset[MAX_RF_PATH];
|
||||
|
||||
/* -------------------------------------------------------------------- */
|
||||
|
||||
/* for IQK */
|
||||
u32 regc04;
|
||||
u32 reg874;
|
||||
u32 regc08;
|
||||
u32 regb68;
|
||||
u32 regb6c;
|
||||
u32 reg870;
|
||||
u32 reg860;
|
||||
u32 reg864;
|
||||
|
||||
bool is_iqk_initialized;
|
||||
bool is_lck_in_progress;
|
||||
bool is_antenna_detected;
|
||||
bool is_need_iqk;
|
||||
bool is_iqk_in_progress;
|
||||
bool is_iqk_pa_off;
|
||||
u8 delta_iqk;
|
||||
u32 ADDA_backup[IQK_ADDA_REG_NUM];
|
||||
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
|
||||
u32 IQK_BB_backup_recover[9];
|
||||
u32 IQK_BB_backup[IQK_BB_REG_NUM];
|
||||
u32 tx_iqc_8723b[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}} */
|
||||
u32 rx_iqc_8723b[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}} */
|
||||
u32 tx_iqc_8703b[3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
|
||||
u32 rx_iqc_8703b[2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
|
||||
u32 tx_iqc_8723d[2][3][2]; /* { {S1: 0xc94, 0xc80, 0xc4c} , {S0: 0xc9c, 0xc88, 0xc4c}}*/
|
||||
u32 rx_iqc_8723d[2][2][2]; /* { {S1: 0xc14, 0xca0} , {S0: 0xc14, 0xca0}}*/
|
||||
|
||||
u64 iqk_start_time;
|
||||
u64 iqk_total_progressing_time;
|
||||
u64 iqk_progressing_time;
|
||||
u32 lok_result;
|
||||
u8 iqk_step;
|
||||
u8 kcount;
|
||||
u8 retry_count[4][2]; /* [4]: path ABCD, [2] TXK, RXK */
|
||||
bool is_mp_mode;
|
||||
|
||||
/* for APK */
|
||||
u32 ap_koutput[2][2]; /* path A/B; output1_1a/output1_2a */
|
||||
u8 is_ap_kdone;
|
||||
u8 is_apk_thermal_meter_ignore;
|
||||
|
||||
/* DPK */
|
||||
bool is_dpk_fail;
|
||||
u8 is_dp_done;
|
||||
u8 is_dp_path_aok;
|
||||
u8 is_dp_path_bok;
|
||||
|
||||
u32 tx_lok[2];
|
||||
u32 dpk_tx_agc;
|
||||
s32 dpk_gain;
|
||||
u32 dpk_thermal[4];
|
||||
|
||||
s8 modify_tx_agc_value_ofdm;
|
||||
s8 modify_tx_agc_value_cck;
|
||||
|
||||
/*Add by Yuchen for Kfree Phydm*/
|
||||
u8 reg_rf_kfree_enable; /*for registry*/
|
||||
u8 rf_kfree_enable; /*for efuse enable check*/
|
||||
|
||||
HALMAC_PWR_TRACKING_OPTION HALMAC_PWR_TRACKING_INFO;
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -33,13 +33,6 @@ odm_config_rf_reg_8188e(
|
|||
u32 reg_addr
|
||||
)
|
||||
{
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
#ifndef SMP_SYNC
|
||||
unsigned long x;
|
||||
#endif
|
||||
struct rtl8192cd_priv *priv = p_dm_odm->priv;
|
||||
#endif
|
||||
|
||||
if (addr == 0xffe) {
|
||||
#ifdef CONFIG_LONG_DELAY_ISSUE
|
||||
ODM_sleep_ms(50);
|
||||
|
|
@ -57,14 +50,7 @@ odm_config_rf_reg_8188e(
|
|||
else if (addr == 0xf9)
|
||||
ODM_delay_us(1);
|
||||
else {
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
SAVE_INT_AND_CLI(x);
|
||||
odm_set_rf_reg(p_dm_odm, RF_PATH, reg_addr, RFREGOFFSETMASK, data);
|
||||
RESTORE_INT(x);
|
||||
#else
|
||||
odm_set_rf_reg(p_dm_odm, RF_PATH, reg_addr, RFREGOFFSETMASK, data);
|
||||
#endif
|
||||
/* Add 1us delay between BB/RF register setting. */
|
||||
ODM_delay_us(1);
|
||||
}
|
||||
|
|
@ -157,10 +143,7 @@ odm_config_bb_phy_reg_pg_8188e(
|
|||
ODM_delay_us(1);
|
||||
else {
|
||||
ODM_RT_TRACE(p_dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", addr, bitmask, data));
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE&ODM_AP)
|
||||
phy_store_tx_power_by_rate(p_dm_odm->adapter, band, rf_path, tx_num, addr, bitmask, data);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -176,10 +159,8 @@ odm_config_bb_txpwr_lmt_8188e(
|
|||
u8 *power_limit
|
||||
)
|
||||
{
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
|
||||
phy_set_tx_power_limit(p_dm_odm, regulation, band,
|
||||
bandwidth, rate_section, rf_path, channel, power_limit);
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -2,103 +2,7 @@
|
|||
#include "phydm_precomp.h"
|
||||
|
||||
#if (defined(CONFIG_BB_TXBF_API))
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
/*Add by YuChen for 8822B MU-MIMO API*/
|
||||
|
||||
/*this function is only used for BFer*/
|
||||
u8
|
||||
phydm_get_ndpa_rate(
|
||||
void *p_dm_void
|
||||
)
|
||||
{
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
u8 ndpa_rate = ODM_RATE6M;
|
||||
|
||||
if (p_dm_odm->rssi_min >= 30) /*link RSSI > 30%*/
|
||||
ndpa_rate = ODM_RATE24M;
|
||||
else if (p_dm_odm->rssi_min <= 25)
|
||||
ndpa_rate = ODM_RATE6M;
|
||||
|
||||
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("[%s] ndpa_rate = 0x%x\n", __func__, ndpa_rate));
|
||||
|
||||
return ndpa_rate;
|
||||
|
||||
}
|
||||
|
||||
/*this function is only used for BFer*/
|
||||
u8
|
||||
phydm_get_beamforming_sounding_info(
|
||||
void *p_dm_void,
|
||||
u16 *troughput,
|
||||
u8 total_bfee_num,
|
||||
u8 *tx_rate
|
||||
)
|
||||
{
|
||||
u8 idx = 0;
|
||||
u8 soundingdecision = 0xff;
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
|
||||
for (idx = 0; idx < total_bfee_num; idx++) {
|
||||
if (((tx_rate[idx] >= ODM_RATEVHTSS3MCS7) && (tx_rate[idx] <= ODM_RATEVHTSS3MCS9)))
|
||||
soundingdecision = soundingdecision & ~(1 << idx);
|
||||
}
|
||||
|
||||
for (idx = 0; idx < total_bfee_num; idx++) {
|
||||
if (troughput[idx] <= 10)
|
||||
soundingdecision = soundingdecision & ~(1 << idx);
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("[%s] soundingdecision = 0x%x\n", __func__, soundingdecision));
|
||||
|
||||
return soundingdecision;
|
||||
|
||||
}
|
||||
|
||||
/*this function is only used for BFer*/
|
||||
u8
|
||||
phydm_get_mu_bfee_snding_decision(
|
||||
void *p_dm_void,
|
||||
u16 throughput
|
||||
)
|
||||
{
|
||||
u8 snding_score = 0;
|
||||
struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
|
||||
|
||||
/*throughput unit is Mbps*/
|
||||
if (throughput >= 500)
|
||||
snding_score = 100;
|
||||
else if (throughput >= 450)
|
||||
snding_score = 90;
|
||||
else if (throughput >= 400)
|
||||
snding_score = 80;
|
||||
else if (throughput >= 350)
|
||||
snding_score = 70;
|
||||
else if (throughput >= 300)
|
||||
snding_score = 60;
|
||||
else if (throughput >= 250)
|
||||
snding_score = 50;
|
||||
else if (throughput >= 200)
|
||||
snding_score = 40;
|
||||
else if (throughput >= 150)
|
||||
snding_score = 30;
|
||||
else if (throughput >= 100)
|
||||
snding_score = 20;
|
||||
else if (throughput >= 50)
|
||||
snding_score = 10;
|
||||
else
|
||||
snding_score = 0;
|
||||
|
||||
ODM_RT_TRACE(p_dm_odm, PHYDM_COMP_TXBF, ODM_DBG_TRACE, ("[%s] snding_score = 0x%x\n", __func__, snding_score));
|
||||
|
||||
return snding_score;
|
||||
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
|
||||
u8
|
||||
beamforming_get_htndp_tx_rate(
|
||||
u8 beamforming_get_htndp_tx_rate(
|
||||
void *p_dm_void,
|
||||
u8 comp_steering_num_of_bfer
|
||||
)
|
||||
|
|
@ -107,12 +11,7 @@ beamforming_get_htndp_tx_rate(
|
|||
u8 nr_index = 0;
|
||||
u8 ndp_tx_rate;
|
||||
/*Find nr*/
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
if (p_dm_odm->support_ic_type & ODM_RTL8814A)
|
||||
nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), comp_steering_num_of_bfer);
|
||||
else
|
||||
#endif
|
||||
nr_index = tx_bf_nr(1, comp_steering_num_of_bfer);
|
||||
nr_index = tx_bf_nr(1, comp_steering_num_of_bfer);
|
||||
|
||||
switch (nr_index) {
|
||||
case 1:
|
||||
|
|
@ -146,12 +45,7 @@ beamforming_get_vht_ndp_tx_rate(
|
|||
u8 nr_index = 0;
|
||||
u8 ndp_tx_rate;
|
||||
/*Find nr*/
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
if (p_dm_odm->support_ic_type & ODM_RTL8814A)
|
||||
nr_index = tx_bf_nr(hal_txbf_8814a_get_ntx(p_dm_odm), comp_steering_num_of_bfer);
|
||||
else
|
||||
#endif
|
||||
nr_index = tx_bf_nr(1, comp_steering_num_of_bfer);
|
||||
nr_index = tx_bf_nr(1, comp_steering_num_of_bfer);
|
||||
|
||||
switch (nr_index) {
|
||||
case 1:
|
||||
|
|
@ -174,6 +68,5 @@ beamforming_get_vht_ndp_tx_rate(
|
|||
return ndp_tx_rate;
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -21,7 +21,6 @@
|
|||
|
||||
#if (defined(CONFIG_BB_TXBF_API))
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
|
||||
#define tx_bf_nr(a, b) ((a > b) ? (b) : (a))
|
||||
|
||||
u8
|
||||
|
|
@ -36,8 +35,6 @@ beamforming_get_vht_ndp_tx_rate(
|
|||
u8 comp_steering_num_of_bfer
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
u8
|
||||
phydm_get_beamforming_sounding_info(
|
||||
|
|
|
|||
Loading…
Reference in a new issue