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rtl8188eu: Put the current kernel files into a new branch named kernel_code

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2014-11-15 18:18:30 -06:00
parent 18c80911a2
commit adfd7de95d
113 changed files with 8126 additions and 34255 deletions
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30
Makefile
View file

@ -27,36 +27,29 @@ export TopDIR ?= $(shell pwd)
OUTSRC_FILES := \
hal/HalHWImg8188E_MAC.o \
hal/HalHWImg8188E_BB.o \
hal/HalHWImg8188E_RF.o \
hal/HalPhyRf.o \
hal/HalPhyRf_8188e.o \
hal/HalPwrSeqCmd.o \
hal/Hal8188EPwrSeq.o \
hal/fw.o \
hal/mac_cfg.o \
hal/bb_cfg.o \
hal/rf_cfg.o \
hal/pwrseqcmd.o \
hal/pwrseq.o \
hal/Hal8188ERateAdaptive.o\
hal/hal_intf.o \
hal/hal_com.o \
hal/odm.o \
hal/odm_debug.o \
hal/odm_interface.o \
hal/odm_HWConfig.o \
hal/odm_RegConfig8188E.o\
hal/odm_RTL8188E.o \
hal/rtl8188e_cmd.o \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/rtl8188e_mp.o \
hal/rtl8188e_phycfg.o \
hal/rtl8188e_rf6052.o \
hal/phy.o \
hal/rf.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_sreset.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
hal/rtl8188eu_recv.o \
hal/rtl8188eu_xmit.o \
hal/usb_halinit.o \
hal/usb_ops_linux.o
hal/usb_halinit.o
RTL871X = rtl8188e
@ -105,21 +98,16 @@ ifneq ($(KERNELRELEASE),)
rtk_core := \
core/rtw_ap.o \
core/rtw_br_ext.o \
core/rtw_cmd.o \
core/rtw_debug.o \
core/rtw_efuse.o \
core/rtw_ieee80211.o \
core/rtw_io.o \
core/rtw_ioctl_set.o \
core/rtw_iol.o \
core/rtw_led.o \
core/rtw_mlme.o \
core/rtw_mlme_ext.o \
core/rtw_mp.o \
core/rtw_mp_ioctl.o \
core/rtw_pwrctrl.o \
core/rtw_p2p.o \
core/rtw_recv.o \
core/rtw_rf.o \
core/rtw_security.o \

258
core/rtw_ap.c
View file

@ -33,7 +33,7 @@ void init_mlme_ap_info(struct adapter *padapter)
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
_rtw_spinlock_init(&pmlmepriv->bcn_update_lock);
spin_lock_init(&pmlmepriv->bcn_update_lock);
/* for ACL */
_rtw_init_queue(&pacl_list->acl_node_q);
@ -43,7 +43,6 @@ void init_mlme_ap_info(struct adapter *padapter)
void free_mlme_ap_info(struct adapter *padapter)
{
unsigned long irqL;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
@ -62,11 +61,9 @@ void free_mlme_ap_info(struct adapter *padapter)
/* free bc/mc sta_info */
psta = rtw_get_bcmc_stainfo(padapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_lock_bh(&(pstapriv->sta_hash_lock));
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
_rtw_spinlock_free(&pmlmepriv->bcn_update_lock);
spin_unlock_bh(&(pstapriv->sta_hash_lock));
}
static void update_BCNTIM(struct adapter *padapter)
@ -97,7 +94,7 @@ static void update_BCNTIM(struct adapter *padapter)
} else {
tim_ielen = 0;
/* calucate head_len */
/* calculate head_len */
offset = _FIXED_IE_LENGTH_;
offset += pnetwork_mlmeext->Ssid.SsidLength + 2;
@ -132,7 +129,7 @@ static void update_BCNTIM(struct adapter *padapter)
*dst_ie++ = tim_ielen;
*dst_ie++ = 0;/* DTIM count */
*dst_ie++ = 1;/* DTIM peroid */
*dst_ie++ = 1;/* DTIM period */
if (pstapriv->tim_bitmap&BIT(0))/* for bc/mc frames */
*dst_ie++ = BIT(0);/* bitmap ctrl */
@ -277,7 +274,6 @@ static u8 chk_sta_is_alive(struct sta_info *psta)
void expire_timeout_chk(struct adapter *padapter)
{
unsigned long irqL;
struct list_head *phead, *plist;
u8 updated = 0;
struct sta_info *psta = NULL;
@ -286,49 +282,49 @@ void expire_timeout_chk(struct adapter *padapter)
char chk_alive_list[NUM_STA];
int i;
_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
spin_lock_bh(&pstapriv->auth_list_lock);
phead = &pstapriv->auth_list;
plist = get_next(phead);
plist = phead->next;
/* check auth_queue */
while ((rtw_end_of_queue_search(phead, plist)) == false) {
psta = LIST_CONTAINOR(plist, struct sta_info, auth_list);
plist = get_next(plist);
while (phead != plist) {
psta = container_of(plist, struct sta_info, auth_list);
plist = plist->next;
if (psta->expire_to > 0) {
psta->expire_to--;
if (psta->expire_to == 0) {
rtw_list_delete(&psta->auth_list);
list_del_init(&psta->auth_list);
pstapriv->auth_list_cnt--;
DBG_88E("auth expire %6ph\n",
psta->hwaddr);
_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
spin_unlock_bh(&pstapriv->auth_list_lock);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_lock_bh(&(pstapriv->sta_hash_lock));
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_unlock_bh(&(pstapriv->sta_hash_lock));
_enter_critical_bh(&pstapriv->auth_list_lock, &irqL);
spin_lock_bh(&pstapriv->auth_list_lock);
}
}
}
_exit_critical_bh(&pstapriv->auth_list_lock, &irqL);
spin_unlock_bh(&pstapriv->auth_list_lock);
psta = NULL;
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_lock_bh(&pstapriv->asoc_list_lock);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
plist = phead->next;
/* check asoc_queue */
while ((rtw_end_of_queue_search(phead, plist)) == false) {
psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
plist = get_next(plist);
while (phead != plist) {
psta = container_of(plist, struct sta_info, asoc_list);
plist = plist->next;
if (chk_sta_is_alive(psta) || !psta->expire_to) {
psta->expire_to = pstapriv->expire_to;
@ -369,7 +365,7 @@ void expire_timeout_chk(struct adapter *padapter)
continue;
}
rtw_list_delete(&psta->asoc_list);
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
DBG_88E("asoc expire %pM, state = 0x%x\n", (psta->hwaddr), psta->state);
@ -387,7 +383,7 @@ void expire_timeout_chk(struct adapter *padapter)
}
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_unlock_bh(&pstapriv->asoc_list_lock);
if (chk_alive_num) {
u8 backup_oper_channel = 0;
@ -424,11 +420,11 @@ void expire_timeout_chk(struct adapter *padapter)
psta->keep_alive_trycnt = 0;
DBG_88E("asoc expire %pM, state = 0x%x\n", (psta->hwaddr), psta->state);
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
rtw_list_delete(&psta->asoc_list);
spin_lock_bh(&pstapriv->asoc_list_lock);
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
updated = ap_free_sta(padapter, psta, true, WLAN_REASON_DEAUTH_LEAVING);
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_unlock_bh(&pstapriv->asoc_list_lock);
}
if (backup_oper_channel > 0) /* back to the original operation channel */
@ -535,7 +531,6 @@ void add_RATid(struct adapter *padapter, struct sta_info *psta, u8 rssi_level)
static void update_bmc_sta(struct adapter *padapter)
{
unsigned long irqL;
u32 init_rate = 0;
unsigned char network_type, raid;
int i, supportRateNum = 0;
@ -553,7 +548,7 @@ static void update_bmc_sta(struct adapter *padapter)
psta->ieee8021x_blocked = 0;
_rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats));
memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats));
/* prepare for add_RATid */
supportRateNum = rtw_get_rateset_len((u8 *)&pcur_network->SupportedRates);
@ -604,9 +599,9 @@ static void update_bmc_sta(struct adapter *padapter)
rtw_stassoc_hw_rpt(padapter, psta);
_enter_critical_bh(&psta->lock, &irqL);
spin_lock_bh(&psta->lock);
psta->state = _FW_LINKED;
_exit_critical_bh(&psta->lock, &irqL);
spin_unlock_bh(&psta->lock);
} else {
DBG_88E("add_RATid_bmc_sta error!\n");
@ -622,7 +617,6 @@ static void update_bmc_sta(struct adapter *padapter)
void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
{
unsigned long irqL;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv);
@ -677,11 +671,11 @@ void update_sta_info_apmode(struct adapter *padapter, struct sta_info *psta)
/* todo: init other variables */
_rtw_memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats));
memset((void *)&psta->sta_stats, 0, sizeof(struct stainfo_stats));
_enter_critical_bh(&psta->lock, &irqL);
spin_lock_bh(&psta->lock);
psta->state |= _FW_LINKED;
_exit_critical_bh(&psta->lock, &irqL);
spin_unlock_bh(&psta->lock);
}
static void update_hw_ht_param(struct adapter *padapter)
@ -729,9 +723,6 @@ static void start_bss_network(struct adapter *padapter, u8 *pbuf)
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
struct wlan_bssid_ex *pnetwork_mlmeext = &(pmlmeinfo->network);
struct HT_info_element *pht_info = NULL;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
#endif /* CONFIG_88EU_P2P */
bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod;
cur_channel = pnetwork->Configuration.DSConfig;
@ -827,17 +818,12 @@ static void start_bss_network(struct adapter *padapter, u8 *pbuf)
/* update cur_wireless_mode */
update_wireless_mode(padapter);
/* udpate capability after cur_wireless_mode updated */
/* update capability after cur_wireless_mode updated */
update_capinfo(padapter, rtw_get_capability((struct wlan_bssid_ex *)pnetwork));
/* let pnetwork_mlmeext == pnetwork_mlme. */
memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);
#ifdef CONFIG_88EU_P2P
memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength);
pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength;
#endif /* CONFIG_88EU_P2P */
if (pmlmeext->bstart_bss) {
update_beacon(padapter, _TIM_IE_, NULL, false);
@ -892,7 +878,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
pbss_network->IELength = len;
_rtw_memset(ie, 0, MAX_IE_SZ);
memset(ie, 0, MAX_IE_SZ);
memcpy(ie, pbuf, pbss_network->IELength);
@ -902,19 +888,19 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
pbss_network->Rssi = 0;
memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN);
ether_addr_copy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)));
/* beacon interval */
p = rtw_get_beacon_interval_from_ie(ie);/* 8: TimeStamp, 2: Beacon Interval 2:Capability */
pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p);
pbss_network->Configuration.BeaconPeriod = get_unaligned_le16(p);
/* capability */
cap = RTW_GET_LE16(ie);
cap = get_unaligned_le16(ie);
/* SSID */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p && ie_len > 0) {
_rtw_memset(&pbss_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memset(&pbss_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len);
pbss_network->Ssid.SsidLength = ie_len;
}
@ -928,7 +914,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
pbss_network->Configuration.DSConfig = channel;
_rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX);
memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX);
/* get supported rates */
p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_));
if (p != NULL) {
@ -986,7 +972,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
for (p = ie + _BEACON_IE_OFFSET_;; p += (ie_len + 2)) {
p = rtw_get_ie(p, _SSN_IE_1_, &ie_len,
(pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));
if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) {
if ((p) && (!memcmp(p+2, OUI1, 4))) {
if (rtw_parse_wpa_ie(p, ie_len+2, &group_cipher,
&pairwise_cipher, NULL) == _SUCCESS) {
psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X;
@ -1011,7 +997,7 @@ int rtw_check_beacon_data(struct adapter *padapter, u8 *pbuf, int len)
for (p = ie + _BEACON_IE_OFFSET_;; p += (ie_len + 2)) {
p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len,
(pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2)));
if ((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) {
if ((p) && !memcmp(p+2, WMM_PARA_IE, 6)) {
pmlmepriv->qospriv.qos_option = 1;
*(p+8) |= BIT(7);/* QoS Info, support U-APSD */
@ -1134,7 +1120,6 @@ void rtw_set_macaddr_acl(struct adapter *padapter, int mode)
int rtw_acl_add_sta(struct adapter *padapter, u8 *addr)
{
unsigned long irqL;
struct list_head *plist, *phead;
u8 added = false;
int i, ret = 0;
@ -1148,16 +1133,16 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr)
if ((NUM_ACL-1) < pacl_list->num)
return -1;
_enter_critical_bh(&(pacl_node_q->lock), &irqL);
spin_lock_bh(&(pacl_node_q->lock));
phead = get_list_head(pacl_node_q);
plist = get_next(phead);
plist = phead->next;
while (!rtw_end_of_queue_search(phead, plist)) {
paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list);
plist = get_next(plist);
while (phead != plist) {
paclnode = container_of(plist, struct rtw_wlan_acl_node, list);
plist = plist->next;
if (_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) {
if (!memcmp(paclnode->addr, addr, ETH_ALEN)) {
if (paclnode->valid) {
added = true;
DBG_88E("%s, sta has been added\n", __func__);
@ -1166,24 +1151,24 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr)
}
}
_exit_critical_bh(&(pacl_node_q->lock), &irqL);
spin_unlock_bh(&(pacl_node_q->lock));
if (added)
return ret;
_enter_critical_bh(&(pacl_node_q->lock), &irqL);
spin_lock_bh(&(pacl_node_q->lock));
for (i = 0; i < NUM_ACL; i++) {
paclnode = &pacl_list->aclnode[i];
if (!paclnode->valid) {
_rtw_init_listhead(&paclnode->list);
INIT_LIST_HEAD(&paclnode->list);
memcpy(paclnode->addr, addr, ETH_ALEN);
ether_addr_copy(paclnode->addr, addr);
paclnode->valid = true;
rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q));
list_add_tail(&paclnode->list, get_list_head(pacl_node_q));
pacl_list->num++;
@ -1193,16 +1178,14 @@ int rtw_acl_add_sta(struct adapter *padapter, u8 *addr)
DBG_88E("%s, acl_num =%d\n", __func__, pacl_list->num);
_exit_critical_bh(&(pacl_node_q->lock), &irqL);
spin_unlock_bh(&(pacl_node_q->lock));
return ret;
}
int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr)
{
unsigned long irqL;
struct list_head *plist, *phead;
int ret = 0;
struct rtw_wlan_acl_node *paclnode;
struct sta_priv *pstapriv = &padapter->stapriv;
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
@ -1210,30 +1193,30 @@ int rtw_acl_remove_sta(struct adapter *padapter, u8 *addr)
DBG_88E("%s(acl_num =%d) =%pM\n", __func__, pacl_list->num, (addr));
_enter_critical_bh(&(pacl_node_q->lock), &irqL);
spin_lock_bh(&(pacl_node_q->lock));
phead = get_list_head(pacl_node_q);
plist = get_next(phead);
plist = phead->next;
while (!rtw_end_of_queue_search(phead, plist)) {
paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list);
plist = get_next(plist);
while (phead != plist) {
paclnode = container_of(plist, struct rtw_wlan_acl_node, list);
plist = plist->next;
if (_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) {
if (!memcmp(paclnode->addr, addr, ETH_ALEN)) {
if (paclnode->valid) {
paclnode->valid = false;
rtw_list_delete(&paclnode->list);
list_del_init(&paclnode->list);
pacl_list->num--;
}
}
}
_exit_critical_bh(&(pacl_node_q->lock), &irqL);
spin_unlock_bh(&(pacl_node_q->lock));
DBG_88E("%s, acl_num =%d\n", __func__, pacl_list->num);
return ret;
return 0;
}
static void update_bcn_fixed_ie(struct adapter *padapter)
@ -1314,6 +1297,10 @@ static void update_bcn_wps_ie(struct adapter *padapter)
DBG_88E("%s\n", __func__);
pwps_ie_src = pmlmepriv->wps_beacon_ie;
if (pwps_ie_src == NULL)
return;
pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen);
if (pwps_ie == NULL || wps_ielen == 0)
@ -1331,10 +1318,6 @@ static void update_bcn_wps_ie(struct adapter *padapter)
memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen);
}
pwps_ie_src = pmlmepriv->wps_beacon_ie;
if (pwps_ie_src == NULL)
return;
wps_ielen = (uint)pwps_ie_src[1];/* to get ie data len */
if ((wps_offset+wps_ielen+2+remainder_ielen) <= MAX_IE_SZ) {
memcpy(pwps_ie, pwps_ie_src, wps_ielen+2);
@ -1347,8 +1330,7 @@ static void update_bcn_wps_ie(struct adapter *padapter)
pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen;
}
if (pbackup_remainder_ie)
kfree(pbackup_remainder_ie);
kfree(pbackup_remainder_ie);
}
static void update_bcn_p2p_ie(struct adapter *padapter)
@ -1359,13 +1341,13 @@ static void update_bcn_vendor_spec_ie(struct adapter *padapter, u8 *oui)
{
DBG_88E("%s\n", __func__);
if (_rtw_memcmp(RTW_WPA_OUI, oui, 4))
if (!memcmp(RTW_WPA_OUI, oui, 4))
update_bcn_wpa_ie(padapter);
else if (_rtw_memcmp(WMM_OUI, oui, 4))
else if (!memcmp(WMM_OUI, oui, 4))
update_bcn_wmm_ie(padapter);
else if (_rtw_memcmp(WPS_OUI, oui, 4))
else if (!memcmp(WPS_OUI, oui, 4))
update_bcn_wps_ie(padapter);
else if (_rtw_memcmp(P2P_OUI, oui, 4))
else if (!memcmp(P2P_OUI, oui, 4))
update_bcn_p2p_ie(padapter);
else
DBG_88E("unknown OUI type!\n");
@ -1373,7 +1355,6 @@ static void update_bcn_vendor_spec_ie(struct adapter *padapter, u8 *oui)
void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
{
unsigned long irqL;
struct mlme_priv *pmlmepriv;
struct mlme_ext_priv *pmlmeext;
@ -1386,7 +1367,7 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
if (!pmlmeext->bstart_bss)
return;
_enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
spin_lock_bh(&pmlmepriv->bcn_update_lock);
switch (ie_id) {
case 0xFF:
@ -1416,7 +1397,7 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
pmlmepriv->update_bcn = true;
_exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL);
spin_unlock_bh(&pmlmepriv->bcn_update_lock);
if (tx)
set_tx_beacon_cmd(padapter);
@ -1424,7 +1405,7 @@ void update_beacon(struct adapter *padapter, u8 ie_id, u8 *oui, u8 tx)
/*
op_mode
Set to 0 (HT pure) under the followign conditions
Set to 0 (HT pure) under the following conditions
- all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or
- all STAs in the BSS are 20 MHz HT in 20 MHz BSS
Set to 1 (HT non-member protection) if there may be non-HT STAs
@ -1503,27 +1484,26 @@ static int rtw_ht_operation_update(struct adapter *padapter)
void associated_clients_update(struct adapter *padapter, u8 updated)
{
/* update associcated stations cap. */
/* update associated stations cap. */
if (updated) {
unsigned long irqL;
struct list_head *phead, *plist;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_lock_bh(&pstapriv->asoc_list_lock);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
plist = phead->next;
/* check asoc_queue */
while ((rtw_end_of_queue_search(phead, plist)) == false) {
psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
while (phead != plist) {
psta = container_of(plist, struct sta_info, asoc_list);
plist = get_next(plist);
plist = plist->next;
VCS_update(padapter, psta);
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_unlock_bh(&pstapriv->asoc_list_lock);
}
}
@ -1657,7 +1637,7 @@ void bss_cap_update_on_sta_join(struct adapter *padapter, struct sta_info *psta)
update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, true);
}
/* update associcated stations cap. */
/* update associated stations cap. */
associated_clients_update(padapter, beacon_updated);
DBG_88E("%s, updated =%d\n", __func__, beacon_updated);
@ -1721,7 +1701,7 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta)
update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, true);
}
/* update associcated stations cap. */
/* update associated stations cap. */
DBG_88E("%s, updated =%d\n", __func__, beacon_updated);
@ -1731,7 +1711,6 @@ u8 bss_cap_update_on_sta_leave(struct adapter *padapter, struct sta_info *psta)
u8 ap_free_sta(struct adapter *padapter, struct sta_info *psta,
bool active, u16 reason)
{
unsigned long irqL;
u8 beacon_updated = false;
struct sta_priv *pstapriv = &padapter->stapriv;
@ -1753,9 +1732,9 @@ u8 ap_free_sta(struct adapter *padapter, struct sta_info *psta,
rtw_clearstakey_cmd(padapter, (u8 *)psta, (u8)(psta->mac_id + 3), true);
_enter_critical_bh(&psta->lock, &irqL);
spin_lock_bh(&psta->lock);
psta->state &= ~_FW_LINKED;
_exit_critical_bh(&psta->lock, &irqL);
spin_unlock_bh(&psta->lock);
rtw_indicate_sta_disassoc_event(padapter, psta);
@ -1763,18 +1742,16 @@ u8 ap_free_sta(struct adapter *padapter, struct sta_info *psta,
beacon_updated = bss_cap_update_on_sta_leave(padapter, psta);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_lock_bh(&(pstapriv->sta_hash_lock));
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_unlock_bh(&(pstapriv->sta_hash_lock));
return beacon_updated;
}
int rtw_ap_inform_ch_switch(struct adapter *padapter, u8 new_ch, u8 ch_offset)
{
unsigned long irqL;
struct list_head *phead, *plist;
int ret = 0;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
@ -1782,35 +1759,33 @@ int rtw_ap_inform_ch_switch(struct adapter *padapter, u8 new_ch, u8 ch_offset)
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
return ret;
return 0;
DBG_88E(FUNC_NDEV_FMT" with ch:%u, offset:%u\n",
FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset);
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_lock_bh(&pstapriv->asoc_list_lock);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
plist = phead->next;
/* for each sta in asoc_queue */
while (!rtw_end_of_queue_search(phead, plist)) {
psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
plist = get_next(plist);
while (phead != plist) {
psta = container_of(plist, struct sta_info, asoc_list);
plist = plist->next;
issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset);
psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2);
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_unlock_bh(&pstapriv->asoc_list_lock);
issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset);
return ret;
return 0;
}
int rtw_sta_flush(struct adapter *padapter)
{
unsigned long irqL;
struct list_head *phead, *plist;
int ret = 0;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
@ -1820,31 +1795,31 @@ int rtw_sta_flush(struct adapter *padapter)
DBG_88E(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev));
if ((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE)
return ret;
return 0;
_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_lock_bh(&pstapriv->asoc_list_lock);
phead = &pstapriv->asoc_list;
plist = get_next(phead);
plist = phead->next;
/* free sta asoc_queue */
while ((rtw_end_of_queue_search(phead, plist)) == false) {
psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list);
while (phead != plist) {
psta = container_of(plist, struct sta_info, asoc_list);
plist = get_next(plist);
plist = plist->next;
rtw_list_delete(&psta->asoc_list);
list_del_init(&psta->asoc_list);
pstapriv->asoc_list_cnt--;
ap_free_sta(padapter, psta, true, WLAN_REASON_DEAUTH_LEAVING);
}
_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL);
spin_unlock_bh(&pstapriv->asoc_list_lock);
issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING);
associated_clients_update(padapter, true);
return ret;
return 0;
}
/* called > TSR LEVEL for USB or SDIO Interface*/
@ -1924,18 +1899,17 @@ void start_ap_mode(struct adapter *padapter)
pmlmepriv->p2p_probe_resp_ie = NULL;
/* for ACL */
_rtw_init_listhead(&(pacl_list->acl_node_q.queue));
INIT_LIST_HEAD(&(pacl_list->acl_node_q.queue));
pacl_list->num = 0;
pacl_list->mode = 0;
for (i = 0; i < NUM_ACL; i++) {
_rtw_init_listhead(&pacl_list->aclnode[i].list);
INIT_LIST_HEAD(&pacl_list->aclnode[i].list);
pacl_list->aclnode[i].valid = false;
}
}
void stop_ap_mode(struct adapter *padapter)
{
unsigned long irqL;
struct list_head *phead, *plist;
struct rtw_wlan_acl_node *paclnode;
struct sta_info *psta = NULL;
@ -1949,27 +1923,27 @@ void stop_ap_mode(struct adapter *padapter)
pmlmeext->bstart_bss = false;
/* reset and init security priv , this can refine with rtw_reset_securitypriv */
_rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof(struct security_priv));
memset((unsigned char *)&padapter->securitypriv, 0, sizeof(struct security_priv));
padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen;
padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled;
/* for ACL */
_enter_critical_bh(&(pacl_node_q->lock), &irqL);
spin_lock_bh(&(pacl_node_q->lock));
phead = get_list_head(pacl_node_q);
plist = get_next(phead);
while ((rtw_end_of_queue_search(phead, plist)) == false) {
paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list);
plist = get_next(plist);
plist = phead->next;
while (phead != plist) {
paclnode = container_of(plist, struct rtw_wlan_acl_node, list);
plist = plist->next;
if (paclnode->valid) {
paclnode->valid = false;
rtw_list_delete(&paclnode->list);
list_del_init(&paclnode->list);
pacl_list->num--;
}
}
_exit_critical_bh(&(pacl_node_q->lock), &irqL);
spin_unlock_bh(&(pacl_node_q->lock));
DBG_88E("%s, free acl_node_queue, num =%d\n", __func__, pacl_list->num);
@ -1979,9 +1953,9 @@ void stop_ap_mode(struct adapter *padapter)
rtw_free_all_stainfo(padapter);
psta = rtw_get_bcmc_stainfo(padapter);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_lock_bh(&(pstapriv->sta_hash_lock));
rtw_free_stainfo(padapter, psta);
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL);
spin_unlock_bh(&(pstapriv->sta_hash_lock));
rtw_init_bcmc_stainfo(padapter);

1198
core/rtw_br_ext.c
View file

File diff suppressed because it is too large Load diff

1171
core/rtw_cmd.c
View file

File diff suppressed because it is too large Load diff

59
core/rtw_debug.c
View file

@ -20,7 +20,7 @@
#define _RTW_DEBUG_C_
#include <rtw_debug.h>
#include <rtw_version.h>
#include <usb_ops_linux.h>
int proc_get_drv_version(char *page, char **start,
off_t offset, int count,
@ -45,7 +45,7 @@ int proc_get_write_reg(char *page, char **start,
int proc_set_write_reg(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 addr, val, len;
@ -64,13 +64,13 @@ int proc_set_write_reg(struct file *file, const char __user *buffer,
}
switch (len) {
case 1:
rtw_write8(padapter, addr, (u8)val);
usb_write8(padapter, addr, (u8)val);
break;
case 2:
rtw_write16(padapter, addr, (u16)val);
usb_write16(padapter, addr, (u16)val);
break;
case 4:
rtw_write32(padapter, addr, val);
usb_write32(padapter, addr, val);
break;
default:
DBG_88E("error write length =%d", len);
@ -99,13 +99,13 @@ int proc_get_read_reg(char *page, char **start,
switch (proc_get_read_len) {
case 1:
len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr));
len += snprintf(page + len, count - len, "usb_read8(0x%x)=0x%x\n", proc_get_read_addr, usb_read8(padapter, proc_get_read_addr));
break;
case 2:
len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr));
len += snprintf(page + len, count - len, "usb_read16(0x%x)=0x%x\n", proc_get_read_addr, usb_read16(padapter, proc_get_read_addr));
break;
case 4:
len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr));
len += snprintf(page + len, count - len, "usb_read32(0x%x)=0x%x\n", proc_get_read_addr, usb_read32(padapter, proc_get_read_addr));
break;
default:
len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len);
@ -233,7 +233,7 @@ int proc_get_rf_info(char *page, char **start,
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
int len = 0;
len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n",
len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offset=%d\n",
pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset);
*eof = 1;
return len;
@ -327,7 +327,7 @@ int proc_get_mac_reg_dump1(char *page, char **start,
for (i = 0x0; i < 0x300; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
@ -350,7 +350,7 @@ int proc_get_mac_reg_dump2(char *page, char **start,
for (i = 0x300; i < 0x600; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
@ -373,7 +373,7 @@ int proc_get_mac_reg_dump3(char *page, char **start,
for (i = 0x600; i < 0x800; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
@ -395,7 +395,7 @@ int proc_get_bb_reg_dump1(char *page, char **start,
for (i = 0x800; i < 0xB00; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
@ -416,7 +416,7 @@ int proc_get_bb_reg_dump2(char *page, char **start,
for (i = 0xB00; i < 0xE00; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
@ -437,7 +437,7 @@ int proc_get_bb_reg_dump3(char *page, char **start,
for (i = 0xE00; i < 0x1000; i += 4) {
if (j%4 == 1)
len += snprintf(page + len, count - len, "0x%02x", i);
len += snprintf(page + len, count - len, " 0x%08x ", rtw_read32(padapter, i));
len += snprintf(page + len, count - len, " 0x%08x ", usb_read32(padapter, i));
if ((j++)%4 == 0)
len += snprintf(page + len, count - len, "\n");
}
@ -577,7 +577,7 @@ int proc_get_rx_signal(char *page, char **start,
int proc_set_rx_signal(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 is_signal_dbg;
@ -627,7 +627,7 @@ int proc_get_ht_enable(char *page, char **start,
int proc_set_ht_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
@ -669,7 +669,7 @@ int proc_get_cbw40_enable(char *page, char **start,
int proc_set_cbw40_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
@ -710,7 +710,7 @@ int proc_get_ampdu_enable(char *page, char **start,
int proc_set_ampdu_enable(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
@ -771,7 +771,7 @@ int proc_get_rx_stbc(char *page, char **start,
int proc_set_rx_stbc(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
struct registry_priv *pregpriv = &padapter->registrypriv;
char tmp[32];
@ -783,7 +783,7 @@ int proc_set_rx_stbc(struct file *file, const char __user *buffer,
if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) {
if (pregpriv) {
pregpriv->rx_stbc = mode;
printk("rx_stbc=%d\n", mode);
netdev_info(dev, "rx_stbc=%d\n", mode);
}
}
return count;
@ -800,7 +800,7 @@ int proc_get_rssi_disp(char *page, char **start,
int proc_set_rssi_disp(struct file *file, const char __user *buffer,
unsigned long count, void *data)
{
struct net_device *dev = (struct net_device *)data;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
char tmp[32];
u32 enable = 0;
@ -820,7 +820,7 @@ int proc_set_rssi_disp(struct file *file, const char __user *buffer,
if (enable) {
DBG_88E("Turn On Rx RSSI Display Function\n");
padapter->bRxRSSIDisplay = enable ;
padapter->bRxRSSIDisplay = enable;
} else {
DBG_88E("Turn Off Rx RSSI Display Function\n");
padapter->bRxRSSIDisplay = 0;
@ -835,7 +835,6 @@ int proc_get_all_sta_info(char *page, char **start,
off_t offset, int count,
int *eof, void *data)
{
unsigned long irqL;
struct sta_info *psta;
struct net_device *dev = data;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
@ -848,16 +847,16 @@ int proc_get_all_sta_info(char *page, char **start,
len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap);
_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
spin_lock_bh(&pstapriv->sta_hash_lock);
for (i = 0; i < NUM_STA; i++) {
phead = &(pstapriv->sta_hash[i]);
plist = get_next(phead);
plist = phead->next;
while ((rtw_end_of_queue_search(phead, plist)) == false) {
psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
while (phead != plist) {
psta = container_of(plist, struct sta_info, hash_list);
plist = get_next(plist);
plist = plist->next;
len += snprintf(page + len, count - len, "sta's macaddr: %pM\n", psta->hwaddr);
len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self);
@ -882,7 +881,7 @@ int proc_get_all_sta_info(char *page, char **start,
}
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
spin_unlock_bh(&pstapriv->sta_hash_lock);
*eof = 1;
return len;

1625
core/rtw_efuse.c
View file

File diff suppressed because it is too large Load diff

334
core/rtw_ieee80211.c
View file

@ -20,11 +20,11 @@
#define _IEEE80211_C
#include <drv_types.h>
#include <osdep_intf.h>
#include <ieee80211.h>
#include <wifi.h>
#include <osdep_service.h>
#include <wlan_bssdef.h>
#include <usb_osintf.h>
u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 };
u16 RTW_WPA_VERSION = 1;
@ -147,7 +147,6 @@ u8 *rtw_set_ie
uint *frlen /* frame length */
)
{
_func_enter_;
*pbuf = (u8)index;
*(pbuf + 1) = (u8)len;
@ -157,11 +156,10 @@ _func_enter_;
*frlen = *frlen + (len + 2);
_func_exit_;
return pbuf + len + 2;
}
inline u8 *rtw_set_ie_ch_switch (u8 *buf, u32 *buf_len, u8 ch_switch_mode,
inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode,
u8 new_ch, u8 ch_switch_cnt)
{
u8 ie_data[3];
@ -208,8 +206,8 @@ inline u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl,
ie_data[0] = ttl;
ie_data[1] = flags;
RTW_PUT_LE16((u8 *)&ie_data[2], reason);
RTW_PUT_LE16((u8 *)&ie_data[4], precedence);
*(u16 *)(ie_data+2) = cpu_to_le16(reason);
*(u16 *)(ie_data+4) = cpu_to_le16(precedence);
return rtw_set_ie(buf, 0x118, 6, ie_data, buf_len);
}
@ -221,11 +219,8 @@ u8 *rtw_get_ie(u8 *pbuf, int index, int *len, int limit)
{
int tmp, i;
u8 *p;
_func_enter_;
if (limit < 1) {
_func_exit_;
if (limit < 1)
return NULL;
}
p = pbuf;
i = 0;
@ -242,7 +237,6 @@ _func_enter_;
if (i >= limit)
break;
}
_func_exit_;
return NULL;
}
@ -273,7 +267,7 @@ u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, u
cnt = 0;
while (cnt < in_len) {
if (eid == in_ie[cnt] && (!oui || _rtw_memcmp(&in_ie[cnt+2], oui, oui_len))) {
if (eid == in_ie[cnt] && (!oui || !memcmp(&in_ie[cnt+2], oui, oui_len))) {
target_ie = &in_ie[cnt];
if (ie)
@ -339,9 +333,8 @@ exit:
void rtw_set_supported_rate(u8 *SupportedRates, uint mode)
{
_func_enter_;
_rtw_memset(SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
memset(SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX);
switch (mode) {
case WIRELESS_11B:
@ -361,13 +354,11 @@ _func_enter_;
memcpy(SupportedRates + IEEE80211_CCK_RATE_LEN, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN);
break;
}
_func_exit_;
}
uint rtw_get_rateset_len(u8 *rateset)
{
uint i = 0;
_func_enter_;
while (1) {
if ((rateset[i]) == 0)
break;
@ -375,7 +366,6 @@ _func_enter_;
break;
i++;
}
_func_exit_;
return i;
}
@ -386,7 +376,6 @@ int rtw_generate_ie(struct registry_priv *pregistrypriv)
struct wlan_bssid_ex *pdev_network = &pregistrypriv->dev_network;
u8 *ie = pdev_network->IEs;
_func_enter_;
/* timestamp will be inserted by hardware */
sz += 8;
@ -444,7 +433,6 @@ _func_enter_;
if (rateLen > 8)
ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz);
_func_exit_;
return sz;
}
@ -463,7 +451,7 @@ unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit)
if (pbuf) {
/* check if oui matches... */
if (_rtw_memcmp((pbuf + 2), wpa_oui_type, sizeof (wpa_oui_type)) == false)
if (!memcmp((pbuf + 2), wpa_oui_type, sizeof(wpa_oui_type)) == false)
goto check_next_ie;
/* check version... */
@ -497,15 +485,15 @@ unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit)
int rtw_get_wpa_cipher_suite(u8 *s)
{
if (_rtw_memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN) == true)
if (!memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN))
return WPA_CIPHER_NONE;
if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN) == true)
if (!memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN))
return WPA_CIPHER_WEP40;
if (_rtw_memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN) == true)
if (!memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN))
return WPA_CIPHER_TKIP;
if (_rtw_memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN) == true)
if (!memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN))
return WPA_CIPHER_CCMP;
if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN) == true)
if (!memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN))
return WPA_CIPHER_WEP104;
return 0;
@ -513,15 +501,15 @@ int rtw_get_wpa_cipher_suite(u8 *s)
int rtw_get_wpa2_cipher_suite(u8 *s)
{
if (_rtw_memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN) == true)
if (!memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN))
return WPA_CIPHER_NONE;
if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN) == true)
if (!memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN))
return WPA_CIPHER_WEP40;
if (_rtw_memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN) == true)
if (!memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN))
return WPA_CIPHER_TKIP;
if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN) == true)
if (!memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN))
return WPA_CIPHER_CCMP;
if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN) == true)
if (!memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN))
return WPA_CIPHER_WEP104;
return 0;
@ -542,7 +530,7 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis
if ((*wpa_ie != _WPA_IE_ID_) || (*(wpa_ie+1) != (u8)(wpa_ie_len - 2)) ||
(_rtw_memcmp(wpa_ie+2, RTW_WPA_OUI_TYPE, WPA_SELECTOR_LEN) != true))
(memcmp(wpa_ie+2, RTW_WPA_OUI_TYPE, WPA_SELECTOR_LEN)))
return _FAIL;
pos = wpa_ie;
@ -563,7 +551,7 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis
/* pairwise_cipher */
if (left >= 2) {
count = RTW_GET_LE16(pos);
count = get_unaligned_le16(pos);
pos += 2;
left -= 2;
@ -587,7 +575,7 @@ int rtw_parse_wpa_ie(u8 *wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwis
if (is_8021x) {
if (left >= 6) {
pos += 2;
if (_rtw_memcmp(pos, SUITE_1X, 4) == 1) {
if (!memcmp(pos, SUITE_1X, 4)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s : there has 802.1x auth\n", __func__));
*is_8021x = 1;
}
@ -631,7 +619,7 @@ int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwi
/* pairwise_cipher */
if (left >= 2) {
count = RTW_GET_LE16(pos);
count = get_unaligned_le16(pos);
pos += 2;
left -= 2;
@ -657,7 +645,7 @@ int rtw_parse_wpa2_ie(u8 *rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwi
if (is_8021x) {
if (left >= 6) {
pos += 2;
if (_rtw_memcmp(pos, SUITE_1X, 4) == 1) {
if (!memcmp(pos, SUITE_1X, 4)) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s (): there has 802.1x auth\n", __func__));
*is_8021x = 1;
}
@ -672,7 +660,6 @@ int rtw_get_sec_ie(u8 *in_ie, uint in_len, u8 *rsn_ie, u16 *rsn_len, u8 *wpa_ie,
u8 wpa_oui[4] = {0x0, 0x50, 0xf2, 0x01};
uint cnt;
_func_enter_;
/* Search required WPA or WPA2 IE and copy to sec_ie[] */
@ -683,7 +670,7 @@ _func_enter_;
while (cnt < in_len) {
authmode = in_ie[cnt];
if ((authmode == _WPA_IE_ID_) && (_rtw_memcmp(&in_ie[cnt+2], &wpa_oui[0], 4))) {
if ((authmode == _WPA_IE_ID_) && (!memcmp(&in_ie[cnt+2], &wpa_oui[0], 4))) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_,
("\n rtw_get_wpa_ie: sec_idx =%d in_ie[cnt+1]+2 =%d\n",
sec_idx, in_ie[cnt+1]+2));
@ -726,7 +713,6 @@ _func_enter_;
}
}
_func_exit_;
return *rsn_len + *wpa_len;
}
@ -741,7 +727,7 @@ u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen)
eid = ie_ptr[0];
if ((eid == _WPA_IE_ID_) && (_rtw_memcmp(&ie_ptr[2], wps_oui, 4))) {
if ((eid == _WPA_IE_ID_) && (!memcmp(&ie_ptr[2], wps_oui, 4))) {
*wps_ielen = ie_ptr[1]+2;
match = true;
}
@ -774,7 +760,7 @@ u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen)
while (cnt < in_len) {
eid = in_ie[cnt];
if ((eid == _WPA_IE_ID_) && (_rtw_memcmp(&in_ie[cnt+2], wps_oui, 4))) {
if ((eid == _WPA_IE_ID_) && (!memcmp(&in_ie[cnt+2], wps_oui, 4))) {
wpsie_ptr = &in_ie[cnt];
if (wps_ie)
@ -813,7 +799,7 @@ u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_at
*len_attr = 0;
if ((wps_ie[0] != _VENDOR_SPECIFIC_IE_) ||
(_rtw_memcmp(wps_ie + 2, wps_oui , 4) != true))
(memcmp(wps_ie + 2, wps_oui , 4)))
return attr_ptr;
/* 6 = 1(Element ID) + 1(Length) + 4(WPS OUI) */
@ -821,8 +807,8 @@ u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id , u8 *buf_at
while (attr_ptr - wps_ie < wps_ielen) {
/* 4 = 2(Attribute ID) + 2(Length) */
u16 attr_id = RTW_GET_BE16(attr_ptr);
u16 attr_data_len = RTW_GET_BE16(attr_ptr + 2);
u16 attr_id = get_unaligned_be16(attr_ptr);
u16 attr_data_len = get_unaligned_be16(attr_ptr + 2);
u16 attr_len = attr_data_len + 4;
if (attr_id == target_attr_id) {
@ -884,7 +870,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
if (elen < 4) {
if (show_errors) {
DBG_88E("short vendor specific information element ignored (len=%lu)\n",
(unsigned long) elen);
(unsigned long)elen);
}
return -1;
}
@ -904,7 +890,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */
if (elen < 5) {
DBG_88E("short WME information element ignored (len=%lu)\n",
(unsigned long) elen);
(unsigned long)elen);
return -1;
}
switch (pos[4]) {
@ -919,7 +905,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
break;
default:
DBG_88E("unknown WME information element ignored (subtype=%d len=%lu)\n",
pos[4], (unsigned long) elen);
pos[4], (unsigned long)elen);
return -1;
}
break;
@ -930,7 +916,7 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
break;
default:
DBG_88E("Unknown Microsoft information element ignored (type=%d len=%lu)\n",
pos[3], (unsigned long) elen);
pos[3], (unsigned long)elen);
return -1;
}
break;
@ -943,13 +929,13 @@ static int rtw_ieee802_11_parse_vendor_specific(u8 *pos, uint elen,
break;
default:
DBG_88E("Unknown Broadcom information element ignored (type=%d len=%lu)\n",
pos[3], (unsigned long) elen);
pos[3], (unsigned long)elen);
return -1;
}
break;
default:
DBG_88E("unknown vendor specific information element ignored (vendor OUI %02x:%02x:%02x len=%lu)\n",
pos[0], pos[1], pos[2], (unsigned long) elen);
pos[0], pos[1], pos[2], (unsigned long)elen);
return -1;
}
return 0;
@ -971,7 +957,7 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
u8 *pos = start;
int unknown = 0;
_rtw_memset(elems, 0, sizeof(*elems));
memset(elems, 0, sizeof(*elems));
while (left >= 2) {
u8 id, elen;
@ -983,7 +969,7 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
if (elen > left) {
if (show_errors) {
DBG_88E("IEEE 802.11 element parse failed (id=%d elen=%d left=%lu)\n",
id, elen, (unsigned long) left);
id, elen, (unsigned long)left);
}
return ParseFailed;
}
@ -1081,41 +1067,18 @@ enum parse_res rtw_ieee802_11_parse_elems(u8 *start, uint len,
return unknown ? ParseUnknown : ParseOK;
}
u8 key_char2num(u8 ch)
{
if ((ch >= '0') && (ch <= '9'))
return ch - '0';
else if ((ch >= 'a') && (ch <= 'f'))
return ch - 'a' + 10;
else if ((ch >= 'A') && (ch <= 'F'))
return ch - 'A' + 10;
else
return 0xff;
}
u8 str_2char2num(u8 hch, u8 lch)
{
return (key_char2num(hch) * 10) + key_char2num(lch);
}
u8 key_2char2num(u8 hch, u8 lch)
{
return (key_char2num(hch) << 4) | key_char2num(lch);
}
void rtw_macaddr_cfg(u8 *mac_addr)
{
u8 mac[ETH_ALEN];
if (mac_addr == NULL)
return;
if (rtw_initmac) { /* Users specify the mac address */
int jj, kk;
for (jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3)
mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk + 1]);
if (rtw_initmac && mac_pton(rtw_initmac, mac)) {
/* Users specify the mac address */
memcpy(mac_addr, mac, ETH_ALEN);
} else { /* Use the mac address stored in the Efuse */
} else {
/* Use the mac address stored in the Efuse */
memcpy(mac, mac_addr, ETH_ALEN);
}
@ -1129,7 +1092,7 @@ void rtw_macaddr_cfg(u8 *mac_addr)
mac[3] = 0x87;
mac[4] = 0x00;
mac[5] = 0x00;
/* use default mac addresss */
/* use default mac address */
memcpy(mac_addr, mac, ETH_ALEN);
DBG_88E("MAC Address from efuse error, assign default one !!!\n");
}
@ -1147,9 +1110,6 @@ void dump_ies(u8 *buf, u32 buf_len)
len = *(pos+1);
DBG_88E("%s ID:%u, LEN:%u\n", __func__, id, len);
#ifdef CONFIG_88EU_P2P
dump_p2p_ie(pos, len);
#endif
dump_wps_ie(pos, len);
pos += (2 + len);
@ -1170,217 +1130,13 @@ void dump_wps_ie(u8 *ie, u32 ie_len)
pos += 6;
while (pos-ie < ie_len) {
id = RTW_GET_BE16(pos);
len = RTW_GET_BE16(pos + 2);
id = get_unaligned_be16(pos);
len = get_unaligned_be16(pos + 2);
DBG_88E("%s ID:0x%04x, LEN:%u\n", __func__, id, len);
pos += (4+len);
}
}
#ifdef CONFIG_88EU_P2P
void dump_p2p_ie(u8 *ie, u32 ie_len)
{
u8 *pos = (u8 *)ie;
u8 id;
u16 len;
u8 *p2p_ie;
uint p2p_ielen;
p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen);
if (p2p_ie != ie || p2p_ielen == 0)
return;
pos += 6;
while (pos-ie < ie_len) {
id = *pos;
len = RTW_GET_LE16(pos+1);
DBG_88E("%s ID:%u, LEN:%u\n", __func__, id, len);
pos += (3+len);
}
}
/**
* rtw_get_p2p_ie - Search P2P IE from a series of IEs
* @in_ie: Address of IEs to search
* @in_len: Length limit from in_ie
* @p2p_ie: If not NULL and P2P IE is found, P2P IE will be copied to the buf starting from p2p_ie
* @p2p_ielen: If not NULL and P2P IE is found, will set to the length of the entire P2P IE
*
* Returns: The address of the P2P IE found, or NULL
*/
u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen)
{
uint cnt = 0;
u8 *p2p_ie_ptr;
u8 eid, p2p_oui[4] = {0x50, 0x6F, 0x9A, 0x09};
if (p2p_ielen != NULL)
*p2p_ielen = 0;
while (cnt < in_len) {
eid = in_ie[cnt];
if ((in_len < 0) || (cnt > MAX_IE_SZ)) {
dump_stack();
return NULL;
}
if ((eid == _VENDOR_SPECIFIC_IE_) && (_rtw_memcmp(&in_ie[cnt+2], p2p_oui, 4) == true)) {
p2p_ie_ptr = in_ie + cnt;
if (p2p_ie != NULL)
memcpy(p2p_ie, &in_ie[cnt], in_ie[cnt + 1] + 2);
if (p2p_ielen != NULL)
*p2p_ielen = in_ie[cnt + 1] + 2;
return p2p_ie_ptr;
} else {
cnt += in_ie[cnt + 1] + 2; /* goto next */
}
}
return NULL;
}
/**
* rtw_get_p2p_attr - Search a specific P2P attribute from a given P2P IE
* @p2p_ie: Address of P2P IE to search
* @p2p_ielen: Length limit from p2p_ie
* @target_attr_id: The attribute ID of P2P attribute to search
* @buf_attr: If not NULL and the P2P attribute is found, P2P attribute will be copied to the buf starting from buf_attr
* @len_attr: If not NULL and the P2P attribute is found, will set to the length of the entire P2P attribute
*
* Returns: the address of the specific WPS attribute found, or NULL
*/
u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id , u8 *buf_attr, u32 *len_attr)
{
u8 *attr_ptr = NULL;
u8 *target_attr_ptr = NULL;
u8 p2p_oui[4] = {0x50, 0x6F, 0x9A, 0x09};
if (len_attr)
*len_attr = 0;
if (!p2p_ie || (p2p_ie[0] != _VENDOR_SPECIFIC_IE_) ||
(_rtw_memcmp(p2p_ie + 2, p2p_oui , 4) != true))
return attr_ptr;
/* 6 = 1(Element ID) + 1(Length) + 3 (OUI) + 1(OUI Type) */
attr_ptr = p2p_ie + 6; /* goto first attr */
while (attr_ptr - p2p_ie < p2p_ielen) {
/* 3 = 1(Attribute ID) + 2(Length) */
u8 attr_id = *attr_ptr;
u16 attr_data_len = RTW_GET_LE16(attr_ptr + 1);
u16 attr_len = attr_data_len + 3;
if (attr_id == target_attr_id) {
target_attr_ptr = attr_ptr;
if (buf_attr)
memcpy(buf_attr, attr_ptr, attr_len);
if (len_attr)
*len_attr = attr_len;
break;
} else {
attr_ptr += attr_len; /* goto next */
}
}
return target_attr_ptr;
}
/**
* rtw_get_p2p_attr_content - Search a specific P2P attribute content from a given P2P IE
* @p2p_ie: Address of P2P IE to search
* @p2p_ielen: Length limit from p2p_ie
* @target_attr_id: The attribute ID of P2P attribute to search
* @buf_content: If not NULL and the P2P attribute is found, P2P attribute content will be copied to the buf starting from buf_content
* @len_content: If not NULL and the P2P attribute is found, will set to the length of the P2P attribute content
*
* Returns: the address of the specific P2P attribute content found, or NULL
*/
u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id , u8 *buf_content, uint *len_content)
{
u8 *attr_ptr;
u32 attr_len;
if (len_content)
*len_content = 0;
attr_ptr = rtw_get_p2p_attr(p2p_ie, p2p_ielen, target_attr_id, NULL, &attr_len);
if (attr_ptr && attr_len) {
if (buf_content)
memcpy(buf_content, attr_ptr+3, attr_len-3);
if (len_content)
*len_content = attr_len-3;
return attr_ptr+3;
}
return NULL;
}
u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr)
{
u32 a_len;
*pbuf = attr_id;
/* u16*)(pbuf + 1) = cpu_to_le16(attr_len); */
RTW_PUT_LE16(pbuf + 1, attr_len);
if (pdata_attr)
memcpy(pbuf + 3, pdata_attr, attr_len);
a_len = attr_len + 3;
return a_len;
}
static uint rtw_p2p_attr_remove(u8 *ie, uint ielen_ori, u8 attr_id)
{
u8 *target_attr;
u32 target_attr_len;
uint ielen = ielen_ori;
while (1) {
target_attr = rtw_get_p2p_attr(ie, ielen, attr_id, NULL, &target_attr_len);
if (target_attr && target_attr_len) {
u8 *next_attr = target_attr+target_attr_len;
uint remain_len = ielen-(next_attr-ie);
_rtw_memset(target_attr, 0, target_attr_len);
memcpy(target_attr, next_attr, remain_len);
_rtw_memset(target_attr+remain_len, 0, target_attr_len);
*(ie+1) -= target_attr_len;
ielen -= target_attr_len;
} else {
break;
}
}
return ielen;
}
void rtw_wlan_bssid_ex_remove_p2p_attr(struct wlan_bssid_ex *bss_ex, u8 attr_id)
{
u8 *p2p_ie;
uint p2p_ielen, p2p_ielen_ori;
p2p_ie = rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori);
if (p2p_ie) {
p2p_ielen = rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id);
if (p2p_ielen != p2p_ielen_ori) {
u8 *next_ie_ori = p2p_ie+p2p_ielen_ori;
u8 *next_ie = p2p_ie+p2p_ielen;
uint remain_len = bss_ex->IELength-(next_ie_ori-bss_ex->IEs);
memcpy(next_ie, next_ie_ori, remain_len);
_rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen);
bss_ex->IELength -= p2p_ielen_ori-p2p_ielen;
}
}
}
#endif /* CONFIG_88EU_P2P */
/* Baron adds to avoid FreeBSD warning */
int ieee80211_is_empty_essid(const char *essid, int essid_len)
{

329
core/rtw_io.c
View file

@ -1,329 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*
The purpose of rtw_io.c
a. provides the API
b. provides the protocol engine
c. provides the software interface between caller and the hardware interface
Compiler Flag Option:
USB:
a. USE_ASYNC_IRP: Both sync/async operations are provided.
Only sync read/rtw_write_mem operations are provided.
jackson@realtek.com.tw
*/
#define _RTW_IO_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtw_io.h>
#include <osdep_intf.h>
#include <usb_ops.h>
#define rtw_le16_to_cpu(val) le16_to_cpu(val)
#define rtw_le32_to_cpu(val) le32_to_cpu(val)
#define rtw_cpu_to_le16(val) cpu_to_le16(val)
#define rtw_cpu_to_le32(val) cpu_to_le32(val)
u8 _rtw_read8(struct adapter *adapter, u32 addr)
{
u8 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read8 = pintfhdl->io_ops._read8;
r_val = _read8(pintfhdl, addr);
_func_exit_;
return r_val;
}
u16 _rtw_read16(struct adapter *adapter, u32 addr)
{
u16 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read16 = pintfhdl->io_ops._read16;
r_val = _read16(pintfhdl, addr);
_func_exit_;
return r_val;
}
u32 _rtw_read32(struct adapter *adapter, u32 addr)
{
u32 r_val;
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
_func_enter_;
_read32 = pintfhdl->io_ops._read32;
r_val = _read32(pintfhdl, addr);
_func_exit_;
return r_val;
}
int _rtw_write8(struct adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_func_enter_;
_write8 = pintfhdl->io_ops._write8;
ret = _write8(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write16(struct adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_func_enter_;
_write16 = pintfhdl->io_ops._write16;
ret = _write16(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write32(struct adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_func_enter_;
_write32 = pintfhdl->io_ops._write32;
ret = _write32(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_writeN(struct adapter *adapter, u32 addr , u32 length , u8 *pdata)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf));
int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
int ret;
_func_enter_;
_writeN = pintfhdl->io_ops._writeN;
ret = _writeN(pintfhdl, addr, length, pdata);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
int ret;
_func_enter_;
_write8_async = pintfhdl->io_ops._write8_async;
ret = _write8_async(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
int ret;
_func_enter_;
_write16_async = pintfhdl->io_ops._write16_async;
ret = _write16_async(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val)
{
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
int ret;
_func_enter_;
_write32_async = pintfhdl->io_ops._write32_async;
ret = _write32_async(pintfhdl, addr, val);
_func_exit_;
return RTW_STATUS_CODE(ret);
}
void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_mem = pintfhdl->io_ops._read_mem;
_read_mem(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
_write_mem = pintfhdl->io_ops._write_mem;
_write_mem(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_func_enter_;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved) {
RT_TRACE(_module_rtl871x_io_c_, _drv_info_,
("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)",
adapter->bDriverStopped, adapter->bSurpriseRemoved));
return;
}
_read_port = pintfhdl->io_ops._read_port;
_read_port(pintfhdl, addr, cnt, pmem);
_func_exit_;
}
void _rtw_read_port_cancel(struct adapter *adapter)
{
void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
if (_read_port_cancel)
_read_port_cancel(pintfhdl);
}
u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
{
u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
u32 ret = _SUCCESS;
_func_enter_;
_write_port = pintfhdl->io_ops._write_port;
ret = _write_port(pintfhdl, addr, cnt, pmem);
_func_exit_;
return ret;
}
u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
{
int ret = _SUCCESS;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
struct submit_ctx sctx;
rtw_sctx_init(&sctx, timeout_ms);
pxmitbuf->sctx = &sctx;
ret = _rtw_write_port(adapter, addr, cnt, pmem);
if (ret == _SUCCESS)
ret = rtw_sctx_wait(&sctx);
return ret;
}
void _rtw_write_port_cancel(struct adapter *adapter)
{
void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
struct io_priv *pio_priv = &adapter->iopriv;
struct intf_hdl *pintfhdl = &(pio_priv->intf);
_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
if (_write_port_cancel)
_write_port_cancel(pintfhdl);
}
int rtw_init_io_priv(struct adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops))
{
struct io_priv *piopriv = &padapter->iopriv;
struct intf_hdl *pintf = &piopriv->intf;
if (set_intf_ops == NULL)
return _FAIL;
piopriv->padapter = padapter;
pintf->padapter = padapter;
pintf->pintf_dev = adapter_to_dvobj(padapter);
set_intf_ops(&pintf->io_ops);
return _SUCCESS;
}

567
core/rtw_ioctl_set.c
View file

@ -25,9 +25,6 @@
#include <rtw_ioctl_set.h>
#include <hal_intf.h>
#include <usb_osintf.h>
#include <usb_ops.h>
extern void indicate_wx_scan_complete_event(struct adapter *padapter);
#define IS_MAC_ADDRESS_BROADCAST(addr) \
@ -37,49 +34,18 @@ extern void indicate_wx_scan_complete_event(struct adapter *padapter);
(addr[4] == 0xff) && (addr[5] == 0xff)) ? true : false \
)
u8 rtw_validate_ssid(struct ndis_802_11_ssid *ssid)
{
u8 i;
u8 ret = true;
_func_enter_;
if (ssid->SsidLength > 32) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid length >32\n"));
ret = false;
goto exit;
}
for (i = 0; i < ssid->SsidLength; i++) {
/* wifi, printable ascii code must be supported */
if (!((ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e))) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid has nonprintabl ascii\n"));
ret = false;
break;
}
}
exit:
_func_exit_;
return ret;
}
u8 rtw_do_join(struct adapter *padapter)
{
unsigned long irqL;
struct list_head *plist, *phead;
u8 *pibss = NULL;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct __queue *queue = &(pmlmepriv->scanned_queue);
u8 ret = _SUCCESS;
_func_enter_;
_enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
spin_lock_bh(&(pmlmepriv->scanned_queue.lock));
phead = get_list_head(queue);
plist = get_next(phead);
plist = phead->next;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("\n rtw_do_join: phead = %p; plist = %p\n\n\n", phead, plist));
@ -91,8 +57,8 @@ _func_enter_;
pmlmepriv->to_join = true;
if (_rtw_queue_empty(queue)) {
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
if (list_empty(&queue->queue)) {
spin_unlock_bh(&(pmlmepriv->scanned_queue.lock));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
/* when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty */
@ -116,7 +82,7 @@ _func_enter_;
} else {
int select_ret;
_exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL);
spin_unlock_bh(&(pmlmepriv->scanned_queue.lock));
select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (select_ret == _SUCCESS) {
pmlmepriv->to_join = false;
@ -132,7 +98,6 @@ _func_enter_;
pibss = padapter->registrypriv.dev_network.MacAddress;
_rtw_memset(&pdev_network->Ssid, 0, sizeof(struct ndis_802_11_ssid));
memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(struct ndis_802_11_ssid));
rtw_update_registrypriv_dev_network(padapter);
@ -171,19 +136,16 @@ _func_enter_;
exit:
_func_exit_;
return ret;
}
u8 rtw_set_802_11_bssid(struct adapter *padapter, u8 *bssid)
{
unsigned long irqL;
u8 status = _SUCCESS;
u32 cur_time = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
_func_enter_;
DBG_88E_LEVEL(_drv_info_, "set bssid:%pM\n", bssid);
@ -195,7 +157,7 @@ _func_enter_;
goto exit;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
spin_lock_bh(&pmlmepriv->lock);
DBG_88E("Set BSSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv));
@ -207,7 +169,7 @@ _func_enter_;
if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_bssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN)) {
if (!memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN)) {
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == false)
goto release_mlme_lock;/* it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. */
} else {
@ -233,7 +195,7 @@ handle_tkip_countermeasure:
/* should we add something here...? */
if (padapter->securitypriv.btkip_countermeasure) {
cur_time = rtw_get_current_time();
cur_time = jiffies;
if ((cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ) {
padapter->securitypriv.btkip_countermeasure = false;
@ -253,27 +215,24 @@ handle_tkip_countermeasure:
status = rtw_do_join(padapter);
release_mlme_lock:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
spin_unlock_bh(&pmlmepriv->lock);
exit:
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("rtw_set_802_11_bssid: status=%d\n", status));
_func_exit_;
return status;
}
u8 rtw_set_802_11_ssid(struct adapter *padapter, struct ndis_802_11_ssid *ssid)
{
unsigned long irqL;
u8 status = _SUCCESS;
u32 cur_time = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *pnetwork = &pmlmepriv->cur_network;
_func_enter_;
DBG_88E_LEVEL(_drv_info_, "set ssid [%s] fw_state=0x%08x\n",
ssid->Ssid, get_fwstate(pmlmepriv));
@ -285,21 +244,20 @@ _func_enter_;
goto exit;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
spin_lock_bh(&pmlmepriv->lock);
DBG_88E("Set SSID under fw_state = 0x%08x\n", get_fwstate(pmlmepriv));
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
goto handle_tkip_countermeasure;
} else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true) {
else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true)
goto release_mlme_lock;
}
if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n"));
if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) &&
(_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength))) {
(!memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength))) {
if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == false)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("Set SSID is the same ssid, fw_state = 0x%08x\n",
@ -346,7 +304,7 @@ _func_enter_;
handle_tkip_countermeasure:
if (padapter->securitypriv.btkip_countermeasure) {
cur_time = rtw_get_current_time();
cur_time = jiffies;
if ((cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ) {
padapter->securitypriv.btkip_countermeasure = false;
@ -360,38 +318,34 @@ handle_tkip_countermeasure:
memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(struct ndis_802_11_ssid));
pmlmepriv->assoc_by_bssid = false;
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true)
pmlmepriv->to_join = true;
} else {
else
status = rtw_do_join(padapter);
}
release_mlme_lock:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
spin_unlock_bh(&pmlmepriv->lock);
exit:
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("-rtw_set_802_11_ssid: status =%d\n", status));
_func_exit_;
return status;
}
u8 rtw_set_802_11_infrastructure_mode(struct adapter *padapter,
enum ndis_802_11_network_infra networktype)
{
unsigned long irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *cur_network = &pmlmepriv->cur_network;
enum ndis_802_11_network_infra *pold_state = &(cur_network->network.InfrastructureMode);
_func_enter_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_,
("+rtw_set_802_11_infrastructure_mode: old =%d new =%d fw_state = 0x%08x\n",
*pold_state, networktype, get_fwstate(pmlmepriv)));
if (*pold_state != networktype) {
_enter_critical_bh(&pmlmepriv->lock, &irqL);
spin_lock_bh(&pmlmepriv->lock);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, (" change mode!"));
/* DBG_88E("change mode, old_mode =%d, new_mode =%d, fw_state = 0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); */
@ -415,7 +369,7 @@ _func_enter_;
if ((*pold_state == Ndis802_11Infrastructure) || (*pold_state == Ndis802_11IBSS)) {
if (check_fwstate(pmlmepriv, _FW_LINKED) == true)
rtw_indicate_disconnect(padapter); /* will clr Linked_state; before this function, we must have chked whether issue dis-assoc_cmd or not */
rtw_indicate_disconnect(padapter); /* will clr Linked_state; before this function, we must have checked whether issue dis-assoc_cmd or not */
}
*pold_state = networktype;
@ -439,10 +393,9 @@ _func_enter_;
case Ndis802_11InfrastructureMax:
break;
}
_exit_critical_bh(&pmlmepriv->lock, &irqL);
spin_unlock_bh(&pmlmepriv->lock);
}
_func_exit_;
return true;
}
@ -450,12 +403,10 @@ _func_exit_;
u8 rtw_set_802_11_disassociate(struct adapter *padapter)
{
unsigned long irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
_func_enter_;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
@ -467,20 +418,17 @@ _func_enter_;
rtw_pwr_wakeup(padapter);
}
_exit_critical_bh(&pmlmepriv->lock, &irqL);
spin_unlock_bh(&pmlmepriv->lock);
_func_exit_;
return true;
}
u8 rtw_set_802_11_bssid_list_scan(struct adapter *padapter, struct ndis_802_11_ssid *pssid, int ssid_max_num)
{
unsigned long irqL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
u8 res = true;
_func_enter_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("+rtw_set_802_11_bssid_list_scan(), fw_state =%x\n", get_fwstate(pmlmepriv)));
@ -500,11 +448,12 @@ _func_enter_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("rtw_set_802_11_bssid_list_scan fail since fw_state = %x\n", get_fwstate(pmlmepriv)));
res = true;
if (check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING)) == true) {
if (check_fwstate(pmlmepriv,
(_FW_UNDER_SURVEY|_FW_UNDER_LINKING)) == true)
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n\n"));
} else {
else
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n###pmlmepriv->sitesurveyctrl.traffic_busy == true\n\n"));
}
} else {
if (rtw_is_scan_deny(padapter)) {
DBG_88E(FUNC_ADPT_FMT": scan deny\n", FUNC_ADPT_ARG(padapter));
@ -512,15 +461,14 @@ _func_enter_;
return _SUCCESS;
}
_enter_critical_bh(&pmlmepriv->lock, &irqL);
spin_lock_bh(&pmlmepriv->lock);
res = rtw_sitesurvey_cmd(padapter, pssid, ssid_max_num, NULL, 0);
_exit_critical_bh(&pmlmepriv->lock, &irqL);
spin_unlock_bh(&pmlmepriv->lock);
}
exit:
_func_exit_;
return res;
}
@ -531,7 +479,6 @@ u8 rtw_set_802_11_authentication_mode(struct adapter *padapter, enum ndis_802_11
int res;
u8 ret;
_func_enter_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_802_11_auth.mode(): mode =%x\n", authmode));
@ -551,7 +498,6 @@ _func_enter_;
else
ret = false;
_func_exit_;
return ret;
}
@ -562,7 +508,6 @@ u8 rtw_set_802_11_add_wep(struct adapter *padapter, struct ndis_802_11_wep *wep)
struct security_priv *psecuritypriv = &(padapter->securitypriv);
u8 ret = _SUCCESS;
_func_enter_;
keyid = wep->KeyIndex & 0x3fffffff;
@ -587,7 +532,7 @@ _func_enter_;
break;
}
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("rtw_set_802_11_add_wep:befor memcpy, wep->KeyLength = 0x%x wep->KeyIndex = 0x%x keyid =%x\n",
("rtw_set_802_11_add_wep:before memcpy, wep->KeyLength = 0x%x wep->KeyIndex = 0x%x keyid =%x\n",
wep->KeyLength, wep->KeyIndex, keyid));
memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]), &(wep->KeyMaterial), wep->KeyLength);
@ -617,428 +562,6 @@ _func_enter_;
if (res == _FAIL)
ret = false;
exit:
_func_exit_;
return ret;
}
u8 rtw_set_802_11_remove_wep(struct adapter *padapter, u32 keyindex)
{
u8 ret = _SUCCESS;
_func_enter_;
if (keyindex >= 0x80000000 || padapter == NULL) {
ret = false;
goto exit;
} else {
int res;
struct security_priv *psecuritypriv = &(padapter->securitypriv);
if (keyindex < 4) {
_rtw_memset(&psecuritypriv->dot11DefKey[keyindex], 0, 16);
res = rtw_set_key(padapter, psecuritypriv, keyindex, 0);
psecuritypriv->dot11DefKeylen[keyindex] = 0;
if (res == _FAIL)
ret = _FAIL;
} else {
ret = _FAIL;
}
}
exit:
_func_exit_;
return ret;
}
u8 rtw_set_802_11_add_key(struct adapter *padapter, struct ndis_802_11_key *key)
{
uint encryptionalgo;
u8 *pbssid;
struct sta_info *stainfo;
u8 bgroup = false;
u8 bgrouptkey = false;/* can be removed later */
u8 ret = _SUCCESS;
_func_enter_;
if (((key->KeyIndex & 0x80000000) == 0) && ((key->KeyIndex & 0x40000000) > 0)) {
/* It is invalid to clear bit 31 and set bit 30. If the miniport driver encounters this combination, */
/* it must fail the request and return NDIS_STATUS_INVALID_DATA. */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("rtw_set_802_11_add_key: ((key->KeyIndex & 0x80000000)==0)[=%d]",
(int)(key->KeyIndex & 0x80000000) == 0));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("rtw_set_802_11_add_key:((key->KeyIndex & 0x40000000)>0)[=%d]",
(int)(key->KeyIndex & 0x40000000) > 0));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_,
("rtw_set_802_11_add_key: key->KeyIndex=%d\n",
(int)key->KeyIndex));
ret = _FAIL;
goto exit;
}
if (key->KeyIndex & 0x40000000) {
/* Pairwise key */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("OID_802_11_ADD_KEY: +++++ Pairwise key +++++\n"));
pbssid = get_bssid(&padapter->mlmepriv);
stainfo = rtw_get_stainfo(&padapter->stapriv, pbssid);
if ((stainfo != NULL) && (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("OID_802_11_ADD_KEY:(stainfo!=NULL)&&(Adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)\n"));
encryptionalgo = stainfo->dot118021XPrivacy;
} else {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("OID_802_11_ADD_KEY: stainfo == NULL)||(Adapter->securitypriv.dot11AuthAlgrthm!= dot11AuthAlgrthm_8021X)\n"));
encryptionalgo = padapter->securitypriv.dot11PrivacyAlgrthm;
}
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("rtw_set_802_11_add_key: (encryptionalgo==%d)!\n",
encryptionalgo));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11PrivacyAlgrthm==%d)!\n",
padapter->securitypriv.dot11PrivacyAlgrthm));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11AuthAlgrthm==%d)!\n",
padapter->securitypriv.dot11AuthAlgrthm));
if ((stainfo != NULL))
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("rtw_set_802_11_add_key: (stainfo->dot118021XPrivacy==%d)!\n",
stainfo->dot118021XPrivacy));
if (key->KeyIndex & 0x000000FF) {
/* The key index is specified in the lower 8 bits by values of zero to 255. */
/* The key index should be set to zero for a Pairwise key, and the driver should fail with */
/* NDIS_STATUS_INVALID_DATA if the lower 8 bits is not zero */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, (" key->KeyIndex & 0x000000FF.\n"));
ret = _FAIL;
goto exit;
}
/* check BSSID */
if (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == true) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("MacAddr_isBcst(key->BSSID)\n"));
ret = false;
goto exit;
}
/* Check key length for TKIP. */
if ((encryptionalgo == _TKIP_) && (key->KeyLength != 32)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("TKIP KeyLength:0x%x != 32\n", key->KeyLength));
ret = _FAIL;
goto exit;
}
/* Check key length for AES. */
if ((encryptionalgo == _AES_) && (key->KeyLength != 16)) {
/* For our supplicant, EAPPkt9x.vxd, cannot differentiate TKIP and AES case. */
if (key->KeyLength == 32) {
key->KeyLength = 16;
} else {
ret = _FAIL;
goto exit;
}
}
/* Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. */
if ((encryptionalgo == _WEP40_ || encryptionalgo == _WEP104_) &&
(key->KeyLength != 5 && key->KeyLength != 13)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("WEP KeyLength:0x%x != 5 or 13\n", key->KeyLength));
ret = _FAIL;
goto exit;
}
bgroup = false;
/* Check the pairwise key. Added by Annie, 2005-07-06. */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("------------------------------------------\n"));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("[Pairwise Key set]\n"));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("------------------------------------------\n"));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("key index: 0x%8x(0x%8x)\n", key->KeyIndex, (key->KeyIndex&0x3)));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("key Length: %d\n", key->KeyLength));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("------------------------------------------\n"));
} else {
/* Group key - KeyIndex(BIT30 == 0) */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("OID_802_11_ADD_KEY: +++++ Group key +++++\n"));
/* when add wep key through add key and didn't assigned encryption type before */
if ((padapter->securitypriv.ndisauthtype <= 3) &&
(padapter->securitypriv.dot118021XGrpPrivacy == 0)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("keylen =%d(Adapter->securitypriv.dot11PrivacyAlgrthm=%x )padapter->securitypriv.dot118021XGrpPrivacy(%x)\n",
key->KeyLength, padapter->securitypriv.dot11PrivacyAlgrthm,
padapter->securitypriv.dot118021XGrpPrivacy));
switch (key->KeyLength) {
case 5:
padapter->securitypriv.dot11PrivacyAlgrthm = _WEP40_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("Adapter->securitypriv.dot11PrivacyAlgrthm=%x key->KeyLength=%u\n",
padapter->securitypriv.dot11PrivacyAlgrthm, key->KeyLength));
break;
case 13:
padapter->securitypriv.dot11PrivacyAlgrthm = _WEP104_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("Adapter->securitypriv.dot11PrivacyAlgrthm=%x key->KeyLength=%u\n",
padapter->securitypriv.dot11PrivacyAlgrthm, key->KeyLength));
break;
default:
padapter->securitypriv.dot11PrivacyAlgrthm = _NO_PRIVACY_;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("Adapter->securitypriv.dot11PrivacyAlgrthm=%x key->KeyLength=%u\n",
padapter->securitypriv.dot11PrivacyAlgrthm, key->KeyLength));
break;
}
encryptionalgo = padapter->securitypriv.dot11PrivacyAlgrthm;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
(" Adapter->securitypriv.dot11PrivacyAlgrthm=%x\n",
padapter->securitypriv.dot11PrivacyAlgrthm));
} else {
encryptionalgo = padapter->securitypriv.dot118021XGrpPrivacy;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("(Adapter->securitypriv.dot11PrivacyAlgrthm=%x)encryptionalgo(%x)=padapter->securitypriv.dot118021XGrpPrivacy(%x)keylen=%d\n",
padapter->securitypriv.dot11PrivacyAlgrthm, encryptionalgo,
padapter->securitypriv.dot118021XGrpPrivacy, key->KeyLength));
}
if ((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE) == true) && (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == false)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
(" IBSS but BSSID is not Broadcast Address.\n"));
ret = _FAIL;
goto exit;
}
/* Check key length for TKIP */
if ((encryptionalgo == _TKIP_) && (key->KeyLength != 32)) {
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
(" TKIP GTK KeyLength:%u != 32\n", key->KeyLength));
ret = _FAIL;
goto exit;
} else if (encryptionalgo == _AES_ && (key->KeyLength != 16 && key->KeyLength != 32)) {
/* Check key length for AES */
/* For NDTEST, we allow keylen = 32 in this case. 2005.01.27, by rcnjko. */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("<=== SetInfo, OID_802_11_ADD_KEY: AES GTK KeyLength:%u != 16 or 32\n",
key->KeyLength));
ret = _FAIL;
goto exit;
}
/* Change the key length for EAPPkt9x.vxd. Added by Annie, 2005-11-03. */
if ((encryptionalgo == _AES_) && (key->KeyLength == 32)) {
key->KeyLength = 16;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("AES key length changed: %u\n", key->KeyLength));
}
if (key->KeyIndex & 0x8000000) {/* error ??? 0x8000_0000 */
bgrouptkey = true;
}
if ((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)) &&
(check_fwstate(&padapter->mlmepriv, _FW_LINKED)))
bgrouptkey = true;
bgroup = true;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("------------------------------------------\n"));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("[Group Key set]\n"));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("------------------------------------------\n")) ;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("key index: 0x%8x(0x%8x)\n", key->KeyIndex, (key->KeyIndex&0x3)));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("key Length: %d\n", key->KeyLength)) ;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("------------------------------------------\n"));
}
/* If WEP encryption algorithm, just call rtw_set_802_11_add_wep(). */
if ((padapter->securitypriv.dot11AuthAlgrthm != dot11AuthAlgrthm_8021X) &&
(encryptionalgo == _WEP40_ || encryptionalgo == _WEP104_)) {
u32 keyindex;
u32 len = FIELD_OFFSET(struct ndis_802_11_key, KeyMaterial) + key->KeyLength;
struct ndis_802_11_wep *wep = &padapter->securitypriv.ndiswep;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("OID_802_11_ADD_KEY: +++++ WEP key +++++\n"));
wep->Length = len;
keyindex = key->KeyIndex&0x7fffffff;
wep->KeyIndex = keyindex ;
wep->KeyLength = key->KeyLength;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("OID_802_11_ADD_KEY:Before memcpy\n"));
memcpy(wep->KeyMaterial, key->KeyMaterial, key->KeyLength);
memcpy(&(padapter->securitypriv.dot11DefKey[keyindex].skey[0]), key->KeyMaterial, key->KeyLength);
padapter->securitypriv.dot11DefKeylen[keyindex] = key->KeyLength;
padapter->securitypriv.dot11PrivacyKeyIndex = keyindex;
ret = rtw_set_802_11_add_wep(padapter, wep);
goto exit;
}
if (key->KeyIndex & 0x20000000) {
/* SetRSC */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("OID_802_11_ADD_KEY: +++++ SetRSC+++++\n"));
if (bgroup) {
unsigned long long keysrc = key->KeyRSC & 0x00FFFFFFFFFFFFULL;
memcpy(&padapter->securitypriv.dot11Grprxpn, &keysrc, 8);
} else {
unsigned long long keysrc = key->KeyRSC & 0x00FFFFFFFFFFFFULL;
memcpy(&padapter->securitypriv.dot11Grptxpn, &keysrc, 8);
}
}
/* Indicate this key idx is used for TX */
/* Save the key in KeyMaterial */
if (bgroup) { /* Group transmit key */
int res;
if (bgrouptkey)
padapter->securitypriv.dot118021XGrpKeyid = (u8)key->KeyIndex;
if ((key->KeyIndex&0x3) == 0) {
ret = _FAIL;
goto exit;
}
_rtw_memset(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
_rtw_memset(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
_rtw_memset(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16);
if ((key->KeyIndex & 0x10000000)) {
memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8);
memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7]));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n"));
} else {
memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8);
memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n",
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],
padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7]));
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_,
("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n"));
}
/* set group key by index */
memcpy(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial, key->KeyLength);
key->KeyIndex = key->KeyIndex & 0x03;
padapter->securitypriv.binstallGrpkey = true;
padapter->securitypriv.bcheck_grpkey = false;
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("reset group key"));
res = rtw_set_key(padapter, &padapter->securitypriv, key->KeyIndex, 1);
if (res == _FAIL)
ret = _FAIL;
goto exit;
} else { /* Pairwise Key */
u8 res;
pbssid = get_bssid(&padapter->mlmepriv);
stainfo = rtw_get_stainfo(&padapter->stapriv, pbssid);
if (stainfo != NULL) {
_rtw_memset(&stainfo->dot118021x_UncstKey, 0, 16);/* clear keybuffer */
memcpy(&stainfo->dot118021x_UncstKey, key->KeyMaterial, 16);
if (encryptionalgo == _TKIP_) {
padapter->securitypriv.busetkipkey = false;
/* _set_timer(&padapter->securitypriv.tkip_timer, 50); */
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n========== _set_timer\n"));
/* if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255] */
if ((key->KeyIndex & 0x10000000)) {
memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8);
memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 24, 8);
} else {
memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 24, 8);
memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 16, 8);
}
}
/* Set key to CAM through H2C command */
if (bgrouptkey) { /* never go to here */
res = rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, false);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n"));
} else {
res = rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, true);
RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n"));
}
if (!res)
ret = _FAIL;
}
}
exit:
_func_exit_;
return ret;
}
u8 rtw_set_802_11_remove_key(struct adapter *padapter, struct ndis_802_11_remove_key *key)
{
u8 *pbssid;
struct sta_info *stainfo;
u8 bgroup = (key->KeyIndex & 0x4000000) > 0 ? false : true;
u8 keyIndex = (u8)key->KeyIndex & 0x03;
u8 ret = _SUCCESS;
_func_enter_;
if ((key->KeyIndex & 0xbffffffc) > 0) {
ret = _FAIL;
goto exit;
}
if (bgroup) {
/* clear group key by index */
_rtw_memset(&padapter->securitypriv.dot118021XGrpKey[keyIndex], 0, 16);
/* \todo Send a H2C Command to Firmware for removing this Key in CAM Entry. */
} else {
pbssid = get_bssid(&padapter->mlmepriv);
stainfo = rtw_get_stainfo(&padapter->stapriv, pbssid);
if (stainfo) {
/* clear key by BSSID */
_rtw_memset(&stainfo->dot118021x_UncstKey, 0, 16);
/* \todo Send a H2C Command to Firmware for disable this Key in CAM Entry. */
} else {
ret = _FAIL;
goto exit;
}
}
exit:
_func_exit_;
return ret;
}
@ -1109,36 +632,6 @@ u16 rtw_get_cur_max_rate(struct adapter *adapter)
return max_rate;
}
/*
* rtw_set_scan_mode -
* @adapter: pointer to struct adapter structure
* @scan_mode:
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_scan_mode(struct adapter *adapter, enum rt_scan_type scan_mode)
{
if (scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE)
return _FAIL;
adapter->mlmepriv.scan_mode = scan_mode;
return _SUCCESS;
}
/*
* rtw_set_channel_plan -
* @adapter: pointer to struct adapter structure
* @channel_plan:
*
* Return _SUCCESS or _FAIL
*/
int rtw_set_channel_plan(struct adapter *adapter, u8 channel_plan)
{
/* handle by cmd_thread to sync with scan operation */
return rtw_set_chplan_cmd(adapter, channel_plan, 1);
}
/*
* rtw_set_country -
* @adapter: pointer to struct adapter structure
@ -1165,5 +658,5 @@ int rtw_set_country(struct adapter *adapter, const char *country_code)
else
DBG_88E("%s unknown country_code:%s\n", __func__, country_code);
return rtw_set_channel_plan(adapter, channel_plan);
return rtw_set_chplan_cmd(adapter, channel_plan, 1);
}

178
core/rtw_iol.c
View file

@ -20,65 +20,6 @@
#include<rtw_iol.h>
struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter)
{
struct xmit_frame *xmit_frame;
struct xmit_buf *xmitbuf;
struct pkt_attrib *pattrib;
struct xmit_priv *pxmitpriv = &(adapter->xmitpriv);
xmit_frame = rtw_alloc_xmitframe(pxmitpriv);
if (xmit_frame == NULL) {
DBG_88E("%s rtw_alloc_xmitframe return null\n", __func__);
goto exit;
}
xmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (xmitbuf == NULL) {
DBG_88E("%s rtw_alloc_xmitbuf return null\n", __func__);
rtw_free_xmitframe(pxmitpriv, xmit_frame);
xmit_frame = NULL;
goto exit;
}
xmit_frame->frame_tag = MGNT_FRAMETAG;
xmit_frame->pxmitbuf = xmitbuf;
xmit_frame->buf_addr = xmitbuf->pbuf;
xmitbuf->priv_data = xmit_frame;
pattrib = &xmit_frame->attrib;
update_mgntframe_attrib(adapter, pattrib);
pattrib->qsel = 0x10;/* Beacon */
pattrib->subtype = WIFI_BEACON;
pattrib->pktlen = 0;
pattrib->last_txcmdsz = 0;
exit:
return xmit_frame;
}
int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len)
{
struct pkt_attrib *pattrib = &xmit_frame->attrib;
u16 buf_offset;
u32 ori_len;
buf_offset = TXDESC_OFFSET;
ori_len = buf_offset+pattrib->pktlen;
/* check if the io_buf can accommodate new cmds */
if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
DBG_88E("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n",
__func__ , ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
return _FAIL;
}
memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
pattrib->pktlen += cmd_len;
pattrib->last_txcmdsz += cmd_len;
return _SUCCESS;
}
bool rtw_IOL_applied(struct adapter *adapter)
{
if (1 == adapter->registrypriv.fw_iol)
@ -88,122 +29,3 @@ bool rtw_IOL_applied(struct adapter *adapter)
return true;
return false;
}
int rtw_IOL_exec_cmds_sync(struct adapter *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
{
return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms, bndy_cnt);
}
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
{
return _SUCCESS;
}
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16(addr);
cmd.data = cpu_to_le32(value);
if (mask != 0xFF) {
cmd.length = 12;
cmd.mask = cpu_to_le32(mask);
}
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WW_REG, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16(addr);
cmd.data = cpu_to_le32(value);
if (mask != 0xFFFF) {
cmd.length = 12;
cmd.mask = cpu_to_le32(mask);
}
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_WD_REG, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16(addr);
cmd.data = cpu_to_le32(value);
if (mask != 0xFFFFFFFF) {
cmd.length = 12;
cmd.mask = cpu_to_le32(mask);
}
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask)
{
struct ioreg_cfg cmd = {8, IOREG_CMD_W_RF, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16((rf_path<<8) | ((addr) & 0xFF));
cmd.data = cpu_to_le32(value);
if (mask != 0x000FFFFF) {
cmd.length = 12;
cmd.mask = cpu_to_le32(mask);
}
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
}
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
{
struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16(us);
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
}
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
{
struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0};
cmd.address = cpu_to_le16(ms);
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
}
int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
{
struct ioreg_cfg cmd = {4, IOREG_CMD_END, cpu_to_le16(0xFFFF), cpu_to_le32(0xFF), 0x0};
return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
}
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame)
{
u8 is_cmd_bndy = false;
if (((pxmit_frame->attrib.pktlen+32)%256) + 8 >= 256) {
rtw_IOL_append_END_cmd(pxmit_frame);
pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen+32)/256)+1)*256);
pxmit_frame->attrib.last_txcmdsz = pxmit_frame->attrib.pktlen;
is_cmd_bndy = true;
}
return is_cmd_bndy;
}
void rtw_IOL_cmd_buf_dump(struct adapter *Adapter, int buf_len, u8 *pbuf)
{
int i;
int j = 1;
pr_info("###### %s ######\n", __func__);
for (i = 0; i < buf_len; i++) {
printk("%02x-", *(pbuf+i));
if (j%32 == 0)
printk("\n");
j++;
}
printk("\n");
pr_info("=============ioreg_cmd len=%d===============\n", buf_len);
}

1275
core/rtw_led.c
View file

File diff suppressed because it is too large Load diff

702
core/rtw_mlme.c
View file

File diff suppressed because it is too large Load diff

3610
core/rtw_mlme_ext.c
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File diff suppressed because it is too large Load diff

997
core/rtw_mp.c
View file

@ -1,997 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
*published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTW_MP_C_
#include <drv_types.h>
#include "odm_precomp.h"
#include "rtl8188e_hal.h"
u32 read_macreg(struct adapter *padapter, u32 addr, u32 sz)
{
u32 val = 0;
switch (sz) {
case 1:
val = rtw_read8(padapter, addr);
break;
case 2:
val = rtw_read16(padapter, addr);
break;
case 4:
val = rtw_read32(padapter, addr);
break;
default:
val = 0xffffffff;
break;
}
return val;
}
void write_macreg(struct adapter *padapter, u32 addr, u32 val, u32 sz)
{
switch (sz) {
case 1:
rtw_write8(padapter, addr, (u8)val);
break;
case 2:
rtw_write16(padapter, addr, (u16)val);
break;
case 4:
rtw_write32(padapter, addr, val);
break;
default:
break;
}
}
u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask)
{
return rtw_hal_read_bbreg(padapter, addr, bitmask);
}
void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val)
{
rtw_hal_write_bbreg(padapter, addr, bitmask, val);
}
u32 _read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask)
{
return rtw_hal_read_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bitmask);
}
void _write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val)
{
rtw_hal_write_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bitmask, val);
}
u32 read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr)
{
return _read_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bRFRegOffsetMask);
}
void write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 val)
{
_write_rfreg(padapter, (enum rf_radio_path)rfpath, addr, bRFRegOffsetMask, val);
}
static void _init_mp_priv_(struct mp_priv *pmp_priv)
{
struct wlan_bssid_ex *pnetwork;
_rtw_memset(pmp_priv, 0, sizeof(struct mp_priv));
pmp_priv->mode = MP_OFF;
pmp_priv->channel = 1;
pmp_priv->bandwidth = HT_CHANNEL_WIDTH_20;
pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
pmp_priv->rateidx = MPT_RATE_1M;
pmp_priv->txpoweridx = 0x2A;
pmp_priv->antenna_tx = ANTENNA_A;
pmp_priv->antenna_rx = ANTENNA_AB;
pmp_priv->check_mp_pkt = 0;
pmp_priv->tx_pktcount = 0;
pmp_priv->rx_pktcount = 0;
pmp_priv->rx_crcerrpktcount = 0;
pmp_priv->network_macaddr[0] = 0x00;
pmp_priv->network_macaddr[1] = 0xE0;
pmp_priv->network_macaddr[2] = 0x4C;
pmp_priv->network_macaddr[3] = 0x87;
pmp_priv->network_macaddr[4] = 0x66;
pmp_priv->network_macaddr[5] = 0x55;
pnetwork = &pmp_priv->mp_network.network;
memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN);
pnetwork->Ssid.SsidLength = 8;
memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength);
}
static void mp_init_xmit_attrib(struct mp_tx *pmptx, struct adapter *padapter)
{
struct pkt_attrib *pattrib;
struct tx_desc *desc;
/* init xmitframe attribute */
pattrib = &pmptx->attrib;
_rtw_memset(pattrib, 0, sizeof(struct pkt_attrib));
desc = &pmptx->desc;
_rtw_memset(desc, 0, TXDESC_SIZE);
pattrib->ether_type = 0x8712;
_rtw_memset(pattrib->dst, 0xFF, ETH_ALEN);
pattrib->ack_policy = 0;
pattrib->hdrlen = WLAN_HDR_A3_LEN;
pattrib->subtype = WIFI_DATA;
pattrib->priority = 0;
pattrib->qsel = pattrib->priority;
pattrib->nr_frags = 1;
pattrib->encrypt = 0;
pattrib->bswenc = false;
pattrib->qos_en = false;
}
s32 init_mp_priv(struct adapter *padapter)
{
struct mp_priv *pmppriv = &padapter->mppriv;
_init_mp_priv_(pmppriv);
pmppriv->papdater = padapter;
pmppriv->tx.stop = 1;
mp_init_xmit_attrib(&pmppriv->tx, padapter);
switch (padapter->registrypriv.rf_config) {
case RF_1T1R:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_A;
break;
case RF_1T2R:
default:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T2R:
case RF_2T2R_GREEN:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T4R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_ABCD;
break;
}
return _SUCCESS;
}
void free_mp_priv(struct mp_priv *pmp_priv)
{
kfree(pmp_priv->pallocated_mp_xmitframe_buf);
pmp_priv->pallocated_mp_xmitframe_buf = NULL;
pmp_priv->pmp_xmtframe_buf = NULL;
}
#define PHY_IQCalibrate(a, b) PHY_IQCalibrate_8188E(a, b)
#define PHY_LCCalibrate(a) PHY_LCCalibrate_8188E(a)
#define PHY_SetRFPathSwitch(a, b) PHY_SetRFPathSwitch_8188E(a, b)
s32 MPT_InitializeAdapter(struct adapter *pAdapter, u8 Channel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
s32 rtStatus = _SUCCESS;
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv;
/* HW Initialization for 8190 MPT. */
/* SW Initialization for 8190 MP. */
pMptCtx->bMptDrvUnload = false;
pMptCtx->bMassProdTest = false;
pMptCtx->bMptIndexEven = true; /* default gain index is -6.0db */
pMptCtx->h2cReqNum = 0x0;
/* Init mpt event. */
/* init for BT MP */
pMptCtx->bMptWorkItemInProgress = false;
pMptCtx->CurrMptAct = NULL;
/* */
/* Don't accept any packets */
rtw_write32(pAdapter, REG_RCR, 0);
PHY_IQCalibrate(pAdapter, false);
dm_CheckTXPowerTracking(&pHalData->odmpriv); /* trigger thermal meter */
PHY_LCCalibrate(pAdapter);
pMptCtx->backup0xc50 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0);
pMptCtx->backup0xc58 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0);
pMptCtx->backup0xc30 = (u8)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0);
pMptCtx->backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pMptCtx->backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
/* set ant to wifi side in mp mode */
rtw_write16(pAdapter, 0x870, 0x300);
rtw_write16(pAdapter, 0x860, 0x110);
if (pAdapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
return rtStatus;
}
/*-----------------------------------------------------------------------------
* Function: MPT_DeInitAdapter()
*
* Overview: Extra DeInitialization for Mass Production Test.
*
* Input: struct adapter * pAdapter
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 05/08/2007 MHC Create Version 0.
* 05/18/2007 MHC Add normal driver MPHalt code.
*
*---------------------------------------------------------------------------*/
void MPT_DeInitAdapter(struct adapter *pAdapter)
{
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
pMptCtx->bMptDrvUnload = true;
}
static u8 mpt_ProStartTest(struct adapter *padapter)
{
struct mpt_context *pMptCtx = &padapter->mppriv.MptCtx;
pMptCtx->bMassProdTest = true;
pMptCtx->bStartContTx = false;
pMptCtx->bCckContTx = false;
pMptCtx->bOfdmContTx = false;
pMptCtx->bSingleCarrier = false;
pMptCtx->bCarrierSuppression = false;
pMptCtx->bSingleTone = false;
return _SUCCESS;
}
/*
* General use
*/
s32 SetPowerTracking(struct adapter *padapter, u8 enable)
{
Hal_SetPowerTracking(padapter, enable);
return 0;
}
void GetPowerTracking(struct adapter *padapter, u8 *enable)
{
Hal_GetPowerTracking(padapter, enable);
}
static void disable_dm(struct adapter *padapter)
{
u8 v8;
/* 3 1. disable firmware dynamic mechanism */
/* disable Power Training, Rate Adaptive */
v8 = rtw_read8(padapter, REG_BCN_CTRL);
v8 &= ~EN_BCN_FUNCTION;
rtw_write8(padapter, REG_BCN_CTRL, v8);
/* 3 2. disable driver dynamic mechanism */
/* disable Dynamic Initial Gain */
/* disable High Power */
/* disable Power Tracking */
Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, false);
/* enable APK, LCK and IQK but disable power tracking */
Switch_DM_Func(padapter, DYNAMIC_RF_CALIBRATION, true);
}
/* This function initializes the DUT to the MP test mode */
s32 mp_start_test(struct adapter *padapter)
{
struct wlan_bssid_ex bssid;
struct sta_info *psta;
u32 length;
u8 val8;
unsigned long irqL;
s32 res = _SUCCESS;
struct mp_priv *pmppriv = &padapter->mppriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
padapter->registrypriv.mp_mode = 1;
pmppriv->bSetTxPower = 0; /* for manually set tx power */
/* 3 disable dynamic mechanism */
disable_dm(padapter);
/* 3 0. update mp_priv */
if (padapter->registrypriv.rf_config == RF_819X_MAX_TYPE) {
switch (GET_RF_TYPE(padapter)) {
case RF_1T1R:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_A;
break;
case RF_1T2R:
default:
pmppriv->antenna_tx = ANTENNA_A;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T2R:
case RF_2T2R_GREEN:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_AB;
break;
case RF_2T4R:
pmppriv->antenna_tx = ANTENNA_AB;
pmppriv->antenna_rx = ANTENNA_ABCD;
break;
}
}
mpt_ProStartTest(padapter);
/* 3 1. initialize a new struct wlan_bssid_ex */
/* _rtw_memset(&bssid, 0, sizeof(struct wlan_bssid_ex)); */
memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN);
bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc");
memcpy(bssid.Ssid.Ssid, (u8 *)"mp_pseudo_adhoc", bssid.Ssid.SsidLength);
bssid.InfrastructureMode = Ndis802_11IBSS;
bssid.NetworkTypeInUse = Ndis802_11DS;
bssid.IELength = 0;
length = get_wlan_bssid_ex_sz(&bssid);
if (length % 4)
bssid.Length = ((length >> 2) + 1) << 2; /* round up to multiple of 4 bytes. */
else
bssid.Length = length;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == true)
goto end_of_mp_start_test;
/* init mp_start_test status */
if (check_fwstate(pmlmepriv, _FW_LINKED) == true) {
rtw_disassoc_cmd(padapter, 500, true);
rtw_indicate_disconnect(padapter);
rtw_free_assoc_resources(padapter, 1);
}
pmppriv->prev_fw_state = get_fwstate(pmlmepriv);
if (padapter->registrypriv.mp_mode == 1)
pmlmepriv->fw_state = WIFI_MP_STATE;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
/* 3 2. create a new psta for mp driver */
/* clear psta in the cur_network, if any */
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
if (psta)
rtw_free_stainfo(padapter, psta);
psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress);
if (psta == NULL) {
RT_TRACE(_module_mp_, _drv_err_, ("mp_start_test: Can't alloc sta_info!\n"));
pmlmepriv->fw_state = pmppriv->prev_fw_state;
res = _FAIL;
goto end_of_mp_start_test;
}
/* 3 3. join psudo AdHoc */
tgt_network->join_res = 1;
tgt_network->aid = 1;
psta->aid = 1;
memcpy(&tgt_network->network, &bssid, length);
rtw_indicate_connect(padapter);
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
end_of_mp_start_test:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
if (res == _SUCCESS) {
/* set MSR to WIFI_FW_ADHOC_STATE */
val8 = rtw_read8(padapter, MSR) & 0xFC; /* 0x0102 */
val8 |= WIFI_FW_ADHOC_STATE;
rtw_write8(padapter, MSR, val8); /* Link in ad hoc network */
}
return res;
}
/* */
/* This function change the DUT from the MP test mode into normal mode */
void mp_stop_test(struct adapter *padapter)
{
struct mp_priv *pmppriv = &padapter->mppriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &pmlmepriv->cur_network;
struct sta_info *psta;
unsigned long irqL;
if (pmppriv->mode == MP_ON) {
pmppriv->bSetTxPower = 0;
_enter_critical_bh(&pmlmepriv->lock, &irqL);
if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == false)
goto end_of_mp_stop_test;
/* 3 1. disconnect psudo AdHoc */
rtw_indicate_disconnect(padapter);
/* 3 2. clear psta used in mp test mode. */
psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress);
if (psta)
rtw_free_stainfo(padapter, psta);
/* 3 3. return to normal state (default:station mode) */
pmlmepriv->fw_state = pmppriv->prev_fw_state; /* WIFI_STATION_STATE; */
/* flush the cur_network */
_rtw_memset(tgt_network, 0, sizeof(struct wlan_network));
_clr_fwstate_(pmlmepriv, WIFI_MP_STATE);
end_of_mp_stop_test:
_exit_critical_bh(&pmlmepriv->lock, &irqL);
}
}
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
/*
* SetChannel
* Description
* Use H2C command to change channel,
* not only modify rf register, but also other setting need to be done.
*/
void SetChannel(struct adapter *pAdapter)
{
Hal_SetChannel(pAdapter);
}
/*
* Notice
* Switch bandwitdth may change center frequency(channel)
*/
void SetBandwidth(struct adapter *pAdapter)
{
Hal_SetBandwidth(pAdapter);
}
void SetAntenna(struct adapter *pAdapter)
{
Hal_SetAntenna(pAdapter);
}
void SetAntennaPathPower(struct adapter *pAdapter)
{
Hal_SetAntennaPathPower(pAdapter);
}
void SetTxPower(struct adapter *pAdapter)
{
Hal_SetTxPower(pAdapter);
}
void SetDataRate(struct adapter *pAdapter)
{
Hal_SetDataRate(pAdapter);
}
void MP_PHY_SetRFPathSwitch(struct adapter *pAdapter , bool bMain)
{
PHY_SetRFPathSwitch(pAdapter, bMain);
}
s32 SetThermalMeter(struct adapter *pAdapter, u8 target_ther)
{
return Hal_SetThermalMeter(pAdapter, target_ther);
}
void GetThermalMeter(struct adapter *pAdapter, u8 *value)
{
Hal_GetThermalMeter(pAdapter, value);
}
void SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetSingleCarrierTx(pAdapter, bStart);
}
void SetSingleToneTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetSingleToneTx(pAdapter, bStart);
}
void SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetCarrierSuppressionTx(pAdapter, bStart);
}
void SetContinuousTx(struct adapter *pAdapter, u8 bStart)
{
PhySetTxPowerLevel(pAdapter);
Hal_SetContinuousTx(pAdapter, bStart);
}
void PhySetTxPowerLevel(struct adapter *pAdapter)
{
struct mp_priv *pmp_priv = &pAdapter->mppriv;
if (pmp_priv->bSetTxPower == 0) /* for NO manually set power index */
PHY_SetTxPowerLevel8188E(pAdapter, pmp_priv->channel);
}
/* */
static void dump_mpframe(struct adapter *padapter, struct xmit_frame *pmpframe)
{
rtw_hal_mgnt_xmit(padapter, pmpframe);
}
static struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv)
{
struct xmit_frame *pmpframe;
struct xmit_buf *pxmitbuf;
pmpframe = rtw_alloc_xmitframe(pxmitpriv);
if (pmpframe == NULL)
return NULL;
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (pxmitbuf == NULL) {
rtw_free_xmitframe(pxmitpriv, pmpframe);
return NULL;
}
pmpframe->frame_tag = MP_FRAMETAG;
pmpframe->pxmitbuf = pxmitbuf;
pmpframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pmpframe;
return pmpframe;
}
static int mp_xmit_packet_thread(void *context)
{
struct xmit_frame *pxmitframe;
struct mp_tx *pmptx;
struct mp_priv *pmp_priv;
struct xmit_priv *pxmitpriv;
struct adapter *padapter;
pmp_priv = (struct mp_priv *)context;
pmptx = &pmp_priv->tx;
padapter = pmp_priv->papdater;
pxmitpriv = &(padapter->xmitpriv);
thread_enter("RTW_MP_THREAD");
/* DBG_88E("%s:pkTx Start\n", __func__); */
while (1) {
pxmitframe = alloc_mp_xmitframe(pxmitpriv);
if (pxmitframe == NULL) {
if (pmptx->stop ||
padapter->bSurpriseRemoved ||
padapter->bDriverStopped) {
goto exit;
} else {
rtw_msleep_os(1);
continue;
}
}
memcpy((u8 *)(pxmitframe->buf_addr+TXDESC_OFFSET), pmptx->buf, pmptx->write_size);
memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib));
dump_mpframe(padapter, pxmitframe);
pmptx->sended++;
pmp_priv->tx_pktcount++;
if (pmptx->stop ||
padapter->bSurpriseRemoved ||
padapter->bDriverStopped)
goto exit;
if ((pmptx->count != 0) &&
(pmptx->count == pmptx->sended))
goto exit;
flush_signals_thread();
}
exit:
kfree(pmptx->pallocated_buf);
pmptx->pallocated_buf = NULL;
pmptx->stop = 1;
thread_exit();
}
void fill_txdesc_for_mp(struct adapter *padapter, struct tx_desc *ptxdesc)
{
struct mp_priv *pmp_priv = &padapter->mppriv;
memcpy(ptxdesc, &(pmp_priv->tx.desc), TXDESC_SIZE);
}
void SetPacketTx(struct adapter *padapter)
{
u8 *ptr, *pkt_start, *pkt_end;
u32 pkt_size;
struct tx_desc *desc;
struct rtw_ieee80211_hdr *hdr;
u8 payload;
s32 bmcast;
struct pkt_attrib *pattrib;
struct mp_priv *pmp_priv;
pmp_priv = &padapter->mppriv;
if (pmp_priv->tx.stop)
return;
pmp_priv->tx.sended = 0;
pmp_priv->tx.stop = 0;
pmp_priv->tx_pktcount = 0;
/* 3 1. update_attrib() */
pattrib = &pmp_priv->tx.attrib;
memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN);
memcpy(pattrib->ta, pattrib->src, ETH_ALEN);
memcpy(pattrib->ra, pattrib->dst, ETH_ALEN);
bmcast = IS_MCAST(pattrib->ra);
if (bmcast) {
pattrib->mac_id = 1;
pattrib->psta = rtw_get_bcmc_stainfo(padapter);
} else {
pattrib->mac_id = 0;
pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv));
}
pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen;
/* 3 2. allocate xmit buffer */
pkt_size = pattrib->last_txcmdsz;
kfree(pmp_priv->tx.pallocated_buf);
pmp_priv->tx.write_size = pkt_size;
pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ;
pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size);
if (pmp_priv->tx.pallocated_buf == NULL) {
DBG_88E("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size);
return;
}
pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((size_t)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ);
ptr = pmp_priv->tx.buf;
desc = &(pmp_priv->tx.desc);
_rtw_memset(desc, 0, TXDESC_SIZE);
pkt_start = ptr;
pkt_end = pkt_start + pkt_size;
/* 3 3. init TX descriptor */
/* offset 0 */
desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); /* packet size */
desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); /* 32 bytes for TX Desc */
if (bmcast)
desc->txdw0 |= cpu_to_le32(BMC); /* broadcast packet */
desc->txdw1 |= cpu_to_le32((0x01 << 26) & 0xff000000);
/* offset 4 */
desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x3F); /* CAM_ID(MAC_ID) */
desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); /* Queue Select, TID */
desc->txdw1 |= cpu_to_le32((pattrib->raid << RATE_ID_SHT) & 0x000F0000); /* Rate Adaptive ID */
/* offset 8 */
/* offset 12 */
desc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0x0fff0000);
/* offset 16 */
desc->txdw4 |= cpu_to_le32(HW_SSN);
desc->txdw4 |= cpu_to_le32(USERATE);
desc->txdw4 |= cpu_to_le32(DISDATAFB);
if (pmp_priv->preamble) {
if (pmp_priv->rateidx <= MPT_RATE_54M)
desc->txdw4 |= cpu_to_le32(DATA_SHORT); /* CCK Short Preamble */
}
if (pmp_priv->bandwidth == HT_CHANNEL_WIDTH_40)
desc->txdw4 |= cpu_to_le32(DATA_BW);
/* offset 20 */
desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F);
if (pmp_priv->preamble) {
if (pmp_priv->rateidx > MPT_RATE_54M)
desc->txdw5 |= cpu_to_le32(SGI); /* MCS Short Guard Interval */
}
desc->txdw5 |= cpu_to_le32(RTY_LMT_EN); /* retry limit enable */
desc->txdw5 |= cpu_to_le32(0x00180000); /* DATA/RTS Rate Fallback Limit */
/* 3 4. make wlan header, make_wlanhdr() */
hdr = (struct rtw_ieee80211_hdr *)pkt_start;
SetFrameSubType(&hdr->frame_ctl, pattrib->subtype);
memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); /* DA */
memcpy(hdr->addr2, pattrib->src, ETH_ALEN); /* SA */
memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); /* RA, BSSID */
/* 3 5. make payload */
ptr = pkt_start + pattrib->hdrlen;
switch (pmp_priv->tx.payload) {
case 0:
payload = 0x00;
break;
case 1:
payload = 0x5a;
break;
case 2:
payload = 0xa5;
break;
case 3:
payload = 0xff;
break;
default:
payload = 0x00;
break;
}
_rtw_memset(ptr, payload, pkt_end - ptr);
/* 3 6. start thread */
pmp_priv->tx.PktTxThread = kthread_run(mp_xmit_packet_thread, pmp_priv, "RTW_MP_THREAD");
if (IS_ERR(pmp_priv->tx.PktTxThread))
DBG_88E("Create PktTx Thread Fail !!!!!\n");
}
void SetPacketRx(struct adapter *pAdapter, u8 bStartRx)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (bStartRx) {
/* Accept CRC error and destination address */
pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS;
pHalData->ReceiveConfig |= ACRC32;
rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig);
/* Accept all data frames */
rtw_write16(pAdapter, REG_RXFLTMAP2, 0xFFFF);
} else {
rtw_write32(pAdapter, REG_RCR, 0);
}
}
void ResetPhyRxPktCount(struct adapter *pAdapter)
{
u32 i, phyrx_set = 0;
for (i = 0; i <= 0xF; i++) {
phyrx_set = 0;
phyrx_set |= _RXERR_RPT_SEL(i); /* select */
phyrx_set |= RXERR_RPT_RST; /* set counter to zero */
rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
}
}
static u32 GetPhyRxPktCounts(struct adapter *pAdapter, u32 selbit)
{
/* selection */
u32 phyrx_set = 0, count = 0;
phyrx_set = _RXERR_RPT_SEL(selbit & 0xF);
rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set);
/* Read packet count */
count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK;
return count;
}
u32 GetPhyRxPktReceived(struct adapter *pAdapter)
{
u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK);
CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK);
HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK);
return OFDM_cnt + CCK_cnt + HT_cnt;
}
u32 GetPhyRxPktCRC32Error(struct adapter *pAdapter)
{
u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0;
OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL);
CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL);
HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL);
return OFDM_cnt + CCK_cnt + HT_cnt;
}
/* reg 0x808[9:0]: FFT data x */
/* reg 0x808[22]: 0 --> 1 to get 1 FFT data y */
/* reg 0x8B4[15:0]: FFT data y report */
static u32 rtw_GetPSDData(struct adapter *pAdapter, u32 point)
{
int psd_val;
psd_val = rtw_read32(pAdapter, 0x808);
psd_val &= 0xFFBFFC00;
psd_val |= point;
rtw_write32(pAdapter, 0x808, psd_val);
rtw_mdelay_os(1);
psd_val |= 0x00400000;
rtw_write32(pAdapter, 0x808, psd_val);
rtw_mdelay_os(1);
psd_val = rtw_read32(pAdapter, 0x8B4);
psd_val &= 0x0000FFFF;
return psd_val;
}
/*
*pts start_point_min stop_point_max
* 128 64 64 + 128 = 192
* 256 128 128 + 256 = 384
* 512 256 256 + 512 = 768
* 1024 512 512 + 1024 = 1536
*
*/
u32 mp_query_psd(struct adapter *pAdapter, u8 *data)
{
u32 i, psd_pts = 0, psd_start = 0, psd_stop = 0;
u32 psd_data = 0;
if (!netif_running(pAdapter->pnetdev)) {
RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! interface not opened!\n"));
return 0;
}
if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == false) {
RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! not in MP mode!\n"));
return 0;
}
if (strlen(data) == 0) { /* default value */
psd_pts = 128;
psd_start = 64;
psd_stop = 128;
} else {
sscanf(data, "pts =%d, start =%d, stop =%d", &psd_pts, &psd_start, &psd_stop);
}
_rtw_memset(data, '\0', sizeof(*data));
i = psd_start;
while (i < psd_stop) {
if (i >= psd_pts) {
psd_data = rtw_GetPSDData(pAdapter, i-psd_pts);
} else {
psd_data = rtw_GetPSDData(pAdapter, i);
}
sprintf(data, "%s%x ", data, psd_data);
i++;
}
rtw_msleep_os(100);
return strlen(data)+1;
}
void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv)
{
int i, res;
struct adapter *padapter = pxmitpriv->adapter;
struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf;
u32 max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
u32 num_xmit_extbuf = NR_XMIT_EXTBUFF;
if (padapter->registrypriv.mp_mode == 0) {
max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
num_xmit_extbuf = NR_XMIT_EXTBUFF;
} else {
max_xmit_extbuf_size = 20000;
num_xmit_extbuf = 1;
}
pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
for (i = 0; i < num_xmit_extbuf; i++) {
rtw_os_xmit_resource_free(padapter, pxmitbuf, (max_xmit_extbuf_size + XMITBUF_ALIGN_SZ));
pxmitbuf++;
}
if (pxmitpriv->pallocated_xmit_extbuf)
rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, num_xmit_extbuf * sizeof(struct xmit_buf) + 4);
if (padapter->registrypriv.mp_mode == 0) {
max_xmit_extbuf_size = 20000;
num_xmit_extbuf = 1;
} else {
max_xmit_extbuf_size = MAX_XMIT_EXTBUF_SZ;
num_xmit_extbuf = NR_XMIT_EXTBUFF;
}
/* Init xmit extension buff */
_rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue);
pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(num_xmit_extbuf * sizeof(struct xmit_buf) + 4);
if (pxmitpriv->pallocated_xmit_extbuf == NULL) {
RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("alloc xmit_extbuf fail!\n"));
res = _FAIL;
goto exit;
}
pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((size_t)(pxmitpriv->pallocated_xmit_extbuf), 4);
pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf;
for (i = 0; i < num_xmit_extbuf; i++) {
_rtw_init_listhead(&pxmitbuf->list);
pxmitbuf->priv_data = NULL;
pxmitbuf->padapter = padapter;
pxmitbuf->ext_tag = true;
res = rtw_os_xmit_resource_alloc(padapter, pxmitbuf, max_xmit_extbuf_size + XMITBUF_ALIGN_SZ);
if (res == _FAIL) {
res = _FAIL;
goto exit;
}
rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue));
pxmitbuf++;
}
pxmitpriv->free_xmit_extbuf_cnt = num_xmit_extbuf;
exit:
;
}

1508
core/rtw_mp_ioctl.c
View file

File diff suppressed because it is too large Load diff

2064
core/rtw_p2p.c
View file

File diff suppressed because it is too large Load diff

238
core/rtw_pwrctrl.c
View file

@ -22,8 +22,111 @@
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <usb_ops_linux.h>
#include <linux/usb.h>
static int rtw_hw_suspend(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct net_device *pnetdev = padapter->pnetdev;
if ((!padapter->bup) || (padapter->bDriverStopped) ||
(padapter->bSurpriseRemoved)) {
DBG_88E("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n",
padapter->bup, padapter->bDriverStopped,
padapter->bSurpriseRemoved);
goto error_exit;
}
/* system suspend */
LeaveAllPowerSaveMode(padapter);
DBG_88E("==> rtw_hw_suspend\n");
_enter_pwrlock(&pwrpriv->lock);
pwrpriv->bips_processing = true;
/* s1. */
if (pnetdev) {
netif_carrier_off(pnetdev);
netif_tx_stop_all_queues(pnetdev);
}
/* s2. */
rtw_disassoc_cmd(padapter, 500, false);
/* s2-2. indicate disconnect to os */
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (check_fwstate(pmlmepriv, _FW_LINKED)) {
_clr_fwstate_(pmlmepriv, _FW_LINKED);
rtw_led_control(padapter, LED_CTL_NO_LINK);
rtw_os_indicate_disconnect(padapter);
/* donnot enqueue cmd */
rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0);
}
}
/* s2-3. */
rtw_free_assoc_resources(padapter, 1);
/* s2-4. */
rtw_free_network_queue(padapter, true);
rtw_ips_dev_unload(padapter);
pwrpriv->rf_pwrstate = rf_off;
pwrpriv->bips_processing = false;
_exit_pwrlock(&pwrpriv->lock);
return 0;
error_exit:
DBG_88E("%s, failed\n", __func__);
return -1;
}
static int rtw_hw_resume(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct net_device *pnetdev = padapter->pnetdev;
/* system resume */
DBG_88E("==> rtw_hw_resume\n");
_enter_pwrlock(&pwrpriv->lock);
pwrpriv->bips_processing = true;
rtw_reset_drv_sw(padapter);
if (pm_netdev_open(pnetdev, false) != 0) {
_exit_pwrlock(&pwrpriv->lock);
goto error_exit;
}
netif_device_attach(pnetdev);
netif_carrier_on(pnetdev);
if (!netif_queue_stopped(pnetdev))
netif_start_queue(pnetdev);
else
netif_wake_queue(pnetdev);
pwrpriv->bkeepfwalive = false;
pwrpriv->brfoffbyhw = false;
pwrpriv->rf_pwrstate = rf_on;
pwrpriv->bips_processing = false;
_exit_pwrlock(&pwrpriv->lock);
return 0;
error_exit:
DBG_88E("%s, Open net dev failed\n", __func__);
return -1;
}
void ips_enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
@ -100,7 +203,7 @@ int ips_leave(struct adapter *padapter)
}
}
DBG_88E("==> ips_leave.....LED(0x%08x)...\n", rtw_read32(padapter, 0x4c));
DBG_88E("==> ips_leave.....LED(0x%08x)...\n", usb_read32(padapter, 0x4c));
pwrpriv->bips_processing = false;
pwrpriv->bkeepfwalive = false;
@ -114,46 +217,18 @@ int ips_leave(struct adapter *padapter)
static bool rtw_pwr_unassociated_idle(struct adapter *adapter)
{
struct adapter *buddy = adapter->pbuddy_adapter;
struct mlme_priv *pmlmepriv = &(adapter->mlmepriv);
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &(adapter->wdinfo);
#endif
bool ret = false;
if (adapter->pwrctrlpriv.ips_deny_time >= rtw_get_current_time())
if (time_after_eq(adapter->pwrctrlpriv.ips_deny_time, jiffies))
goto exit;
if (check_fwstate(pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ||
check_fwstate(pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ||
check_fwstate(pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ||
#if defined(CONFIG_88EU_P2P)
!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
#else
0)
#endif
check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE))
goto exit;
/* consider buddy, if exist */
if (buddy) {
struct mlme_priv *b_pmlmepriv = &(buddy->mlmepriv);
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *b_pwdinfo = &(buddy->wdinfo);
#endif
if (check_fwstate(b_pmlmepriv, WIFI_ASOC_STATE|WIFI_SITE_MONITOR) ||
check_fwstate(b_pmlmepriv, WIFI_UNDER_LINKING|WIFI_UNDER_WPS) ||
check_fwstate(b_pmlmepriv, WIFI_AP_STATE) ||
check_fwstate(b_pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_ADHOC_STATE) ||
#if defined(CONFIG_88EU_P2P)
!rtw_p2p_chk_state(b_pwdinfo, P2P_STATE_NONE))
#else
0)
#endif
goto exit;
}
ret = true;
exit:
@ -179,7 +254,6 @@ void rtw_ps_processor(struct adapter *padapter)
if (rfpwrstate == rf_off) {
pwrpriv->change_rfpwrstate = rf_off;
pwrpriv->brfoffbyhw = true;
padapter->bCardDisableWOHSM = true;
rtw_hw_suspend(padapter);
} else {
pwrpriv->change_rfpwrstate = rf_on;
@ -205,12 +279,11 @@ void rtw_ps_processor(struct adapter *padapter)
exit:
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
pwrpriv->ps_processing = false;
return;
}
static void pwr_state_check_handler(void *FunctionContext)
{
struct adapter *padapter = (struct adapter *)FunctionContext;
struct adapter *padapter = FunctionContext;
rtw_ps_cmd(padapter);
}
@ -226,11 +299,8 @@ void rtw_set_rpwm(struct adapter *padapter, u8 pslv)
u8 rpwm;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
_func_enter_;
pslv = PS_STATE(pslv);
if (pwrpriv->btcoex_rfon) {
if (pslv < PS_STATE_S4)
pslv = PS_STATE_S3;
@ -274,8 +344,6 @@ _func_enter_;
pwrpriv->tog += 0x80;
pwrpriv->cpwm = pslv;
_func_exit_;
}
static u8 PS_RDY_CHECK(struct adapter *padapter)
@ -285,7 +353,7 @@ static u8 PS_RDY_CHECK(struct adapter *padapter)
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
curr_time = rtw_get_current_time();
curr_time = jiffies;
delta_time = curr_time - pwrpriv->DelayLPSLastTimeStamp;
if (delta_time < LPS_DELAY_TIME)
@ -309,11 +377,6 @@ static u8 PS_RDY_CHECK(struct adapter *padapter)
void rtw_set_ps_mode(struct adapter *padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &(padapter->wdinfo);
#endif /* CONFIG_88EU_P2P */
_func_enter_;
RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_notice_,
("%s: PowerMode=%d Smart_PS=%d\n",
@ -335,16 +398,6 @@ _func_enter_;
/* if (pwrpriv->pwr_mode == PS_MODE_ACTIVE) */
if (ps_mode == PS_MODE_ACTIVE) {
#ifdef CONFIG_88EU_P2P
if (pwdinfo->opp_ps == 0) {
DBG_88E("rtw_set_ps_mode: Leave 802.11 power save\n");
pwrpriv->pwr_mode = ps_mode;
rtw_set_rpwm(padapter, PS_STATE_S4);
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
pwrpriv->bFwCurrentInPSMode = false;
}
} else {
#endif /* CONFIG_88EU_P2P */
if (PS_RDY_CHECK(padapter)) {
DBG_88E("%s: Enter 802.11 power save\n", __func__);
pwrpriv->bFwCurrentInPSMode = true;
@ -352,18 +405,9 @@ _func_enter_;
pwrpriv->smart_ps = smart_ps;
pwrpriv->bcn_ant_mode = bcn_ant_mode;
rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode));
#ifdef CONFIG_88EU_P2P
/* Set CTWindow after LPS */
if (pwdinfo->opp_ps == 1)
p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0);
#endif /* CONFIG_88EU_P2P */
rtw_set_rpwm(padapter, PS_STATE_S2);
}
}
_func_exit_;
}
/*
@ -379,7 +423,7 @@ s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms)
s32 err = 0;
start_time = rtw_get_current_time();
start_time = jiffies;
while (1) {
rtw_hal_get_hwreg(padapter, HW_VAR_FWLPS_RF_ON, &bAwake);
if (bAwake)
@ -396,7 +440,7 @@ s32 LPS_RF_ON_check(struct adapter *padapter, u32 delay_ms)
DBG_88E("%s: Wait for FW LPS leave more than %u ms!!!\n", __func__, delay_ms);
break;
}
rtw_usleep_os(100);
msleep(1);
}
return err;
@ -410,8 +454,6 @@ void LPS_Enter(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
_func_enter_;
if (PS_RDY_CHECK(padapter) == false)
return;
@ -428,8 +470,6 @@ _func_enter_;
pwrpriv->LpsIdleCount++;
}
}
_func_exit_;
}
#define LPS_LEAVE_TIMEOUT_MS 100
@ -440,8 +480,6 @@ void LPS_Leave(struct adapter *padapter)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
_func_enter_;
if (pwrpriv->bLeisurePs) {
if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0);
@ -452,8 +490,6 @@ _func_enter_;
}
pwrpriv->bpower_saving = false;
_func_exit_;
}
/* */
@ -465,23 +501,14 @@ void LeaveAllPowerSaveMode(struct adapter *Adapter)
struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
u8 enqueue = 0;
_func_enter_;
if (check_fwstate(pmlmepriv, _FW_LINKED)) { /* connect */
p2p_ps_wk_cmd(Adapter, P2P_PS_DISABLE, enqueue);
if (check_fwstate(pmlmepriv, _FW_LINKED))
rtw_lps_ctrl_wk_cmd(Adapter, LPS_CTRL_LEAVE, enqueue);
}
_func_exit_;
}
void rtw_init_pwrctrl_priv(struct adapter *padapter)
{
struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv;
_func_enter_;
_init_pwrlock(&pwrctrlpriv->lock);
pwrctrlpriv->rf_pwrstate = rf_on;
pwrctrlpriv->ips_enter_cnts = 0;
@ -499,7 +526,7 @@ _func_enter_;
pwrctrlpriv->LpsIdleCount = 0;
if (padapter->registrypriv.mp_mode == 1)
pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE ;
pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE;
else
pwrctrlpriv->power_mgnt = padapter->registrypriv.power_mgnt;/* PS_MODE_MIN; */
pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt) ? true : false;
@ -518,40 +545,18 @@ _func_enter_;
pwrctrlpriv->btcoex_rfon = false;
_init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter);
_func_exit_;
}
void rtw_free_pwrctrl_priv(struct adapter *adapter)
{
struct pwrctrl_priv *pwrctrlpriv = &adapter->pwrctrlpriv;
_func_enter_;
_free_pwrlock(&pwrctrlpriv->lock);
_func_exit_;
}
u8 rtw_interface_ps_func(struct adapter *padapter, enum hal_intf_ps_func efunc_id, u8 *val)
{
u8 bResult = true;
rtw_hal_intf_ps_func(padapter, efunc_id, val);
return bResult;
}
inline void rtw_set_ips_deny(struct adapter *padapter, u32 ms)
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ms);
pwrpriv->ips_deny_time = jiffies + msecs_to_jiffies(ms);
}
/*
* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend
* @adapter: pointer to struct adapter structure
* @ips_deffer_ms: the ms wiil prevent from falling into IPS after wakeup
* @ips_deffer_ms: the ms will prevent from falling into IPS after wakeup
* Return _SUCCESS or _FAIL
*/
@ -559,17 +564,19 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
{
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
unsigned long expires;
int ret = _SUCCESS;
if (pwrpriv->ips_deny_time < rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms))
pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms);
expires = jiffies + msecs_to_jiffies(ips_deffer_ms);
if (time_before(pwrpriv->ips_deny_time, expires))
pwrpriv->ips_deny_time = jiffies + msecs_to_jiffies(ips_deffer_ms);
{
u32 start = rtw_get_current_time();
u32 start = jiffies;
if (pwrpriv->ps_processing) {
DBG_88E("%s wait ps_processing...\n", __func__);
while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000)
rtw_msleep_os(10);
usleep_range(1000, 3000);
if (pwrpriv->ps_processing)
DBG_88E("%s wait ps_processing timeout\n", __func__);
else
@ -616,8 +623,9 @@ int _rtw_pwr_wakeup(struct adapter *padapter, u32 ips_deffer_ms, const char *cal
}
exit:
if (pwrpriv->ips_deny_time < rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms))
pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms);
expires = jiffies + msecs_to_jiffies(ips_deffer_ms);
if (time_before(pwrpriv->ips_deny_time, expires))
pwrpriv->ips_deny_time = jiffies + msecs_to_jiffies(ips_deffer_ms);
return ret;
}

710
core/rtw_recv.c
View file

File diff suppressed because it is too large Load diff

172
core/rtw_security.c
View file

@ -41,7 +41,6 @@ static void arcfour_init(struct arc4context *parc4ctx, u8 *key, u32 key_len)
u32 stateindex;
u8 *state;
u32 counter;
_func_enter_;
state = parc4ctx->state;
parc4ctx->x = 0;
parc4ctx->y = 0;
@ -58,7 +57,6 @@ _func_enter_;
if (++keyindex >= key_len)
keyindex = 0;
}
_func_exit_;
}
static u32 arcfour_byte(struct arc4context *parc4ctx)
@ -67,7 +65,6 @@ static u32 arcfour_byte(struct arc4context *parc4ctx)
u32 y;
u32 sx, sy;
u8 *state;
_func_enter_;
state = parc4ctx->state;
x = (parc4ctx->x + 1) & 0xff;
sx = state[x];
@ -77,17 +74,14 @@ _func_enter_;
parc4ctx->y = y;
state[y] = (u8)sx;
state[x] = (u8)sy;
_func_exit_;
return state[(sx + sy) & 0xff];
}
static void arcfour_encrypt(struct arc4context *parc4ctx, u8 *dest, u8 *src, u32 len)
{
u32 i;
_func_enter_;
for (i = 0; i < len; i++)
dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx);
_func_exit_;
}
static int bcrc32initialized;
@ -102,9 +96,8 @@ static u8 crc32_reverseBit(u8 data)
static void crc32_init(void)
{
_func_enter_;
if (bcrc32initialized == 1) {
goto exit;
return;
} else {
int i, j;
u32 c;
@ -126,15 +119,12 @@ _func_enter_;
}
bcrc32initialized = 1;
}
exit:
_func_exit_;
}
static __le32 getcrc32(u8 *buf, int len)
{
u8 *p;
u32 crc;
_func_enter_;
if (bcrc32initialized == 0)
crc32_init();
@ -142,7 +132,6 @@ _func_enter_;
for (p = buf; len > 0; ++p, --len)
crc = crc32_table[(crc ^ *p) & 0xff] ^ (crc >> 8);
_func_exit_;
return cpu_to_le32(~crc); /* transmit complement, per CRC-32 spec */
}
@ -165,7 +154,6 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe)
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_func_enter_;
if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL)
return;
@ -201,12 +189,11 @@ _func_enter_;
arcfour_encrypt(&mycontext, payload+length, crc, 4);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)RND4((size_t)(pframe));
pframe = (u8 *)round_up((size_t)(pframe), 4);
}
}
}
_func_exit_;
}
void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe)
@ -218,12 +205,11 @@ void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe)
u32 keylength;
u8 *pframe, *payload, *iv, wepkey[16];
u8 keyindex;
struct rx_pkt_attrib *prxattrib = &(((union recv_frame *)precvframe)->u.hdr.attrib);
struct rx_pkt_attrib *prxattrib = &(((struct recv_frame *)precvframe)->attrib);
struct security_priv *psecuritypriv = &padapter->securitypriv;
_func_enter_;
pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data;
pframe = (unsigned char *)((struct recv_frame *)precvframe)->rx_data;
/* start to decrypt recvframe */
if ((prxattrib->encrypt == _WEP40_) || (prxattrib->encrypt == _WEP104_)) {
@ -232,7 +218,7 @@ _func_enter_;
keylength = psecuritypriv->dot11DefKeylen[keyindex];
memcpy(&wepkey[0], iv, 3);
memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0], keylength);
length = ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len;
length = ((struct recv_frame *)precvframe)->len-prxattrib->hdrlen-prxattrib->iv_len;
payload = pframe+prxattrib->iv_len+prxattrib->hdrlen;
@ -252,7 +238,6 @@ _func_enter_;
&crc, &payload[length-4]));
}
}
_func_exit_;
return;
}
@ -263,10 +248,8 @@ static u32 secmicgetuint32(u8 *p)
{
s32 i;
u32 res = 0;
_func_enter_;
for (i = 0; i < 4; i++)
res |= ((u32)(*p++)) << (8*i);
_func_exit_;
return res;
}
@ -274,39 +257,32 @@ static void secmicputuint32(u8 *p, u32 val)
/* Convert from Us3232 to Byte[] in a portable way */
{
long i;
_func_enter_;
for (i = 0; i < 4; i++) {
*p++ = (u8) (val & 0xff);
*p++ = (u8)(val & 0xff);
val >>= 8;
}
_func_exit_;
}
static void secmicclear(struct mic_data *pmicdata)
{
/* Reset the state to the empty message. */
_func_enter_;
pmicdata->L = pmicdata->K0;
pmicdata->R = pmicdata->K1;
pmicdata->nBytesInM = 0;
pmicdata->M = 0;
_func_exit_;
}
void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key)
{
/* Set the key */
_func_enter_;
pmicdata->K0 = secmicgetuint32(key);
pmicdata->K1 = secmicgetuint32(key + 4);
/* and reset the message */
secmicclear(pmicdata);
_func_exit_;
}
void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b)
{
_func_enter_;
/* Append the byte to our word-sized buffer */
pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM);
pmicdata->nBytesInM++;
@ -325,23 +301,19 @@ _func_enter_;
pmicdata->M = 0;
pmicdata->nBytesInM = 0;
}
_func_exit_;
}
void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nbytes)
{
_func_enter_;
/* This is simple */
while (nbytes > 0) {
rtw_secmicappendbyte(pmicdata, *src++);
nbytes--;
}
_func_exit_;
}
void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst)
{
_func_enter_;
/* Append the minimum padding */
rtw_secmicappendbyte(pmicdata, 0x5a);
rtw_secmicappendbyte(pmicdata, 0);
@ -356,14 +328,12 @@ _func_enter_;
secmicputuint32(dst+4, pmicdata->R);
/* Reset to the empty message. */
secmicclear(pmicdata);
_func_exit_;
}
void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len, u8 *mic_code, u8 pri)
{
struct mic_data micdata;
u8 priority[4] = {0x0, 0x0, 0x0, 0x0};
_func_enter_;
rtw_secmicsetkey(&micdata, key);
priority[0] = pri;
@ -386,7 +356,6 @@ _func_enter_;
rtw_secmicappend(&micdata, data, data_len);
rtw_secgetmic(&micdata, mic_code);
_func_exit_;
}
@ -505,7 +474,6 @@ static const unsigned short Sbox1[2][256] = { /* Sbox for hash (can be in ROM)
static void phase1(u16 *p1k, const u8 *tk, const u8 *ta, u32 iv32)
{
int i;
_func_enter_;
/* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */
p1k[0] = Lo16(iv32);
p1k[1] = Hi16(iv32);
@ -523,7 +491,6 @@ _func_enter_;
p1k[4] += _S_(p1k[3] ^ TK16((i&1)+0));
p1k[4] += (unsigned short)i; /* avoid "slide attacks" */
}
_func_exit_;
}
/*
@ -553,7 +520,6 @@ static void phase2(u8 *rc4key, const u8 *tk, const u16 *p1k, u16 iv16)
{
int i;
u16 PPK[6]; /* temporary key for mixing */
_func_enter_;
/* Note: all adds in the PPK[] equations below are mod 2**16 */
for (i = 0; i < 5; i++)
PPK[i] = p1k[i]; /* first, copy P1K to PPK */
@ -590,7 +556,6 @@ _func_enter_;
rc4key[4+2*i] = Lo8(PPK[i]);
rc4key[5+2*i] = Hi8(PPK[i]);
}
_func_exit_;
}
/* The hlen isn't include the IV */
@ -612,7 +577,6 @@ u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe)
struct security_priv *psecuritypriv = &padapter->securitypriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
u32 res = _SUCCESS;
_func_enter_;
if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL)
return _FAIL;
@ -657,14 +621,14 @@ _func_enter_;
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload+length, crc, 4);
} else {
length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ;
length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len;
*((__le32 *)crc) = getcrc32(payload, length);/* modified by Amy*/
arcfour_init(&mycontext, rc4key, 16);
arcfour_encrypt(&mycontext, payload, payload, length);
arcfour_encrypt(&mycontext, payload+length, crc, 4);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)RND4((size_t)(pframe));
pframe = (u8 *)round_up((size_t)(pframe), 4);
}
}
} else {
@ -672,7 +636,6 @@ _func_enter_;
res = _FAIL;
}
}
_func_exit_;
return res;
}
@ -690,13 +653,12 @@ u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe)
u8 *pframe, *payload, *iv, *prwskey;
union pn48 dot11txpn;
struct sta_info *stainfo;
struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib;
struct rx_pkt_attrib *prxattrib = &((struct recv_frame *)precvframe)->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
u32 res = _SUCCESS;
_func_enter_;
pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data;
pframe = (unsigned char *)((struct recv_frame *)precvframe)->rx_data;
/* 4 start to decrypt recvframe */
if (prxattrib->encrypt == _TKIP_) {
@ -716,7 +678,7 @@ _func_enter_;
iv = pframe+prxattrib->hdrlen;
payload = pframe+prxattrib->iv_len+prxattrib->hdrlen;
length = ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len;
length = ((struct recv_frame *)precvframe)->len-prxattrib->hdrlen-prxattrib->iv_len;
GET_TKIP_PN(iv, dot11txpn);
@ -747,7 +709,6 @@ _func_enter_;
res = _FAIL;
}
}
_func_exit_;
exit:
return res;
}
@ -821,19 +782,15 @@ static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext);
static void xor_128(u8 *a, u8 *b, u8 *out)
{
int i;
_func_enter_;
for (i = 0; i < 16; i++)
out[i] = a[i] ^ b[i];
_func_exit_;
}
static void xor_32(u8 *a, u8 *b, u8 *out)
{
int i;
_func_enter_;
for (i = 0; i < 4; i++)
out[i] = a[i] ^ b[i];
_func_exit_;
}
static u8 sbox(u8 a)
@ -849,7 +806,6 @@ static void next_key(u8 *key, int round)
0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
0x1b, 0x36, 0x36, 0x36
};
_func_enter_;
sbox_key[0] = sbox(key[13]);
sbox_key[1] = sbox(key[14]);
sbox_key[2] = sbox(key[15]);
@ -863,21 +819,17 @@ _func_enter_;
xor_32(&key[4], &key[0], &key[4]);
xor_32(&key[8], &key[4], &key[8]);
xor_32(&key[12], &key[8], &key[12]);
_func_exit_;
}
static void byte_sub(u8 *in, u8 *out)
{
int i;
_func_enter_;
for (i = 0; i < 16; i++)
out[i] = sbox(in[i]);
_func_exit_;
}
static void shift_row(u8 *in, u8 *out)
{
_func_enter_;
out[0] = in[0];
out[1] = in[5];
out[2] = in[10];
@ -894,7 +846,6 @@ _func_enter_;
out[13] = in[1];
out[14] = in[6];
out[15] = in[11];
_func_exit_;
}
static void mix_column(u8 *in, u8 *out)
@ -908,7 +859,6 @@ static void mix_column(u8 *in, u8 *out)
u8 rotr[4];
u8 temp[4];
u8 tempb[4];
_func_enter_;
for (i = 0 ; i < 4; i++) {
if ((in[i] & 0x80) == 0x80)
add1b[i] = 0x1b;
@ -952,7 +902,6 @@ _func_enter_;
xor_32(add1bf7, rotr, temp);
xor_32(swap_halfs, rotl, tempb);
xor_32(temp, tempb, out);
_func_exit_;
}
static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext)
@ -962,7 +911,6 @@ static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext)
u8 intermediatea[16];
u8 intermediateb[16];
u8 round_key[16];
_func_enter_;
for (i = 0; i < 16; i++)
round_key[i] = key[i];
for (round = 0; round < 11; round++) {
@ -984,7 +932,6 @@ _func_enter_;
next_key(round_key, round);
}
}
_func_exit_;
}
/************************************************/
@ -995,7 +942,6 @@ static void construct_mic_iv(u8 *mic_iv, int qc_exists, int a4_exists, u8 *mpdu,
uint payload_length, u8 *pn_vector)
{
int i;
_func_enter_;
mic_iv[0] = 0x59;
if (qc_exists && a4_exists)
mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */
@ -1007,9 +953,8 @@ _func_enter_;
mic_iv[i] = mpdu[i + 8]; /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */
for (i = 8; i < 14; i++)
mic_iv[i] = pn_vector[13 - i]; /* mic_iv[8:13] = PN[5:0] */
mic_iv[14] = (unsigned char) (payload_length / 256);
mic_iv[15] = (unsigned char) (payload_length % 256);
_func_exit_;
mic_iv[14] = (unsigned char)(payload_length / 256);
mic_iv[15] = (unsigned char)(payload_length % 256);
}
/************************************************/
@ -1019,7 +964,6 @@ _func_exit_;
/************************************************/
static void construct_mic_header1(u8 *mic_header1, int header_length, u8 *mpdu)
{
_func_enter_;
mic_header1[0] = (u8)((header_length - 2) / 256);
mic_header1[1] = (u8)((header_length - 2) % 256);
mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */
@ -1036,7 +980,6 @@ _func_enter_;
mic_header1[13] = mpdu[13];
mic_header1[14] = mpdu[14];
mic_header1[15] = mpdu[15];
_func_exit_;
}
/************************************************/
@ -1047,7 +990,6 @@ _func_exit_;
static void construct_mic_header2(u8 *mic_header2, u8 *mpdu, int a4_exists, int qc_exists)
{
int i;
_func_enter_;
for (i = 0; i < 16; i++)
mic_header2[i] = 0x00;
@ -1079,7 +1021,6 @@ _func_enter_;
mic_header2[15] = mpdu[31] & 0x00;
}
_func_exit_;
}
/************************************************/
@ -1090,7 +1031,6 @@ _func_exit_;
static void construct_ctr_preload(u8 *ctr_preload, int a4_exists, int qc_exists, u8 *mpdu, u8 *pn_vector, int c)
{
int i;
_func_enter_;
for (i = 0; i < 16; i++)
ctr_preload[i] = 0x00;
i = 0;
@ -1105,9 +1045,8 @@ _func_enter_;
ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */
for (i = 8; i < 14; i++)
ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */
ctr_preload[14] = (unsigned char) (c / 256); /* Ctr */
ctr_preload[15] = (unsigned char) (c % 256);
_func_exit_;
ctr_preload[14] = (unsigned char)(c / 256); /* Ctr */
ctr_preload[15] = (unsigned char)(c % 256);
}
/************************************/
@ -1117,10 +1056,8 @@ _func_exit_;
static void bitwise_xor(u8 *ina, u8 *inb, u8 *out)
{
int i;
_func_enter_;
for (i = 0; i < 16; i++)
out[i] = ina[i] ^ inb[i];
_func_exit_;
}
static int aes_cipher(u8 *key, uint hdrlen, u8 *pframe, uint plen)
@ -1142,16 +1079,15 @@ static int aes_cipher(u8 *key, uint hdrlen, u8 *pframe, uint plen)
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
_func_enter_;
frsubtype = frsubtype>>4;
_rtw_memset((void *)mic_iv, 0, 16);
_rtw_memset((void *)mic_header1, 0, 16);
_rtw_memset((void *)mic_header2, 0, 16);
_rtw_memset((void *)ctr_preload, 0, 16);
_rtw_memset((void *)chain_buffer, 0, 16);
_rtw_memset((void *)aes_out, 0, 16);
_rtw_memset((void *)padded_buffer, 0, 16);
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
memset((void *)mic_header2, 0, 16);
memset((void *)ctr_preload, 0, 16);
memset((void *)chain_buffer, 0, 16);
memset((void *)aes_out, 0, 16);
memset((void *)padded_buffer, 0, 16);
if ((hdrlen == WLAN_HDR_A3_LEN) || (hdrlen == WLAN_HDR_A3_QOS_LEN))
a4_exists = 0;
@ -1217,7 +1153,7 @@ _func_enter_;
/* Insert MIC into payload */
for (j = 0; j < 8; j++)
pframe[payload_index+j] = mic[j]; /* message[payload_index+j] = mic[j]; */
pframe[payload_index+j] = mic[j];
payload_index = hdrlen + 8;
for (i = 0; i < num_blocks; i++) {
@ -1253,7 +1189,6 @@ _func_enter_;
bitwise_xor(aes_out, padded_buffer, chain_buffer);
for (j = 0; j < 8; j++)
pframe[payload_index++] = chain_buffer[j];
_func_exit_;
return _SUCCESS;
}
@ -1274,7 +1209,6 @@ u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe)
/* uint offset = 0; */
u32 res = _SUCCESS;
_func_enter_;
if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL)
return _FAIL;
@ -1285,7 +1219,7 @@ _func_enter_;
pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + hw_hdr_offset;
/* 4 start to encrypt each fragment */
if ((pattrib->encrypt == _AES_)) {
if (pattrib->encrypt == _AES_) {
if (pattrib->psta)
stainfo = pattrib->psta;
else
@ -1304,11 +1238,11 @@ _func_enter_;
aes_cipher(prwskey, pattrib->hdrlen, pframe, length);
} else{
length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ;
length = pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len;
aes_cipher(prwskey, pattrib->hdrlen, pframe, length);
pframe += pxmitpriv->frag_len;
pframe = (u8 *)RND4((size_t)(pframe));
pframe = (u8 *)round_up((size_t)(pframe), 8);
}
}
} else{
@ -1318,7 +1252,6 @@ _func_enter_;
}
_func_exit_;
return res;
}
@ -1344,16 +1277,15 @@ static int aes_decipher(u8 *key, uint hdrlen,
/* uint offset = 0; */
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
_func_enter_;
frsubtype = frsubtype>>4;
_rtw_memset((void *)mic_iv, 0, 16);
_rtw_memset((void *)mic_header1, 0, 16);
_rtw_memset((void *)mic_header2, 0, 16);
_rtw_memset((void *)ctr_preload, 0, 16);
_rtw_memset((void *)chain_buffer, 0, 16);
_rtw_memset((void *)aes_out, 0, 16);
_rtw_memset((void *)padded_buffer, 0, 16);
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
memset((void *)mic_header2, 0, 16);
memset((void *)ctr_preload, 0, 16);
memset((void *)chain_buffer, 0, 16);
memset((void *)aes_out, 0, 16);
memset((void *)padded_buffer, 0, 16);
/* start to decrypt the payload */
@ -1514,7 +1446,6 @@ _func_enter_;
res = _FAIL;
}
}
_func_exit_;
return res;
}
@ -1524,13 +1455,12 @@ u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe)
int length;
u8 *pframe, *prwskey; /* *payload,*iv */
struct sta_info *stainfo;
struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib;
struct rx_pkt_attrib *prxattrib = &((struct recv_frame *)precvframe)->attrib;
struct security_priv *psecuritypriv = &padapter->securitypriv;
u32 res = _SUCCESS;
_func_enter_;
pframe = (unsigned char *)((union recv_frame *)precvframe)->u.hdr.rx_data;
pframe = (unsigned char *)((struct recv_frame *)precvframe)->rx_data;
/* 4 start to encrypt each fragment */
if ((prxattrib->encrypt == _AES_)) {
if (prxattrib->encrypt == _AES_) {
stainfo = rtw_get_stainfo(&padapter->stapriv, &prxattrib->ta[0]);
if (stainfo != NULL) {
RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_aes_decrypt: stainfo!= NULL!!!\n"));
@ -1552,14 +1482,13 @@ _func_enter_;
} else {
prwskey = &stainfo->dot118021x_UncstKey.skey[0];
}
length = ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len;
length = ((struct recv_frame *)precvframe)->len-prxattrib->hdrlen-prxattrib->iv_len;
res = aes_decipher(prwskey, prxattrib->hdrlen, pframe, length);
} else {
RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("rtw_aes_encrypt: stainfo==NULL!!!\n"));
res = _FAIL;
}
}
_func_exit_;
exit:
return res;
}
@ -1750,30 +1679,3 @@ do { \
d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \
d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3]; \
} while (0);
/**
* omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC)
* @key: 128-bit key for the hash operation
* @data: Data buffer for which a MAC is determined
* @data_len: Length of data buffer in bytes
* @mac: Buffer for MAC (128 bits, i.e., 16 bytes)
* Returns: 0 on success, -1 on failure
*
* This is a mode for using block cipher (AES in this case) for authentication.
* OMAC1 was standardized with the name CMAC by NIST in a Special Publication
* (SP) 800-38B.
*/
void rtw_use_tkipkey_handler(void *FunctionContext)
{
struct adapter *padapter = (struct adapter *)FunctionContext;
_func_enter_;
RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("^^^rtw_use_tkipkey_handler ^^^\n"));
padapter->securitypriv.busetkipkey = true;
RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("^^^rtw_use_tkipkey_handler padapter->securitypriv.busetkipkey=%d^^^\n", padapter->securitypriv.busetkipkey));
_func_exit_;
}

19
core/rtw_sreset.c
View file

@ -19,27 +19,14 @@
******************************************************************************/
#include <rtw_sreset.h>
#include <usb_ops_linux.h>
void sreset_init_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
_rtw_mutex_init(&psrtpriv->silentreset_mutex);
psrtpriv->silent_reset_inprogress = false;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
}
void sreset_reset_value(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
psrtpriv->silent_reset_inprogress = false;
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
psrtpriv->last_tx_time = 0;
psrtpriv->last_tx_complete_time = 0;
}
u8 sreset_get_wifi_status(struct adapter *padapter)
@ -50,9 +37,7 @@ u8 sreset_get_wifi_status(struct adapter *padapter)
u8 status = WIFI_STATUS_SUCCESS;
u32 val32 = 0;
if (psrtpriv->silent_reset_inprogress)
return status;
val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
val32 = usb_read32(padapter, REG_TXDMA_STATUS);
if (val32 == 0xeaeaeaea) {
psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
} else if (val32 != 0) {

267
core/rtw_sta_mgt.c
View file

@ -25,15 +25,15 @@
#include <xmit_osdep.h>
#include <mlme_osdep.h>
#include <sta_info.h>
#include <linux/vmalloc.h>
static void _rtw_init_stainfo(struct sta_info *psta)
{
_func_enter_;
_rtw_memset((u8 *)psta, 0, sizeof (struct sta_info));
memset((u8 *)psta, 0, sizeof(struct sta_info));
_rtw_spinlock_init(&psta->lock);
_rtw_init_listhead(&psta->list);
_rtw_init_listhead(&psta->hash_list);
spin_lock_init(&psta->lock);
INIT_LIST_HEAD(&psta->list);
INIT_LIST_HEAD(&psta->hash_list);
_rtw_init_queue(&psta->sleep_q);
psta->sleepq_len = 0;
@ -42,9 +42,9 @@ _func_enter_;
#ifdef CONFIG_88EU_AP_MODE
_rtw_init_listhead(&psta->asoc_list);
INIT_LIST_HEAD(&psta->asoc_list);
_rtw_init_listhead(&psta->auth_list);
INIT_LIST_HEAD(&psta->auth_list);
psta->expire_to = 0;
@ -69,7 +69,6 @@ _func_enter_;
#endif /* CONFIG_88EU_AP_MODE */
_func_exit_;
}
u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
@ -77,9 +76,8 @@ u32 _rtw_init_sta_priv(struct sta_priv *pstapriv)
struct sta_info *psta;
s32 i;
_func_enter_;
pstapriv->pallocated_stainfo_buf = rtw_zvmalloc(sizeof(struct sta_info) * NUM_STA + 4);
pstapriv->pallocated_stainfo_buf = vzalloc(sizeof(struct sta_info) * NUM_STA + 4);
if (!pstapriv->pallocated_stainfo_buf)
return _FAIL;
@ -89,7 +87,7 @@ _func_enter_;
_rtw_init_queue(&pstapriv->free_sta_queue);
_rtw_spinlock_init(&pstapriv->sta_hash_lock);
spin_lock_init(&pstapriv->sta_hash_lock);
pstapriv->asoc_sta_count = 0;
_rtw_init_queue(&pstapriv->sleep_q);
@ -100,9 +98,9 @@ _func_enter_;
for (i = 0; i < NUM_STA; i++) {
_rtw_init_stainfo(psta);
_rtw_init_listhead(&(pstapriv->sta_hash[i]));
INIT_LIST_HEAD(&(pstapriv->sta_hash[i]));
rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
list_add_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
psta++;
}
@ -112,10 +110,10 @@ _func_enter_;
pstapriv->sta_dz_bitmap = 0;
pstapriv->tim_bitmap = 0;
_rtw_init_listhead(&pstapriv->asoc_list);
_rtw_init_listhead(&pstapriv->auth_list);
_rtw_spinlock_init(&pstapriv->asoc_list_lock);
_rtw_spinlock_init(&pstapriv->auth_list_lock);
INIT_LIST_HEAD(&pstapriv->asoc_list);
INIT_LIST_HEAD(&pstapriv->auth_list);
spin_lock_init(&pstapriv->asoc_list_lock);
spin_lock_init(&pstapriv->auth_list_lock);
pstapriv->asoc_list_cnt = 0;
pstapriv->auth_list_cnt = 0;
@ -125,7 +123,6 @@ _func_enter_;
pstapriv->max_num_sta = NUM_STA;
#endif
_func_exit_;
return _SUCCESS;
}
@ -148,136 +145,71 @@ inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int
return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info));
}
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv);
void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv)
{
_func_enter_;
_rtw_spinlock_free(&psta_xmitpriv->lock);
_rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock));
_rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock));
_func_exit_;
}
static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv)
{
_func_enter_;
_rtw_spinlock_free(&psta_recvpriv->lock);
_rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock));
_func_exit_;
}
void rtw_mfree_stainfo(struct sta_info *psta);
void rtw_mfree_stainfo(struct sta_info *psta)
{
_func_enter_;
if (&psta->lock != NULL)
_rtw_spinlock_free(&psta->lock);
_rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv);
_rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv);
_func_exit_;
}
/* this function is used to free the memory of lock || sema for all stainfos */
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv);
void rtw_mfree_all_stainfo(struct sta_priv *pstapriv)
static void rtw_mfree_all_stainfo(struct sta_priv *pstapriv)
{
unsigned long irql;
struct list_head *plist, *phead;
struct sta_info *psta = NULL;
_func_enter_;
_enter_critical_bh(&pstapriv->sta_hash_lock, &irql);
spin_lock_bh(&pstapriv->sta_hash_lock);
phead = get_list_head(&pstapriv->free_sta_queue);
plist = get_next(phead);
plist = phead->next;
while ((rtw_end_of_queue_search(phead, plist)) == false) {
psta = LIST_CONTAINOR(plist, struct sta_info , list);
plist = get_next(plist);
rtw_mfree_stainfo(psta);
while (phead != plist) {
psta = container_of(plist, struct sta_info , list);
plist = plist->next;
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irql);
spin_unlock_bh(&pstapriv->sta_hash_lock);
_func_exit_;
}
static void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv)
{
#ifdef CONFIG_88EU_AP_MODE
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
#endif
rtw_mfree_all_stainfo(pstapriv); /* be done before free sta_hash_lock */
_rtw_spinlock_free(&pstapriv->free_sta_queue.lock);
_rtw_spinlock_free(&pstapriv->sta_hash_lock);
_rtw_spinlock_free(&pstapriv->wakeup_q.lock);
_rtw_spinlock_free(&pstapriv->sleep_q.lock);
#ifdef CONFIG_88EU_AP_MODE
_rtw_spinlock_free(&pstapriv->asoc_list_lock);
_rtw_spinlock_free(&pstapriv->auth_list_lock);
_rtw_spinlock_free(&pacl_list->acl_node_q.lock);
#endif
}
u32 _rtw_free_sta_priv(struct sta_priv *pstapriv)
{
unsigned long irql;
struct list_head *phead, *plist;
struct sta_info *psta = NULL;
struct recv_reorder_ctrl *preorder_ctrl;
int index;
_func_enter_;
if (pstapriv) {
/* delete all reordering_ctrl_timer */
_enter_critical_bh(&pstapriv->sta_hash_lock, &irql);
spin_lock_bh(&pstapriv->sta_hash_lock);
for (index = 0; index < NUM_STA; index++) {
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
plist = phead->next;
while ((rtw_end_of_queue_search(phead, plist)) == false) {
while (phead != plist) {
int i;
psta = LIST_CONTAINOR(plist, struct sta_info , hash_list);
plist = get_next(plist);
psta = container_of(plist, struct sta_info , hash_list);
plist = plist->next;
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
}
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irql);
spin_unlock_bh(&pstapriv->sta_hash_lock);
/*===============================*/
rtw_mfree_sta_priv_lock(pstapriv);
if (pstapriv->pallocated_stainfo_buf)
rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4);
}
vfree(pstapriv->pallocated_stainfo_buf);
}
_func_exit_;
return _SUCCESS;
}
struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
unsigned long irql, irql2;
s32 index;
struct list_head *phash_list;
struct sta_info *psta;
@ -286,19 +218,18 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
int i = 0;
u16 wRxSeqInitialValue = 0xffff;
_func_enter_;
pfree_sta_queue = &pstapriv->free_sta_queue;
_enter_critical_bh(&(pfree_sta_queue->lock), &irql);
spin_lock_bh(&(pfree_sta_queue->lock));
if (_rtw_queue_empty(pfree_sta_queue) == true) {
_exit_critical_bh(&(pfree_sta_queue->lock), &irql);
if (list_empty(&pfree_sta_queue->queue)) {
spin_unlock_bh(&pfree_sta_queue->lock);
psta = NULL;
} else {
psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
rtw_list_delete(&(psta->list));
_exit_critical_bh(&(pfree_sta_queue->lock), &irql);
psta = container_of((&pfree_sta_queue->queue)->next, struct sta_info, list);
list_del_init(&(psta->list));
spin_unlock_bh(&pfree_sta_queue->lock);
_rtw_init_stainfo(psta);
memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
index = wifi_mac_hash(hwaddr);
@ -310,13 +241,13 @@ _func_enter_;
}
phash_list = &(pstapriv->sta_hash[index]);
_enter_critical_bh(&(pstapriv->sta_hash_lock), &irql2);
spin_lock_bh(&(pstapriv->sta_hash_lock));
rtw_list_insert_tail(&psta->hash_list, phash_list);
list_add_tail(&psta->hash_list, phash_list);
pstapriv->asoc_sta_count++ ;
pstapriv->asoc_sta_count++;
_exit_critical_bh(&(pstapriv->sta_hash_lock), &irql2);
spin_unlock_bh(&pstapriv->sta_hash_lock);
/* Commented by Albert 2009/08/13 */
/* For the SMC router, the sequence number of first packet of WPS handshake will be 0. */
@ -358,9 +289,6 @@ _func_enter_;
}
exit:
_func_exit_;
return psta;
}
@ -368,14 +296,12 @@ _func_exit_;
u32 rtw_free_stainfo(struct adapter *padapter , struct sta_info *psta)
{
int i;
unsigned long irql0;
struct __queue *pfree_sta_queue;
struct recv_reorder_ctrl *preorder_ctrl;
struct sta_xmit_priv *pstaxmitpriv;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct sta_priv *pstapriv = &padapter->stapriv;
_func_enter_;
if (psta == NULL)
goto exit;
@ -384,30 +310,30 @@ _func_enter_;
pstaxmitpriv = &psta->sta_xmitpriv;
_enter_critical_bh(&pxmitpriv->lock, &irql0);
spin_lock_bh(&pxmitpriv->lock);
rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
psta->sleepq_len = 0;
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
list_del_init(&(pstaxmitpriv->vo_q.tx_pending));
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
list_del_init(&(pstaxmitpriv->vi_q.tx_pending));
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
list_del_init(&(pstaxmitpriv->bk_q.tx_pending));
rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
list_del_init(&(pstaxmitpriv->be_q.tx_pending));
_exit_critical_bh(&pxmitpriv->lock, &irql0);
spin_unlock_bh(&pxmitpriv->lock);
rtw_list_delete(&psta->hash_list);
list_del_init(&psta->hash_list);
RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("\n free number_%d stainfo with hwaddr=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2], psta->hwaddr[3], psta->hwaddr[4], psta->hwaddr[5]));
pstapriv->asoc_sta_count--;
@ -415,38 +341,39 @@ _func_enter_;
_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
_cancel_timer_ex(&psta->addba_retry_timer);
del_timer_sync(&psta->addba_retry_timer);
/* for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer */
for (i = 0; i < 16 ; i++) {
unsigned long irql;
for (i = 0; i < 16; i++) {
struct list_head *phead, *plist;
union recv_frame *prframe;
struct recv_frame *prhdr;
struct recv_frame *prframe;
struct __queue *ppending_recvframe_queue;
struct __queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
preorder_ctrl = &psta->recvreorder_ctrl[i];
_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
_enter_critical_bh(&ppending_recvframe_queue->lock, &irql);
spin_lock_bh(&ppending_recvframe_queue->lock);
phead = get_list_head(ppending_recvframe_queue);
plist = get_next(phead);
plist = phead->next;
while (!rtw_is_list_empty(phead)) {
prframe = LIST_CONTAINOR(plist, union recv_frame, u);
while (!list_empty(phead)) {
prhdr = container_of(plist, struct recv_frame, list);
prframe = (struct recv_frame *)prhdr;
plist = get_next(plist);
plist = plist->next;
rtw_list_delete(&(prframe->u.hdr.list));
list_del_init(&(prframe->list));
rtw_free_recvframe(prframe, pfree_recv_queue);
}
_exit_critical_bh(&ppending_recvframe_queue->lock, &irql);
spin_unlock_bh(&ppending_recvframe_queue->lock);
}
if (!(psta->state & WIFI_AP_STATE))
@ -454,12 +381,12 @@ _func_enter_;
#ifdef CONFIG_88EU_AP_MODE
_enter_critical_bh(&pstapriv->auth_list_lock, &irql0);
if (!rtw_is_list_empty(&psta->auth_list)) {
rtw_list_delete(&psta->auth_list);
spin_lock_bh(&pstapriv->auth_list_lock);
if (!list_empty(&psta->auth_list)) {
list_del_init(&psta->auth_list);
pstapriv->auth_list_cnt--;
}
_exit_critical_bh(&pstapriv->auth_list_lock, &irql0);
spin_unlock_bh(&pstapriv->auth_list_lock);
psta->expire_to = 0;
@ -485,13 +412,12 @@ _func_enter_;
#endif /* CONFIG_88EU_AP_MODE */
_enter_critical_bh(&(pfree_sta_queue->lock), &irql0);
rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
_exit_critical_bh(&(pfree_sta_queue->lock), &irql0);
spin_lock_bh(&(pfree_sta_queue->lock));
list_add_tail(&psta->list, get_list_head(pfree_sta_queue));
spin_unlock_bh(&pfree_sta_queue->lock);
exit:
_func_exit_;
return _SUCCESS;
}
@ -499,52 +425,43 @@ _func_exit_;
/* free all stainfo which in sta_hash[all] */
void rtw_free_all_stainfo(struct adapter *padapter)
{
unsigned long irql;
struct list_head *plist, *phead;
s32 index;
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
struct sta_info *pbcmc_stainfo = rtw_get_bcmc_stainfo(padapter);
_func_enter_;
if (pstapriv->asoc_sta_count == 1)
goto exit;
return;
_enter_critical_bh(&pstapriv->sta_hash_lock, &irql);
spin_lock_bh(&pstapriv->sta_hash_lock);
for (index = 0; index < NUM_STA; index++) {
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
plist = phead->next;
while ((!rtw_end_of_queue_search(phead, plist))) {
psta = LIST_CONTAINOR(plist, struct sta_info , hash_list);
while (phead != plist) {
psta = container_of(plist, struct sta_info , hash_list);
plist = get_next(plist);
plist = plist->next;
if (pbcmc_stainfo != psta)
rtw_free_stainfo(padapter , psta);
}
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irql);
exit:
_func_exit_;
spin_unlock_bh(&pstapriv->sta_hash_lock);
}
/* any station allocated can be searched by hash list */
struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
{
unsigned long irql;
struct list_head *plist, *phead;
struct sta_info *psta = NULL;
u32 index;
u8 *addr;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
_func_enter_;
if (hwaddr == NULL)
return NULL;
@ -556,24 +473,23 @@ _func_enter_;
index = wifi_mac_hash(addr);
_enter_critical_bh(&pstapriv->sta_hash_lock, &irql);
spin_lock_bh(&pstapriv->sta_hash_lock);
phead = &(pstapriv->sta_hash[index]);
plist = get_next(phead);
plist = phead->next;
while ((!rtw_end_of_queue_search(phead, plist))) {
psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
while (phead != plist) {
psta = container_of(plist, struct sta_info, hash_list);
if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN)) == true) {
if ((!memcmp(psta->hwaddr, addr, ETH_ALEN)) == true) {
/* if found the matched address */
break;
}
psta = NULL;
plist = get_next(plist);
plist = plist->next;
}
_exit_critical_bh(&pstapriv->sta_hash_lock, &irql);
_func_exit_;
spin_unlock_bh(&pstapriv->sta_hash_lock);
return psta;
}
@ -584,7 +500,6 @@ u32 rtw_init_bcmc_stainfo(struct adapter *padapter)
unsigned char bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
struct sta_priv *pstapriv = &padapter->stapriv;
_func_enter_;
psta = rtw_alloc_stainfo(pstapriv, bcast_addr);
@ -598,7 +513,6 @@ _func_enter_;
psta->mac_id = 1;
exit:
_func_exit_;
return res;
}
@ -607,9 +521,7 @@ struct sta_info *rtw_get_bcmc_stainfo(struct adapter *padapter)
struct sta_info *psta;
struct sta_priv *pstapriv = &padapter->stapriv;
u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
_func_enter_;
psta = rtw_get_stainfo(pstapriv, bc_addr);
_func_exit_;
return psta;
}
@ -617,7 +529,6 @@ u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
{
u8 res = true;
#ifdef CONFIG_88EU_AP_MODE
unsigned long irql;
struct list_head *plist, *phead;
struct rtw_wlan_acl_node *paclnode;
u8 match = false;
@ -625,21 +536,21 @@ u8 rtw_access_ctrl(struct adapter *padapter, u8 *mac_addr)
struct wlan_acl_pool *pacl_list = &pstapriv->acl_list;
struct __queue *pacl_node_q = &pacl_list->acl_node_q;
_enter_critical_bh(&(pacl_node_q->lock), &irql);
spin_lock_bh(&(pacl_node_q->lock));
phead = get_list_head(pacl_node_q);
plist = get_next(phead);
while ((!rtw_end_of_queue_search(phead, plist))) {
paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list);
plist = get_next(plist);
plist = phead->next;
while (phead != plist) {
paclnode = container_of(plist, struct rtw_wlan_acl_node, list);
plist = plist->next;
if (_rtw_memcmp(paclnode->addr, mac_addr, ETH_ALEN)) {
if (!memcmp(paclnode->addr, mac_addr, ETH_ALEN)) {
if (paclnode->valid) {
match = true;
break;
}
}
}
_exit_critical_bh(&(pacl_node_q->lock), &irql);
spin_unlock_bh(&pacl_node_q->lock);
if (pacl_list->mode == 1)/* accept unless in deny list */
res = (match) ? false : true;

124
core/rtw_wlan_util.c
View file

@ -80,7 +80,7 @@ int cckratesonly_included(unsigned char *rate, int ratelen)
for (i = 0; i < ratelen; i++) {
if ((((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) &&
(((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22))
return false;
return false;
}
return true;
@ -239,7 +239,7 @@ void get_rate_set(struct adapter *padapter, unsigned char *pbssrate, int *bssrat
{
unsigned char supportedrates[NumRates];
_rtw_memset(supportedrates, 0, NumRates);
memset(supportedrates, 0, NumRates);
*bssrate_len = ratetbl2rateset(padapter, supportedrates);
memcpy(pbssrate, supportedrates, *bssrate_len);
}
@ -541,7 +541,7 @@ void flush_all_cam_entry(struct adapter *padapter)
rtw_hal_set_hwreg(padapter, HW_VAR_CAM_INVALID_ALL, NULL);
_rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info));
memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info));
}
int WMM_param_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
@ -766,7 +766,7 @@ void HT_caps_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
for (i = 0; i < (pIE->Length); i++) {
if (i != 2) {
/* Got the endian issue here. */
/* Got the endian issue here. */
pmlmeinfo->HT_caps.u.HT_cap[i] &= (pIE->data[i]);
} else {
/* modify from fw by Thomas 2010/11/17 */
@ -912,12 +912,12 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
unsigned char *pbuf;
u32 wpa_ielen = 0;
u8 *pbssid = GetAddr3Ptr(pframe);
u32 hidden_ssid = 0;
struct HT_info_element *pht_info = NULL;
struct rtw_ieee80211_ht_cap *pht_cap = NULL;
u32 bcn_channel;
unsigned short ht_cap_info;
unsigned char ht_info_infos_0;
int ssid_len;
if (is_client_associated_to_ap(Adapter) == false)
return true;
@ -929,13 +929,13 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
return _FAIL;
}
if (_rtw_memcmp(cur_network->network.MacAddress, pbssid, 6) == false) {
if (!memcmp(cur_network->network.MacAddress, pbssid, 6) == false) {
DBG_88E("Oops: rtw_check_network_encrypt linked but recv other bssid bcn\n%pM %pM\n",
(pbssid), (cur_network->network.MacAddress));
return true;
}
bssid = (struct wlan_bssid_ex *)rtw_zmalloc(sizeof(struct wlan_bssid_ex));
bssid = kzalloc(sizeof(struct wlan_bssid_ex), GFP_ATOMIC);
subtype = GetFrameSubType(pframe) >> 4;
@ -999,28 +999,22 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
}
/* checking SSID */
ssid_len = 0;
p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_);
if (p == NULL) {
DBG_88E("%s marc: cannot find SSID for survey event\n", __func__);
hidden_ssid = true;
} else {
hidden_ssid = false;
}
if ((NULL != p) && (false == hidden_ssid && (*(p + 1)))) {
memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1));
bssid->Ssid.SsidLength = *(p + 1);
} else {
bssid->Ssid.SsidLength = 0;
bssid->Ssid.Ssid[0] = '\0';
if (p) {
ssid_len = *(p + 1);
if (ssid_len > NDIS_802_11_LENGTH_SSID)
ssid_len = 0;
}
memcpy(bssid->Ssid.Ssid, (p + 2), ssid_len);
bssid->Ssid.SsidLength = ssid_len;
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("%s bssid.Ssid.Ssid:%s bssid.Ssid.SsidLength:%d "
"cur_network->network.Ssid.Ssid:%s len:%d\n", __func__, bssid->Ssid.Ssid,
bssid->Ssid.SsidLength, cur_network->network.Ssid.Ssid,
cur_network->network.Ssid.SsidLength));
if (!_rtw_memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) ||
if (memcmp(bssid->Ssid.Ssid, cur_network->network.Ssid.Ssid, 32) ||
bssid->Ssid.SsidLength != cur_network->network.Ssid.SsidLength) {
if (bssid->Ssid.Ssid[0] != '\0' && bssid->Ssid.SsidLength != 0) { /* not hidden ssid */
DBG_88E("%s(), SSID is not match return FAIL\n", __func__);
@ -1056,7 +1050,7 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
}
if (cur_network->BcnInfo.encryp_protocol != encryp_protocol) {
DBG_88E("%s(): enctyp is not match , return FAIL\n", __func__);
DBG_88E("%s(): encryption protocol is not match , return FAIL\n", __func__);
goto _mismatch;
}
@ -1096,12 +1090,10 @@ int rtw_check_bcn_info(struct adapter *Adapter, u8 *pframe, u32 packet_len)
}
kfree(bssid);
_func_exit_;
return _SUCCESS;
_mismatch:
kfree(bssid);
_func_exit_;
return _FAIL;
}
@ -1147,11 +1139,11 @@ unsigned int is_ap_in_tkip(struct adapter *padapter)
switch (pIE->ElementID) {
case _VENDOR_SPECIFIC_IE_:
if ((_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4)) && (_rtw_memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4)))
if ((!memcmp(pIE->data, RTW_WPA_OUI, 4)) && (!memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4)))
return true;
break;
case _RSN_IE_2_:
if (_rtw_memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4))
if (!memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4))
return true;
default:
break;
@ -1178,15 +1170,15 @@ unsigned int should_forbid_n_rate(struct adapter *padapter)
switch (pIE->ElementID) {
case _VENDOR_SPECIFIC_IE_:
if (_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4) &&
((_rtw_memcmp((pIE->data + 12), WPA_CIPHER_SUITE_CCMP, 4)) ||
(_rtw_memcmp((pIE->data + 16), WPA_CIPHER_SUITE_CCMP, 4))))
if (!memcmp(pIE->data, RTW_WPA_OUI, 4) &&
((!memcmp((pIE->data + 12), WPA_CIPHER_SUITE_CCMP, 4)) ||
(!memcmp((pIE->data + 16), WPA_CIPHER_SUITE_CCMP, 4))))
return false;
break;
case _RSN_IE_2_:
if ((_rtw_memcmp((pIE->data + 8), RSN_CIPHER_SUITE_CCMP, 4)) ||
(_rtw_memcmp((pIE->data + 12), RSN_CIPHER_SUITE_CCMP, 4)))
return false;
if ((!memcmp((pIE->data + 8), RSN_CIPHER_SUITE_CCMP, 4)) ||
(!memcmp((pIE->data + 12), RSN_CIPHER_SUITE_CCMP, 4)))
return false;
default:
break;
}
@ -1214,7 +1206,7 @@ unsigned int is_ap_in_wep(struct adapter *padapter)
switch (pIE->ElementID) {
case _VENDOR_SPECIFIC_IE_:
if (_rtw_memcmp(pIE->data, RTW_WPA_OUI, 4))
if (!memcmp(pIE->data, RTW_WPA_OUI, 4))
return false;
break;
case _RSN_IE_2_:
@ -1230,7 +1222,7 @@ unsigned int is_ap_in_wep(struct adapter *padapter)
}
}
int wifirate2_ratetbl_inx(unsigned char rate)
static int wifirate2_ratetbl_inx(unsigned char rate)
{
int inx = 0;
rate = rate & 0x7f;
@ -1365,16 +1357,7 @@ void set_sta_rate(struct adapter *padapter, struct sta_info *psta)
void update_tx_basic_rate(struct adapter *padapter, u8 wirelessmode)
{
unsigned char supported_rates[NDIS_802_11_LENGTH_RATES_EX];
#ifdef CONFIG_88EU_P2P
struct wifidirect_info *pwdinfo = &padapter->wdinfo;
/* Added by Albert 2011/03/22 */
/* In the P2P mode, the driver should not support the b mode. */
/* So, the Tx packet shouldn't use the CCK rate */
if (!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE))
return;
#endif /* CONFIG_88EU_P2P */
_rtw_memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX);
memset(supported_rates, 0, NDIS_802_11_LENGTH_RATES_EX);
if ((wirelessmode & WIRELESS_11B) && (wirelessmode == WIRELESS_11B))
memcpy(supported_rates, rtw_basic_rate_cck, 4);
@ -1406,36 +1389,35 @@ unsigned char check_assoc_AP(u8 *pframe, uint len)
switch (pIE->ElementID) {
case _VENDOR_SPECIFIC_IE_:
if ((_rtw_memcmp(pIE->data, ARTHEROS_OUI1, 3)) ||
(_rtw_memcmp(pIE->data, ARTHEROS_OUI2, 3))) {
if ((!memcmp(pIE->data, ARTHEROS_OUI1, 3)) ||
(!memcmp(pIE->data, ARTHEROS_OUI2, 3))) {
DBG_88E("link to Artheros AP\n");
return HT_IOT_PEER_ATHEROS;
} else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) ||
(_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) ||
(_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3))) {
} else if ((!memcmp(pIE->data, BROADCOM_OUI1, 3)) ||
(!memcmp(pIE->data, BROADCOM_OUI2, 3))) {
DBG_88E("link to Broadcom AP\n");
return HT_IOT_PEER_BROADCOM;
} else if (_rtw_memcmp(pIE->data, MARVELL_OUI, 3)) {
} else if (!memcmp(pIE->data, MARVELL_OUI, 3)) {
DBG_88E("link to Marvell AP\n");
return HT_IOT_PEER_MARVELL;
} else if (_rtw_memcmp(pIE->data, RALINK_OUI, 3)) {
} else if (!memcmp(pIE->data, RALINK_OUI, 3)) {
if (!ralink_vendor_flag) {
ralink_vendor_flag = 1;
} else {
DBG_88E("link to Ralink AP\n");
return HT_IOT_PEER_RALINK;
}
} else if (_rtw_memcmp(pIE->data, CISCO_OUI, 3)) {
} else if (!memcmp(pIE->data, CISCO_OUI, 3)) {
DBG_88E("link to Cisco AP\n");
return HT_IOT_PEER_CISCO;
} else if (_rtw_memcmp(pIE->data, REALTEK_OUI, 3)) {
} else if (!memcmp(pIE->data, REALTEK_OUI, 3)) {
DBG_88E("link to Realtek 96B\n");
return HT_IOT_PEER_REALTEK;
} else if (_rtw_memcmp(pIE->data, AIRGOCAP_OUI, 3)) {
} else if (!memcmp(pIE->data, AIRGOCAP_OUI, 3)) {
DBG_88E("link to Airgo Cap\n");
return HT_IOT_PEER_AIRGO;
} else if (_rtw_memcmp(pIE->data, EPIGRAM_OUI, 3)) {
epigram_vendor_flag = 1;
} else if (!memcmp(pIE->data, EPIGRAM_OUI, 3)) {
epigram_vendor_flag = 1;
if (ralink_vendor_flag) {
DBG_88E("link to Tenda W311R AP\n");
return HT_IOT_PEER_TENDA;
@ -1607,13 +1589,18 @@ int update_sta_support_rate(struct adapter *padapter, u8 *pvar_ie, uint var_ie_l
pIE = (struct ndis_802_11_var_ie *)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len);
if (pIE == NULL)
return _FAIL;
if (ie_len > NDIS_802_11_LENGTH_RATES_EX)
return _FAIL;
memcpy(pmlmeinfo->FW_sta_info[cam_idx].SupportedRates, pIE->data, ie_len);
supportRateNum = ie_len;
pIE = (struct ndis_802_11_var_ie *)rtw_get_ie(pvar_ie, _EXT_SUPPORTEDRATES_IE_, &ie_len, var_ie_len);
if (pIE)
if (pIE) {
if (supportRateNum + ie_len > NDIS_802_11_LENGTH_RATES_EX)
return _FAIL;
memcpy((pmlmeinfo->FW_sta_info[cam_idx].SupportedRates + supportRateNum), pIE->data, ie_len);
}
return _SUCCESS;
}
@ -1664,26 +1651,3 @@ void beacon_timing_control(struct adapter *padapter)
{
rtw_hal_bcn_related_reg_setting(padapter);
}
static struct adapter *pbuddy_padapter;
int rtw_handle_dualmac(struct adapter *adapter, bool init)
{
int status = _SUCCESS;
if (init) {
if (pbuddy_padapter == NULL) {
pbuddy_padapter = adapter;
DBG_88E("%s(): pbuddy_padapter == NULL, Set pbuddy_padapter\n", __func__);
} else {
adapter->pbuddy_adapter = pbuddy_padapter;
pbuddy_padapter->pbuddy_adapter = adapter;
/* clear global value */
pbuddy_padapter = NULL;
DBG_88E("%s(): pbuddy_padapter exist, Exchange Information\n", __func__);
}
} else {
pbuddy_padapter = NULL;
}
return status;
}

527
core/rtw_xmit.c
View file

File diff suppressed because it is too large Load diff

17
hal/Hal8188ERateAdaptive.c
View file

@ -331,6 +331,7 @@ static void odm_RateDecision_8188E(struct odm_dm_struct *dm_odm,
static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_info *pRaInfo)
{ /* Wilson 2011/10/26 */
struct adapter *adapt = dm_odm->Adapter;
u32 MaskFromReg;
s8 i;
@ -357,19 +358,19 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf
pRaInfo->RAUseRate = (pRaInfo->RateMask)&0x0000000d;
break;
case 12:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR0);
MaskFromReg = usb_read32(adapt, REG_ARFR0);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 13:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR1);
MaskFromReg = usb_read32(adapt, REG_ARFR1);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 14:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR2);
MaskFromReg = usb_read32(adapt, REG_ARFR2);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
case 15:
MaskFromReg = ODM_Read4Byte(dm_odm, REG_ARFR3);
MaskFromReg = usb_read32(adapt, REG_ARFR3);
pRaInfo->RAUseRate = (pRaInfo->RateMask)&MaskFromReg;
break;
default:
@ -529,9 +530,7 @@ ODM_RASupport_Init(
{
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n"));
/* 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!! */
if (dm_odm->SupportICType == ODM_RTL8188E)
dm_odm->RaSupport88E = true;
dm_odm->RaSupport88E = true;
}
int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 macid)
@ -669,7 +668,9 @@ void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid, u8 Rssi)
void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime)
{
ODM_Write2Byte(dm_odm, REG_TX_RPT_TIME, minRptTime);
struct adapter *adapt = dm_odm->Adapter;
usb_write16(adapt, REG_TX_RPT_TIME, minRptTime);
}
void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16 TxRPT_Len, u32 macid_entry0, u32 macid_entry1)

231
hal/HalHWImg8188E_MAC.c
View file

@ -1,231 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#include <rtw_iol.h>
static bool Checkcondition(const u32 condition, const u32 hex)
{
u32 _board = (hex & 0x000000FF);
u32 _interface = (hex & 0x0000FF00) >> 8;
u32 _platform = (hex & 0x00FF0000) >> 16;
u32 cond = condition;
if (condition == 0xCDCDCDCD)
return true;
cond = condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = condition & 0x00FF0000;
cond = cond >> 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
}
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
static u32 array_MAC_REG_8188E[] = {
0x026, 0x00000041,
0x027, 0x00000035,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x431, 0x00000001,
0x432, 0x00000002,
0x433, 0x00000004,
0x434, 0x00000005,
0x435, 0x00000006,
0x436, 0x00000007,
0x437, 0x00000008,
0x438, 0x00000000,
0x439, 0x00000000,
0x43A, 0x00000001,
0x43B, 0x00000002,
0x43C, 0x00000004,
0x43D, 0x00000005,
0x43E, 0x00000006,
0x43F, 0x00000007,
0x440, 0x0000005D,
0x441, 0x00000001,
0x442, 0x00000000,
0x444, 0x00000015,
0x445, 0x000000F0,
0x446, 0x0000000F,
0x447, 0x00000000,
0x458, 0x00000041,
0x459, 0x000000A8,
0x45A, 0x00000072,
0x45B, 0x000000B9,
0x460, 0x00000066,
0x461, 0x00000066,
0x480, 0x00000008,
0x4C8, 0x000000FF,
0x4C9, 0x00000008,
0x4CC, 0x000000FF,
0x4CD, 0x000000FF,
0x4CE, 0x00000001,
0x4D3, 0x00000001,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
0x503, 0x00000000,
0x504, 0x00000028,
0x505, 0x000000A3,
0x506, 0x0000005E,
0x507, 0x00000000,
0x508, 0x0000002B,
0x509, 0x000000A4,
0x50A, 0x0000005E,
0x50B, 0x00000000,
0x50C, 0x0000004F,
0x50D, 0x000000A4,
0x50E, 0x00000000,
0x50F, 0x00000000,
0x512, 0x0000001C,
0x514, 0x0000000A,
0x516, 0x0000000A,
0x525, 0x0000004F,
0x550, 0x00000010,
0x551, 0x00000010,
0x559, 0x00000002,
0x55D, 0x000000FF,
0x605, 0x00000030,
0x608, 0x0000000E,
0x609, 0x0000002A,
0x620, 0x000000FF,
0x621, 0x000000FF,
0x622, 0x000000FF,
0x623, 0x000000FF,
0x624, 0x000000FF,
0x625, 0x000000FF,
0x626, 0x000000FF,
0x627, 0x000000FF,
0x652, 0x00000020,
0x63C, 0x0000000A,
0x63D, 0x0000000A,
0x63E, 0x0000000E,
0x63F, 0x0000000E,
0x640, 0x00000040,
0x66E, 0x00000005,
0x700, 0x00000021,
0x701, 0x00000043,
0x702, 0x00000065,
0x703, 0x00000087,
0x708, 0x00000021,
0x709, 0x00000043,
0x70A, 0x00000065,
0x70B, 0x00000087,
};
enum HAL_STATUS ODM_ReadAndConfig_MAC_REG_8188E(struct odm_dm_struct *dm_odm)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = array[i]; v2 = array[i+1]; } while (0)
u32 hex = 0;
u32 i;
u8 platform = dm_odm->SupportPlatform;
u8 interface_val = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 array_len = sizeof(array_MAC_REG_8188E)/sizeof(u32);
u32 *array = array_MAC_REG_8188E;
bool biol = false;
struct adapter *adapt = dm_odm->Adapter;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interface_val << 8;
hex += platform << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapt);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(adapt);
if (pxmit_frame == NULL) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
for (i = 0; i < array_len; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame, (u16)v1, (u8)v2, 0xFF);
} else {
odm_ConfigMAC_8188E(dm_odm, v1, (u8)v2);
}
continue;
} else { /* This line is the start line of branch. */
if (!Checkcondition(array[i], hex)) {
/* Discard the following (offset, data) pairs. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < array_len - 2) {
READ_NEXT_PAIR(v1, v2, i);
}
i -= 2; /* prevent from for-loop += 2 */
} else { /* Configure matched pairs and skip to end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < array_len - 2) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame, (u16)v1, (u8)v2, 0xFF);
} else {
odm_ConfigMAC_8188E(dm_odm, v1, (u8)v2);
}
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < array_len - 2)
READ_NEXT_PAIR(v1, v2, i);
}
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
pr_info("~~~ MAC IOL_exec_cmds Failed !!!\n");
rst = HAL_STATUS_FAILURE;
}
}
return rst;
}

269
hal/HalHWImg8188E_RF.c
View file

@ -1,269 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#include <rtw_iol.h>
static bool CheckCondition(const u32 Condition, const u32 Hex)
{
u32 _board = (Hex & 0x000000FF);
u32 _interface = (Hex & 0x0000FF00) >> 8;
u32 _platform = (Hex & 0x00FF0000) >> 16;
u32 cond = Condition;
if (Condition == 0xCDCDCDCD)
return true;
cond = Condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
}
/******************************************************************************
* RadioA_1T.TXT
******************************************************************************/
static u32 Array_RadioA_1T_8188E[] = {
0x000, 0x00030000,
0x008, 0x00084000,
0x018, 0x00000407,
0x019, 0x00000012,
0x01E, 0x00080009,
0x01F, 0x00000880,
0x02F, 0x0001A060,
0x03F, 0x00000000,
0x042, 0x000060C0,
0x057, 0x000D0000,
0x058, 0x000BE180,
0x067, 0x00001552,
0x083, 0x00000000,
0x0B0, 0x000FF8FC,
0x0B1, 0x00054400,
0x0B2, 0x000CCC19,
0x0B4, 0x00043003,
0x0B6, 0x0004953E,
0x0B7, 0x0001C718,
0x0B8, 0x000060FF,
0x0B9, 0x00080001,
0x0BA, 0x00040000,
0x0BB, 0x00000400,
0x0BF, 0x000C0000,
0x0C2, 0x00002400,
0x0C3, 0x00000009,
0x0C4, 0x00040C91,
0x0C5, 0x00099999,
0x0C6, 0x000000A3,
0x0C7, 0x00088820,
0x0C8, 0x00076C06,
0x0C9, 0x00000000,
0x0CA, 0x00080000,
0x0DF, 0x00000180,
0x0EF, 0x000001A0,
0x051, 0x0006B27D,
0xFF0F041F, 0xABCD,
0x052, 0x0007E4DD,
0xCDCDCDCD, 0xCDCD,
0x052, 0x0007E49D,
0xFF0F041F, 0xDEAD,
0x053, 0x00000073,
0x056, 0x00051FF3,
0x035, 0x00000086,
0x035, 0x00000186,
0x035, 0x00000286,
0x036, 0x00001C25,
0x036, 0x00009C25,
0x036, 0x00011C25,
0x036, 0x00019C25,
0x0B6, 0x00048538,
0x018, 0x00000C07,
0x05A, 0x0004BD00,
0x019, 0x000739D0,
0x034, 0x0000ADF3,
0x034, 0x00009DF0,
0x034, 0x00008DED,
0x034, 0x00007DEA,
0x034, 0x00006DE7,
0x034, 0x000054EE,
0x034, 0x000044EB,
0x034, 0x000034E8,
0x034, 0x0000246B,
0x034, 0x00001468,
0x034, 0x0000006D,
0x000, 0x00030159,
0x084, 0x00068200,
0x086, 0x000000CE,
0x087, 0x00048A00,
0x08E, 0x00065540,
0x08F, 0x00088000,
0x0EF, 0x000020A0,
0x03B, 0x000F02B0,
0x03B, 0x000EF7B0,
0x03B, 0x000D4FB0,
0x03B, 0x000CF060,
0x03B, 0x000B0090,
0x03B, 0x000A0080,
0x03B, 0x00090080,
0x03B, 0x0008F780,
0x03B, 0x000722B0,
0x03B, 0x0006F7B0,
0x03B, 0x00054FB0,
0x03B, 0x0004F060,
0x03B, 0x00030090,
0x03B, 0x00020080,
0x03B, 0x00010080,
0x03B, 0x0000F780,
0x0EF, 0x000000A0,
0x000, 0x00010159,
0x018, 0x0000F407,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01F, 0x00080003,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01E, 0x00000001,
0x01F, 0x00080000,
0x000, 0x00033E60,
};
enum HAL_STATUS ODM_ReadAndConfig_RadioA_1T_8188E(struct odm_dm_struct *pDM_Odm)
{
#define READ_NEXT_PAIR(v1, v2, i) do \
{ i += 2; v1 = Array[i]; \
v2 = Array[i+1]; } while (0)
u32 hex = 0;
u32 i = 0;
u8 platform = pDM_Odm->SupportPlatform;
u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u32);
u32 *Array = Array_RadioA_1T_8188E;
bool biol = false;
struct adapter *Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(Adapter);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(Adapter);
if (pxmit_frame == NULL) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
for (i = 0; i < ArrayLen; i += 2) {
u32 v1 = Array[i];
u32 v2 = Array[i+1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xffe)
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50);
else if (v1 == 0xfd)
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5);
else if (v1 == 0xfc)
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1);
else if (v1 == 0xfb)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50);
else if (v1 == 0xfa)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
else if (v1 == 0xf9)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
else
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u16)v1, v2, bRFRegOffsetMask);
} else {
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
continue;
} else { /* This line is the start line of branch. */
if (!CheckCondition(Array[i], hex)) {
/* Discard the following (offset, data) pairs. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else { /* Configure matched pairs and skip to end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xffe)
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50);
else if (v1 == 0xfd)
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5);
else if (v1 == 0xfc)
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1);
else if (v1 == 0xfb)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50);
else if (v1 == 0xfa)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
else if (v1 == 0xf9)
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
else
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A, (u16)v1, v2, bRFRegOffsetMask);
} else {
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
READ_NEXT_PAIR(v1, v2, i);
}
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
}
}
return rst;
}

49
hal/HalPhyRf.c
View file

@ -1,49 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
/* 3============================================================ */
/* 3 IQ Calibration */
/* 3============================================================ */
void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm)
{
}
u8 ODM_GetRightChnlPlaceforIQK(u8 chnl)
{
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
155, 157, 159, 161, 163, 165
};
u8 place = chnl;
if (chnl > 14) {
for (place = 14; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
return place-13;
}
}
return 0;
}

1505
hal/HalPhyRf_8188e.c
View file

File diff suppressed because it is too large Load diff

472
hal/HalHWImg8188E_BB.c → hal/bb_cfg.c
View file

@ -20,7 +20,7 @@
#include "odm_precomp.h"
#include <rtw_iol.h>
#include <phy.h>
#define read_next_pair(array, v1, v2, i) \
do { \
@ -29,36 +29,8 @@
v2 = array[i+1]; \
} while (0)
static bool CheckCondition(const u32 condition, const u32 hex)
{
u32 _board = (hex & 0x000000FF);
u32 _interface = (hex & 0x0000FF00) >> 8;
u32 _platform = (hex & 0x00FF0000) >> 16;
u32 cond = condition;
if (condition == 0xCDCDCDCD)
return true;
cond = condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = condition & 0x00FF0000;
cond = cond >> 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
}
/******************************************************************************
* AGC_TAB_1T.TXT
******************************************************************************/
/* AGC_TAB_1T.TXT */
static u32 array_agc_tab_1t_8188e[] = {
0xC78, 0xFB000001,
@ -191,91 +163,25 @@ static u32 array_agc_tab_1t_8188e[] = {
0xC78, 0x407F0001,
};
enum HAL_STATUS ODM_ReadAndConfig_AGC_TAB_1T_8188E(struct odm_dm_struct *dm_odm)
static bool set_baseband_agc_config(struct adapter *adapt)
{
u32 hex = 0;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32);
u32 *array = array_agc_tab_1t_8188e;
bool biol = false;
struct adapter *adapter = dm_odm->Adapter;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapter);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
if (pxmit_frame == NULL) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
u32 i;
u32 arraylen = sizeof(array_agc_tab_1t_8188e)/sizeof(u32);
u32 *array = array_agc_tab_1t_8188e;
for (i = 0; i < arraylen; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
} else {
odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2);
}
continue;
} else {
/* This line is the start line of branch. */
if (!CheckCondition(array[i], hex)) {
/* Discard the following (offset, data) pairs. */
read_next_pair(array, v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < arraylen - 2)
read_next_pair(array, v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else { /* Configure matched pairs and skip to end of if-else. */
read_next_pair(array, v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < arraylen - 2) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
} else {
odm_ConfigBB_AGC_8188E(dm_odm, v1, bMaskDWord, v2);
}
read_next_pair(array, v1, v2, i);
}
while (v2 != 0xDEAD && i < arraylen - 2)
read_next_pair(array, v1, v2, i);
}
phy_set_bb_reg(adapt, v1, bMaskDWord, v2);
udelay(1);
}
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
printk("~~~ %s IOL_exec_cmds Failed !!!\n", __func__);
rst = HAL_STATUS_FAILURE;
}
}
return rst;
return true;
}
/******************************************************************************
* PHY_REG_1T.TXT
******************************************************************************/
/* PHY_REG_1T.TXT */
static u32 array_phy_reg_1t_8188e[] = {
0x800, 0x80040000,
@ -471,122 +377,44 @@ static u32 array_phy_reg_1t_8188e[] = {
0xF00, 0x00000300,
};
enum HAL_STATUS ODM_ReadAndConfig_PHY_REG_1T_8188E(struct odm_dm_struct *dm_odm)
static void rtl_bb_delay(struct adapter *adapt, u32 addr, u32 data)
{
u32 hex = 0;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32);
u32 *array = array_phy_reg_1t_8188e;
bool biol = false;
struct adapter *adapter = dm_odm->Adapter;
struct xmit_frame *pxmit_frame = NULL;
u8 bndy_cnt = 1;
enum HAL_STATUS rst = HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
biol = rtw_IOL_applied(adapter);
if (biol) {
pxmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
if (pxmit_frame == NULL) {
pr_info("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
if (addr == 0xfe) {
msleep(50);
} else if (addr == 0xfd) {
mdelay(5);
} else if (addr == 0xfc) {
mdelay(1);
} else if (addr == 0xfb) {
udelay(50);
} else if (addr == 0xfa) {
udelay(5);
} else if (addr == 0xf9) {
udelay(1);
} else {
phy_set_bb_reg(adapt, addr, bMaskDWord, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
}
}
static bool set_baseband_phy_config(struct adapter *adapt)
{
u32 i;
u32 arraylen = sizeof(array_phy_reg_1t_8188e)/sizeof(u32);
u32 *array = array_phy_reg_1t_8188e;
for (i = 0; i < arraylen; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xfe) {
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50);
} else if (v1 == 0xfd) {
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5);
} else if (v1 == 0xfc) {
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1);
} else if (v1 == 0xfb) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50);
} else if (v1 == 0xfa) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
} else if (v1 == 0xf9) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
} else {
if (v1 == 0xa24)
dm_odm->RFCalibrateInfo.RegA24 = v2;
rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
}
} else {
odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2);
}
continue;
} else { /* This line is the start line of branch. */
if (!CheckCondition(array[i], hex)) {
/* Discard the following (offset, data) pairs. */
read_next_pair(array, v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < arraylen - 2)
read_next_pair(array, v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else { /* Configure matched pairs and skip to end of if-else. */
read_next_pair(array, v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < arraylen - 2) {
if (biol) {
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xfe) {
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 50);
} else if (v1 == 0xfd) {
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 5);
} else if (v1 == 0xfc) {
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame, 1);
} else if (v1 == 0xfb) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 50);
} else if (v1 == 0xfa) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 5);
} else if (v1 == 0xf9) {
rtw_IOL_append_DELAY_US_cmd(pxmit_frame, 1);
} else{
if (v1 == 0xa24)
dm_odm->RFCalibrateInfo.RegA24 = v2;
rtw_IOL_append_WD_cmd(pxmit_frame, (u16)v1, v2, bMaskDWord);
}
} else {
odm_ConfigBB_PHY_8188E(dm_odm, v1, bMaskDWord, v2);
}
read_next_pair(array, v1, v2, i);
}
while (v2 != 0xDEAD && i < arraylen - 2)
read_next_pair(array, v1, v2, i);
}
}
if (v1 < 0xCDCDCDCD)
rtl_bb_delay(adapt, v1, v2);
}
if (biol) {
if (!rtw_IOL_exec_cmds_sync(dm_odm->Adapter, pxmit_frame, 1000, bndy_cnt)) {
rst = HAL_STATUS_FAILURE;
pr_info("~~~ IOL Config %s Failed !!!\n", __func__);
}
}
return rst;
return true;
}
/******************************************************************************
* PHY_REG_PG.TXT
******************************************************************************/
/* PHY_REG_PG.TXT */
static u32 array_phy_reg_pg_8188e[] = {
0xE00, 0xFFFFFFFF, 0x06070809,
@ -680,42 +508,208 @@ static u32 array_phy_reg_pg_8188e[] = {
};
void ODM_ReadAndConfig_PHY_REG_PG_8188E(struct odm_dm_struct *dm_odm)
static void store_pwrindex_offset(struct adapter *Adapter, u32 regaddr, u32 bitmask, u32 data)
{
u32 hex;
u32 i = 0;
u8 platform = dm_odm->SupportPlatform;
u8 interfaceValue = dm_odm->SupportInterface;
u8 board = dm_odm->BoardType;
u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32);
u32 *array = array_phy_reg_pg_8188e;
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
hex = board + (interfaceValue << 8);
hex += (platform << 16) + 0xFF000000;
if (regaddr == rTxAGC_A_Rate18_06)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][0] = data;
if (regaddr == rTxAGC_A_Rate54_24)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][1] = data;
if (regaddr == rTxAGC_A_CCK1_Mcs32)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][6] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][7] = data;
if (regaddr == rTxAGC_A_Mcs03_Mcs00)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][2] = data;
if (regaddr == rTxAGC_A_Mcs07_Mcs04)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][3] = data;
if (regaddr == rTxAGC_A_Mcs11_Mcs08)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][4] = data;
if (regaddr == rTxAGC_A_Mcs15_Mcs12) {
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][5] = data;
if (hal_data->rf_type == RF_1T1R)
hal_data->pwrGroupCnt++;
}
if (regaddr == rTxAGC_B_Rate18_06)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][8] = data;
if (regaddr == rTxAGC_B_Rate54_24)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][9] = data;
if (regaddr == rTxAGC_B_CCK1_55_Mcs32)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][14] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][15] = data;
if (regaddr == rTxAGC_B_Mcs03_Mcs00)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][10] = data;
if (regaddr == rTxAGC_B_Mcs07_Mcs04)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][11] = data;
if (regaddr == rTxAGC_B_Mcs11_Mcs08)
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][12] = data;
if (regaddr == rTxAGC_B_Mcs15_Mcs12) {
hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][13] = data;
if (hal_data->rf_type != RF_1T1R)
hal_data->pwrGroupCnt++;
}
}
static void rtl_addr_delay(struct adapter *adapt, u32 addr, u32 bit_mask, u32 data)
{
if (addr == 0xfe) {
msleep(50);
} else if (addr == 0xfd) {
mdelay(5);
} else if (addr == 0xfc) {
mdelay(1);
} else if (addr == 0xfb) {
udelay(50);
} else if (addr == 0xfa) {
udelay(5);
} else if (addr == 0xf9) {
udelay(1);
} else{
store_pwrindex_offset(adapt, addr, bit_mask, data);
}
}
static bool config_bb_with_pgheader(struct adapter *adapt)
{
u32 i = 0;
u32 arraylen = sizeof(array_phy_reg_pg_8188e) / sizeof(u32);
u32 *array = array_phy_reg_pg_8188e;
for (i = 0; i < arraylen; i += 3) {
u32 v1 = array[i];
u32 v2 = array[i+1];
u32 v3 = array[i+2];
/* this line is a line of pure_body */
if (v1 < 0xCDCDCDCD) {
odm_ConfigBB_PHY_REG_PG_8188E(dm_odm, v1, v2, v3);
continue;
} else { /* this line is the start of branch */
if (!CheckCondition(array[i], hex)) {
/* don't need the hw_body */
i += 2; /* skip the pair of expression */
v1 = array[i];
v2 = array[i+1];
v3 = array[i+2];
while (v2 != 0xDEAD) {
i += 3;
v1 = array[i];
v2 = array[i+1];
v3 = array[i+1];
}
}
}
if (v1 < 0xCDCDCDCD)
rtl_addr_delay(adapt, v1, v2, v3);
}
return true;
}
static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *Adapter)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
hal_data->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW;
hal_data->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW;
hal_data->PHYRegDef[RF_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;
hal_data->PHYRegDef[RF_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;
hal_data->PHYRegDef[RF_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB;
hal_data->PHYRegDef[RF_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;
hal_data->PHYRegDef[RF_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;
hal_data->PHYRegDef[RF_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;
hal_data->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE;
hal_data->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE;
hal_data->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE;
hal_data->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE;
hal_data->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter;
hal_data->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter;
hal_data->PHYRegDef[RF_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter;
hal_data->PHYRegDef[RF_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter;
hal_data->PHYRegDef[RF_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter;
hal_data->PHYRegDef[RF_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter;
hal_data->PHYRegDef[RF_PATH_A].rfTxGainStage = rFPGA0_TxGainStage;
hal_data->PHYRegDef[RF_PATH_B].rfTxGainStage = rFPGA0_TxGainStage;
hal_data->PHYRegDef[RF_PATH_C].rfTxGainStage = rFPGA0_TxGainStage;
hal_data->PHYRegDef[RF_PATH_D].rfTxGainStage = rFPGA0_TxGainStage;
hal_data->PHYRegDef[RF_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1;
hal_data->PHYRegDef[RF_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1;
hal_data->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2;
hal_data->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2;
hal_data->PHYRegDef[RF_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl;
hal_data->PHYRegDef[RF_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl;
hal_data->PHYRegDef[RF_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl;
hal_data->PHYRegDef[RF_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl;
hal_data->PHYRegDef[RF_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1;
hal_data->PHYRegDef[RF_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1;
hal_data->PHYRegDef[RF_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1;
hal_data->PHYRegDef[RF_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1;
hal_data->PHYRegDef[RF_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2;
hal_data->PHYRegDef[RF_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2;
hal_data->PHYRegDef[RF_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2;
hal_data->PHYRegDef[RF_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2;
hal_data->PHYRegDef[RF_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance;
hal_data->PHYRegDef[RF_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance;
hal_data->PHYRegDef[RF_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance;
hal_data->PHYRegDef[RF_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance;
hal_data->PHYRegDef[RF_PATH_A].rfRxAFE = rOFDM0_XARxAFE;
hal_data->PHYRegDef[RF_PATH_B].rfRxAFE = rOFDM0_XBRxAFE;
hal_data->PHYRegDef[RF_PATH_C].rfRxAFE = rOFDM0_XCRxAFE;
hal_data->PHYRegDef[RF_PATH_D].rfRxAFE = rOFDM0_XDRxAFE;
hal_data->PHYRegDef[RF_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance;
hal_data->PHYRegDef[RF_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance;
hal_data->PHYRegDef[RF_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance;
hal_data->PHYRegDef[RF_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance;
hal_data->PHYRegDef[RF_PATH_A].rfTxAFE = rOFDM0_XATxAFE;
hal_data->PHYRegDef[RF_PATH_B].rfTxAFE = rOFDM0_XBTxAFE;
hal_data->PHYRegDef[RF_PATH_C].rfTxAFE = rOFDM0_XCTxAFE;
hal_data->PHYRegDef[RF_PATH_D].rfTxAFE = rOFDM0_XDTxAFE;
hal_data->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
hal_data->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
hal_data->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack;
hal_data->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack;
hal_data->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
hal_data->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
}
static bool config_parafile(struct adapter *adapt)
{
struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(adapt);
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
set_baseband_phy_config(adapt);
/* If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */
if (!pEEPROM->bautoload_fail_flag) {
hal_data->pwrGroupCnt = 0;
config_bb_with_pgheader(adapt);
}
set_baseband_agc_config(adapt);
return true;
}
bool rtl88eu_phy_bb_config(struct adapter *adapt)
{
int rtstatus = true;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u32 regval;
u8 crystal_cap;
rtl88e_phy_init_bb_rf_register_definition(adapt);
/* Enable BB and RF */
regval = usb_read16(adapt, REG_SYS_FUNC_EN);
usb_write16(adapt, REG_SYS_FUNC_EN, (u16)(regval|BIT13|BIT0|BIT1));
usb_write8(adapt, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB);
usb_write8(adapt, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB);
/* Config BB and AGC */
rtstatus = config_parafile(adapt);
/* write 0x24[16:11] = 0x24[22:17] = crystal_cap */
crystal_cap = hal_data->CrystalCap & 0x3F;
phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800, (crystal_cap | (crystal_cap << 6)));
return rtstatus;
}

236
hal/fw.c Normal file
View file

@ -0,0 +1,236 @@
/******************************************************************************
*
* Copyright(c) 2009-2013 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
*
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "fw.h"
#include "drv_types.h"
#include "usb_ops_linux.h"
#include "rtl8188e_spec.h"
#include "rtl8188e_hal.h"
#include <linux/firmware.h>
#include <linux/kmemleak.h>
static void _rtl88e_enable_fw_download(struct adapter *adapt, bool enable)
{
u8 tmp;
if (enable) {
tmp = usb_read8(adapt, REG_MCUFWDL);
usb_write8(adapt, REG_MCUFWDL, tmp | 0x01);
tmp = usb_read8(adapt, REG_MCUFWDL + 2);
usb_write8(adapt, REG_MCUFWDL + 2, tmp & 0xf7);
} else {
tmp = usb_read8(adapt, REG_MCUFWDL);
usb_write8(adapt, REG_MCUFWDL, tmp & 0xfe);
usb_write8(adapt, REG_MCUFWDL + 1, 0x00);
}
}
static void _rtl88e_fw_block_write(struct adapter *adapt,
const u8 *buffer, u32 size)
{
u32 blk_sz = sizeof(u32);
u8 *buf_ptr = (u8 *)buffer;
u32 *pu4BytePtr = (u32 *)buffer;
u32 i, offset, blk_cnt, remain;
blk_cnt = size / blk_sz;
remain = size % blk_sz;
for (i = 0; i < blk_cnt; i++) {
offset = i * blk_sz;
usb_write32(adapt, (FW_8192C_START_ADDRESS + offset),
*(pu4BytePtr + i));
}
if (remain) {
offset = blk_cnt * blk_sz;
buf_ptr += offset;
for (i = 0; i < remain; i++) {
usb_write8(adapt, (FW_8192C_START_ADDRESS +
offset + i), *(buf_ptr + i));
}
}
}
static void _rtl88e_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
{
u32 fwlen = *pfwlen;
u8 remain = (u8)(fwlen % 4);
remain = (remain == 0) ? 0 : (4 - remain);
while (remain > 0) {
pfwbuf[fwlen] = 0;
fwlen++;
remain--;
}
*pfwlen = fwlen;
}
static void _rtl88e_fw_page_write(struct adapter *adapt,
u32 page, const u8 *buffer, u32 size)
{
u8 value8;
u8 u8page = (u8)(page & 0x07);
value8 = (usb_read8(adapt, REG_MCUFWDL + 2) & 0xF8) | u8page;
usb_write8(adapt, (REG_MCUFWDL + 2), value8);
_rtl88e_fw_block_write(adapt, buffer, size);
}
static void _rtl88e_write_fw(struct adapter *adapt, u8 *buffer, u32 size)
{
u8 *buf_ptr = buffer;
u32 page_no, remain;
u32 page, offset;
_rtl88e_fill_dummy(buf_ptr, &size);
page_no = size / FW_8192C_PAGE_SIZE;
remain = size % FW_8192C_PAGE_SIZE;
for (page = 0; page < page_no; page++) {
offset = page * FW_8192C_PAGE_SIZE;
_rtl88e_fw_page_write(adapt, page, (buf_ptr + offset),
FW_8192C_PAGE_SIZE);
}
if (remain) {
offset = page_no * FW_8192C_PAGE_SIZE;
page = page_no;
_rtl88e_fw_page_write(adapt, page, (buf_ptr + offset), remain);
}
}
static void rtl88e_firmware_selfreset(struct adapter *adapt)
{
u8 u1b_tmp;
u1b_tmp = usb_read8(adapt, REG_SYS_FUNC_EN+1);
usb_write8(adapt, REG_SYS_FUNC_EN+1, (u1b_tmp & (~BIT(2))));
usb_write8(adapt, REG_SYS_FUNC_EN+1, (u1b_tmp | BIT(2)));
}
static int _rtl88e_fw_free_to_go(struct adapter *adapt)
{
int err = -EIO;
u32 counter = 0;
u32 value32;
do {
value32 = usb_read32(adapt, REG_MCUFWDL);
if (value32 & FWDL_ChkSum_rpt)
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
if (counter >= POLLING_READY_TIMEOUT_COUNT) {
goto exit;
}
value32 = usb_read32(adapt, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
value32 &= ~WINTINI_RDY;
usb_write32(adapt, REG_MCUFWDL, value32);
rtl88e_firmware_selfreset(adapt);
counter = 0;
do {
value32 = usb_read32(adapt, REG_MCUFWDL);
if (value32 & WINTINI_RDY) {
err = 0;
goto exit;
}
udelay(FW_8192C_POLLING_DELAY);
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
exit:
return err;
}
int rtl88eu_download_fw(struct adapter *adapt)
{
struct hal_data_8188e *rtlhal = GET_HAL_DATA(adapt);
struct dvobj_priv *dvobj = adapter_to_dvobj(adapt);
struct device *device = dvobj_to_dev(dvobj);
const struct firmware *fw;
const char fw_name[] = "rtlwifi/rtl8188eufw.bin";
struct rtl92c_firmware_header *pfwheader = NULL;
u8 *pfwdata;
u32 fwsize;
int err;
if (request_firmware(&fw, fw_name, device)) {
dev_err(device, "Firmware %s not available\n", fw_name);
return -ENOENT;
}
if (fw->size > FW_8188E_SIZE) {
dev_err(device, "Firmware size exceed 0x%X. Check it.\n",
FW_8188E_SIZE);
return -1;
}
pfwdata = kzalloc(FW_8188E_SIZE, GFP_KERNEL);
if (!pfwdata)
return -ENOMEM;
rtlhal->pfirmware = pfwdata;
memcpy(rtlhal->pfirmware, fw->data, fw->size);
rtlhal->fwsize = fw->size;
release_firmware(fw);
fwsize = rtlhal->fwsize;
pfwheader = (struct rtl92c_firmware_header *)pfwdata;
if (IS_FW_HEADER_EXIST(pfwheader)) {
pfwdata = pfwdata + 32;
fwsize = fwsize - 32;
}
if (usb_read8(adapt, REG_MCUFWDL) & RAM_DL_SEL) {
usb_write8(adapt, REG_MCUFWDL, 0);
rtl88e_firmware_selfreset(adapt);
}
_rtl88e_enable_fw_download(adapt, true);
usb_write8(adapt, REG_MCUFWDL, usb_read8(adapt, REG_MCUFWDL) | FWDL_ChkSum_rpt);
_rtl88e_write_fw(adapt, pfwdata, fwsize);
_rtl88e_enable_fw_download(adapt, false);
err = _rtl88e_fw_free_to_go(adapt);
return err;
}

60
hal/hal_com.c
View file

@ -319,63 +319,3 @@ void hal_init_macaddr(struct adapter *adapter)
rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR,
adapter->eeprompriv.mac_addr);
}
/*
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
void c2h_evt_clear(struct adapter *adapter)
{
rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
}
s32 c2h_evt_read(struct adapter *adapter, u8 *buf)
{
s32 ret = _FAIL;
struct c2h_evt_hdr *c2h_evt;
int i;
u8 trigger;
if (buf == NULL)
goto exit;
trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
if (trigger == C2H_EVT_HOST_CLOSE)
goto exit; /* Not ready */
else if (trigger != C2H_EVT_FW_CLOSE)
goto clear_evt; /* Not a valid value */
c2h_evt = (struct c2h_evt_hdr *)buf;
_rtw_memset(c2h_evt, 0, 16);
*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
&c2h_evt , sizeof(c2h_evt));
/* Read the content */
for (i = 0; i < c2h_evt->plen; i++)
c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL +
sizeof(*c2h_evt) + i);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_,
"c2h_evt_read(): Command Content:\n",
c2h_evt->payload, c2h_evt->plen);
ret = _SUCCESS;
clear_evt:
/*
* Clear event to notify FW we have read the command.
* If this field isn't clear, the FW won't update the next
* command message.
*/
c2h_evt_clear(adapter);
exit:
return ret;
}

113
hal/hal_intf.c
View file

@ -60,13 +60,6 @@ void rtw_hal_dm_init(struct adapter *adapt)
adapt->HalFunc.dm_init(adapt);
}
void rtw_hal_dm_deinit(struct adapter *adapt)
{
/* cancel dm timer */
if (adapt->HalFunc.dm_deinit)
adapt->HalFunc.dm_deinit(adapt);
}
void rtw_hal_sw_led_init(struct adapter *adapt)
{
if (adapt->HalFunc.InitSwLeds)
@ -116,8 +109,6 @@ uint rtw_hal_deinit(struct adapter *adapt)
{
uint status = _SUCCESS;
_func_enter_;
status = adapt->HalFunc.hal_deinit(adapt);
if (status == _SUCCESS)
@ -125,8 +116,6 @@ _func_enter_;
else
DBG_88E("\n rtw_hal_deinit: hal_init fail\n");
_func_exit_;
return status;
}
@ -167,15 +156,6 @@ void rtw_hal_set_odm_var(struct adapter *adapt,
val1, set);
}
void rtw_hal_get_odm_var(struct adapter *adapt,
enum hal_odm_variable var, void *val1,
bool set)
{
if (adapt->HalFunc.GetHalODMVarHandler)
adapt->HalFunc.GetHalODMVarHandler(adapt, var,
val1, set);
}
void rtw_hal_enable_interrupt(struct adapter *adapt)
{
if (adapt->HalFunc.enable_interrupt)
@ -211,15 +191,6 @@ u32 rtw_hal_inirp_deinit(struct adapter *adapt)
return _FAIL;
}
u8 rtw_hal_intf_ps_func(struct adapter *adapt,
enum hal_intf_ps_func efunc_id, u8 *val)
{
if (adapt->HalFunc.interface_ps_func)
return adapt->HalFunc.interface_ps_func(adapt, efunc_id,
val);
return _FAIL;
}
s32 rtw_hal_xmit(struct adapter *adapt, struct xmit_frame *pxmitframe)
{
if (adapt->HalFunc.hal_xmit)
@ -243,12 +214,6 @@ s32 rtw_hal_init_xmit_priv(struct adapter *adapt)
return _FAIL;
}
void rtw_hal_free_xmit_priv(struct adapter *adapt)
{
if (adapt->HalFunc.free_xmit_priv != NULL)
adapt->HalFunc.free_xmit_priv(adapt);
}
s32 rtw_hal_init_recv_priv(struct adapter *adapt)
{
if (adapt->HalFunc.init_recv_priv)
@ -291,36 +256,6 @@ void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg,
rssi_level);
}
/* Start specifical interface thread */
void rtw_hal_start_thread(struct adapter *adapt)
{
if (adapt->HalFunc.run_thread)
adapt->HalFunc.run_thread(adapt);
}
/* Start specifical interface thread */
void rtw_hal_stop_thread(struct adapter *adapt)
{
if (adapt->HalFunc.cancel_thread)
adapt->HalFunc.cancel_thread(adapt);
}
u32 rtw_hal_read_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask)
{
u32 data = 0;
if (adapt->HalFunc.read_bbreg)
data = adapt->HalFunc.read_bbreg(adapt, regaddr, bitmask);
return data;
}
void rtw_hal_write_bbreg(struct adapter *adapt, u32 regaddr, u32 bitmask,
u32 data)
{
if (adapt->HalFunc.write_bbreg)
adapt->HalFunc.write_bbreg(adapt, regaddr, bitmask, data);
}
u32 rtw_hal_read_rfreg(struct adapter *adapt, enum rf_radio_path rfpath,
u32 regaddr, u32 bitmask)
{
@ -394,30 +329,6 @@ void rtw_hal_sreset_init(struct adapter *adapt)
adapt->HalFunc.sreset_init_value(adapt);
}
void rtw_hal_sreset_reset(struct adapter *adapt)
{
if (adapt->HalFunc.silentreset)
adapt->HalFunc.silentreset(adapt);
}
void rtw_hal_sreset_reset_value(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_reset_value)
adapt->HalFunc.sreset_reset_value(adapt);
}
void rtw_hal_sreset_xmit_status_check(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_xmit_status_check)
adapt->HalFunc.sreset_xmit_status_check(adapt);
}
void rtw_hal_sreset_linked_status_check(struct adapter *adapt)
{
if (adapt->HalFunc.sreset_linked_status_check)
adapt->HalFunc.sreset_linked_status_check(adapt);
}
u8 rtw_hal_sreset_get_wifi_status(struct adapter *adapt)
{
u8 status = 0;
@ -427,16 +338,6 @@ u8 rtw_hal_sreset_get_wifi_status(struct adapter *adapt)
return status;
}
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt)
{
if (adapter->HalFunc.IOL_exec_cmds_sync)
return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame,
max_wating_ms,
bndy_cnt);
return _FAIL;
}
void rtw_hal_notch_filter(struct adapter *adapter, bool enable)
{
if (adapter->HalFunc.hal_notch_filter)
@ -448,17 +349,3 @@ void rtw_hal_reset_security_engine(struct adapter *adapter)
if (adapter->HalFunc.hal_reset_security_engine)
adapter->HalFunc.hal_reset_security_engine(adapter);
}
s32 rtw_hal_c2h_handler(struct adapter *adapter, struct c2h_evt_hdr *c2h_evt)
{
s32 ret = _FAIL;
if (adapter->HalFunc.c2h_handler)
ret = adapter->HalFunc.c2h_handler(adapter, c2h_evt);
return ret;
}
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter)
{
return adapter->HalFunc.c2h_id_filter_ccx;
}

134
hal/mac_cfg.c Normal file
View file

@ -0,0 +1,134 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#include "phy.h"
#include <rtw_iol.h>
/* MAC_REG.TXT */
static u32 array_MAC_REG_8188E[] = {
0x026, 0x00000041,
0x027, 0x00000035,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x431, 0x00000001,
0x432, 0x00000002,
0x433, 0x00000004,
0x434, 0x00000005,
0x435, 0x00000006,
0x436, 0x00000007,
0x437, 0x00000008,
0x438, 0x00000000,
0x439, 0x00000000,
0x43A, 0x00000001,
0x43B, 0x00000002,
0x43C, 0x00000004,
0x43D, 0x00000005,
0x43E, 0x00000006,
0x43F, 0x00000007,
0x440, 0x0000005D,
0x441, 0x00000001,
0x442, 0x00000000,
0x444, 0x00000015,
0x445, 0x000000F0,
0x446, 0x0000000F,
0x447, 0x00000000,
0x458, 0x00000041,
0x459, 0x000000A8,
0x45A, 0x00000072,
0x45B, 0x000000B9,
0x460, 0x00000066,
0x461, 0x00000066,
0x480, 0x00000008,
0x4C8, 0x000000FF,
0x4C9, 0x00000008,
0x4CC, 0x000000FF,
0x4CD, 0x000000FF,
0x4CE, 0x00000001,
0x4D3, 0x00000001,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
0x503, 0x00000000,
0x504, 0x00000028,
0x505, 0x000000A3,
0x506, 0x0000005E,
0x507, 0x00000000,
0x508, 0x0000002B,
0x509, 0x000000A4,
0x50A, 0x0000005E,
0x50B, 0x00000000,
0x50C, 0x0000004F,
0x50D, 0x000000A4,
0x50E, 0x00000000,
0x50F, 0x00000000,
0x512, 0x0000001C,
0x514, 0x0000000A,
0x516, 0x0000000A,
0x525, 0x0000004F,
0x550, 0x00000010,
0x551, 0x00000010,
0x559, 0x00000002,
0x55D, 0x000000FF,
0x605, 0x00000030,
0x608, 0x0000000E,
0x609, 0x0000002A,
0x620, 0x000000FF,
0x621, 0x000000FF,
0x622, 0x000000FF,
0x623, 0x000000FF,
0x624, 0x000000FF,
0x625, 0x000000FF,
0x626, 0x000000FF,
0x627, 0x000000FF,
0x652, 0x00000020,
0x63C, 0x0000000A,
0x63D, 0x0000000A,
0x63E, 0x0000000E,
0x63F, 0x0000000E,
0x640, 0x00000040,
0x66E, 0x00000005,
0x700, 0x00000021,
0x701, 0x00000043,
0x702, 0x00000065,
0x703, 0x00000087,
0x708, 0x00000021,
0x709, 0x00000043,
0x70A, 0x00000065,
0x70B, 0x00000087,
};
bool rtl88eu_phy_mac_config(struct adapter *adapt)
{
u32 i;
u32 arraylength;
u32 *ptrarray;
arraylength = sizeof(array_MAC_REG_8188E)/sizeof(u32);
ptrarray = array_MAC_REG_8188E;
for (i = 0; i < arraylength; i = i + 2)
usb_write8(adapt, ptrarray[i], (u8)ptrarray[i + 1]);
usb_write8(adapt, REG_MAX_AGGR_NUM, MAX_AGGR_NUM);
return true;
}

1097
hal/odm.c
View file

File diff suppressed because it is too large Load diff

390
hal/odm_HWConfig.c
View file

@ -39,61 +39,32 @@ static u8 odm_QueryRxPwrPercentage(s8 AntPower)
/* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
/* IF other SW team do not support the feature, remove this section.?? */
static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
return 0;
}
static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
return 0;
}
static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
s32 RetSig = 0;
if ((dm_odm->SupportInterface == ODM_ITRF_USB) ||
(dm_odm->SupportInterface == ODM_ITRF_SDIO)) {
if (CurrSig >= 51 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig >= 41 && CurrSig <= 50)
RetSig = 80 + ((CurrSig - 40)*2);
else if (CurrSig >= 31 && CurrSig <= 40)
RetSig = 66 + (CurrSig - 30);
else if (CurrSig >= 21 && CurrSig <= 30)
RetSig = 54 + (CurrSig - 20);
else if (CurrSig >= 10 && CurrSig <= 20)
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
else if (CurrSig >= 5 && CurrSig <= 9)
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
else if (CurrSig >= 1 && CurrSig <= 4)
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
else
RetSig = CurrSig;
}
if (CurrSig >= 51 && CurrSig <= 100)
RetSig = 100;
else if (CurrSig >= 41 && CurrSig <= 50)
RetSig = 80 + ((CurrSig - 40)*2);
else if (CurrSig >= 31 && CurrSig <= 40)
RetSig = 66 + (CurrSig - 30);
else if (CurrSig >= 21 && CurrSig <= 30)
RetSig = 54 + (CurrSig - 20);
else if (CurrSig >= 10 && CurrSig <= 20)
RetSig = 42 + (((CurrSig - 10) * 2) / 3);
else if (CurrSig >= 5 && CurrSig <= 9)
RetSig = 22 + (((CurrSig - 5) * 3) / 2);
else if (CurrSig >= 1 && CurrSig <= 4)
RetSig = 6 + (((CurrSig - 1) * 3) / 2);
else
RetSig = CurrSig;
return RetSig;
}
static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
{
if ((dm_odm->SupportPlatform == ODM_MP) &&
(dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */
(dm_odm->PatchID == 10))
return odm_sig_patch_netcore(dm_odm, CurrSig);
else if ((dm_odm->SupportPlatform == ODM_MP) &&
(dm_odm->SupportInterface == ODM_ITRF_PCIE) &&
(dm_odm->PatchID == 19))
return odm_sig_patch_lenove(dm_odm, CurrSig);
else
return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
}
/* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
{
return 0;
return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
}
static u8 odm_EVMdbToPercentage(s8 Value)
@ -119,8 +90,7 @@ static u8 odm_EVMdbToPercentage(s8 Value)
static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
struct odm_per_pkt_info *pPktinfo)
{
struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
u8 i, Max_spatial_stream;
@ -136,11 +106,10 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
if (isCCKrate) {
u8 report;
u8 cck_agc_rpt;
dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
@ -149,118 +118,56 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
cck_highpwr = dm_odm->bCckHighPower;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
/* The RSSI formula should be modified according to the gain table */
/* In 88E, cck_highpwr is always set to 1 */
if (dm_odm->SupportICType & (ODM_RTL8188E|ODM_RTL8812)) {
LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2*(5-VGA_idx);
break;
case 1:
rx_pwr_all = 8-2*VGA_idx;
break;
case 0:
rx_pwr_all = 14-2*VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
} else {
if (!cck_highpwr) {
report = (cck_agc_rpt & 0xc0)>>6;
switch (report) {
/* 03312009 modified by cosa */
/* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
/* Note: different RF with the different RNA gain. */
case 0x3:
rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
break;
case 0x2:
rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
break;
case 0x1:
rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
break;
case 0x0:
rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
break;
}
} else {
report = (cck_agc_rpt & 0x60)>>5;
switch (report) {
case 0x3:
rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f)<<1) ;
break;
case 0x2:
rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f)<<1);
break;
case 0x1:
rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f)<<1);
break;
case 0x0:
rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f)<<1);
break;
}
}
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
/* Modification for ext-LNA board */
if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
if ((cck_agc_rpt>>7) == 0) {
PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL+6);
} else {
if (PWDB_ALL > 38)
PWDB_ALL -= 16;
else
PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL>>2) : (PWDB_ALL-12);
}
/* CCK modification */
if (PWDB_ALL > 25 && PWDB_ALL <= 60)
PWDB_ALL += 6;
} else {/* Modification for int-LNA board */
if (PWDB_ALL > 99)
PWDB_ALL -= 8;
else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
PWDB_ALL += 4;
}
LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
VGA_idx = (cck_agc_rpt & 0x1F);
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
rx_pwr_all = -100 + 2*(27-VGA_idx); /* VGA_idx = 27~2 */
else
rx_pwr_all = -100;
break;
case 6:
rx_pwr_all = -48 + 2*(2-VGA_idx); /* VGA_idx = 2~0 */
break;
case 5:
rx_pwr_all = -42 + 2*(7-VGA_idx); /* VGA_idx = 7~5 */
break;
case 4:
rx_pwr_all = -36 + 2*(7-VGA_idx); /* VGA_idx = 7~4 */
break;
case 3:
rx_pwr_all = -24 + 2*(7-VGA_idx); /* VGA_idx = 7~0 */
break;
case 2:
if (cck_highpwr)
rx_pwr_all = -12 + 2*(5-VGA_idx); /* VGA_idx = 5~0 */
else
rx_pwr_all = -6 + 2*(5-VGA_idx);
break;
case 1:
rx_pwr_all = 8-2*VGA_idx;
break;
case 0:
rx_pwr_all = 14-2*VGA_idx;
break;
default:
break;
}
rx_pwr_all += 6;
PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
if (!cck_highpwr) {
if (PWDB_ALL >= 80)
PWDB_ALL = ((PWDB_ALL-80)<<1)+((PWDB_ALL-80)>>1)+80;
else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
PWDB_ALL += 3;
if (PWDB_ALL > 100)
PWDB_ALL = 100;
}
pPhyInfo->RxPWDBAll = PWDB_ALL;
@ -270,9 +177,7 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
if (pPktinfo->bPacketMatchBSSID) {
u8 SQ, SQ_rpt;
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0);
} else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
SQ = 100;
} else {
SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
@ -285,22 +190,20 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
SQ = ((64-SQ_rpt) * 100) / 44;
}
pPhyInfo->SignalQuality = SQ;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_A] = SQ;
pPhyInfo->RxMIMOSignalQuality[ODM_RF_PATH_B] = -1;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
}
} else { /* is OFDM rate */
dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
/* (1)Get RSSI for HT rate */
for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
/* 2008/01/30 MH we will judge RF RX path now. */
if (dm_odm->RFPathRxEnable & BIT(i))
rf_rx_num++;
rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F)*2) - 110;
if (i == RF_PATH_A)
adapt->signal_strength = rx_pwr[i];
pPhyInfo->RxPwr[i] = rx_pwr[i];
@ -324,14 +227,6 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
/* Get Rx snr value in DB */
pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
/* Record Signal Strength for next packet */
if (pPktinfo->bPacketMatchBSSID) {
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
if (i == ODM_RF_PATH_A)
pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI);
}
}
}
/* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
@ -344,26 +239,22 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
pPhyInfo->RxPower = rx_pwr_all;
pPhyInfo->RecvSignalPower = rx_pwr_all;
if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
/* do nothing */
} else {
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
/* (3)EVM of HT rate */
if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
Max_spatial_stream = 2; /* both spatial stream make sense */
else
Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
for (i = 0; i < Max_spatial_stream; i++) {
/* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
/* fill most significant bit to "zero" when doing shifting operation which may change a negative */
/* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
if (pPktinfo->bPacketMatchBSSID) {
if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
if (pPktinfo->bPacketMatchBSSID) {
if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
}
}
}
@ -384,10 +275,6 @@ static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
}
void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
{
}
static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
struct odm_per_pkt_info *pPktinfo)
@ -399,6 +286,8 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
u32 OFDM_pkt = 0;
u32 Weighting = 0;
struct sta_info *pEntry;
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (pPktinfo->StationID == 0xFF)
return;
@ -411,27 +300,23 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
/* Smart Antenna Debug Message------------------ */
if (dm_odm->SupportICType == ODM_RTL8188E) {
u8 antsel_tr_mux;
struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
if (pPktinfo->bPacketToSelf) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
(pDM_FatTable->antsel_rx_keep_1<<1) |
pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
}
}
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
if (pPktinfo->bPacketToSelf) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
(pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
(pDM_FatTable->antsel_rx_keep_1<<1) |
pDM_FatTable->antsel_rx_keep_0;
pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
}
}
} else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2<<2) |
(pDM_FatTable->antsel_rx_keep_1<<1) | pDM_FatTable->antsel_rx_keep_0;
rtl88eu_dm_ant_sel_statistics(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
}
}
/* Smart Antenna Debug Message------------------ */
@ -441,15 +326,15 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
if (!isCCKrate) { /* ofdm rate */
if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B] == 0) {
RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
} else {
if (pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B]) {
RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
} else {
RSSI_max = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_B];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[ODM_RF_PATH_A];
RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
}
if ((RSSI_max - RSSI_min) < 3)
RSSI_Ave = RSSI_max;
@ -529,15 +414,12 @@ static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
struct odm_per_pkt_info *pPktinfo)
{
odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
pPktinfo, adapt);
pPktinfo);
if (dm_odm->RSSI_test) {
/* Select the packets to do RSSI checking for antenna switching. */
if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo);
;/* Select the packets to do RSSI checking for antenna switching. */
} else {
odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
}
@ -545,57 +427,7 @@ static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt)
u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo)
{
ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt);
}
/* For future use. */
void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
u8 macid, bool pkt_match_bssid,
bool pkttoself, bool pkt_beacon)
{
/* 2011/10/19 Driver team will handle in the future. */
}
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
enum ODM_RF_RADIO_PATH content,
enum ODM_RF_RADIO_PATH rfpath)
{
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("===>ODM_ConfigRFWithHeaderFile\n"));
if (dm_odm->SupportICType == ODM_RTL8188E) {
if (rfpath == ODM_RF_PATH_A)
READ_AND_CONFIG(8188E, _RadioA_1T_);
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_A:Rtl8188ERadioA_1TArray\n"));
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, (" ===> ODM_ConfigRFWithHeaderFile() Radio_B:Rtl8188ERadioB_1TArray\n"));
}
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("ODM_ConfigRFWithHeaderFile: Radio No %x\n", rfpath));
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
enum odm_bb_config_type config_tp)
{
if (dm_odm->SupportICType == ODM_RTL8188E) {
if (config_tp == CONFIG_BB_PHY_REG) {
READ_AND_CONFIG(8188E, _PHY_REG_1T_);
} else if (config_tp == CONFIG_BB_AGC_TAB) {
READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
} else if (config_tp == CONFIG_BB_PHY_REG_PG) {
READ_AND_CONFIG(8188E, _PHY_REG_PG_);
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD,
(" ===> phy_ConfigBBWithHeaderFile() agc:Rtl8188EPHY_REG_PGArray\n"));
}
}
return HAL_STATUS_SUCCESS;
}
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
{
u8 result = HAL_STATUS_SUCCESS;
if (dm_odm->SupportICType == ODM_RTL8188E)
result = READ_AND_CONFIG(8188E, _MAC_REG_);
return result;
ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo);
}

441
hal/odm_RTL8188E.c
View file

@ -19,96 +19,91 @@
******************************************************************************/
#include "odm_precomp.h"
#include "phy.h"
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *dm_odm)
static void dm_rx_hw_antena_div_init(struct odm_dm_struct *dm_odm)
{
struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable;
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
pDM_DigTable->rx_gain_range_min = (u8) pDM_DigTable->AntDiv_RSSI_max;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("ODM_DIG_LowerBound_88E(): pDM_DigTable->AntDiv_RSSI_max=%d\n", pDM_DigTable->AntDiv_RSSI_max));
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
return;
}
/* If only one Entry connected */
/* MAC Setting */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
value32|(BIT23|BIT25));
/* Pin Settings */
phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 1);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
/* OFDM Settings */
phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
0x000000a0);
/* CCK Settings */
phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201);
}
static void odm_RX_HWAntDivInit(struct odm_dm_struct *dm_odm)
static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm)
{
struct adapter *adapter = dm_odm->Adapter;
u32 value32;
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* 1:CG, 0:CS */
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT5|BIT4|BIT3, 0);
return;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_RX_HWAntDivInit()\n"));
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = phy_query_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
phy_set_bb_reg(adapter, ODM_REG_ANTSEL_PIN_11N, bMaskDWord,
value32|(BIT23|BIT25));
/* Pin Settings */
ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 1); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
phy_set_bb_reg(adapter, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT22, 0);
phy_set_bb_reg(adapter, ODM_REG_LNA_SWITCH_11N, BIT31, 1);
/* OFDM Settings */
ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
phy_set_bb_reg(adapter, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord,
0x000000a0);
/* CCK Settings */
ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, 0xFFFF, 0x0201); /* antenna mapping table */
}
static void odm_TRX_HWAntDivInit(struct odm_dm_struct *dm_odm)
{
u32 value32;
if (*(dm_odm->mp_mode) == 1) {
dm_odm->AntDivType = CGCS_RX_SW_ANTDIV;
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* disable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, 0); /* Default RX (0/1) */
return;
}
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_TRX_HWAntDivInit()\n"));
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord);
ODM_SetMACReg(dm_odm, ODM_REG_ANTSEL_PIN_11N, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
/* Pin Settings */
ODM_SetBBReg(dm_odm, ODM_REG_PIN_CTRL_11N, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(dm_odm, ODM_REG_LNA_SWITCH_11N, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
/* OFDM Settings */
ODM_SetBBReg(dm_odm, ODM_REG_ANTDIV_PARA1_11N, bMaskDWord, 0x000000a0);
/* CCK Settings */
ODM_SetBBReg(dm_odm, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1); /* Fix CCK PHY status report issue */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1); /* CCK complete HW AntDiv within 64 samples */
phy_set_bb_reg(adapter, ODM_REG_BB_PWR_SAV4_11N, BIT7, 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA2_11N, BIT4, 1);
/* Tx Settings */
ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
ODM_UpdateRxIdleAnt_88E(dm_odm, MAIN_ANT);
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0);
rtl88eu_dm_update_rx_idle_ant(dm_odm, MAIN_ANT);
/* antenna mapping table */
if (!dm_odm->bIsMPChip) { /* testchip */
ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */
ODM_SetBBReg(dm_odm, ODM_REG_RX_DEFUALT_A_11N, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */
phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N,
BIT10|BIT9|BIT8, 1);
phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N,
BIT13|BIT12|BIT11, 2);
} else { /* MPchip */
ODM_SetBBReg(dm_odm, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, 0x0201); /* Reg914=3'b010, Reg915=3'b001 */
phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord,
0x0201);
}
}
static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
static void dm_fast_training_init(struct odm_dm_struct *dm_odm)
{
u32 value32, i;
struct adapter *adapter = dm_odm->Adapter;
u32 value32, i;
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u32 AntCombination = 2;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("odm_FastAntTrainingInit()\n"));
u32 AntCombination = 2;
if (*(dm_odm->mp_mode) == 1) {
ODM_RT_TRACE(dm_odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("dm_odm->AntDivType: %d\n", dm_odm->AntDivType));
return;
}
@ -122,210 +117,206 @@ static void odm_FastAntTrainingInit(struct odm_dm_struct *dm_odm)
dm_fat_tbl->FAT_State = FAT_NORMAL_STATE;
/* MAC Setting */
value32 = ODM_GetMACReg(dm_odm, 0x4c, bMaskDWord);
ODM_SetMACReg(dm_odm, 0x4c, bMaskDWord, value32|(BIT23|BIT25)); /* Reg4C[25]=1, Reg4C[23]=1 for pin output */
value32 = ODM_GetMACReg(dm_odm, 0x7B4, bMaskDWord);
ODM_SetMACReg(dm_odm, 0x7b4, bMaskDWord, value32|(BIT16|BIT17)); /* Reg7B4[16]=1 enable antenna training, Reg7B4[17]=1 enable A2 match */
value32 = phy_query_bb_reg(adapter, 0x4c, bMaskDWord);
phy_set_bb_reg(adapter, 0x4c, bMaskDWord, value32|(BIT23|BIT25));
value32 = phy_query_bb_reg(adapter, 0x7B4, bMaskDWord);
phy_set_bb_reg(adapter, 0x7b4, bMaskDWord, value32|(BIT16|BIT17));
/* Match MAC ADDR */
ODM_SetMACReg(dm_odm, 0x7b4, 0xFFFF, 0);
ODM_SetMACReg(dm_odm, 0x7b0, bMaskDWord, 0);
phy_set_bb_reg(adapter, 0x7b4, 0xFFFF, 0);
phy_set_bb_reg(adapter, 0x7b0, bMaskDWord, 0);
ODM_SetBBReg(dm_odm, 0x870, BIT9|BIT8, 0);/* Reg870[8]=1'b0, Reg870[9]=1'b0 antsel antselb by HW */
ODM_SetBBReg(dm_odm, 0x864, BIT10, 0); /* Reg864[10]=1'b0 antsel2 by HW */
ODM_SetBBReg(dm_odm, 0xb2c, BIT22, 0); /* Regb2c[22]=1'b0 disable CS/CG switch */
ODM_SetBBReg(dm_odm, 0xb2c, BIT31, 1); /* Regb2c[31]=1'b1 output at CG only */
ODM_SetBBReg(dm_odm, 0xca4, bMaskDWord, 0x000000a0);
phy_set_bb_reg(adapter, 0x870, BIT9|BIT8, 0);
phy_set_bb_reg(adapter, 0x864, BIT10, 0);
phy_set_bb_reg(adapter, 0xb2c, BIT22, 0);
phy_set_bb_reg(adapter, 0xb2c, BIT31, 1);
phy_set_bb_reg(adapter, 0xca4, bMaskDWord, 0x000000a0);
/* antenna mapping table */
if (AntCombination == 2) {
if (!dm_odm->bIsMPChip) { /* testchip */
ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 1); /* Reg858[10:8]=3'b001 */
ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 2); /* Reg858[13:11]=3'b010 */
phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 1);
phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 2);
} else { /* MPchip */
ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 1);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 2);
phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1);
phy_set_bb_reg(adapter, 0x914, bMaskByte1, 2);
}
} else if (AntCombination == 7) {
if (!dm_odm->bIsMPChip) { /* testchip */
ODM_SetBBReg(dm_odm, 0x858, BIT10|BIT9|BIT8, 0); /* Reg858[10:8]=3'b000 */
ODM_SetBBReg(dm_odm, 0x858, BIT13|BIT12|BIT11, 1); /* Reg858[13:11]=3'b001 */
ODM_SetBBReg(dm_odm, 0x878, BIT16, 0);
ODM_SetBBReg(dm_odm, 0x858, BIT15|BIT14, 2); /* Reg878[0],Reg858[14:15])=3'b010 */
ODM_SetBBReg(dm_odm, 0x878, BIT19|BIT18|BIT17, 3);/* Reg878[3:1]=3b'011 */
ODM_SetBBReg(dm_odm, 0x878, BIT22|BIT21|BIT20, 4);/* Reg878[6:4]=3b'100 */
ODM_SetBBReg(dm_odm, 0x878, BIT25|BIT24|BIT23, 5);/* Reg878[9:7]=3b'101 */
ODM_SetBBReg(dm_odm, 0x878, BIT28|BIT27|BIT26, 6);/* Reg878[12:10]=3b'110 */
ODM_SetBBReg(dm_odm, 0x878, BIT31|BIT30|BIT29, 7);/* Reg878[15:13]=3b'111 */
phy_set_bb_reg(adapter, 0x858, BIT10|BIT9|BIT8, 0);
phy_set_bb_reg(adapter, 0x858, BIT13|BIT12|BIT11, 1);
phy_set_bb_reg(adapter, 0x878, BIT16, 0);
phy_set_bb_reg(adapter, 0x858, BIT15|BIT14, 2);
phy_set_bb_reg(adapter, 0x878, BIT19|BIT18|BIT17, 3);
phy_set_bb_reg(adapter, 0x878, BIT22|BIT21|BIT20, 4);
phy_set_bb_reg(adapter, 0x878, BIT25|BIT24|BIT23, 5);
phy_set_bb_reg(adapter, 0x878, BIT28|BIT27|BIT26, 6);
phy_set_bb_reg(adapter, 0x878, BIT31|BIT30|BIT29, 7);
} else { /* MPchip */
ODM_SetBBReg(dm_odm, 0x914, bMaskByte0, 0);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte1, 1);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte2, 2);
ODM_SetBBReg(dm_odm, 0x914, bMaskByte3, 3);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte0, 4);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte1, 5);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte2, 6);
ODM_SetBBReg(dm_odm, 0x918, bMaskByte3, 7);
phy_set_bb_reg(adapter, 0x914, bMaskByte0, 0);
phy_set_bb_reg(adapter, 0x914, bMaskByte1, 1);
phy_set_bb_reg(adapter, 0x914, bMaskByte2, 2);
phy_set_bb_reg(adapter, 0x914, bMaskByte3, 3);
phy_set_bb_reg(adapter, 0x918, bMaskByte0, 4);
phy_set_bb_reg(adapter, 0x918, bMaskByte1, 5);
phy_set_bb_reg(adapter, 0x918, bMaskByte2, 6);
phy_set_bb_reg(adapter, 0x918, bMaskByte3, 7);
}
}
/* Default Ant Setting when no fast training */
ODM_SetBBReg(dm_odm, 0x80c, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
ODM_SetBBReg(dm_odm, 0x864, BIT5|BIT4|BIT3, 0); /* Default RX */
ODM_SetBBReg(dm_odm, 0x864, BIT8|BIT7|BIT6, 1); /* Optional RX */
phy_set_bb_reg(adapter, 0x80c, BIT21, 1);
phy_set_bb_reg(adapter, 0x864, BIT5|BIT4|BIT3, 0);
phy_set_bb_reg(adapter, 0x864, BIT8|BIT7|BIT6, 1);
/* Enter Traing state */
ODM_SetBBReg(dm_odm, 0x864, BIT2|BIT1|BIT0, (AntCombination-1)); /* Reg864[2:0]=3'd6 ant combination=reg864[2:0]+1 */
ODM_SetBBReg(dm_odm, 0xc50, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
phy_set_bb_reg(adapter, 0x864, BIT2|BIT1|BIT0, (AntCombination-1));
phy_set_bb_reg(adapter, 0xc50, BIT7, 1);
}
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *dm_odm)
void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm)
{
if (dm_odm->SupportICType != ODM_RTL8188E)
return;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->AntDivType=%d\n", dm_odm->AntDivType));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dm_odm->bIsMPChip=%s\n", (dm_odm->bIsMPChip ? "true" : "false")));
if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)
odm_RX_HWAntDivInit(dm_odm);
dm_rx_hw_antena_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_TRX_HWAntDivInit(dm_odm);
dm_trx_hw_antenna_div_init(dm_odm);
else if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)
odm_FastAntTrainingInit(dm_odm);
dm_fast_training_init(dm_odm);
}
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant)
void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u32 DefaultAnt, OptionalAnt;
struct adapter *adapter = dm_odm->Adapter;
u32 default_ant, optional_ant;
if (dm_fat_tbl->RxIdleAnt != Ant) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Update Rx Idle Ant\n"));
if (Ant == MAIN_ANT) {
DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
if (dm_fat_tbl->RxIdleAnt != ant) {
if (ant == MAIN_ANT) {
default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
} else {
DefaultAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
OptionalAnt = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ? MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
default_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
AUX_ANT_CG_TRX : AUX_ANT_CGCS_RX;
optional_ant = (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ?
MAIN_ANT_CG_TRX : MAIN_ANT_CGCS_RX;
}
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
ODM_SetBBReg(dm_odm, ODM_REG_ANTSEL_CTRL_11N, BIT14|BIT13|BIT12, DefaultAnt); /* Default TX */
ODM_SetMACReg(dm_odm, ODM_REG_RESP_TX_11N, BIT6|BIT7, DefaultAnt); /* Resp Tx */
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT5|BIT4|BIT3, default_ant);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT8|BIT7|BIT6, optional_ant);
phy_set_bb_reg(adapter, ODM_REG_ANTSEL_CTRL_11N,
BIT14|BIT13|BIT12, default_ant);
phy_set_bb_reg(adapter, ODM_REG_RESP_TX_11N,
BIT6|BIT7, default_ant);
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT5|BIT4|BIT3, DefaultAnt); /* Default RX */
ODM_SetBBReg(dm_odm, ODM_REG_RX_ANT_CTRL_11N, BIT8|BIT7|BIT6, OptionalAnt); /* Optional RX */
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT5|BIT4|BIT3, default_ant);
phy_set_bb_reg(adapter, ODM_REG_RX_ANT_CTRL_11N,
BIT8|BIT7|BIT6, optional_ant);
}
}
dm_fat_tbl->RxIdleAnt = Ant;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
pr_info("RxIdleAnt=%s\n", (Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT");
dm_fat_tbl->RxIdleAnt = ant;
}
static void odm_UpdateTxAnt_88E(struct odm_dm_struct *dm_odm, u8 Ant, u32 MacId)
static void update_tx_ant_88eu(struct odm_dm_struct *dm_odm, u8 ant, u32 mac_id)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
u8 TargetAnt;
u8 target_ant;
if (Ant == MAIN_ANT)
TargetAnt = MAIN_ANT_CG_TRX;
if (ant == MAIN_ANT)
target_ant = MAIN_ANT_CG_TRX;
else
TargetAnt = AUX_ANT_CG_TRX;
dm_fat_tbl->antsel_a[MacId] = TargetAnt&BIT0;
dm_fat_tbl->antsel_b[MacId] = (TargetAnt&BIT1)>>1;
dm_fat_tbl->antsel_c[MacId] = (TargetAnt&BIT2)>>2;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("Tx from TxInfo, TargetAnt=%s\n",
(Ant == MAIN_ANT) ? "MAIN_ANT" : "AUX_ANT"));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("antsel_tr_mux=3'b%d%d%d\n",
dm_fat_tbl->antsel_c[MacId], dm_fat_tbl->antsel_b[MacId], dm_fat_tbl->antsel_a[MacId]));
target_ant = AUX_ANT_CG_TRX;
dm_fat_tbl->antsel_a[mac_id] = target_ant&BIT0;
dm_fat_tbl->antsel_b[mac_id] = (target_ant&BIT1)>>1;
dm_fat_tbl->antsel_c[mac_id] = (target_ant&BIT2)>>2;
}
void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *dm_odm, u8 *pDesc, u8 macId)
void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm,
u8 *desc, u8 mac_id)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) {
SET_TX_DESC_ANTSEL_A_88E(pDesc, dm_fat_tbl->antsel_a[macId]);
SET_TX_DESC_ANTSEL_B_88E(pDesc, dm_fat_tbl->antsel_b[macId]);
SET_TX_DESC_ANTSEL_C_88E(pDesc, dm_fat_tbl->antsel_c[macId]);
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
(dm_odm->AntDivType == CG_TRX_SMART_ANTDIV)) {
SET_TX_DESC_ANTSEL_A_88E(desc, dm_fat_tbl->antsel_a[mac_id]);
SET_TX_DESC_ANTSEL_B_88E(desc, dm_fat_tbl->antsel_b[mac_id]);
SET_TX_DESC_ANTSEL_C_88E(desc, dm_fat_tbl->antsel_c[mac_id]);
}
}
void ODM_AntselStatistics_88E(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux, u32 MacId, u8 RxPWDBAll)
void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm,
u8 antsel_tr_mux, u32 mac_id, u8 rx_pwdb_all)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CG_TRX) {
dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll;
dm_fat_tbl->MainAnt_Cnt[MacId]++;
dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->MainAnt_Cnt[mac_id]++;
} else {
dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll;
dm_fat_tbl->AuxAnt_Cnt[MacId]++;
dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
}
} else if (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV) {
if (antsel_tr_mux == MAIN_ANT_CGCS_RX) {
dm_fat_tbl->MainAnt_Sum[MacId] += RxPWDBAll;
dm_fat_tbl->MainAnt_Cnt[MacId]++;
dm_fat_tbl->MainAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->MainAnt_Cnt[mac_id]++;
} else {
dm_fat_tbl->AuxAnt_Sum[MacId] += RxPWDBAll;
dm_fat_tbl->AuxAnt_Cnt[MacId]++;
dm_fat_tbl->AuxAnt_Sum[mac_id] += rx_pwdb_all;
dm_fat_tbl->AuxAnt_Cnt[mac_id]++;
}
}
}
static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
static void rtl88eu_dm_hw_ant_div(struct odm_dm_struct *dm_odm)
{
u32 i, MinRSSI = 0xFF, AntDivMaxRSSI = 0, MaxRSSI = 0, LocalMinRSSI, LocalMaxRSSI;
u32 Main_RSSI, Aux_RSSI;
u8 RxIdleAnt = 0, TargetAnt = 7;
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
struct rtw_dig *pDM_DigTable = &dm_odm->DM_DigTable;
struct sta_info *pEntry;
struct rtw_dig *dig_table = &dm_odm->DM_DigTable;
struct sta_info *entry;
u32 i, min_rssi = 0xFF, ant_div_max_rssi = 0, max_rssi = 0;
u32 local_min_rssi, local_max_rssi;
u32 main_rssi, aux_rssi;
u8 RxIdleAnt = 0, target_ant = 7;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
pEntry = dm_odm->pODM_StaInfo[i];
if (IS_STA_VALID(pEntry)) {
entry = dm_odm->pODM_StaInfo[i];
if (IS_STA_VALID(entry)) {
/* 2 Caculate RSSI per Antenna */
Main_RSSI = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ? (dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0;
Aux_RSSI = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ? (dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
TargetAnt = (Main_RSSI >= Aux_RSSI) ? MAIN_ANT : AUX_ANT;
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, MainAnt_Sum=%d, MainAnt_Cnt=%d\n",
i, dm_fat_tbl->MainAnt_Sum[i],
dm_fat_tbl->MainAnt_Cnt[i]));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, AuxAnt_Sum=%d, AuxAnt_Cnt=%d\n",
i, dm_fat_tbl->AuxAnt_Sum[i], dm_fat_tbl->AuxAnt_Cnt[i]));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("MacID=%d, Main_RSSI= %d, Aux_RSSI= %d\n",
i, Main_RSSI, Aux_RSSI));
/* 2 Select MaxRSSI for DIG */
LocalMaxRSSI = (Main_RSSI > Aux_RSSI) ? Main_RSSI : Aux_RSSI;
if ((LocalMaxRSSI > AntDivMaxRSSI) && (LocalMaxRSSI < 40))
AntDivMaxRSSI = LocalMaxRSSI;
if (LocalMaxRSSI > MaxRSSI)
MaxRSSI = LocalMaxRSSI;
main_rssi = (dm_fat_tbl->MainAnt_Cnt[i] != 0) ?
(dm_fat_tbl->MainAnt_Sum[i]/dm_fat_tbl->MainAnt_Cnt[i]) : 0;
aux_rssi = (dm_fat_tbl->AuxAnt_Cnt[i] != 0) ?
(dm_fat_tbl->AuxAnt_Sum[i]/dm_fat_tbl->AuxAnt_Cnt[i]) : 0;
target_ant = (main_rssi >= aux_rssi) ? MAIN_ANT : AUX_ANT;
/* 2 Select max_rssi for DIG */
local_max_rssi = (main_rssi > aux_rssi) ?
main_rssi : aux_rssi;
if ((local_max_rssi > ant_div_max_rssi) &&
(local_max_rssi < 40))
ant_div_max_rssi = local_max_rssi;
if (local_max_rssi > max_rssi)
max_rssi = local_max_rssi;
/* 2 Select RX Idle Antenna */
if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) && (Main_RSSI == 0))
Main_RSSI = Aux_RSSI;
else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) && (Aux_RSSI == 0))
Aux_RSSI = Main_RSSI;
if ((dm_fat_tbl->RxIdleAnt == MAIN_ANT) &&
(main_rssi == 0))
main_rssi = aux_rssi;
else if ((dm_fat_tbl->RxIdleAnt == AUX_ANT) &&
(aux_rssi == 0))
aux_rssi = main_rssi;
LocalMinRSSI = (Main_RSSI > Aux_RSSI) ? Aux_RSSI : Main_RSSI;
if (LocalMinRSSI < MinRSSI) {
MinRSSI = LocalMinRSSI;
RxIdleAnt = TargetAnt;
local_min_rssi = (main_rssi > aux_rssi) ?
aux_rssi : main_rssi;
if (local_min_rssi < min_rssi) {
min_rssi = local_min_rssi;
RxIdleAnt = target_ant;
}
/* 2 Select TRX Antenna */
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
odm_UpdateTxAnt_88E(dm_odm, TargetAnt, i);
update_tx_ant_88eu(dm_odm, target_ant, i);
}
dm_fat_tbl->MainAnt_Sum[i] = 0;
dm_fat_tbl->AuxAnt_Sum[i] = 0;
@ -334,66 +325,48 @@ static void odm_HWAntDiv(struct odm_dm_struct *dm_odm)
}
/* 2 Set RX Idle Antenna */
ODM_UpdateRxIdleAnt_88E(dm_odm, RxIdleAnt);
rtl88eu_dm_update_rx_idle_ant(dm_odm, RxIdleAnt);
pDM_DigTable->AntDiv_RSSI_max = AntDivMaxRSSI;
pDM_DigTable->RSSI_max = MaxRSSI;
dig_table->AntDiv_RSSI_max = ant_div_max_rssi;
dig_table->RSSI_max = max_rssi;
}
void ODM_AntennaDiversity_88E(struct odm_dm_struct *dm_odm)
void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm)
{
struct fast_ant_train *dm_fat_tbl = &dm_odm->DM_FatTable;
if ((dm_odm->SupportICType != ODM_RTL8188E) || (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV)))
struct adapter *adapter = dm_odm->Adapter;
if (!(dm_odm->SupportAbility & ODM_BB_ANT_DIV))
return;
if (!dm_odm->bLinked) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_AntennaDiversity_88E(): No Link.\n"));
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("ODM_AntennaDiversity_88E(): No Link.\n"));
if (dm_fat_tbl->bBecomeLinked) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn off HW AntDiv\n"));
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 0); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 0); /* Enable CCK AntDiv */
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("Need to Turn off HW AntDiv\n"));
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 0);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
BIT15, 0);
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 0); /* Reg80c[21]=1'b0 from TX Reg */
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
BIT21, 0);
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
return;
} else {
if (!dm_fat_tbl->bBecomeLinked) {
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Need to Turn on HW AntDiv\n"));
/* Because HW AntDiv is disabled before Link, we enable HW AntDiv after link */
ODM_SetBBReg(dm_odm, ODM_REG_IGI_A_11N, BIT7, 1); /* RegC50[7]=1'b1 enable HW AntDiv */
ODM_SetBBReg(dm_odm, ODM_REG_CCK_ANTDIV_PARA1_11N, BIT15, 1); /* Enable CCK AntDiv */
ODM_RT_TRACE(dm_odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
("Need to Turn on HW AntDiv\n"));
phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, BIT7, 1);
phy_set_bb_reg(adapter, ODM_REG_CCK_ANTDIV_PARA1_11N,
BIT15, 1);
if (dm_odm->AntDivType == CG_TRX_HW_ANTDIV)
ODM_SetBBReg(dm_odm, ODM_REG_TX_ANT_CTRL_11N, BIT21, 1); /* Reg80c[21]=1'b1 from TX Info */
phy_set_bb_reg(adapter, ODM_REG_TX_ANT_CTRL_11N,
BIT21, 1);
dm_fat_tbl->bBecomeLinked = dm_odm->bLinked;
}
}
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
odm_HWAntDiv(dm_odm);
}
/* 3============================================================ */
/* 3 Dynamic Primary CCA */
/* 3============================================================ */
void odm_PrimaryCCA_Init(struct odm_dm_struct *dm_odm)
{
struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
PrimaryCCA->DupRTS_flag = 0;
PrimaryCCA->intf_flag = 0;
PrimaryCCA->intf_type = 0;
PrimaryCCA->Monitor_flag = 0;
PrimaryCCA->PriCCA_flag = 0;
}
bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *dm_odm)
{
struct dyn_primary_cca *PrimaryCCA = &(dm_odm->DM_PriCCA);
return PrimaryCCA->DupRTS_flag;
}
void odm_DynamicPrimaryCCA(struct odm_dm_struct *dm_odm)
{
return;
if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) ||
(dm_odm->AntDivType == CGCS_RX_HW_ANTDIV))
rtl88eu_dm_hw_ant_div(dm_odm);
}

130
hal/odm_RegConfig8188E.c
View file

@ -1,130 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
u32 Data, enum ODM_RF_RADIO_PATH RF_PATH,
u32 RegAddr)
{
if (Addr == 0xffe) {
ODM_sleep_ms(50);
} else if (Addr == 0xfd) {
ODM_delay_ms(5);
} else if (Addr == 0xfc) {
ODM_delay_ms(1);
} else if (Addr == 0xfb) {
ODM_delay_us(50);
} else if (Addr == 0xfa) {
ODM_delay_us(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
} else {
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
}
}
void odm_ConfigRF_RadioA_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
{
u32 content = 0x1000; /* RF_Content: radioa_txt */
u32 maskforPhySet = (u32)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
}
void odm_ConfigRF_RadioB_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data)
{
u32 content = 0x1001; /* RF_Content: radiob_txt */
u32 maskforPhySet = (u32)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
}
void odm_ConfigMAC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u8 Data)
{
ODM_Write1Byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
}
void odm_ConfigBB_AGC_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n",
Addr, Data));
}
void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr,
u32 Bitmask, u32 Data)
{
if (Addr == 0xfe) {
ODM_sleep_ms(50);
} else if (Addr == 0xfd) {
ODM_delay_ms(5);
} else if (Addr == 0xfc) {
ODM_delay_ms(1);
} else if (Addr == 0xfb) {
ODM_delay_us(50);
} else if (Addr == 0xfa) {
ODM_delay_us(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
} else{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("===> @@@@@@@ ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n",
Addr, Bitmask, Data));
storePwrIndexDiffRateOffset(pDM_Odm->Adapter, Addr, Bitmask, Data);
}
}
void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data)
{
if (Addr == 0xfe) {
ODM_sleep_ms(50);
} else if (Addr == 0xfd) {
ODM_delay_ms(5);
} else if (Addr == 0xfc) {
ODM_delay_ms(1);
} else if (Addr == 0xfb) {
ODM_delay_us(50);
} else if (Addr == 0xfa) {
ODM_delay_us(5);
} else if (Addr == 0xf9) {
ODM_delay_us(1);
} else {
if (Addr == 0xa24)
pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
/* Add 1us delay between BB/RF register setting. */
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE,
("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n",
Addr, Data));
}
}

32
hal/odm_debug.c
View file

@ -1,32 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/* include files */
#include "odm_precomp.h"
void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm)
{
pDM_Odm->DebugLevel = ODM_DBG_TRACE;
pDM_Odm->DebugComponents = 0;
}
u32 GlobalDebugLevel;

203
hal/odm_interface.c
View file

@ -1,203 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
/* ODM IO Relative API. */
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read8(Adapter, RegAddr);
}
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read16(Adapter, RegAddr);
}
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return rtw_read32(Adapter, RegAddr);
}
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
rtw_write8(Adapter, RegAddr, Data);
}
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
rtw_write16(Adapter, RegAddr, Data);
}
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
rtw_write32(Adapter, RegAddr, Data);
}
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
}
u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
}
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
}
u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
}
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
struct adapter *Adapter = pDM_Odm->Adapter;
PHY_SetRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask, Data);
}
u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask)
{
struct adapter *Adapter = pDM_Odm->Adapter;
return PHY_QueryRFReg(Adapter, (enum rf_radio_path)eRFPath, RegAddr, BitMask);
}
/* ODM Memory relative API. */
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length)
{
*pPtr = rtw_zvmalloc(length);
}
/* length could be ignored, used to detect memory leakage. */
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length)
{
rtw_vmfree(pPtr, length);
}
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length)
{
return _rtw_memcmp(pBuf1, pBuf2, length);
}
/* ODM MISC relative API. */
void ODM_AcquireSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
{
}
void ODM_ReleaseSpinLock(struct odm_dm_struct *pDM_Odm, enum RT_SPINLOCK_TYPE type)
{
}
/* Work item relative API. FOr MP driver only~! */
void ODM_InitializeWorkItem(struct odm_dm_struct *pDM_Odm, void *pRtWorkItem,
RT_WORKITEM_CALL_BACK RtWorkItemCallback,
void *pContext, const char *szID)
{
}
void ODM_StartWorkItem(void *pRtWorkItem)
{
}
void ODM_StopWorkItem(void *pRtWorkItem)
{
}
void ODM_FreeWorkItem(void *pRtWorkItem)
{
}
void ODM_ScheduleWorkItem(void *pRtWorkItem)
{
}
void ODM_IsWorkItemScheduled(void *pRtWorkItem)
{
}
/* ODM Timer relative API. */
void ODM_StallExecution(u32 usDelay)
{
rtw_udelay_os(usDelay);
}
void ODM_delay_ms(u32 ms)
{
rtw_mdelay_os(ms);
}
void ODM_delay_us(u32 us)
{
rtw_udelay_os(us);
}
void ODM_sleep_ms(u32 ms)
{
rtw_msleep_os(ms);
}
void ODM_sleep_us(u32 us)
{
rtw_usleep_os(us);
}
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay)
{
_set_timer(pTimer, msDelay); /* ms */
}
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer,
void *CallBackFunc, void *pContext,
const char *szID)
{
struct adapter *Adapter = pDM_Odm->Adapter;
_init_timer(pTimer, Adapter->pnetdev, CallBackFunc, pDM_Odm);
}
void ODM_CancelTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{
_cancel_timer_ex(pTimer);
}
void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer)
{
}
/* ODM FW relative API. */
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum,
u32 *pElementID, u32 *pCmdLen,
u8 **pCmbBuffer, u8 *CmdStartSeq)
{
return true;
}

1570
hal/phy.c Normal file
View file

File diff suppressed because it is too large Load diff

48
hal/Hal8188EPwrSeq.c → hal/pwrseq.c
View file

@ -18,68 +18,84 @@
*
******************************************************************************/
#include "Hal8188EPwrSeq.h"
#include "pwrseq.h"
#include <rtl8188e_hal.h>
/*
drivers should parse below arrays and do the corresponding actions
*/
/* 3 Power on Array */
struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3Radio off Array */
struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
};
/* 3Card Disable Array */
struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
struct wl_pwr_cfg rtl8188E_card_disable_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
};
/* 3 Card Enable Array */
struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDDIS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
struct wl_pwr_cfg rtl8188E_card_enable_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_CARDDIS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3Suspend Array */
struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
};
/* 3 Resume Array */
struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
/* 3HWPDN Array */
struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS] = {
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
};
/* 3 Enter LPS */
struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
};
/* 3 Leave LPS */
struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
RTL8188E_TRANS_END_STEPS] = {
/* FW behavior */
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END

77
hal/HalPwrSeqCmd.c → hal/pwrseqcmd.c
View file

@ -15,35 +15,16 @@
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
HalPwrSeqCmd.c
#include <pwrseqcmd.h>
#include <usb_ops_linux.h>
Abstract:
Implement HW Power sequence configuration CMD handling routine for Realtek devices.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
2011-07-07 Roger Create.
--*/
#include <HalPwrSeqCmd.h>
/* Description: */
/* This routine deals with the Power Configuration CMDs parsing
* for RTL8723/RTL8188E Series IC.
* Assumption:
* We should follow specific format which was released from HW SD.
/* This routine deals with the Power Configuration CMDs parsing
* for RTL8723/RTL8188E Series IC.
*/
u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
u8 ifacetype, struct wl_pwr_cfg pwrseqcmd[])
{
struct wl_pwr_cfg pwrcfgcmd = {0};
u8 poll_bit = false;
@ -57,7 +38,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
pwrcfgcmd = pwrseqcmd[aryidx];
RT_TRACE(_module_hal_init_c_ , _drv_info_,
("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
("rtl88eu_pwrseqcmdparsing: offset(%#x) cut_msk(%#x)"
"fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x)"
"msk(%#x) value(%#x)\n",
GET_PWR_CFG_OFFSET(pwrcfgcmd),
GET_PWR_CFG_CUT_MASK(pwrcfgcmd),
GET_PWR_CFG_FAB_MASK(pwrcfgcmd),
@ -67,40 +50,45 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
GET_PWR_CFG_MASK(pwrcfgcmd),
GET_PWR_CFG_VALUE(pwrcfgcmd)));
/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
/* Only Handle the command whose FAB, CUT, and Interface are matched */
if ((GET_PWR_CFG_FAB_MASK(pwrcfgcmd) & fab_vers) &&
(GET_PWR_CFG_CUT_MASK(pwrcfgcmd) & cut_vers) &&
(GET_PWR_CFG_INTF_MASK(pwrcfgcmd) & ifacetype)) {
switch (GET_PWR_CFG_CMD(pwrcfgcmd)) {
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
/* Read the value from system register */
value = rtw_read8(padapter, offset);
value = usb_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd));
value |= (GET_PWR_CFG_VALUE(pwrcfgcmd) &
GET_PWR_CFG_MASK(pwrcfgcmd));
/* Write the value back to system register */
rtw_write8(padapter, offset, value);
usb_write8(padapter, offset, value);
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_POLLING\n"));
poll_bit = false;
offset = GET_PWR_CFG_OFFSET(pwrcfgcmd);
do {
value = rtw_read8(padapter, offset);
value = usb_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(pwrcfgcmd);
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) & GET_PWR_CFG_MASK(pwrcfgcmd)))
if (value == (GET_PWR_CFG_VALUE(pwrcfgcmd) &
GET_PWR_CFG_MASK(pwrcfgcmd)))
poll_bit = true;
else
rtw_udelay_os(10);
udelay(10);
if (poll_count++ > max_poll_count) {
DBG_88E("Fail to polling Offset[%#x]\n", offset);
@ -109,19 +97,22 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
} while (!poll_bit);
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(pwrcfgcmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd));
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd));
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)*1000);
break;
case PWR_CMD_END:
/* When this command is parsed, end the process */
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
/* When this command is parsed, end the process */
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n"));
return true;
break;
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
RT_TRACE(_module_hal_init_c_, _drv_err_,
("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n"));
break;
}
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
******************************************************************************/
#include <osdep_service.h>
#include <drv_types.h>
#include <phy.h>
#include <rf.h>
#include <rtl8188e_hal.h>
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
switch (bandwidth) {
case HT_CHANNEL_WIDTH_20:
hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
0xfffff3ff) | BIT(10) | BIT(11));
phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
hal_data->RfRegChnlVal[0]);
break;
case HT_CHANNEL_WIDTH_40:
hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
0xfffff3ff) | BIT(10));
phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
hal_data->RfRegChnlVal[0]);
break;
default:
break;
}
}
void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
tx_agc[RF_PATH_A] = 0x3f3f3f3f;
tx_agc[RF_PATH_B] = 0x3f3f3f3f;
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
tx_agc[idx1] = powerlevel[idx1] |
(powerlevel[idx1]<<8) |
(powerlevel[idx1]<<16) |
(powerlevel[idx1]<<24);
if (tx_agc[idx1] > 0x20 && hal_data->ExternalPA)
tx_agc[idx1] = 0x20;
}
} else {
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
tx_agc[RF_PATH_A] = 0x10101010;
tx_agc[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
tx_agc[RF_PATH_A] = 0x00000000;
tx_agc[RF_PATH_B] = 0x00000000;
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
tx_agc[idx1] = powerlevel[idx1] |
(powerlevel[idx1]<<8) |
(powerlevel[idx1]<<16) |
(powerlevel[idx1]<<24);
}
if (hal_data->EEPROMRegulatory == 0) {
tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] +
(hal_data->MCSTxPowerLevelOriginalOffset[0][7]<<8);
tx_agc[RF_PATH_A] += tmpval;
tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] +
(hal_data->MCSTxPowerLevelOriginalOffset[0][15]<<24);
tx_agc[RF_PATH_B] += tmpval;
}
}
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
ptr = (u8 *)(&(tx_agc[idx1]));
for (idx2 = 0; idx2 < 4; idx2++) {
if (*ptr > RF6052_MAX_TX_PWR)
*ptr = RF6052_MAX_TX_PWR;
ptr++;
}
}
rtl88eu_dm_txpower_track_adjust(&hal_data->odmpriv, 1, &direction,
&pwrtrac_value);
if (direction == 1) {
/* Increase TX power */
tx_agc[0] += pwrtrac_value;
tx_agc[1] += pwrtrac_value;
} else if (direction == 2) {
/* Decrease TX power */
tx_agc[0] -= pwrtrac_value;
tx_agc[1] -= pwrtrac_value;
}
/* rf-A cck tx power */
tmpval = tx_agc[RF_PATH_A]&0xff;
phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
tmpval = tx_agc[RF_PATH_A]>>8;
phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
tmpval = tx_agc[RF_PATH_B]>>24;
phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
tmpval = tx_agc[RF_PATH_B]&0x00ffffff;
phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
}
/* powerbase0 for OFDM rates */
/* powerbase1 for HT MCS rates */
static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
u8 *pwr_level_bw20, u8 *pwr_level_bw40,
u8 channel, u32 *ofdmbase, u32 *mcs_base)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u32 powerbase0, powerbase1;
u8 i, powerlevel[2];
for (i = 0; i < 2; i++) {
powerbase0 = pwr_level_ofdm[i];
powerbase0 = (powerbase0<<24) | (powerbase0<<16) |
(powerbase0<<8) | powerbase0;
*(ofdmbase+i) = powerbase0;
}
for (i = 0; i < hal_data->NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerlevel[i] = pwr_level_bw20[i];
else
powerlevel[i] = pwr_level_bw40[i];
powerbase1 = powerlevel[i];
powerbase1 = (powerbase1<<24) | (powerbase1<<16) |
(powerbase1<<8) | powerbase1;
*(mcs_base+i) = powerbase1;
}
}
static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
u8 index, u32 *powerbase0, u32 *powerbase1,
u32 *out_val)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct dm_priv *pdmpriv = &hal_data->dmpriv;
u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
s8 pwr_diff = 0;
u32 write_val, customer_limit, rf;
u8 regulatory = hal_data->EEPROMRegulatory;
/* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
for (rf = 0; rf < 2; rf++) {
u8 j = index + (rf ? 8 : 0);
switch (regulatory) {
case 0:
chnlGroup = 0;
write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 1: /* Realtek regulatory */
/* increase power diff defined by Realtek for regulatory */
if (hal_data->pwrGroupCnt == 1)
chnlGroup = 0;
if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) {
if (channel < 3)
chnlGroup = 0;
else if (channel < 6)
chnlGroup = 1;
else if (channel < 9)
chnlGroup = 2;
else if (channel < 12)
chnlGroup = 3;
else if (channel < 14)
chnlGroup = 4;
else if (channel == 14)
chnlGroup = 5;
}
write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
write_val = ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 3: /* Customer defined power diff. */
/* increase power diff defined by customer. */
chnlGroup = 0;
if (index < 2)
pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel-1];
else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
pwr_diff = hal_data->TxPwrHt20Diff[rf][channel-1];
if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel-1];
else
customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel-1];
if (pwr_diff >= customer_pwr_limit)
pwr_diff = 0;
else
pwr_diff = customer_pwr_limit - pwr_diff;
for (i = 0; i < 4; i++) {
pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] &
(0x7f << (i * 8))) >> (i * 8));
if (pwr_diff_limit[i] > pwr_diff)
pwr_diff_limit[i] = pwr_diff;
}
customer_limit = (pwr_diff_limit[3]<<24) |
(pwr_diff_limit[2]<<16) |
(pwr_diff_limit[1]<<8) |
(pwr_diff_limit[0]);
write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
default:
chnlGroup = 0;
write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] +
((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
}
/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
/* 92d do not need this */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
write_val = 0x14141414;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
write_val = 0x00000000;
*(out_val+rf) = write_val;
}
}
static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
{
u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
u8 i, rf, pwr_val[4];
u32 write_val;
u16 regoffset;
for (rf = 0; rf < 2; rf++) {
write_val = pvalue[rf];
for (i = 0; i < 4; i++) {
pwr_val[i] = (u8)((write_val & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
write_val = (pwr_val[3]<<24) | (pwr_val[2]<<16) |
(pwr_val[1]<<8) | pwr_val[0];
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
}
}
void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
u8 *pwr_level_ofdm,
u8 *pwr_level_bw20,
u8 *pwr_level_bw40, u8 channel)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
channel, &powerbase0[0], &powerbase1[0]);
rtl88eu_dm_txpower_track_adjust(&hal_data->odmpriv, 0, &direction,
&pwrtrac_value);
for (index = 0; index < 6; index++) {
get_rx_power_val_by_reg(adapt, channel, index,
&powerbase0[0], &powerbase1[0],
&write_val[0]);
if (direction == 1) {
write_val[0] += pwrtrac_value;
write_val[1] += pwrtrac_value;
} else if (direction == 2) {
write_val[0] -= pwrtrac_value;
write_val[1] -= pwrtrac_value;
}
write_ofdm_pwr_reg(adapt, index, &write_val[0]);
}
}

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/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#include <phy.h>
static bool check_condition(struct adapter *adapt, const u32 condition)
{
struct odm_dm_struct *odm = &GET_HAL_DATA(adapt)->odmpriv;
u32 _board = odm->BoardType;
u32 _platform = odm->SupportPlatform;
u32 _interface = odm->SupportInterface;
u32 cond = condition;
if (condition == 0xCDCDCDCD)
return true;
cond = condition & 0x000000FF;
if ((_board == cond) && cond != 0x00)
return false;
cond = condition & 0x0000FF00;
cond = cond >> 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = condition & 0x00FF0000;
cond = cond >> 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
}
/* RadioA_1T.TXT */
static u32 Array_RadioA_1T_8188E[] = {
0x000, 0x00030000,
0x008, 0x00084000,
0x018, 0x00000407,
0x019, 0x00000012,
0x01E, 0x00080009,
0x01F, 0x00000880,
0x02F, 0x0001A060,
0x03F, 0x00000000,
0x042, 0x000060C0,
0x057, 0x000D0000,
0x058, 0x000BE180,
0x067, 0x00001552,
0x083, 0x00000000,
0x0B0, 0x000FF8FC,
0x0B1, 0x00054400,
0x0B2, 0x000CCC19,
0x0B4, 0x00043003,
0x0B6, 0x0004953E,
0x0B7, 0x0001C718,
0x0B8, 0x000060FF,
0x0B9, 0x00080001,
0x0BA, 0x00040000,
0x0BB, 0x00000400,
0x0BF, 0x000C0000,
0x0C2, 0x00002400,
0x0C3, 0x00000009,
0x0C4, 0x00040C91,
0x0C5, 0x00099999,
0x0C6, 0x000000A3,
0x0C7, 0x00088820,
0x0C8, 0x00076C06,
0x0C9, 0x00000000,
0x0CA, 0x00080000,
0x0DF, 0x00000180,
0x0EF, 0x000001A0,
0x051, 0x0006B27D,
0xFF0F041F, 0xABCD,
0x052, 0x0007E4DD,
0xCDCDCDCD, 0xCDCD,
0x052, 0x0007E49D,
0xFF0F041F, 0xDEAD,
0x053, 0x00000073,
0x056, 0x00051FF3,
0x035, 0x00000086,
0x035, 0x00000186,
0x035, 0x00000286,
0x036, 0x00001C25,
0x036, 0x00009C25,
0x036, 0x00011C25,
0x036, 0x00019C25,
0x0B6, 0x00048538,
0x018, 0x00000C07,
0x05A, 0x0004BD00,
0x019, 0x000739D0,
0x034, 0x0000ADF3,
0x034, 0x00009DF0,
0x034, 0x00008DED,
0x034, 0x00007DEA,
0x034, 0x00006DE7,
0x034, 0x000054EE,
0x034, 0x000044EB,
0x034, 0x000034E8,
0x034, 0x0000246B,
0x034, 0x00001468,
0x034, 0x0000006D,
0x000, 0x00030159,
0x084, 0x00068200,
0x086, 0x000000CE,
0x087, 0x00048A00,
0x08E, 0x00065540,
0x08F, 0x00088000,
0x0EF, 0x000020A0,
0x03B, 0x000F02B0,
0x03B, 0x000EF7B0,
0x03B, 0x000D4FB0,
0x03B, 0x000CF060,
0x03B, 0x000B0090,
0x03B, 0x000A0080,
0x03B, 0x00090080,
0x03B, 0x0008F780,
0x03B, 0x000722B0,
0x03B, 0x0006F7B0,
0x03B, 0x00054FB0,
0x03B, 0x0004F060,
0x03B, 0x00030090,
0x03B, 0x00020080,
0x03B, 0x00010080,
0x03B, 0x0000F780,
0x0EF, 0x000000A0,
0x000, 0x00010159,
0x018, 0x0000F407,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01F, 0x00080003,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01E, 0x00000001,
0x01F, 0x00080000,
0x000, 0x00033E60,
};
#define READ_NEXT_PAIR(v1, v2, i) \
do { \
i += 2; v1 = array[i]; \
v2 = array[i+1]; \
} while (0)
#define RFREG_OFFSET_MASK 0xfffff
#define B3WIREADDREAALENGTH 0x400
#define B3WIREDATALENGTH 0x800
#define BRFSI_RFENV 0x10
static void rtl_rfreg_delay(struct adapter *adapt, enum rf_radio_path rfpath, u32 addr, u32 mask, u32 data)
{
if (addr == 0xfe) {
mdelay(50);
} else if (addr == 0xfd) {
mdelay(5);
} else if (addr == 0xfc) {
mdelay(1);
} else if (addr == 0xfb) {
udelay(50);
} else if (addr == 0xfa) {
udelay(5);
} else if (addr == 0xf9) {
udelay(1);
} else {
phy_set_rf_reg(adapt, rfpath, addr, mask, data);
udelay(1);
}
}
static void rtl8188e_config_rf_reg(struct adapter *adapt,
u32 addr, u32 data)
{
u32 content = 0x1000; /*RF Content: radio_a_txt*/
u32 maskforphyset = (u32)(content & 0xE000);
rtl_rfreg_delay(adapt, RF90_PATH_A, addr | maskforphyset,
RFREG_OFFSET_MASK,
data);
}
static bool rtl88e_phy_config_rf_with_headerfile(struct adapter *adapt)
{
u32 i;
u32 array_len = sizeof(Array_RadioA_1T_8188E)/sizeof(u32);
u32 *array = Array_RadioA_1T_8188E;
for (i = 0; i < array_len; i += 2) {
u32 v1 = array[i];
u32 v2 = array[i+1];
if (v1 < 0xCDCDCDCD) {
rtl8188e_config_rf_reg(adapt, v1, v2);
continue;
} else {
if (!check_condition(adapt, array[i])) {
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD && v2 != 0xCDEF &&
v2 != 0xCDCD && i < array_len - 2)
READ_NEXT_PAIR(v1, v2, i);
i -= 2;
} else {
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD && v2 != 0xCDEF &&
v2 != 0xCDCD && i < array_len - 2) {
rtl8188e_config_rf_reg(adapt, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < array_len - 2)
READ_NEXT_PAIR(v1, v2, i);
}
}
}
return true;
}
static bool rf6052_conf_para(struct adapter *adapt)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u32 u4val = 0;
u8 rfpath;
bool rtstatus = true;
struct bb_reg_def *pphyreg;
for (rfpath = 0; rfpath < hal_data->NumTotalRFPath; rfpath++) {
pphyreg = &hal_data->PHYRegDef[rfpath];
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs,
BRFSI_RFENV);
break;
case RF90_PATH_B:
case RF90_PATH_D:
u4val = phy_query_bb_reg(adapt, pphyreg->rfintfs,
BRFSI_RFENV << 16);
break;
}
phy_set_bb_reg(adapt, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
udelay(1);
phy_set_bb_reg(adapt, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
udelay(1);
phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2,
B3WIREADDREAALENGTH, 0x0);
udelay(1);
phy_set_bb_reg(adapt, pphyreg->rfHSSIPara2,
B3WIREDATALENGTH, 0x0);
udelay(1);
switch (rfpath) {
case RF90_PATH_A:
rtstatus = rtl88e_phy_config_rf_with_headerfile(adapt);
break;
case RF90_PATH_B:
rtstatus = rtl88e_phy_config_rf_with_headerfile(adapt);
break;
case RF90_PATH_C:
break;
case RF90_PATH_D:
break;
}
switch (rfpath) {
case RF90_PATH_A:
case RF90_PATH_C:
phy_set_bb_reg(adapt, pphyreg->rfintfs,
BRFSI_RFENV, u4val);
break;
case RF90_PATH_B:
case RF90_PATH_D:
phy_set_bb_reg(adapt, pphyreg->rfintfs,
BRFSI_RFENV << 16, u4val);
break;
}
if (rtstatus != true)
return false;
}
return rtstatus;
}
static bool rtl88e_phy_rf6052_config(struct adapter *adapt)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
if (hal_data->rf_type == RF_1T1R)
hal_data->NumTotalRFPath = 1;
else
hal_data->NumTotalRFPath = 2;
return rf6052_conf_para(adapt);
}
bool rtl88eu_phy_rf_config(struct adapter *adapt)
{
return rtl88e_phy_rf6052_config(adapt);
}

129
hal/rtl8188e_cmd.c
View file

@ -22,7 +22,6 @@
#include <osdep_service.h>
#include <drv_types.h>
#include <recv_osdep.h>
#include <cmd_osdep.h>
#include <mlme_osdep.h>
#include <rtw_ioctl_set.h>
@ -41,7 +40,7 @@ static u8 _is_fw_read_cmd_down(struct adapter *adapt, u8 msgbox_num)
u8 valid;
do {
valid = rtw_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
valid = usb_read8(adapt, REG_HMETFR) & BIT(msgbox_num);
if (0 == valid)
read_down = true;
} while ((!read_down) && (retry_cnts--));
@ -72,7 +71,6 @@ static s32 FillH2CCmd_88E(struct adapter *adapt, u8 ElementID, u32 CmdLen, u8 *p
u32 h2c_cmd_ex = 0;
s32 ret = _FAIL;
_func_enter_;
if (!adapt->bFWReady) {
DBG_88E("FillH2CCmd_88E(): return H2C cmd because fw is not ready\n");
@ -107,13 +105,13 @@ _func_enter_;
/* Write Ext command */
msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num * RTL88E_EX_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < ext_cmd_len; cmd_idx++) {
rtw_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx));
usb_write8(adapt, msgbox_ex_addr+cmd_idx, *((u8 *)(&h2c_cmd_ex)+cmd_idx));
}
}
/* Write command */
msgbox_addr = REG_HMEBOX_0 + (h2c_box_num * RTL88E_MESSAGE_BOX_SIZE);
for (cmd_idx = 0; cmd_idx < RTL88E_MESSAGE_BOX_SIZE; cmd_idx++) {
rtw_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx));
usb_write8(adapt, msgbox_addr+cmd_idx, *((u8 *)(&h2c_cmd)+cmd_idx));
}
bcmd_down = true;
@ -125,7 +123,6 @@ _func_enter_;
exit:
_func_exit_;
return ret;
}
@ -134,7 +131,6 @@ u8 rtl8188e_set_rssi_cmd(struct adapter *adapt, u8 *param)
{
u8 res = _SUCCESS;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
_func_enter_;
if (haldata->fw_ractrl) {
;
@ -143,7 +139,6 @@ _func_enter_;
res = _FAIL;
}
_func_exit_;
return res;
}
@ -154,13 +149,10 @@ u8 rtl8188e_set_raid_cmd(struct adapter *adapt, u32 mask)
u8 res = _SUCCESS;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
_func_enter_;
if (haldata->fw_ractrl) {
__le32 lmask;
_rtw_memset(buf, 0, 3);
lmask = cpu_to_le32(mask);
memcpy(buf, &lmask, 3);
memset(buf, 0, 3);
put_unaligned_le32(mask, buf);
FillH2CCmd_88E(adapt, H2C_DM_MACID_CFG, 3, buf);
} else {
@ -168,7 +160,6 @@ _func_enter_;
res = _FAIL;
}
_func_exit_;
return res;
}
@ -215,7 +206,6 @@ void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode)
struct setpwrmode_parm H2CSetPwrMode;
struct pwrctrl_priv *pwrpriv = &adapt->pwrctrlpriv;
u8 RLBM = 0; /* 0:Min, 1:Max, 2:User define */
_func_enter_;
DBG_88E("%s: Mode=%d SmartPS=%d UAPSD=%d\n", __func__,
Mode, pwrpriv->smart_ps, adapt->registrypriv.uapsd_enable);
@ -256,14 +246,13 @@ _func_enter_;
FillH2CCmd_88E(adapt, H2C_PS_PWR_MODE, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode);
_func_exit_;
}
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt)
{
u8 opmode, macid;
u16 mst_rpt = le16_to_cpu(mstatus_rpt);
opmode = (u8) mst_rpt;
opmode = (u8)mst_rpt;
macid = (u8)(mst_rpt >> 8);
DBG_88E("### %s: MStatus=%x MACID=%d\n", __func__, opmode, macid);
@ -484,12 +473,6 @@ static void ConstructProbeRsp(struct adapter *adapt, u8 *pframe, u32 *pLength, u
*pLength = pktlen;
}
/* To check if reserved page content is destroyed by beacon because beacon is too large. */
/* 2010.06.23. Added by tynli. */
void CheckFwRsvdPageContent(struct adapter *Adapter)
{
}
/* */
/* Description: Fill the reserved packets that FW will use to RSVD page. */
/* Now we just send 4 types packet to rsvd page. */
@ -517,7 +500,7 @@ static void SetFwRsvdPagePkt(struct adapter *adapt, bool bDLFinished)
struct rsvdpage_loc RsvdPageLoc;
DBG_88E("%s\n", __func__);
ReservedPagePacket = (u8 *)rtw_zmalloc(1000);
ReservedPagePacket = kzalloc(1000, GFP_KERNEL);
if (ReservedPagePacket == NULL) {
DBG_88E("%s: alloc ReservedPagePacket fail!\n", __func__);
return;
@ -617,25 +600,24 @@ void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *adapt, u8 mstatus)
u8 DLBcnCount = 0;
u32 poll = 0;
_func_enter_;
DBG_88E("%s mstatus(%x)\n", __func__, mstatus);
if (mstatus == 1) {
/* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. */
/* Suggested by filen. Added by tynli. */
rtw_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
usb_write16(adapt, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid));
/* Do not set TSF again here or vWiFi beacon DMA INT will not work. */
/* Set REG_CR bit 8. DMA beacon by SW. */
haldata->RegCR_1 |= BIT0;
rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
usb_write8(adapt, REG_CR+1, haldata->RegCR_1);
/* Disable Hw protection for a time which revserd for Hw sending beacon. */
/* Fix download reserved page packet fail that access collision with the protection time. */
/* 2010.05.11. Added by tynli. */
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(3)));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(4));
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)&(~BIT(3)));
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)|BIT(4));
if (haldata->RegFwHwTxQCtrl&BIT6) {
DBG_88E("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n");
@ -643,7 +625,7 @@ _func_enter_;
}
/* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6)));
usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl&(~BIT6)));
haldata->RegFwHwTxQCtrl &= (~BIT6);
/* Clear beacon valid check bit. */
@ -655,8 +637,8 @@ _func_enter_;
SetFwRsvdPagePkt(adapt, false);
DLBcnCount++;
do {
rtw_yield_os();
/* rtw_mdelay_os(10); */
yield();
/* mdelay(10); */
/* check rsvd page download OK. */
rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
poll++;
@ -677,8 +659,8 @@ _func_enter_;
/* */
/* Enable Bcn */
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)|BIT(3));
rtw_write8(adapt, REG_BCN_CTRL, rtw_read8(adapt, REG_BCN_CTRL)&(~BIT(4)));
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)|BIT(3));
usb_write8(adapt, REG_BCN_CTRL, usb_read8(adapt, REG_BCN_CTRL)&(~BIT(4)));
/* To make sure that if there exists an adapter which would like to send beacon. */
/* If exists, the origianl value of 0x422[6] will be 1, we should check this to */
@ -686,7 +668,7 @@ _func_enter_;
/* the beacon cannot be sent by HW. */
/* 2010.06.23. Added by tynli. */
if (bSendBeacon) {
rtw_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6));
usb_write8(adapt, REG_FWHW_TXQ_CTRL+2, (haldata->RegFwHwTxQCtrl|BIT6));
haldata->RegFwHwTxQCtrl |= BIT6;
}
@ -699,81 +681,6 @@ _func_enter_;
/* Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. */
/* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
haldata->RegCR_1 &= (~BIT0);
rtw_write8(adapt, REG_CR+1, haldata->RegCR_1);
usb_write8(adapt, REG_CR+1, haldata->RegCR_1);
}
_func_exit_;
}
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state)
{
#ifdef CONFIG_88EU_P2P
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct wifidirect_info *pwdinfo = &(adapt->wdinfo);
struct P2P_PS_Offload_t *p2p_ps_offload = &haldata->p2p_ps_offload;
u8 i;
_func_enter_;
switch (p2p_ps_state) {
case P2P_PS_DISABLE:
DBG_88E("P2P_PS_DISABLE\n");
_rtw_memset(p2p_ps_offload, 0, 1);
break;
case P2P_PS_ENABLE:
DBG_88E("P2P_PS_ENABLE\n");
/* update CTWindow value. */
if (pwdinfo->ctwindow > 0) {
p2p_ps_offload->CTWindow_En = 1;
rtw_write8(adapt, REG_P2P_CTWIN, pwdinfo->ctwindow);
}
/* hw only support 2 set of NoA */
for (i = 0; i < pwdinfo->noa_num; i++) {
/* To control the register setting for which NOA */
rtw_write8(adapt, REG_NOA_DESC_SEL, (i << 4));
if (i == 0)
p2p_ps_offload->NoA0_En = 1;
else
p2p_ps_offload->NoA1_En = 1;
/* config P2P NoA Descriptor Register */
rtw_write32(adapt, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]);
rtw_write32(adapt, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]);
rtw_write32(adapt, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]);
rtw_write8(adapt, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]);
}
if ((pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0)) {
/* rst p2p circuit */
rtw_write8(adapt, REG_DUAL_TSF_RST, BIT(4));
p2p_ps_offload->Offload_En = 1;
if (pwdinfo->role == P2P_ROLE_GO) {
p2p_ps_offload->role = 1;
p2p_ps_offload->AllStaSleep = 0;
} else {
p2p_ps_offload->role = 0;
}
p2p_ps_offload->discovery = 0;
}
break;
case P2P_PS_SCAN:
DBG_88E("P2P_PS_SCAN\n");
p2p_ps_offload->discovery = 1;
break;
case P2P_PS_SCAN_DONE:
DBG_88E("P2P_PS_SCAN_DONE\n");
p2p_ps_offload->discovery = 0;
pwdinfo->p2p_ps_state = P2P_PS_ENABLE;
break;
default:
break;
}
FillH2CCmd_88E(adapt, H2C_PS_P2P_OFFLOAD, 1, (u8 *)p2p_ps_offload);
#endif
_func_exit_;
}

57
hal/rtl8188e_dm.c
View file

@ -31,19 +31,15 @@
#include <rtl8188e_hal.h>
static void dm_CheckStatistics(struct adapter *Adapter)
{
}
/* Initialize GPIO setting registers */
static void dm_InitGPIOSetting(struct adapter *Adapter)
{
u8 tmp1byte;
tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte = usb_read8(Adapter, REG_GPIO_MUXCFG);
tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT);
rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
usb_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte);
}
/* */
@ -57,17 +53,12 @@ static void Init_ODM_ComInfo_88E(struct adapter *Adapter)
u8 cut_ver, fab_ver;
/* Init Value */
_rtw_memset(dm_odm, 0, sizeof(*dm_odm));
memset(dm_odm, 0, sizeof(*dm_odm));
dm_odm->Adapter = Adapter;
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_PLATFORM, ODM_CE);
if (Adapter->interface_type == RTW_GSPI)
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
else
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_INTERFACE, Adapter->interface_type);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit(dm_odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8188E);
fab_ver = ODM_TSMC;
@ -164,8 +155,9 @@ void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
bool fw_ps_awake = true;
u8 hw_init_completed = false;
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
struct mlme_priv *pmlmepriv = NULL;
u8 bLinked = false;
_func_enter_;
hw_init_completed = Adapter->hw_init_completed;
if (!hw_init_completed)
@ -179,30 +171,21 @@ void rtl8188e_HalDmWatchDog(struct adapter *Adapter)
if (Adapter->wdinfo.p2p_ps_mode)
fw_ps_awake = false;
if (hw_init_completed && ((!fw_cur_in_ps) && fw_ps_awake)) {
/* Calculate Tx/Rx statistics. */
dm_CheckStatistics(Adapter);
_func_exit_;
}
/* ODM */
if (hw_init_completed) {
struct mlme_priv *pmlmepriv = &Adapter->mlmepriv;
u8 bLinked = false;
pmlmepriv = &Adapter->mlmepriv;
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
ODM_DMWatchdog(&hal_data->odmpriv);
if ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) ||
(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE |
WIFI_ADHOC_MASTER_STATE))) {
if (Adapter->stapriv.asoc_sta_count > 2)
bLinked = true;
} else {/* Station mode */
if (check_fwstate(pmlmepriv, _FW_LINKED))
bLinked = true;
}
ODM_CmnInfoUpdate(&hal_data->odmpriv, ODM_CMNINFO_LINK, bLinked);
ODM_DMWatchdog(&hal_data->odmpriv);
skip_dm:
/* Check GPIO to determine current RF on/off and Pbc status. */
/* Check Hardware Radio ON/OFF or not */
@ -215,15 +198,11 @@ void rtl8188e_init_dm_priv(struct adapter *Adapter)
struct dm_priv *pdmpriv = &hal_data->dmpriv;
struct odm_dm_struct *podmpriv = &hal_data->odmpriv;
_rtw_memset(pdmpriv, 0, sizeof(struct dm_priv));
memset(pdmpriv, 0, sizeof(struct dm_priv));
Init_ODM_ComInfo_88E(Adapter);
ODM_InitDebugSetting(podmpriv);
}
void rtl8188e_deinit_dm_priv(struct adapter *Adapter)
{
}
/* Add new function to reset the state of antenna diversity before link. */
/* Compare RSSI for deciding antenna */
void AntDivCompare8188E(struct adapter *Adapter, struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src)

1758
hal/rtl8188e_hal_init.c
View file

File diff suppressed because it is too large Load diff

860
hal/rtl8188e_mp.c
View file

@ -1,860 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_MP_C_
#include <drv_types.h>
#include <rtw_mp.h>
#include <rtl8188e_hal.h>
#include <rtl8188e_dm.h>
s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
if (!netif_running(padapter->pnetdev)) {
RT_TRACE(_module_mp_, _drv_warning_,
("SetPowerTracking! Fail: interface not opened!\n"));
return _FAIL;
}
if (!check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE)) {
RT_TRACE(_module_mp_, _drv_warning_,
("SetPowerTracking! Fail: not in MP mode!\n"));
return _FAIL;
}
if (enable)
pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true;
else
pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false;
return _SUCCESS;
}
void Hal_GetPowerTracking(struct adapter *padapter, u8 *enable)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
*enable = pDM_Odm->RFCalibrateInfo.TxPowerTrackControl;
}
/*-----------------------------------------------------------------------------
* Function: mpt_SwitchRfSetting
*
* Overview: Change RF Setting when we siwthc channel/rate/BW for MP.
*
* Input: struct adapter * pAdapter
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 01/08/2009 MHC Suggestion from SD3 Willis for 92S series.
* 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3.
*
*---------------------------------------------------------------------------*/
void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter)
{
struct mp_priv *pmp = &pAdapter->mppriv;
/* <20120525, Kordan> Dynamic mechanism for APK, asked by Dennis. */
pmp->MptCtx.backup0x52_RF_A = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0);
pmp->MptCtx.backup0x52_RF_B = (u8)PHY_QueryRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0);
PHY_SetRFReg(pAdapter, RF_PATH_A, RF_0x52, 0x000F0, 0xD);
PHY_SetRFReg(pAdapter, RF_PATH_B, RF_0x52, 0x000F0, 0xD);
return;
}
/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
void Hal_MPT_CCKTxPowerAdjust(struct adapter *Adapter, bool bInCH14)
{
u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0;
u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12;
u8 i;
/* get current cck swing value and check 0xa22 & 0xa23 later to match the table. */
CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord);
if (!bInCH14) {
/* Readback the current bb cck swing value and compare with the table to */
/* get the current swing index */
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) &&
(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) {
CCKSwingIndex = i;
break;
}
}
/* Write 0xa22 0xa23 */
TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8);
/* Write 0xa24 ~ 0xa27 */
TempVal2 = 0;
TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16)+
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24);
/* Write 0xa28 0xa29 */
TempVal3 = 0;
TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] +
(CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8);
} else {
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) &&
(((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) {
CCKSwingIndex = i;
break;
}
}
/* Write 0xa22 0xa23 */
TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] +
(CCKSwingTable_Ch14[CCKSwingIndex][1]<<8);
/* Write 0xa24 ~ 0xa27 */
TempVal2 = 0;
TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] +
(CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) +
(CCKSwingTable_Ch14[CCKSwingIndex][4]<<16)+
(CCKSwingTable_Ch14[CCKSwingIndex][5]<<24);
/* Write 0xa28 0xa29 */
TempVal3 = 0;
TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] +
(CCKSwingTable_Ch14[CCKSwingIndex][7]<<8);
}
write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal);
write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2);
write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3);
}
void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mpt_context *pMptCtx = &pAdapter->mppriv.MptCtx;
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
s32 TempCCk;
u8 CCK_index, CCK_index_old = 0;
u8 Action = 0; /* 0: no action, 1: even->odd, 2:odd->even */
s32 i = 0;
if (!IS_92C_SERIAL(pHalData->VersionID))
return;
if (beven && !pMptCtx->bMptIndexEven) {
/* odd->even */
Action = 2;
pMptCtx->bMptIndexEven = true;
} else if (!beven && pMptCtx->bMptIndexEven) {
/* even->odd */
Action = 1;
pMptCtx->bMptIndexEven = false;
}
if (Action != 0) {
/* Query CCK default setting From 0xa24 */
TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK;
for (i = 0; i < CCK_TABLE_SIZE; i++) {
if (pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
if (_rtw_memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch14[i][2], 4)) {
CCK_index_old = (u8)i;
break;
}
} else {
if (_rtw_memcmp((void *)&TempCCk, (void *)&CCKSwingTable_Ch1_Ch13[i][2], 4)) {
CCK_index_old = (u8)i;
break;
}
}
}
if (Action == 1)
CCK_index = CCK_index_old - 1;
else
CCK_index = CCK_index_old + 1;
/* Adjust CCK according to gain index */
if (!pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]);
rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]);
rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]);
rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]);
rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]);
rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]);
rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]);
rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]);
} else {
rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]);
rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]);
rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]);
rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]);
rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]);
rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]);
rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]);
rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]);
}
}
}
/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/
/*
* SetChannel
* Description
* Use H2C command to change channel,
* not only modify rf register, but also other setting need to be done.
*/
void Hal_SetChannel(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct mp_priv *pmp = &pAdapter->mppriv;
struct odm_dm_struct *pDM_Odm = &(pHalData->odmpriv);
u8 eRFPath;
u8 channel = pmp->channel;
/* set RF channel register */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++)
_write_rfreg(pAdapter, eRFPath, ODM_CHANNEL, 0x3FF, channel);
Hal_mpt_SwitchRfSetting(pAdapter);
SelectChannel(pAdapter, channel);
if (pHalData->CurrentChannel == 14 && !pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
pDM_Odm->RFCalibrateInfo.bCCKinCH14 = true;
Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14);
} else if (pHalData->CurrentChannel != 14 && pDM_Odm->RFCalibrateInfo.bCCKinCH14) {
pDM_Odm->RFCalibrateInfo.bCCKinCH14 = false;
Hal_MPT_CCKTxPowerAdjust(pAdapter, pDM_Odm->RFCalibrateInfo.bCCKinCH14);
}
}
/*
* Notice
* Switch bandwitdth may change center frequency(channel)
*/
void Hal_SetBandwidth(struct adapter *pAdapter)
{
struct mp_priv *pmp = &pAdapter->mppriv;
SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset);
Hal_mpt_SwitchRfSetting(pAdapter);
}
void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 *TxPower)
{
u32 tmpval = 0;
/* rf-A cck tx power */
write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]);
tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A];
write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]);
tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B];
write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
RT_TRACE(_module_mp_, _drv_notice_,
("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n",
TxPower[RF_PATH_A], TxPower[RF_PATH_B]));
}
void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 *TxPower)
{
u32 TxAGC = 0;
u8 tmpval = 0;
/* HT Tx-rf(A) */
tmpval = TxPower[RF_PATH_A];
TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
/* HT Tx-rf(B) */
tmpval = TxPower[RF_PATH_B];
TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval;
write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
}
void Hal_SetAntennaPathPower(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
u8 TxPowerLevel[MAX_RF_PATH_NUMS];
u8 rfPath;
TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx;
TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
switch (pHalData->rf_chip) {
case RF_8225:
case RF_8256:
case RF_6052:
Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */
Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
break;
default:
break;
}
}
void Hal_SetTxPower(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
u8 TxPower = pAdapter->mppriv.txpoweridx;
u8 TxPowerLevel[MAX_RF_PATH_NUMS];
u8 rf, rfPath;
for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++)
TxPowerLevel[rf] = TxPower;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
switch (pHalData->rf_chip) {
/* 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! */
/* We should call normal driver API later!! */
case RF_8225:
case RF_8256:
case RF_6052:
Hal_SetCCKTxPower(pAdapter, TxPowerLevel);
if (pAdapter->mppriv.rateidx < MPT_RATE_6M) /* CCK rate */
Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0);
Hal_SetOFDMTxPower(pAdapter, TxPowerLevel);
break;
default:
break;
}
}
void Hal_SetDataRate(struct adapter *pAdapter)
{
Hal_mpt_SwitchRfSetting(pAdapter);
}
void Hal_SetAntenna(struct adapter *pAdapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
struct ant_sel_ofdm *p_ofdm_tx; /* OFDM Tx register */
struct ant_sel_cck *p_cck_txrx;
u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0;
u8 chgTx = 0, chgRx = 0;
u32 r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0;
p_ofdm_tx = (struct ant_sel_ofdm *)&r_ant_select_ofdm_val;
p_cck_txrx = (struct ant_sel_cck *)&r_ant_select_cck_val;
p_ofdm_tx->r_ant_ht1 = 0x1;
p_ofdm_tx->r_ant_ht2 = 0x2; /* Second TX RF path is A */
p_ofdm_tx->r_ant_non_ht = 0x3; /* 0x1+0x2=0x3 */
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
p_ofdm_tx->r_tx_antenna = 0x1;
r_ofdm_tx_en_val = 0x1;
p_ofdm_tx->r_ant_l = 0x1;
p_ofdm_tx->r_ant_ht_s1 = 0x1;
p_ofdm_tx->r_ant_non_ht_s1 = 0x1;
p_cck_txrx->r_ccktx_enable = 0x8;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF A=TX and B as standby */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1);
r_ofdm_tx_en_val = 0x3;
/* Power save */
/* We need to close RFB by SW control */
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0);
}
break;
case ANTENNA_B:
p_ofdm_tx->r_tx_antenna = 0x2;
r_ofdm_tx_en_val = 0x2;
p_ofdm_tx->r_ant_l = 0x2;
p_ofdm_tx->r_ant_ht_s1 = 0x2;
p_ofdm_tx->r_ant_non_ht_s1 = 0x2;
p_cck_txrx->r_ccktx_enable = 0x4;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF A as standby */
PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
/* Power save */
/* cosa r_ant_select_ofdm_val = 0x22222222; */
/* 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. */
/* 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control */
if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
}
break;
case ANTENNA_AB: /* For 8192S */
p_ofdm_tx->r_tx_antenna = 0x3;
r_ofdm_tx_en_val = 0x3;
p_ofdm_tx->r_ant_l = 0x3;
p_ofdm_tx->r_ant_ht_s1 = 0x3;
p_ofdm_tx->r_ant_non_ht_s1 = 0x3;
p_cck_txrx->r_ccktx_enable = 0xC;
chgTx = 1;
/* From SD3 Willis suggestion !!! Set RF B as standby */
PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2);
PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2);
/* Disable Power save */
/* cosa r_ant_select_ofdm_val = 0x3321333; */
/* 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control */
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1);
}
break;
default:
break;
}
/* r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D */
/* r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D */
/* r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D */
switch (pAdapter->mppriv.antenna_rx) {
case ANTENNA_A:
r_rx_antenna_ofdm = 0x1; /* A */
p_cck_txrx->r_cckrx_enable = 0x0; /* default: A */
p_cck_txrx->r_cckrx_enable_2 = 0x0; /* option: A */
chgRx = 1;
break;
case ANTENNA_B:
r_rx_antenna_ofdm = 0x2; /* B */
p_cck_txrx->r_cckrx_enable = 0x1; /* default: B */
p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option: B */
chgRx = 1;
break;
case ANTENNA_AB:
r_rx_antenna_ofdm = 0x3; /* AB */
p_cck_txrx->r_cckrx_enable = 0x0; /* default:A */
p_cck_txrx->r_cckrx_enable_2 = 0x1; /* option:B */
chgRx = 1;
break;
default:
break;
}
if (chgTx && chgRx) {
switch (pHalData->rf_chip) {
case RF_8225:
case RF_8256:
case RF_6052:
/* r_ant_sel_cck_val = r_ant_select_cck_val; */
PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); /* OFDM Tx */
PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); /* OFDM Tx */
PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */
PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); /* OFDM Rx */
PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val); /* CCK TxRx */
break;
default:
break;
}
}
RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n"));
}
s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (!netif_running(pAdapter->pnetdev)) {
RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n"));
return _FAIL;
}
if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == false) {
RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n"));
return _FAIL;
}
target_ther &= 0xff;
if (target_ther < 0x07)
target_ther = 0x07;
else if (target_ther > 0x1d)
target_ther = 0x1d;
pHalData->EEPROMThermalMeter = target_ther;
return _SUCCESS;
}
void Hal_TriggerRFThermalMeter(struct adapter *pAdapter)
{
_write_rfreg(pAdapter, RF_PATH_A , RF_T_METER_88E , BIT17 | BIT16 , 0x03);
}
u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter)
{
u32 ThermalValue = 0;
ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER_88E, 0xfc00);
return (u8)ThermalValue;
}
void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value)
{
Hal_TriggerRFThermalMeter(pAdapter);
rtw_msleep_os(1000);
*value = Hal_ReadRFThermalMeter(pAdapter);
}
void Hal_SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bSingleCarrier = bStart;
if (bStart) {
/* Start Single Carrier. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test start\n"));
/* 1. if OFDM block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */
/* 2. set CCK test mode off, set to CCK normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
/* 3. turn on scramble setting */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
/* 4. Turn On Single Carrier Tx and turn off the other test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Single Carrier. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleCarrierTx: test stop\n"));
/* Turn off all test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
rtw_msleep_os(10);
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
bool is92C = IS_92C_SERIAL(pHalData->VersionID);
u8 rfPath;
u32 reg58 = 0x0;
switch (pAdapter->mppriv.antenna_tx) {
case ANTENNA_A:
default:
rfPath = RF_PATH_A;
break;
case ANTENNA_B:
rfPath = RF_PATH_B;
break;
case ANTENNA_C:
rfPath = RF_PATH_C;
break;
}
pAdapter->mppriv.MptCtx.bSingleTone = bStart;
if (bStart) {
/* Start Single Tone. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleToneTx: test start\n"));
/* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */
if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask);
reg58 &= 0xFFFFFFF0;
reg58 += 2;
PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58);
}
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0);
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0);
if (is92C) {
_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01);
rtw_usleep_os(100);
if (rfPath == RF_PATH_A)
write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); /* PAD all on. */
else if (rfPath == RF_PATH_B)
write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); /* PAD all on. */
write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */
rtw_usleep_os(100);
} else {
write_rfreg(pAdapter, rfPath, 0x21, 0xd4000);
rtw_usleep_os(100);
write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); /* PAD all on. */
rtw_usleep_os(100);
}
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Single Tone. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetSingleToneTx: test stop\n"));
/* <20120326, Kordan> To amplify the power of tone for Xtal calibration. (asked by Edlu) */
/* <20120326, Kordan> Only in single tone mode. (asked by Edlu) */
if (IS_HARDWARE_TYPE_8188E(pAdapter)) {
reg58 = PHY_QueryRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask);
reg58 &= 0xFFFFFFF0;
PHY_SetRFReg(pAdapter, RF_PATH_A, LNA_Low_Gain_3, bRFRegOffsetMask, reg58);
}
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1);
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1);
if (is92C) {
_write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00);
rtw_usleep_os(100);
write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); /* PAD all on. */
write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); /* PAD all on. */
rtw_usleep_os(100);
} else {
write_rfreg(pAdapter, rfPath, 0x21, 0x54000);
rtw_usleep_os(100);
write_rfreg(pAdapter, rfPath, 0x00, 0x30000); /* PAD all on. */
rtw_usleep_os(100);
}
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart)
{
pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart;
if (bStart) {
/* Start Carrier Suppression. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test start\n"));
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) {
/* 1. if CCK block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */
/* Turn Off All Test Mode */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); /* turn off scramble setting */
/* Set CCK Tx Test Rate */
write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); /* Set FTxRate to 1Mbps */
}
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
/* Stop Carrier Suppression. */
RT_TRACE(_module_mp_, _drv_alert_, ("SetCarrierSuppressionTx: test stop\n"));
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) {
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); /* turn on scramble setting */
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
}
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
}
void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart)
{
u32 cckrate;
if (bStart) {
RT_TRACE(_module_mp_, _drv_alert_,
("SetCCKContinuousTx: test start\n"));
/* 1. if CCK block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);/* set CCK block on */
/* Turn Off All Test Mode */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* Set CCK Tx Test Rate */
cckrate = pAdapter->mppriv.rateidx;
write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate);
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); /* transmit mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
RT_TRACE(_module_mp_, _drv_info_,
("SetCCKContinuousTx: test stop\n"));
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); /* normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); /* turn on scramble setting */
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
pAdapter->mppriv.MptCtx.bCckContTx = bStart;
pAdapter->mppriv.MptCtx.bOfdmContTx = false;
} /* mpt_StartCckContTx */
void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart)
{
if (bStart) {
RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n"));
/* 1. if OFDM block on? */
if (!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn))
write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);/* set OFDM block on */
/* 2. set CCK test mode off, set to CCK normal mode */
write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable);
/* 3. turn on scramble setting */
write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable);
/* 4. Turn On Continue Tx and turn off the other test modes. */
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000500);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000500);
} else {
RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test stop\n"));
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable);
write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable);
/* Delay 10 ms */
rtw_msleep_os(10);
/* BB Reset */
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0);
write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1);
/* Stop for dynamic set Power index. */
write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter1, bMaskDWord, 0x01000100);
write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter1, bMaskDWord, 0x01000100);
}
pAdapter->mppriv.MptCtx.bCckContTx = false;
pAdapter->mppriv.MptCtx.bOfdmContTx = bStart;
} /* mpt_StartOfdmContTx */
void Hal_SetContinuousTx(struct adapter *pAdapter, u8 bStart)
{
RT_TRACE(_module_mp_, _drv_info_,
("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx));
pAdapter->mppriv.MptCtx.bStartContTx = bStart;
if (pAdapter->mppriv.rateidx <= MPT_RATE_11M)
Hal_SetCCKContinuousTx(pAdapter, bStart);
else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) &&
(pAdapter->mppriv.rateidx <= MPT_RATE_MCS15))
Hal_SetOFDMContinuousTx(pAdapter, bStart);
}

1144
hal/rtl8188e_phycfg.c
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File diff suppressed because it is too large Load diff

572
hal/rtl8188e_rf6052.c
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@ -1,572 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/******************************************************************************
*
*
* Module: rtl8192c_rf6052.c ( Source C File)
*
* Note: Provide RF 6052 series relative API.
*
* Function:
*
* Export:
*
* Abbrev:
*
* History:
* Data Who Remark
*
* 09/25/2008 MHC Create initial version.
* 11/05/2008 MHC Add API for tw power setting.
*
*
******************************************************************************/
#define _RTL8188E_RF6052_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <rtl8188e_hal.h>
/*---------------------------Define Local Constant---------------------------*/
/* Define local structure for debug!!!!! */
struct rf_shadow {
/* Shadow register value */
u32 Value;
/* Compare or not flag */
u8 Compare;
/* Record If it had ever modified unpredicted */
u8 ErrorOrNot;
/* Recorver Flag */
u8 Recorver;
/* */
u8 Driver_Write;
};
/*---------------------------Define Local Constant---------------------------*/
/*------------------------Define global variable-----------------------------*/
/*------------------------Define local variable------------------------------*/
/*-----------------------------------------------------------------------------
* Function: RF_ChangeTxPath
*
* Overview: For RL6052, we must change some RF settign for 1T or 2T.
*
* Input: u16 DataRate 0x80-8f, 0x90-9f
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 09/25/2008 MHC Create Version 0.
* Firmwaer support the utility later.
*
*---------------------------------------------------------------------------*/
void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate)
{
/* We do not support gain table change inACUT now !!!! Delete later !!! */
} /* RF_ChangeTxPath */
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetBandwidth()
*
* Overview: This function is called by SetBWModeCallback8190Pci() only
*
* Input: struct adapter *Adapter
* WIRELESS_BANDWIDTH_E Bandwidth 20M or 40M
*
* Output: NONE
*
* Return: NONE
*
* Note: For RF type 0222D
*---------------------------------------------------------------------------*/
void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
enum ht_channel_width Bandwidth)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
switch (Bandwidth) {
case HT_CHANNEL_WIDTH_20:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10) | BIT(11));
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
case HT_CHANNEL_WIDTH_40:
pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | BIT(10));
PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
break;
default:
break;
}
}
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetCckTxPower
*
* Overview:
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/05/2008 MHC Simulate 8192series..
*
*---------------------------------------------------------------------------*/
void
rtl8188e_PHY_RF6052SetCckTxPower(
struct adapter *Adapter,
u8 *pPowerlevel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
bool TurboScanOff = false;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
/* FOR CE ,must disable turbo scan */
TurboScanOff = true;
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
TxAGC[RF_PATH_A] = 0x3f3f3f3f;
TxAGC[RF_PATH_B] = 0x3f3f3f3f;
TurboScanOff = true;/* disable turbo scan */
if (TurboScanOff) {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
/* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */
if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
TxAGC[idx1] = 0x20;
}
}
} else {
/* Driver dynamic Tx power shall not affect Tx power.
* It shall be determined by power training mechanism.
i * Currently, we cannot fully disable driver dynamic
* tx power mechanism because it is referenced by BT
* coexist mechanism.
* In the future, two mechanism shall be separated from
* each other and maintained independently. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
TxAGC[RF_PATH_A] = 0x10101010;
TxAGC[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
TxAGC[RF_PATH_A] = 0x00000000;
TxAGC[RF_PATH_B] = 0x00000000;
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
TxAGC[idx1] =
pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
(pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
}
if (pHalData->EEPROMRegulatory == 0) {
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
TxAGC[RF_PATH_A] += tmpval;
tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +
(pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);
TxAGC[RF_PATH_B] += tmpval;
}
}
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
ptr = (u8 *)(&(TxAGC[idx1]));
for (idx2 = 0; idx2 < 4; idx2++) {
if (*ptr > RF6052_MAX_TX_PWR)
*ptr = RF6052_MAX_TX_PWR;
ptr++;
}
}
ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 1, &direction, &pwrtrac_value);
if (direction == 1) {
/* Increase TX power */
TxAGC[0] += pwrtrac_value;
TxAGC[1] += pwrtrac_value;
} else if (direction == 2) {
/* Decrease TX power */
TxAGC[0] -= pwrtrac_value;
TxAGC[1] -= pwrtrac_value;
}
/* rf-A cck tx power */
tmpval = TxAGC[RF_PATH_A]&0xff;
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
tmpval = TxAGC[RF_PATH_A]>>8;
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
tmpval = TxAGC[RF_PATH_B]>>24;
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
tmpval = TxAGC[RF_PATH_B]&0x00ffffff;
PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
} /* PHY_RF6052SetCckTxPower */
/* */
/* powerbase0 for OFDM rates */
/* powerbase1 for HT MCS rates */
/* */
static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 Channel, u32 *OfdmBase, u32 *MCSBase)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 powerBase0, powerBase1;
u8 i, powerlevel[2];
for (i = 0; i < 2; i++) {
powerBase0 = pPowerLevelOFDM[i];
powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0;
*(OfdmBase+i) = powerBase0;
}
for (i = 0; i < pHalData->NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
powerlevel[i] = pPowerLevelBW20[i];
else
powerlevel[i] = pPowerLevelBW40[i];
powerBase1 = powerlevel[i];
powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1;
*(MCSBase+i) = powerBase1;
}
}
static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
u8 index, u32 *powerBase0, u32 *powerBase1,
u32 *pOutWriteVal)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
s8 pwr_diff = 0;
u32 writeVal, customer_limit, rf;
u8 Regulatory = pHalData->EEPROMRegulatory;
/* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
for (rf = 0; rf < 2; rf++) {
switch (Regulatory) {
case 0: /* Realtek better performance */
/* increase power diff defined by Realtek for large power */
chnlGroup = 0;
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
case 1: /* Realtek regulatory */
/* increase power diff defined by Realtek for regulatory */
if (pHalData->pwrGroupCnt == 1)
chnlGroup = 0;
if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) {
if (Channel < 3) /* Channel 1-2 */
chnlGroup = 0;
else if (Channel < 6) /* Channel 3-5 */
chnlGroup = 1;
else if (Channel < 9) /* Channel 6-8 */
chnlGroup = 2;
else if (Channel < 12) /* Channel 9-11 */
chnlGroup = 3;
else if (Channel < 14) /* Channel 12-13 */
chnlGroup = 4;
else if (Channel == 14) /* Channel 14 */
chnlGroup = 5;
}
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
writeVal = ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
case 3: /* Customer defined power diff. */
/* increase power diff defined by customer. */
chnlGroup = 0;
if (index < 2)
pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1];
else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1];
if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1];
else
customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1];
if (pwr_diff >= customer_pwr_limit)
pwr_diff = 0;
else
pwr_diff = customer_pwr_limit - pwr_diff;
for (i = 0; i < 4; i++) {
pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)]&(0x7f<<(i*8)))>>(i*8));
if (pwr_diff_limit[i] > pwr_diff)
pwr_diff_limit[i] = pwr_diff;
}
customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
(pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
writeVal = customer_limit + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
default:
chnlGroup = 0;
writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
((index < 2) ? powerBase0[rf] : powerBase1[rf]);
break;
}
/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
/* 92d do not need this */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
writeVal = 0x14141414;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
writeVal = 0x00000000;
/* 20100628 Joseph: High power mode for BT-Coexist mechanism. */
/* This mechanism is only applied when Driver-Highpower-Mechanism is OFF. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
writeVal = writeVal - 0x06060606;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
writeVal = writeVal;
*(pOutWriteVal+rf) = writeVal;
}
}
static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u16 regoffset_a[6] = {
rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
u16 regoffset_b[6] = {
rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
u8 i, rf, pwr_val[4];
u32 writeVal;
u16 regoffset;
for (rf = 0; rf < 2; rf++) {
writeVal = pValue[rf];
for (i = 0; i < 4; i++) {
pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) | (pwr_val[1]<<8) | pwr_val[0];
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
PHY_SetBBReg(Adapter, regoffset, bMaskDWord, writeVal);
/* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */
if (((pHalData->rf_type == RF_2T2R) &&
(regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) ||
((pHalData->rf_type != RF_2T2R) &&
(regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) {
writeVal = pwr_val[3];
if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04)
regoffset = 0xc90;
if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs07_Mcs04)
regoffset = 0xc98;
for (i = 0; i < 3; i++) {
if (i != 2)
writeVal = (writeVal > 8) ? (writeVal-8) : 0;
else
writeVal = (writeVal > 6) ? (writeVal-6) : 0;
rtw_write8(Adapter, (u32)(regoffset+i), (u8)writeVal);
}
}
}
}
/*-----------------------------------------------------------------------------
* Function: PHY_RF6052SetOFDMTxPower
*
* Overview: For legacy and HY OFDM, we must read EEPROM TX power index for
* different channel and read original value in TX power register area from
* 0xe00. We increase offset and original value to be correct tx pwr.
*
* Input: NONE
*
* Output: NONE
*
* Return: NONE
*
* Revised History:
* When Who Remark
* 11/05/2008 MHC Simulate 8192 series method.
* 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to
* A/B pwr difference or legacy/HT pwr diff.
* 2. We concern with path B legacy/HT OFDM difference.
* 01/22/2009 MHC Support new EPRO format from SD3.
*
*---------------------------------------------------------------------------*/
void
rtl8188e_PHY_RF6052SetOFDMTxPower(
struct adapter *Adapter,
u8 *pPowerLevelOFDM,
u8 *pPowerLevelBW20,
u8 *pPowerLevelBW40,
u8 Channel)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
getpowerbase88e(Adapter, pPowerLevelOFDM, pPowerLevelBW20, pPowerLevelBW40, Channel, &powerBase0[0], &powerBase1[0]);
/* 2012/04/23 MH According to power tracking value, we need to revise OFDM tx power. */
/* This is ued to fix unstable power tracking mode. */
ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value);
for (index = 0; index < 6; index++) {
get_rx_power_val_by_reg(Adapter, Channel, index,
&powerBase0[0], &powerBase1[0],
&writeVal[0]);
if (direction == 1) {
writeVal[0] += pwrtrac_value;
writeVal[1] += pwrtrac_value;
} else if (direction == 2) {
writeVal[0] -= pwrtrac_value;
writeVal[1] -= pwrtrac_value;
}
writeOFDMPowerReg88E(Adapter, index, &writeVal[0]);
}
}
static int phy_RF6052_Config_ParaFile(struct adapter *Adapter)
{
struct bb_reg_def *pPhyReg;
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
u32 u4RegValue = 0;
u8 eRFPath;
int rtStatus = _SUCCESS;
/* 3----------------------------------------------------------------- */
/* 3 <2> Initialize RF */
/* 3----------------------------------------------------------------- */
for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) {
pPhyReg = &pHalData->PHYRegDef[eRFPath];
/*----Store original RFENV control type----*/
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV);
break;
case RF_PATH_B:
case RF_PATH_D:
u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16);
break;
}
/*----Set RF_ENV enable----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1);
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Set RF_ENV output high----*/
PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1);
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/* Set bit number of Address and Data for RF register */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 1 to 4 bits for 8255 */
rtw_udelay_os(1);/* PlatformStallExecution(1); */
PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for 8255 */
rtw_udelay_os(1);/* PlatformStallExecution(1); */
/*----Initialize RF fom connfiguration file----*/
switch (eRFPath) {
case RF_PATH_A:
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum ODM_RF_RADIO_PATH)eRFPath, (enum ODM_RF_RADIO_PATH)eRFPath))
rtStatus = _FAIL;
break;
case RF_PATH_B:
if (HAL_STATUS_FAILURE == ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, (enum ODM_RF_RADIO_PATH)eRFPath, (enum ODM_RF_RADIO_PATH)eRFPath))
rtStatus = _FAIL;
break;
case RF_PATH_C:
break;
case RF_PATH_D:
break;
}
/*----Restore RFENV control type----*/;
switch (eRFPath) {
case RF_PATH_A:
case RF_PATH_C:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break;
case RF_PATH_B:
case RF_PATH_D:
PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
break;
}
if (rtStatus != _SUCCESS)
goto phy_RF6052_Config_ParaFile_Fail;
}
return rtStatus;
phy_RF6052_Config_ParaFile_Fail:
return rtStatus;
}
int PHY_RF6052_Config8188E(struct adapter *Adapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
int rtStatus = _SUCCESS;
/* */
/* Initialize general global value */
/* */
/* TODO: Extend RF_PATH_C and RF_PATH_D in the future */
if (pHalData->rf_type == RF_1T1R)
pHalData->NumTotalRFPath = 1;
else
pHalData->NumTotalRFPath = 2;
/* */
/* Config BB and RF */
/* */
rtStatus = phy_RF6052_Config_ParaFile(Adapter);
return rtStatus;
}

43
hal/rtl8188e_rxdesc.c
View file

@ -23,9 +23,9 @@
#include <drv_types.h>
#include <rtl8188e_hal.h>
static void process_rssi(struct adapter *padapter, union recv_frame *prframe)
static void process_rssi(struct adapter *padapter, struct recv_frame *prframe)
{
struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
struct rx_pkt_attrib *pattrib = &prframe->attrib;
struct signal_stat *signal_stat = &padapter->recvpriv.signal_strength_data;
if (signal_stat->update_req) {
@ -39,7 +39,8 @@ static void process_rssi(struct adapter *padapter, union recv_frame *prframe)
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
} /* Process_UI_RSSI_8192C */
static void process_link_qual(struct adapter *padapter, union recv_frame *prframe)
static void process_link_qual(struct adapter *padapter,
struct recv_frame *prframe)
{
struct rx_pkt_attrib *pattrib;
struct signal_stat *signal_stat;
@ -47,7 +48,7 @@ static void process_link_qual(struct adapter *padapter, union recv_frame *prfram
if (prframe == NULL || padapter == NULL)
return;
pattrib = &prframe->u.hdr.attrib;
pattrib = &prframe->attrib;
signal_stat = &padapter->recvpriv.signal_qual_data;
if (signal_stat->update_req) {
@ -63,7 +64,7 @@ static void process_link_qual(struct adapter *padapter, union recv_frame *prfram
void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
{
union recv_frame *precvframe = (union recv_frame *)prframe;
struct recv_frame *precvframe = (struct recv_frame *)prframe;
/* Check RSSI */
process_rssi(padapter, precvframe);
@ -71,7 +72,8 @@ void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe)
process_link_qual(padapter, precvframe);
}
void update_recvframe_attrib_88e(union recv_frame *precvframe, struct recv_stat *prxstat)
void update_recvframe_attrib_88e(struct recv_frame *precvframe,
struct recv_stat *prxstat)
{
struct rx_pkt_attrib *pattrib;
struct recv_stat report;
@ -83,10 +85,10 @@ void update_recvframe_attrib_88e(union recv_frame *precvframe, struct recv_stat
report.rxdw4 = prxstat->rxdw4;
report.rxdw5 = prxstat->rxdw5;
pattrib = &precvframe->u.hdr.attrib;
_rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib = &precvframe->attrib;
memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);;/* u8)prxreport->crc32; */
pattrib->crc_err = (u8)((le32_to_cpu(report.rxdw0) >> 14) & 0x1);/* u8)prxreport->crc32; */
/* update rx report to recv_frame attribute */
pattrib->pkt_rpt_type = (u8)((le32_to_cpu(report.rxdw3) >> 14) & 0x3);/* prxreport->rpt_sel; */
@ -136,12 +138,13 @@ void update_recvframe_attrib_88e(union recv_frame *precvframe, struct recv_stat
/*
* Notice:
* Before calling this function,
* precvframe->u.hdr.rx_data should be ready!
* precvframe->rx_data should be ready!
*/
void update_recvframe_phyinfo_88e(union recv_frame *precvframe, struct phy_stat *pphy_status)
void update_recvframe_phyinfo_88e(struct recv_frame *precvframe,
struct phy_stat *pphy_status)
{
struct adapter *padapter = precvframe->u.hdr.adapter;
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
struct adapter *padapter = precvframe->adapter;
struct rx_pkt_attrib *pattrib = &precvframe->attrib;
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct odm_phy_status_info *pPHYInfo = (struct odm_phy_status_info *)(&pattrib->phy_info);
u8 *wlanhdr;
@ -154,15 +157,15 @@ void update_recvframe_phyinfo_88e(union recv_frame *precvframe, struct phy_stat
pkt_info.bPacketToSelf = false;
pkt_info.bPacketBeacon = false;
wlanhdr = get_recvframe_data(precvframe);
wlanhdr = precvframe->rx_data;
pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) &&
!pattrib->icv_err && !pattrib->crc_err &&
_rtw_memcmp(get_hdr_bssid(wlanhdr),
!memcmp(get_hdr_bssid(wlanhdr),
get_bssid(&padapter->mlmepriv), ETH_ALEN));
pkt_info.bPacketToSelf = pkt_info.bPacketMatchBSSID &&
(_rtw_memcmp(get_da(wlanhdr),
(!memcmp(get_da(wlanhdr),
myid(&padapter->eeprompriv), ETH_ALEN));
pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID &&
@ -183,19 +186,19 @@ void update_recvframe_phyinfo_88e(union recv_frame *precvframe, struct phy_stat
pkt_info.StationID = psta->mac_id;
pkt_info.Rate = pattrib->mcs_rate;
ODM_PhyStatusQuery(&pHalData->odmpriv, pPHYInfo, (u8 *)pphy_status, &(pkt_info), padapter);
ODM_PhyStatusQuery(&pHalData->odmpriv, pPHYInfo, (u8 *)pphy_status, &(pkt_info));
precvframe->u.hdr.psta = NULL;
precvframe->psta = NULL;
if (pkt_info.bPacketMatchBSSID &&
(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE))) {
if (psta) {
precvframe->u.hdr.psta = psta;
precvframe->psta = psta;
rtl8188e_process_phy_info(padapter, precvframe);
}
} else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon) {
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) {
if (psta)
precvframe->u.hdr.psta = psta;
precvframe->psta = psta;
}
rtl8188e_process_phy_info(padapter, precvframe);
}

80
hal/rtl8188e_sreset.c
View file

@ -1,80 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_SRESET_C_
#include <rtl8188e_sreset.h>
#include <rtl8188e_hal.h>
void rtl8188e_silentreset_for_specific_platform(struct adapter *padapter)
{
}
void rtl8188e_sreset_xmit_status_check(struct adapter *padapter)
{
struct hal_data_8188e *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
txdma_status = rtw_read32(padapter, REG_TXDMA_STATUS);
if (txdma_status != 0x00) {
DBG_88E("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_write32(padapter, REG_TXDMA_STATUS, txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
}
/* total xmit irp = 4 */
current_time = rtw_get_current_time();
if (0 == pxmitpriv->free_xmitbuf_cnt) {
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if (diff_time > 2000) {
if (psrtpriv->last_tx_complete_time == 0) {
psrtpriv->last_tx_complete_time = current_time;
} else {
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if (diff_time > 4000) {
DBG_88E("%s tx hang\n", __func__);
rtl8188e_silentreset_for_specific_platform(padapter);
}
}
}
}
}
void rtl8188e_sreset_linked_status_check(struct adapter *padapter)
{
u32 rx_dma_status = 0;
u8 fw_status = 0;
rx_dma_status = rtw_read32(padapter, REG_RXDMA_STATUS);
if (rx_dma_status != 0x00) {
DBG_88E("%s REG_RXDMA_STATUS:0x%08x\n", __func__, rx_dma_status);
rtw_write32(padapter, REG_RXDMA_STATUS, rx_dma_status);
}
fw_status = rtw_read8(padapter, REG_FMETHR);
if (fw_status != 0x00) {
if (fw_status == 1)
DBG_88E("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !!\n", __func__, fw_status);
else if (fw_status == 2)
DBG_88E("%s REG_FW_STATUS (0x%02x), Condition_No_Match !!\n", __func__, fw_status);
}
}

3
hal/rtl8188e_xmit.c
View file

@ -25,7 +25,7 @@
void dump_txrpt_ccx_88e(void *buf)
{
struct txrpt_ccx_88e *txrpt_ccx = (struct txrpt_ccx_88e *)buf;
struct txrpt_ccx_88e *txrpt_ccx = buf;
DBG_88E("%s:\n"
"tag1:%u, pkt_num:%u, txdma_underflow:%u, int_bt:%u, int_tri:%u, int_ccx:%u\n"
@ -64,6 +64,7 @@ void _dbg_dump_tx_info(struct adapter *padapter, int frame_tag,
{
u8 dmp_txpkt;
bool dump_txdesc = false;
rtw_hal_get_def_var(padapter, HAL_DEF_DBG_DUMP_TXPKT, &(dmp_txpkt));
if (dmp_txpkt == 1) {/* dump txdesc for data frame */

50
hal/rtl8188eu_led.c
View file

@ -22,6 +22,7 @@
#include <drv_types.h>
#include <rtl8188e_hal.h>
#include <rtl8188e_led.h>
#include <usb_ops_linux.h>
/* LED object. */
@ -34,17 +35,8 @@ void SwLedOn(struct adapter *padapter, struct LED_871x *pLed)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
return;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch (pLed->LedPin) {
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
break;
case LED_PIN_LED1:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); /* SW control led1 on. */
break;
default:
break;
}
LedCfg = usb_read8(padapter, REG_LEDCFG2);
usb_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); /* SW control led0 on. */
pLed->bLedOn = true;
}
@ -58,27 +50,17 @@ void SwLedOff(struct adapter *padapter, struct LED_871x *pLed)
if (padapter->bSurpriseRemoved || padapter->bDriverStopped)
goto exit;
LedCfg = rtw_read8(padapter, REG_LEDCFG2);/* 0x4E */
LedCfg = usb_read8(padapter, REG_LEDCFG2);/* 0x4E */
switch (pLed->LedPin) {
case LED_PIN_LED0:
if (pHalData->bLedOpenDrain) {
if (pHalData->bLedOpenDrain) {
/* Open-drain arrangement for controlling the LED) */
LedCfg &= 0x90; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else {
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
}
break;
case LED_PIN_LED1:
LedCfg &= 0x0f; /* Set to software control. */
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
break;
default:
break;
LedCfg &= 0x90; /* Set to software control. */
usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg = usb_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
usb_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
} else {
usb_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6));
}
exit:
pLed->bLedOn = false;
@ -92,12 +74,13 @@ exit:
void rtl8188eu_InitSwLeds(struct adapter *padapter)
{
struct led_priv *pledpriv = &(padapter->ledpriv);
struct hal_data_8188e *haldata = GET_HAL_DATA(padapter);
pledpriv->bRegUseLed = true;
pledpriv->LedControlHandler = LedControl8188eu;
haldata->bLedOpenDrain = true;
InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0);
InitLed871x(padapter, &(pledpriv->SwLed1), LED_PIN_LED1);
InitLed871x(padapter, &(pledpriv->SwLed0));
}
/* Description: */
@ -107,5 +90,4 @@ void rtl8188eu_DeInitSwLeds(struct adapter *padapter)
struct led_priv *ledpriv = &(padapter->ledpriv);
DeInitLed871x(&(ledpriv->SwLed0));
DeInitLed871x(&(ledpriv->SwLed1));
}

52
hal/rtl8188eu_recv.c
View file

@ -22,31 +22,12 @@
#include <drv_types.h>
#include <recv_osdep.h>
#include <mlme_osdep.h>
#include <ip.h>
#include <if_ether.h>
#include <ethernet.h>
#include <usb_ops.h>
#include <usb_ops_linux.h>
#include <wifi.h>
#include <rtl8188e_hal.h>
void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *precvbuf)
{
precvbuf->transfer_len = 0;
precvbuf->len = 0;
precvbuf->ref_cnt = 0;
if (precvbuf->pbuf) {
precvbuf->pdata = precvbuf->pbuf;
precvbuf->phead = precvbuf->pbuf;
precvbuf->ptail = precvbuf->pbuf;
precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ;
}
}
int rtl8188eu_init_recv_priv(struct adapter *padapter)
{
struct recv_priv *precvpriv = &padapter->recvpriv;
@ -60,27 +41,24 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
/* init recv_buf */
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4);
precvpriv->pallocated_recv_buf =
kzalloc(NR_RECVBUFF * sizeof(struct recv_buf), GFP_KERNEL);
if (precvpriv->pallocated_recv_buf == NULL) {
res = _FAIL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n"));
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
("alloc recv_buf fail!\n"));
goto exit;
}
_rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF * sizeof(struct recv_buf) + 4);
precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((size_t)(precvpriv->pallocated_recv_buf), 4);
precvpriv->precv_buf = precvpriv->pallocated_recv_buf;
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
_rtw_init_listhead(&precvbuf->list);
_rtw_spinlock_init(&precvbuf->recvbuf_lock);
precvbuf->alloc_sz = MAX_RECVBUF_SZ;
res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
if (res == _FAIL)
break;
precvbuf->ref_cnt = 0;
precvbuf->adapter = padapter;
precvbuf++;
}
@ -89,20 +67,23 @@ int rtl8188eu_init_recv_priv(struct adapter *padapter)
{
int i;
size_t tmpaddr = 0;
size_t alignment = 0;
size_t alignm = 0;
struct sk_buff *pskb = NULL;
skb_queue_head_init(&precvpriv->free_recv_skb_queue);
for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) {
pskb = __netdev_alloc_skb(padapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, GFP_KERNEL);
pskb = __netdev_alloc_skb(padapter->pnetdev,
MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ,
GFP_KERNEL);
if (pskb) {
pskb->dev = padapter->pnetdev;
tmpaddr = (size_t)pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
alignm = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignm));
skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
skb_queue_tail(&precvpriv->free_recv_skb_queue,
pskb);
}
pskb = NULL;
}
@ -120,7 +101,7 @@ void rtl8188eu_free_recv_priv(struct adapter *padapter)
precvbuf = (struct recv_buf *)precvpriv->precv_buf;
for (i = 0; i < NR_RECVBUFF; i++) {
rtw_os_recvbuf_resource_free(padapter, precvbuf);
usb_free_urb(precvbuf->purb);
precvbuf++;
}
@ -132,7 +113,8 @@ void rtl8188eu_free_recv_priv(struct adapter *padapter)
if (skb_queue_len(&precvpriv->free_recv_skb_queue))
DBG_88E(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
DBG_88E(KERN_WARNING "free_recv_skb_queue not empty, %d\n",
skb_queue_len(&precvpriv->free_recv_skb_queue));
skb_queue_purge(&precvpriv->free_recv_skb_queue);
}

54
hal/rtl8188eu_xmit.c
View file

@ -22,7 +22,7 @@
#include <drv_types.h>
#include <wifi.h>
#include <osdep_intf.h>
#include <usb_ops.h>
#include <usb_ops_linux.h>
#include <rtl8188e_hal.h>
s32 rtl8188eu_init_xmit_priv(struct adapter *adapt)
@ -35,10 +35,6 @@ s32 rtl8188eu_init_xmit_priv(struct adapter *adapt)
return _SUCCESS;
}
void rtl8188eu_free_xmit_priv(struct adapter *adapt)
{
}
static u8 urb_zero_packet_chk(struct adapter *adapt, int sz)
{
u8 set_tx_desc_offset;
@ -72,7 +68,7 @@ void rtl8188e_fill_fake_txdesc(struct adapter *adapt, u8 *desc, u32 BufferLen, u
/* Clear all status */
ptxdesc = (struct tx_desc *)desc;
_rtw_memset(desc, 0, TXDESC_SIZE);
memset(desc, 0, TXDESC_SIZE);
/* offset 0 */
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); /* own, bFirstSeg, bLastSeg; */
@ -196,7 +192,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
}
}
_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
memset(ptxdesc, 0, sizeof(struct tx_desc));
/* 4 offset 0 */
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
@ -310,9 +306,6 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw5 |= cpu_to_le32(MRateToHwRate(pmlmeext->tx_rate));
} else if ((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) {
DBG_88E("pxmitframe->frame_tag == TXAGG_FRAMETAG\n");
} else if (((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) &&
(adapt->registrypriv.mp_mode == 1)) {
fill_txdesc_for_mp(adapt, ptxdesc);
} else {
DBG_88E("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
@ -343,7 +336,8 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz, u8 bag
ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); /* Hw set sequence number */
}
ODM_SetTxAntByTxInfo_88E(&haldata->odmpriv, pmem, pattrib->mac_id);
rtl88eu_dm_set_tx_ant_by_tx_info(&haldata->odmpriv, pmem,
pattrib->mac_id);
rtl8188eu_cal_txdesc_chksum(ptxdesc);
_dbg_dump_tx_info(adapt, pxmitframe->frame_tag, ptxdesc);
@ -397,7 +391,7 @@ static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
}
ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
inner_ret = rtw_write_port(adapt, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf);
inner_ret = usb_write_port(adapt, ff_hwaddr, w_sz, (unsigned char *)pxmitbuf);
rtw_count_tx_stats(adapt, pxmitframe, sz);
@ -405,7 +399,7 @@ static s32 rtw_dump_xframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
mem_addr += w_sz;
mem_addr = (u8 *)RND4(((size_t)(mem_addr)));
mem_addr = (u8 *)round_up((size_t)mem_addr, 4);
}
rtw_free_xmitframe(pxmitpriv, pxmitframe);
@ -445,7 +439,6 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
struct sta_info *psta = NULL;
struct tx_servq *ptxservq = NULL;
unsigned long irql;
struct list_head *xmitframe_plist = NULL, *xmitframe_phead = NULL;
u32 pbuf; /* next pkt address */
@ -498,7 +491,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
pfirstframe = pxmitframe;
len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE + (pfirstframe->pkt_offset*PACKET_OFFSET_SZ);
pbuf_tail = len;
pbuf = _RND8(pbuf_tail);
pbuf = round_up(pbuf_tail, 8);
/* check pkt amount in one bulk */
desc_cnt = 0;
@ -535,26 +528,26 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
phwxmit = pxmitpriv->hwxmits + 2;
break;
}
_enter_critical_bh(&pxmitpriv->lock, &irql);
spin_lock_bh(&pxmitpriv->lock);
xmitframe_phead = get_list_head(&ptxservq->sta_pending);
xmitframe_plist = get_next(xmitframe_phead);
xmitframe_plist = xmitframe_phead->next;
while (!rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) {
pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
xmitframe_plist = get_next(xmitframe_plist);
while (xmitframe_phead != xmitframe_plist) {
pxmitframe = container_of(xmitframe_plist, struct xmit_frame, list);
xmitframe_plist = xmitframe_plist->next;
pxmitframe->agg_num = 0; /* not first frame of aggregation */
pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE + (pxmitframe->pkt_offset*PACKET_OFFSET_SZ);
if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) {
if (round_up(pbuf + len, 8) > MAX_XMITBUF_SZ) {
pxmitframe->agg_num = 1;
pxmitframe->pkt_offset = 1;
break;
}
rtw_list_delete(&pxmitframe->list);
list_del_init(&pxmitframe->list);
ptxservq->qcnt--;
phwxmit->accnt--;
@ -572,7 +565,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
/* handle pointer and stop condition */
pbuf_tail = pbuf + len;
pbuf = _RND8(pbuf_tail);
pbuf = round_up(pbuf_tail, 8);
pfirstframe->agg_num++;
if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
@ -588,10 +581,10 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
}
} /* end while (aggregate same priority and same DA(AP or STA) frames) */
if (_rtw_queue_empty(&ptxservq->sta_pending) == true)
rtw_list_delete(&ptxservq->tx_pending);
if (list_empty(&ptxservq->sta_pending.queue))
list_del_init(&ptxservq->tx_pending);
_exit_critical_bh(&pxmitpriv->lock, &irql);
spin_unlock_bh(&pxmitpriv->lock);
if ((pfirstframe->attrib.ether_type != 0x0806) &&
(pfirstframe->attrib.ether_type != 0x888e) &&
(pfirstframe->attrib.ether_type != 0x88b4) &&
@ -609,7 +602,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *adapt, struct xmit_priv *pxmitp
/* 3 4. write xmit buffer to USB FIFO */
ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
rtw_write_port(adapt, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf);
usb_write_port(adapt, ff_hwaddr, pbuf_tail, (u8 *)pxmitbuf);
/* 3 5. update statisitc */
pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
@ -641,14 +634,13 @@ static s32 xmitframe_direct(struct adapter *adapt, struct xmit_frame *pxmitframe
*/
static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
{
unsigned long irql;
s32 res;
struct xmit_buf *pxmitbuf = NULL;
struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct mlme_priv *pmlmepriv = &adapt->mlmepriv;
_enter_critical_bh(&pxmitpriv->lock, &irql);
spin_lock_bh(&pxmitpriv->lock);
if (rtw_txframes_sta_ac_pending(adapt, pattrib) > 0)
goto enqueue;
@ -660,7 +652,7 @@ static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
if (pxmitbuf == NULL)
goto enqueue;
_exit_critical_bh(&pxmitpriv->lock, &irql);
spin_unlock_bh(&pxmitpriv->lock);
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
@ -675,7 +667,7 @@ static s32 pre_xmitframe(struct adapter *adapt, struct xmit_frame *pxmitframe)
enqueue:
res = rtw_xmitframe_enqueue(adapt, pxmitframe);
_exit_critical_bh(&pxmitpriv->lock, &irql);
spin_unlock_bh(&pxmitpriv->lock);
if (res != _SUCCESS) {
RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n"));

721
hal/usb_halinit.c
View file

File diff suppressed because it is too large Load diff

728
hal/usb_ops_linux.c
View file

@ -1,728 +0,0 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _HCI_OPS_OS_C_
#include <osdep_service.h>
#include <drv_types.h>
#include <osdep_intf.h>
#include <usb_ops.h>
#include <recv_osdep.h>
#include <rtl8188e_hal.h>
static int usbctrl_vendorreq(struct intf_hdl *pintfhdl, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype)
{
struct adapter *adapt = pintfhdl->padapter;
struct dvobj_priv *dvobjpriv = adapter_to_dvobj(adapt);
struct usb_device *udev = dvobjpriv->pusbdev;
unsigned int pipe;
int status = 0;
u8 reqtype;
u8 *pIo_buf;
int vendorreq_times = 0;
if ((adapt->bSurpriseRemoved) || (adapt->pwrctrlpriv.pnp_bstop_trx)) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usbctrl_vendorreq:(adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
status = -EPERM;
goto exit;
}
if (len > MAX_VENDOR_REQ_CMD_SIZE) {
DBG_88E("[%s] Buffer len error ,vendor request failed\n", __func__);
status = -EINVAL;
goto exit;
}
_enter_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL);
/* Acquire IO memory for vendorreq */
pIo_buf = dvobjpriv->usb_vendor_req_buf;
if (pIo_buf == NULL) {
DBG_88E("[%s] pIo_buf == NULL\n", __func__);
status = -ENOMEM;
goto release_mutex;
}
while (++vendorreq_times <= MAX_USBCTRL_VENDORREQ_TIMES) {
_rtw_memset(pIo_buf, 0, len);
if (requesttype == 0x01) {
pipe = usb_rcvctrlpipe(udev, 0);/* read_in */
reqtype = REALTEK_USB_VENQT_READ;
} else {
pipe = usb_sndctrlpipe(udev, 0);/* write_out */
reqtype = REALTEK_USB_VENQT_WRITE;
memcpy(pIo_buf, pdata, len);
}
status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT);
if (status == len) { /* Success this control transfer. */
rtw_reset_continual_urb_error(dvobjpriv);
if (requesttype == 0x01)
memcpy(pdata, pIo_buf, len);
} else { /* error cases */
DBG_88E("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n",
value, (requesttype == 0x01) ? "read" : "write",
len, status, *(u32 *)pdata, vendorreq_times);
if (status < 0) {
if (status == (-ESHUTDOWN) || status == -ENODEV) {
adapt->bSurpriseRemoved = true;
} else {
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL;
}
} else { /* status != len && status >= 0 */
if (status > 0) {
if (requesttype == 0x01) {
/* For Control read transfer, we have to copy the read data from pIo_buf to pdata. */
memcpy(pdata, pIo_buf, len);
}
}
}
if (rtw_inc_and_chk_continual_urb_error(dvobjpriv)) {
adapt->bSurpriseRemoved = true;
break;
}
}
/* firmware download is checksumed, don't retry */
if ((value >= FW_8188E_START_ADDRESS && value <= FW_8188E_END_ADDRESS) || status == len)
break;
}
release_mutex:
_exit_critical_mutex(&dvobjpriv->usb_vendor_req_mutex, NULL);
exit:
return status;
}
static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 data = 0;
_func_enter_;
request = 0x05;
requesttype = 0x01;/* read_in */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 1;
usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
_func_exit_;
return data;
}
static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
_func_enter_;
request = 0x05;
requesttype = 0x01;/* read_in */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 2;
usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
_func_exit_;
return (u16)(le32_to_cpu(data)&0xffff);
}
static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
_func_enter_;
request = 0x05;
requesttype = 0x01;/* read_in */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 4;
usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
_func_exit_;
return le32_to_cpu(data);
}
static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 data;
int ret;
_func_enter_;
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 1;
data = val;
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
_func_exit_;
return ret;
}
static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
int ret;
_func_enter_;
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 2;
data = cpu_to_le32(val & 0x0000ffff);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
_func_exit_;
return ret;
}
static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
__le32 data;
int ret;
_func_enter_;
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = 4;
data = cpu_to_le32(val);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, &data, len, requesttype);
_func_exit_;
return ret;
}
static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
{
u8 request;
u8 requesttype;
u16 wvalue;
u16 index;
u16 len;
u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0};
int ret;
_func_enter_;
request = 0x05;
requesttype = 0x00;/* write_out */
index = 0;/* n/a */
wvalue = (u16)(addr&0x0000ffff);
len = length;
memcpy(buf, pdata, len);
ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index, buf, len, requesttype);
_func_exit_;
return ret;
}
static void interrupt_handler_8188eu(struct adapter *adapt, u16 pkt_len, u8 *pbuf)
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) {
DBG_88E("%s Invalid interrupt content length (%d)!\n", __func__, pkt_len);
return;
}
/* HISR */
memcpy(&(haldata->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4);
memcpy(&(haldata->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4);
/* C2H Event */
if (pbuf[0] != 0)
memcpy(&(haldata->C2hArray[0]), &(pbuf[USB_INTR_CONTENT_C2H_OFFSET]), 16);
}
static int recvbuf2recvframe(struct adapter *adapt, struct sk_buff *pskb)
{
u8 *pbuf;
u8 shift_sz = 0;
u16 pkt_cnt;
u32 pkt_offset, skb_len, alloc_sz;
s32 transfer_len;
struct recv_stat *prxstat;
struct phy_stat *pphy_status = NULL;
struct sk_buff *pkt_copy = NULL;
union recv_frame *precvframe = NULL;
struct rx_pkt_attrib *pattrib = NULL;
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
struct recv_priv *precvpriv = &adapt->recvpriv;
struct __queue *pfree_recv_queue = &precvpriv->free_recv_queue;
transfer_len = (s32)pskb->len;
pbuf = pskb->data;
prxstat = (struct recv_stat *)pbuf;
pkt_cnt = (le32_to_cpu(prxstat->rxdw2) >> 16) & 0xff;
do {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_,
("recvbuf2recvframe: rxdesc=offsset 0:0x%08x, 4:0x%08x, 8:0x%08x, C:0x%08x\n",
prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4));
prxstat = (struct recv_stat *)pbuf;
precvframe = rtw_alloc_recvframe(pfree_recv_queue);
if (precvframe == NULL) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("recvbuf2recvframe: precvframe==NULL\n"));
DBG_88E("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __func__, __LINE__);
goto _exit_recvbuf2recvframe;
}
_rtw_init_listhead(&precvframe->u.hdr.list);
precvframe->u.hdr.precvbuf = NULL; /* can't access the precvbuf for new arch. */
precvframe->u.hdr.len = 0;
update_recvframe_attrib_88e(precvframe, prxstat);
pattrib = &precvframe->u.hdr.attrib;
if ((pattrib->crc_err) || (pattrib->icv_err)) {
DBG_88E("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __func__, pattrib->crc_err, pattrib->icv_err);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
if ((pattrib->physt) && (pattrib->pkt_rpt_type == NORMAL_RX))
pphy_status = (struct phy_stat *)(pbuf + RXDESC_OFFSET);
pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len;
if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recvbuf2recvframe: pkt_len<=0\n"));
DBG_88E("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfoer_len\n", __func__, __LINE__);
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
/* Modified by Albert 20101213 */
/* For 8 bytes IP header alignment. */
if (pattrib->qos) /* Qos data, wireless lan header length is 26 */
shift_sz = 6;
else
shift_sz = 0;
skb_len = pattrib->pkt_len;
/* for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. */
/* modify alloc_sz for recvive crc error packet by thomas 2011-06-02 */
if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) {
if (skb_len <= 1650)
alloc_sz = 1664;
else
alloc_sz = skb_len + 14;
} else {
alloc_sz = skb_len;
/* 6 is for IP header 8 bytes alignment in QoS packet case. */
/* 8 is for skb->data 4 bytes alignment. */
alloc_sz += 14;
}
pkt_copy = netdev_alloc_skb(adapt->pnetdev, alloc_sz);
if (pkt_copy) {
pkt_copy->dev = adapt->pnetdev;
precvframe->u.hdr.pkt = pkt_copy;
precvframe->u.hdr.rx_head = pkt_copy->data;
precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz;
skb_reserve(pkt_copy, 8 - ((size_t)(pkt_copy->data) & 7));/* force pkt_copy->data at 8-byte alignment address */
skb_reserve(pkt_copy, shift_sz);/* force ip_hdr at 8-byte alignment address according to shift_sz. */
memcpy(pkt_copy->data, (pbuf + pattrib->drvinfo_sz + RXDESC_SIZE), skb_len);
precvframe->u.hdr.rx_tail = pkt_copy->data;
precvframe->u.hdr.rx_data = pkt_copy->data;
} else {
if ((pattrib->mfrag == 1) && (pattrib->frag_num == 0)) {
DBG_88E("recvbuf2recvframe: alloc_skb fail , drop frag frame\n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC);
if (precvframe->u.hdr.pkt) {
precvframe->u.hdr.rx_tail = pbuf + pattrib->drvinfo_sz + RXDESC_SIZE;
precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_tail;
precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail;
precvframe->u.hdr.rx_end = pbuf + pattrib->drvinfo_sz + RXDESC_SIZE + alloc_sz;
} else {
DBG_88E("recvbuf2recvframe: skb_clone fail\n");
rtw_free_recvframe(precvframe, pfree_recv_queue);
goto _exit_recvbuf2recvframe;
}
}
recvframe_put(precvframe, skb_len);
switch (haldata->UsbRxAggMode) {
case USB_RX_AGG_DMA:
case USB_RX_AGG_MIX:
pkt_offset = (u16)_RND128(pkt_offset);
break;
case USB_RX_AGG_USB:
pkt_offset = (u16)_RND4(pkt_offset);
break;
case USB_RX_AGG_DISABLE:
default:
break;
}
if (pattrib->pkt_rpt_type == NORMAL_RX) { /* Normal rx packet */
if (pattrib->physt)
update_recvframe_phyinfo_88e(precvframe, (struct phy_stat *)pphy_status);
if (rtw_recv_entry(precvframe) != _SUCCESS) {
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n"));
}
} else {
/* enqueue recvframe to txrtp queue */
if (pattrib->pkt_rpt_type == TX_REPORT1) {
/* CCX-TXRPT ack for xmit mgmt frames. */
handle_txrpt_ccx_88e(adapt, precvframe->u.hdr.rx_data);
} else if (pattrib->pkt_rpt_type == TX_REPORT2) {
ODM_RA_TxRPT2Handle_8188E(
&haldata->odmpriv,
precvframe->u.hdr.rx_data,
pattrib->pkt_len,
pattrib->MacIDValidEntry[0],
pattrib->MacIDValidEntry[1]
);
} else if (pattrib->pkt_rpt_type == HIS_REPORT) {
interrupt_handler_8188eu(adapt, pattrib->pkt_len, precvframe->u.hdr.rx_data);
}
rtw_free_recvframe(precvframe, pfree_recv_queue);
}
pkt_cnt--;
transfer_len -= pkt_offset;
pbuf += pkt_offset;
precvframe = NULL;
pkt_copy = NULL;
if (transfer_len > 0 && pkt_cnt == 0)
pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff;
} while ((transfer_len > 0) && (pkt_cnt > 0));
_exit_recvbuf2recvframe:
return _SUCCESS;
}
void rtl8188eu_recv_tasklet(void *priv)
{
struct sk_buff *pskb;
struct adapter *adapt = (struct adapter *)priv;
struct recv_priv *precvpriv = &adapt->recvpriv;
while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) {
if ((adapt->bDriverStopped) || (adapt->bSurpriseRemoved)) {
DBG_88E("recv_tasklet => bDriverStopped or bSurpriseRemoved\n");
dev_kfree_skb_any(pskb);
break;
}
recvbuf2recvframe(adapt, pskb);
skb_reset_tail_pointer(pskb);
pskb->len = 0;
skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
}
}
static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs)
{
struct recv_buf *precvbuf = (struct recv_buf *)purb->context;
struct adapter *adapt = (struct adapter *)precvbuf->adapter;
struct recv_priv *precvpriv = &adapt->recvpriv;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete!!!\n"));
precvpriv->rx_pending_cnt--;
if (adapt->bSurpriseRemoved || adapt->bDriverStopped || adapt->bReadPortCancel) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n",
adapt->bDriverStopped, adapt->bSurpriseRemoved));
precvbuf->reuse = true;
DBG_88E("%s() RX Warning! bDriverStopped(%d) OR bSurpriseRemoved(%d) bReadPortCancel(%d)\n",
__func__, adapt->bDriverStopped,
adapt->bSurpriseRemoved, adapt->bReadPortCancel);
goto exit;
}
if (purb->status == 0) { /* SUCCESS */
if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n"));
precvbuf->reuse = true;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
DBG_88E("%s()-%d: RX Warning!\n", __func__, __LINE__);
} else {
rtw_reset_continual_urb_error(adapter_to_dvobj(adapt));
precvbuf->transfer_len = purb->actual_length;
skb_put(precvbuf->pskb, purb->actual_length);
skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb);
if (skb_queue_len(&precvpriv->rx_skb_queue) <= 1)
tasklet_schedule(&precvpriv->recv_tasklet);
precvbuf->pskb = NULL;
precvbuf->reuse = false;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
}
} else {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete : purb->status(%d) != 0\n", purb->status));
DBG_88E("###=> usb_read_port_complete => urb status(%d)\n", purb->status);
skb_put(precvbuf->pskb, purb->actual_length);
precvbuf->pskb = NULL;
if (rtw_inc_and_chk_continual_urb_error(adapter_to_dvobj(adapt)))
adapt->bSurpriseRemoved = true;
switch (purb->status) {
case -EINVAL:
case -EPIPE:
case -ENODEV:
case -ESHUTDOWN:
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bSurpriseRemoved=true\n"));
case -ENOENT:
adapt->bDriverStopped = true;
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete:bDriverStopped=true\n"));
break;
case -EPROTO:
case -EOVERFLOW:
{
struct hal_data_8188e *haldata = GET_HAL_DATA(adapt);
haldata->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL;
}
precvbuf->reuse = true;
rtw_read_port(adapt, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf);
break;
case -EINPROGRESS:
DBG_88E("ERROR: URB IS IN PROGRESS!/n");
break;
default:
break;
}
}
exit:
_func_exit_;
}
static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem)
{
struct urb *purb = NULL;
struct recv_buf *precvbuf = (struct recv_buf *)rmem;
struct adapter *adapter = pintfhdl->padapter;
struct dvobj_priv *pdvobj = adapter_to_dvobj(adapter);
struct recv_priv *precvpriv = &adapter->recvpriv;
struct usb_device *pusbd = pdvobj->pusbdev;
int err;
unsigned int pipe;
size_t tmpaddr = 0;
size_t alignment = 0;
u32 ret = _SUCCESS;
_func_enter_;
if (adapter->bDriverStopped || adapter->bSurpriseRemoved ||
adapter->pwrctrlpriv.pnp_bstop_trx) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port:(adapt->bDriverStopped ||adapt->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n"));
return _FAIL;
}
if (!precvbuf) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("usb_read_port:precvbuf==NULL\n"));
return _FAIL;
}
if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) {
precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue);
if (NULL != precvbuf->pskb)
precvbuf->reuse = true;
}
rtl8188eu_init_recvbuf(adapter, precvbuf);
/* re-assign for linux based on skb */
if ((!precvbuf->reuse) || (precvbuf->pskb == NULL)) {
precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
if (precvbuf->pskb == NULL) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_, ("init_recvbuf(): alloc_skb fail!\n"));
DBG_88E("#### usb_read_port() alloc_skb fail!#####\n");
return _FAIL;
}
tmpaddr = (size_t)precvbuf->pskb->data;
alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1);
skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment));
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
} else { /* reuse skb */
precvbuf->phead = precvbuf->pskb->head;
precvbuf->pdata = precvbuf->pskb->data;
precvbuf->ptail = skb_tail_pointer(precvbuf->pskb);
precvbuf->pend = skb_end_pointer(precvbuf->pskb);
precvbuf->pbuf = precvbuf->pskb->data;
precvbuf->reuse = false;
}
precvpriv->rx_pending_cnt++;
purb = precvbuf->purb;
/* translate DMA FIFO addr to pipehandle */
pipe = ffaddr2pipehdl(pdvobj, addr);
usb_fill_bulk_urb(purb, pusbd, pipe,
precvbuf->pbuf,
MAX_RECVBUF_SZ,
usb_read_port_complete,
precvbuf);/* context is precvbuf */
err = usb_submit_urb(purb, GFP_ATOMIC);
if ((err) && (err != (-EPERM))) {
RT_TRACE(_module_hci_ops_os_c_, _drv_err_,
("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x",
err, purb->status));
DBG_88E("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",
err, purb->status);
ret = _FAIL;
}
_func_exit_;
return ret;
}
void rtl8188eu_xmit_tasklet(void *priv)
{
int ret = false;
struct adapter *adapt = (struct adapter *)priv;
struct xmit_priv *pxmitpriv = &adapt->xmitpriv;
if (check_fwstate(&adapt->mlmepriv, _FW_UNDER_SURVEY))
return;
while (1) {
if ((adapt->bDriverStopped) ||
(adapt->bSurpriseRemoved) ||
(adapt->bWritePortCancel)) {
DBG_88E("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n");
break;
}
ret = rtl8188eu_xmitframe_complete(adapt, pxmitpriv, NULL);
if (!ret)
break;
}
}
void rtl8188eu_set_intf_ops(struct _io_ops *pops)
{
_func_enter_;
_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));
pops->_read8 = &usb_read8;
pops->_read16 = &usb_read16;
pops->_read32 = &usb_read32;
pops->_read_mem = &usb_read_mem;
pops->_read_port = &usb_read_port;
pops->_write8 = &usb_write8;
pops->_write16 = &usb_write16;
pops->_write32 = &usb_write32;
pops->_writeN = &usb_writeN;
pops->_write_mem = &usb_write_mem;
pops->_write_port = &usb_write_port;
pops->_read_port_cancel = &usb_read_port_cancel;
pops->_write_port_cancel = &usb_write_port_cancel;
_func_exit_;
}
void rtl8188eu_set_hw_type(struct adapter *adapt)
{
adapt->chip_type = RTL8188E;
adapt->HardwareType = HARDWARE_TYPE_RTL8188EU;
DBG_88E("CHIP TYPE: RTL8188E\n");
}

38
include/Hal8188EPhyCfg.h
View file

@ -198,42 +198,15 @@ struct ant_sel_cck {
/* */
/* BB and RF register read/write */
/* */
u32 rtl8188e_PHY_QueryBBReg(struct adapter *adapter, u32 regaddr, u32 mask);
void rtl8188e_PHY_SetBBReg(struct adapter *Adapter, u32 RegAddr,
u32 mask, u32 data);
u32 rtl8188e_PHY_QueryRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask);
void rtl8188e_PHY_SetRFReg(struct adapter *adapter, enum rf_radio_path rfpath,
u32 regaddr, u32 mask, u32 data);
/* Initialization related function */
/* MAC/BB/RF HAL config */
int PHY_MACConfig8188E(struct adapter *adapter);
int PHY_BBConfig8188E(struct adapter *adapter);
int PHY_RFConfig8188E(struct adapter *adapter);
/* RF config */
int rtl8188e_PHY_ConfigRFWithParaFile(struct adapter *adapter, u8 *filename,
enum rf_radio_path rfpath);
int rtl8188e_PHY_ConfigRFWithHeaderFile(struct adapter *adapter,
enum rf_radio_path rfpath);
/* Read initi reg value for tx power setting. */
void rtl8192c_PHY_GetHWRegOriginalValue(struct adapter *adapter);
/* BB TX Power R/W */
void PHY_GetTxPowerLevel8188E(struct adapter *adapter, u32 *powerlevel);
void PHY_SetTxPowerLevel8188E(struct adapter *adapter, u8 channel);
bool PHY_UpdateTxPowerDbm8188E(struct adapter *adapter, int power);
void PHY_ScanOperationBackup8188E(struct adapter *Adapter, u8 Operation);
/* Switch bandwidth for 8192S */
void PHY_SetBWMode8188E(struct adapter *adapter,
enum ht_channel_width chnlwidth, unsigned char offset);
/* channel switch related funciton */
void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
/* Call after initialization */
void ChkFwCmdIoDone(struct adapter *adapter);
@ -246,19 +219,8 @@ void PHY_EnableHostClkReq(struct adapter *adapter);
bool SetAntennaConfig92C(struct adapter *adapter, u8 defaultant);
void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
u32 mask, u32 data);
/*--------------------------Exported Function prototype---------------------*/
#define PHY_QueryBBReg(adapt, regaddr, mask) \
rtl8188e_PHY_QueryBBReg((adapt), (regaddr), (mask))
#define PHY_SetBBReg(adapt, regaddr, bitmask, data) \
rtl8188e_PHY_SetBBReg((adapt), (regaddr), (bitmask), (data))
#define PHY_QueryRFReg(adapt, rfpath, regaddr, bitmask) \
rtl8188e_PHY_QueryRFReg((adapt), (rfpath), (regaddr), (bitmask))
#define PHY_SetRFReg(adapt, rfpath, regaddr, bitmask, data) \
rtl8188e_PHY_SetRFReg((adapt), (rfpath), (regaddr), (bitmask), (data))
#define PHY_SetMacReg PHY_SetBBReg
#define SIC_HW_SUPPORT 0

93
include/drv_types.h
View file

@ -28,12 +28,9 @@
#define __DRV_TYPES_H__
#define DRV_NAME "r8188eu"
#define CONFIG_88EU_AP_MODE 1
#define CONFIG_88EU_P2P 1
#include <osdep_service.h>
#include <wlan_bssdef.h>
#include <drv_types_linux.h>
#include <rtw_ht.h>
#include <rtw_cmd.h>
#include <rtw_xmit.h>
@ -43,7 +40,6 @@
#include <rtw_qos.h>
#include <rtw_security.h>
#include <rtw_pwrctrl.h>
#include <rtw_io.h>
#include <rtw_eeprom.h>
#include <sta_info.h>
#include <rtw_mlme.h>
@ -52,17 +48,7 @@
#include <rtw_event.h>
#include <rtw_led.h>
#include <rtw_mlme_ext.h>
#include <rtw_p2p.h>
#include <rtw_ap.h>
#include <rtw_mp.h>
#include <rtw_br_ext.h>
enum _NIC_VERSION {
RTL8711_NIC,
RTL8712_NIC,
RTL8713_NIC,
RTL8716_NIC
};
#define SPEC_DEV_ID_NONE BIT(0)
#define SPEC_DEV_ID_DISABLE_HT BIT(1)
@ -71,12 +57,6 @@ enum _NIC_VERSION {
#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4)
#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5)
struct specific_device_id {
u32 flags;
u16 idVendor;
u16 idProduct;
};
struct registry_priv {
u8 chip_version;
u8 rfintfs;
@ -161,15 +141,8 @@ struct registry_priv {
#define MAX_CONTINUAL_URB_ERR 4
struct rt_firmware {
u8 *szFwBuffer;
u32 ulFwLength;
};
struct dvobj_priv {
struct adapter *if1;
struct adapter *if2;
/* For 92D, DMDP have 2 interface. */
u8 InterfaceNumber;
u8 NumInterfaces;
@ -179,10 +152,6 @@ struct dvobj_priv {
int RtOutPipe[3];
u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
u8 irq_alloc;
struct rt_firmware firmware;
/*-------- below is for USB INTERFACE --------*/
u8 nr_endpoint;
@ -190,18 +159,12 @@ struct dvobj_priv {
u8 RtNumInPipes;
u8 RtNumOutPipes;
int ep_num[5]; /* endpoint number */
int RegUsbSS;
struct semaphore usb_suspend_sema;
struct mutex usb_vendor_req_mutex;
u8 *usb_alloc_vendor_req_buf;
u8 *usb_vendor_req_buf;
struct usb_interface *pusbintf;
struct usb_device *pusbdev;
ATOMIC_T continual_urb_error;
u8 signal_strength;
};
static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
@ -211,39 +174,14 @@ static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj)
return &dvobj->pusbintf->dev;
};
enum _IFACE_TYPE {
IFACE_PORT0, /* mapping to port0 for C/D series chips */
IFACE_PORT1, /* mapping to port1 for C/D series chip */
MAX_IFACE_PORT,
};
enum _ADAPTER_TYPE {
PRIMARY_ADAPTER,
SECONDARY_ADAPTER,
MAX_ADAPTER,
};
enum driver_state {
DRIVER_NORMAL = 0,
DRIVER_DISAPPEAR = 1,
DRIVER_REPLACE_DONGLE = 2,
};
struct adapter {
int DriverState;/* for disable driver using module, use dongle toi
* replace module. */
int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */
int bDongle;/* build-in module or external dongle */
u16 chip_type;
u16 HardwareType;
u16 interface_type;/* USB,SDIO,SPI,PCI */
struct dvobj_priv *dvobj;
struct mlme_priv mlmepriv;
struct mlme_ext_priv mlmeextpriv;
struct cmd_priv cmdpriv;
struct evt_priv evtpriv;
struct io_priv iopriv;
struct xmit_priv xmitpriv;
struct recv_priv recvpriv;
struct sta_priv stapriv;
@ -252,7 +190,6 @@ struct adapter {
struct pwrctrl_priv pwrctrlpriv;
struct eeprom_priv eeprompriv;
struct led_priv ledpriv;
struct mp_priv mppriv;
#ifdef CONFIG_88EU_AP_MODE
struct hostapd_priv *phostapdpriv;
@ -261,27 +198,15 @@ struct adapter {
struct wifidirect_info wdinfo;
void *HalData;
u32 hal_data_sz;
struct hal_ops HalFunc;
s32 bDriverStopped;
s32 bSurpriseRemoved;
s32 bCardDisableWOHSM;
u32 IsrContent;
u32 ImrContent;
u8 EepromAddressSize;
u8 hw_init_completed;
u8 bDriverIsGoingToUnload;
u8 init_adpt_in_progress;
u8 bHaltInProgress;
s8 signal_strength;
void *cmdThread;
void *evtThread;
void *xmitThread;
void *recvThread;
void (*intf_start)(struct adapter *adapter);
void (*intf_stop)(struct adapter *adapter);
struct net_device *pnetdev;
@ -301,32 +226,16 @@ struct adapter {
int net_closed;
u8 bFWReady;
u8 bBTFWReady;
u8 bReadPortCancel;
u8 bWritePortCancel;
u8 bRxRSSIDisplay;
/* The driver will show up the desired channel number
* when this flag is 1. */
u8 bNotifyChannelChange;
#ifdef CONFIG_88EU_P2P
/* The driver will show the current P2P status when the
* upper application reads it. */
u8 bShowGetP2PState;
#endif
struct adapter *pbuddy_adapter;
struct mutex *hw_init_mutex;
struct mutex hw_init_mutex;
spinlock_t br_ext_lock;
struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE];
int pppoe_connection_in_progress;
unsigned char pppoe_addr[MACADDRLEN];
unsigned char scdb_mac[MACADDRLEN];
unsigned char scdb_ip[4];
struct nat25_network_db_entry *scdb_entry;
unsigned char br_mac[MACADDRLEN];
unsigned char br_ip[4];
struct br_ext_info ethBrExtInfo;
u8 fix_rate;

59
include/fw.h Normal file
View file

@ -0,0 +1,59 @@
/******************************************************************************
*
* Copyright(c) 2009-2013 Realtek Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* wlanfae <wlanfae@realtek.com>
* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
* Hsinchu 300, Taiwan.
* Larry Finger <Larry.Finger@lwfinger.net>
*
*****************************************************************************/
#include "drv_types.h"
#include <linux/types.h>
#ifndef __RTL92C__FW__H__
#define __RTL92C__FW__H__
#define FW_8192C_START_ADDRESS 0x1000
#define FW_8192C_PAGE_SIZE 4096
#define FW_8192C_POLLING_DELAY 5
struct rtl92c_firmware_header {
__le16 signature;
u8 category;
u8 function;
u16 version;
u8 subversion;
u8 rsvd1;
u8 month;
u8 date;
u8 hour;
u8 minute;
u16 ramcodesize;
u16 rsvd2;
u32 svnindex;
u32 rsvd3;
u32 rsvd4;
u32 rsvd5;
};
int rtl88eu_download_fw(struct adapter *adapt);
#endif

4
include/hal_com.h
View file

@ -166,8 +166,4 @@ void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg);
bool Hal_MappingOutPipe(struct adapter *pAdapter, u8 NumOutPipe);
void hal_init_macaddr(struct adapter *adapter);
void c2h_evt_clear(struct adapter *adapter);
s32 c2h_evt_read(struct adapter *adapter, u8 *buf);
#endif /* __HAL_COMMON_H__ */

98
include/hal_intf.h
View file

@ -144,8 +144,6 @@ enum hal_intf_ps_func {
HAL_MAX_ID,
};
typedef s32 (*c2h_id_filter)(u8 id);
struct hal_ops {
u32 (*hal_power_on)(struct adapter *padapter);
u32 (*hal_init)(struct adapter *padapter);
@ -157,7 +155,6 @@ struct hal_ops {
u32 (*inirp_deinit)(struct adapter *padapter);
s32 (*init_xmit_priv)(struct adapter *padapter);
void (*free_xmit_priv)(struct adapter *padapter);
s32 (*init_recv_priv)(struct adapter *padapter);
void (*free_recv_priv)(struct adapter *padapter);
@ -166,7 +163,6 @@ struct hal_ops {
void (*DeInitSwLeds)(struct adapter *padapter);
void (*dm_init)(struct adapter *padapter);
void (*dm_deinit)(struct adapter *padapter);
void (*read_chip_version)(struct adapter *padapter);
void (*init_default_value)(struct adapter *padapter);
@ -198,9 +194,6 @@ struct hal_ops {
enum hal_def_variable eVariable,
void *pValue);
void (*GetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void (*SetHalODMVarHandler)(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
@ -211,25 +204,15 @@ struct hal_ops {
void (*Add_RateATid)(struct adapter *adapter, u32 bitmap, u8 arg,
u8 rssi_level);
void (*run_thread)(struct adapter *adapter);
void (*cancel_thread)(struct adapter *adapter);
u8 (*AntDivBeforeLinkHandler)(struct adapter *adapter);
void (*AntDivCompareHandler)(struct adapter *adapter,
struct wlan_bssid_ex *dst,
struct wlan_bssid_ex *src);
u8 (*interface_ps_func)(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 (*hal_xmit)(struct adapter *padapter,
struct xmit_frame *pxmitframe);
s32 (*mgnt_xmit)(struct adapter *padapter,
struct xmit_frame *pmgntframe);
u32 (*read_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask);
void (*write_bbreg)(struct adapter *padapter, u32 RegAddr,
u32 BitMask, u32 Data);
u32 (*read_rfreg)(struct adapter *padapter,
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask);
@ -237,40 +220,11 @@ struct hal_ops {
enum rf_radio_path eRFPath, u32 RegAddr,
u32 BitMask, u32 Data);
void (*EfusePowerSwitch)(struct adapter *padapter, u8 bWrite,
u8 PwrState);
void (*ReadEFuse)(struct adapter *padapter, u8 efuseType, u16 _offset,
u16 _size_byte, u8 *pbuf, bool bPseudoTest);
void (*EFUSEGetEfuseDefinition)(struct adapter *padapter, u8 efuseType,
u8 type, void *pOut, bool bPseudoTest);
u16 (*EfuseGetCurrentSize)(struct adapter *padapter, u8 efuseType,
bool bPseudoTest);
int (*Efuse_PgPacketRead)(struct adapter *adapter, u8 offset,
u8 *data, bool bPseudoTest);
int (*Efuse_PgPacketWrite)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool bPseudoTest);
u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter,
u16 efuse_addr, u8 word_en,
u8 *data, bool bPseudoTest);
bool (*Efuse_PgPacketWrite_BT)(struct adapter *padapter, u8 offset,
u8 word_en, u8 *data, bool test);
void (*sreset_init_value)(struct adapter *padapter);
void (*sreset_reset_value)(struct adapter *padapter);
void (*silentreset)(struct adapter *padapter);
void (*sreset_xmit_status_check)(struct adapter *padapter);
void (*sreset_linked_status_check) (struct adapter *padapter);
u8 (*sreset_get_wifi_status)(struct adapter *padapter);
int (*IOL_exec_cmds_sync)(struct adapter *padapter,
struct xmit_frame *frame, u32 max_wait,
u32 bndy_cnt);
void (*hal_notch_filter)(struct adapter *adapter, bool enable);
void (*hal_reset_security_engine)(struct adapter *adapter);
s32 (*c2h_handler)(struct adapter *padapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter c2h_id_filter_ccx;
};
enum rt_eeprom_type {
@ -286,39 +240,10 @@ enum rt_eeprom_type {
#define RF_CHANGE_BY_SW BIT31
enum hardware_type {
HARDWARE_TYPE_RTL8180,
HARDWARE_TYPE_RTL8185,
HARDWARE_TYPE_RTL8187,
HARDWARE_TYPE_RTL8188,
HARDWARE_TYPE_RTL8190P,
HARDWARE_TYPE_RTL8192E,
HARDWARE_TYPE_RTL819xU,
HARDWARE_TYPE_RTL8192SE,
HARDWARE_TYPE_RTL8192SU,
HARDWARE_TYPE_RTL8192CE,
HARDWARE_TYPE_RTL8192CU,
HARDWARE_TYPE_RTL8192DE,
HARDWARE_TYPE_RTL8192DU,
HARDWARE_TYPE_RTL8723AE,
HARDWARE_TYPE_RTL8723AU,
HARDWARE_TYPE_RTL8723AS,
HARDWARE_TYPE_RTL8188EE,
HARDWARE_TYPE_RTL8188EU,
HARDWARE_TYPE_RTL8188ES,
HARDWARE_TYPE_MAX,
};
/* RTL8188E Series */
#define IS_HARDWARE_TYPE_8188EE(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EE)
#define IS_HARDWARE_TYPE_8188EU(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188EU)
#define IS_HARDWARE_TYPE_8188ES(_Adapter) \
(((struct adapter *)_Adapter)->HardwareType == HARDWARE_TYPE_RTL8188ES)
#define IS_HARDWARE_TYPE_8188E(_Adapter) \
(IS_HARDWARE_TYPE_8188EE(_Adapter) || IS_HARDWARE_TYPE_8188EU(_Adapter) || \
IS_HARDWARE_TYPE_8188ES(_Adapter))
#define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv)
#define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse)
@ -328,7 +253,6 @@ void rtw_hal_def_value_init(struct adapter *padapter);
void rtw_hal_free_data(struct adapter *padapter);
void rtw_hal_dm_init(struct adapter *padapter);
void rtw_hal_dm_deinit(struct adapter *padapter);
void rtw_hal_sw_led_init(struct adapter *padapter);
void rtw_hal_sw_led_deinit(struct adapter *padapter);
@ -351,9 +275,6 @@ u8 rtw_hal_get_def_var(struct adapter *padapter,
void rtw_hal_set_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable, void *pValue1,
bool bSet);
void rtw_hal_get_odm_var(struct adapter *padapter,
enum hal_odm_variable eVariable,
void *pValue1, bool bSet);
void rtw_hal_enable_interrupt(struct adapter *padapter);
void rtw_hal_disable_interrupt(struct adapter *padapter);
@ -361,15 +282,11 @@ void rtw_hal_disable_interrupt(struct adapter *padapter);
u32 rtw_hal_inirp_init(struct adapter *padapter);
u32 rtw_hal_inirp_deinit(struct adapter *padapter);
u8 rtw_hal_intf_ps_func(struct adapter *padapter,
enum hal_intf_ps_func efunc_id, u8 *val);
s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe);
s32 rtw_hal_mgnt_xmit(struct adapter *padapter,
struct xmit_frame *pmgntframe);
s32 rtw_hal_init_xmit_priv(struct adapter *padapter);
void rtw_hal_free_xmit_priv(struct adapter *padapter);
s32 rtw_hal_init_recv_priv(struct adapter *padapter);
void rtw_hal_free_recv_priv(struct adapter *padapter);
@ -378,14 +295,9 @@ void rtw_hal_update_ra_mask(struct adapter *padapter, u32 mac_id, u8 level);
void rtw_hal_add_ra_tid(struct adapter *adapt, u32 bitmap, u8 arg, u8 level);
void rtw_hal_clone_data(struct adapter *dst_adapt,
struct adapter *src_adapt);
void rtw_hal_start_thread(struct adapter *padapter);
void rtw_hal_stop_thread(struct adapter *padapter);
void rtw_hal_bcn_related_reg_setting(struct adapter *padapter);
u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask);
void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask,
u32 Data);
u32 rtw_hal_read_rfreg(struct adapter *padapter, enum rf_radio_path eRFPath,
u32 RegAddr, u32 BitMask);
void rtw_hal_write_rfreg(struct adapter *padapter,
@ -405,21 +317,11 @@ void rtw_hal_antdiv_rssi_compared(struct adapter *padapter,
struct wlan_bssid_ex *src);
void rtw_hal_sreset_init(struct adapter *padapter);
void rtw_hal_sreset_reset(struct adapter *padapter);
void rtw_hal_sreset_reset_value(struct adapter *padapter);
void rtw_hal_sreset_xmit_status_check(struct adapter *padapter);
void rtw_hal_sreset_linked_status_check(struct adapter *padapter);
u8 rtw_hal_sreset_get_wifi_status(struct adapter *padapter);
int rtw_hal_iol_cmd(struct adapter *adapter, struct xmit_frame *xmit_frame,
u32 max_wating_ms, u32 bndy_cnt);
void rtw_hal_notch_filter(struct adapter *adapter, bool enable);
void rtw_hal_reset_security_engine(struct adapter *adapter);
s32 rtw_hal_c2h_handler(struct adapter *adapter,
struct c2h_evt_hdr *c2h_evt);
c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter);
void indicate_wx_scan_complete_event(struct adapter *padapter);
u8 rtw_do_join(struct adapter *padapter);

13
include/ieee80211.h
View file

@ -1233,19 +1233,6 @@ u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id,
void dump_ies(u8 *buf, u32 buf_len);
void dump_wps_ie(u8 *ie, u32 ie_len);
#ifdef CONFIG_88EU_P2P
void dump_p2p_ie(u8 *ie, u32 ie_len);
u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen);
u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id,
u8 *buf_attr, u32 *len_attr);
u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id,
u8 *buf_content, uint *len_content);
u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len,
u8 *pdata_attr);
void rtw_wlan_bssid_ex_remove_p2p_attr(struct wlan_bssid_ex *bss_ex,
u8 attr_id);
#endif
uint rtw_get_rateset_len(u8 *rateset);
struct registry_priv;

20
include/ieee80211_ext.h
View file

@ -103,24 +103,24 @@ struct wme_parameter_element {
#define WPA_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
(a)[1] = ((u16)(val)) >> 8; \
(a)[0] = ((u16)(val)) & 0xff; \
} while (0)
#define WPA_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
(a)[0] = (u8)((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8)((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8)((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8)(((u32) (val)) & 0xff); \
} while (0)
#define WPA_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
(a)[3] = (u8)((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8)((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8)((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8)(((u32) (val)) & 0xff); \
} while (0)
#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *)(a), (val))

109
include/odm.h
View file

@ -90,14 +90,6 @@
#define ANTTESTA 0x01 /* Ant A will be Testing */
#define ANTTESTB 0x02 /* Ant B will be testing */
/* structure and define */
/* Add for AP/ADSLpseudo DM structuer requirement. */
/* We need to remove to other position??? */
struct rtl8192cd_priv {
u8 temp;
};
struct rtw_dig {
u8 Dig_Enable_Flag;
u8 Dig_Ext_Port_Stage;
@ -151,7 +143,7 @@ struct rtl_ps {
int Rssi_val_min;
u8 initialize;
u32 Reg874,RegC70,Reg85C,RegA74;
u32 Reg874, RegC70, Reg85C, RegA74;
};
@ -172,14 +164,6 @@ struct false_alarm_stats {
u32 Cnt_BW_LSC; /* Gary */
};
struct dyn_primary_cca {
u8 PriCCA_flag;
u8 intf_flag;
u8 intf_type;
u8 DupRTS_flag;
u8 Monitor_flag;
};
struct rx_hpc {
u8 RXHP_flag;
u8 PSD_func_trigger;
@ -454,29 +438,7 @@ enum odm_ability_def {
ODM_RF_CALIBRATION = BIT26,
};
/* ODM_CMNINFO_INTERFACE */
enum odm_interface_def {
ODM_ITRF_PCIE = 0x1,
ODM_ITRF_USB = 0x2,
ODM_ITRF_SDIO = 0x4,
ODM_ITRF_ALL = 0x7,
};
/* ODM_CMNINFO_IC_TYPE */
enum odm_ic_type {
ODM_RTL8192S = BIT0,
ODM_RTL8192C = BIT1,
ODM_RTL8192D = BIT2,
ODM_RTL8723A = BIT3,
ODM_RTL8188E = BIT4,
ODM_RTL8812 = BIT5,
ODM_RTL8821 = BIT6,
};
#define ODM_IC_11N_SERIES \
(ODM_RTL8192S | ODM_RTL8192C | ODM_RTL8192D | \
ODM_RTL8723A | ODM_RTL8188E)
#define ODM_IC_11AC_SERIES (ODM_RTL8812)
#define ODM_RTL8188E BIT4
/* ODM_CMNINFO_CUT_VER */
enum odm_cut_version {
@ -897,7 +859,6 @@ struct odm_dm_struct {
struct fast_ant_train DM_FatTable;
struct rtw_dig DM_DigTable;
struct rtl_ps DM_PSTable;
struct dyn_primary_cca DM_PriCCA;
struct rx_hpc DM_RXHP_Table;
struct false_alarm_stats FalseAlmCnt;
struct false_alarm_stats FlaseAlmCntBuddyAdapter;
@ -950,13 +911,6 @@ struct odm_dm_struct {
#define ODM_RF_PATH_MAX 3
enum ODM_RF_RADIO_PATH {
ODM_RF_PATH_A = 0, /* Radio Path A */
ODM_RF_PATH_B = 1, /* Radio Path B */
ODM_RF_PATH_C = 2, /* Radio Path C */
ODM_RF_PATH_D = 3, /* Radio Path D */
};
enum ODM_RF_CONTENT {
odm_radioa_txt = 0x1000,
odm_radiob_txt = 0x1001,
@ -1128,69 +1082,28 @@ extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
#define SWAW_STEP_PEAK 0
#define SWAW_STEP_DETERMINE 1
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI);
void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres);
void ODM_SetAntenna(struct odm_dm_struct *pDM_Odm, u8 Antenna);
#define dm_RF_Saving ODM_RF_Saving
void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal);
#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
void ODM_SwAntDivRestAfterLink(struct odm_dm_struct *pDM_Odm);
#define dm_CheckTXPowerTracking ODM_TXPowerTrackingCheck
void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm);
#define dm_RF_Saving ODM_RF_Saving
void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal);
void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm);
void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm);
void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres);
bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI,
bool bForceUpdate, u8 *pRATRState);
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID,
struct odm_phy_status_info *pPhyInfo);
u32 ConvertTo_dB(u32 Value);
u32 GetPSDData(struct odm_dm_struct *pDM_Odm, unsigned int point,
u8 initial_gain_psd);
void odm_DIGbyRSSI_LPS(struct odm_dm_struct *pDM_Odm);
u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid,
u32 ra_mask, u8 rssi_level);
void ODM_DMInit(struct odm_dm_struct *pDM_Odm);
void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm);
void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo, u32 Value);
void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value);
void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo, void *pValue);
void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm,
enum odm_common_info_def CmnInfo,
u16 Index, void *pValue);
void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value);
void ODM_InitAllTimers(struct odm_dm_struct *pDM_Odm);
void ODM_CancelAllTimers(struct odm_dm_struct *pDM_Odm);
void ODM_ReleaseAllTimers(struct odm_dm_struct *pDM_Odm);
void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm);
void ODM_AntselStatistics_88C(struct odm_dm_struct *pDM_Odm, u8 MacId,
u32 PWDBAll, bool isCCKrate);
void ODM_SingleDualAntennaDefaultSetting(struct odm_dm_struct *pDM_Odm);
bool ODM_SingleDualAntennaDetection(struct odm_dm_struct *pDM_Odm, u8 mode);
void odm_dtc(struct odm_dm_struct *pDM_Odm);
void ODM_DMInit(struct odm_dm_struct *pDM_Odm);
void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm);
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI);
#endif

9
include/odm_HWConfig.h
View file

@ -111,8 +111,7 @@ void odm_Init_RSSIForDM(struct odm_dm_struct *pDM_Odm);
void ODM_PhyStatusQuery(struct odm_dm_struct *pDM_Odm,
struct odm_phy_status_info *pPhyInfo,
u8 *pPhyStatus,
struct odm_per_pkt_info *pPktinfo,
struct adapter *adapt);
struct odm_per_pkt_info *pPktinfo);
void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm,
u8 *pMacStatus,
@ -121,13 +120,7 @@ void ODM_MacStatusQuery(struct odm_dm_struct *pDM_Odm,
bool bPacketToSelf,
bool bPacketBeacon);
enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum ODM_RF_RADIO_PATH Content,
enum ODM_RF_RADIO_PATH eRFPath);
enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *pDM_Odm,
enum odm_bb_config_type ConfigType);
enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *pDM_Odm);
#endif

18
include/odm_RTL8188E.h
View file

@ -29,17 +29,17 @@
void ODM_DIG_LowerBound_88E(struct odm_dm_struct *pDM_Odm);
void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
void rtl88eu_dm_antenna_div_init(struct odm_dm_struct *dm_odm);
void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
void rtl88eu_dm_antenna_diversity(struct odm_dm_struct *dm_odm);
void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, u8 *pDesc,
u8 macId);
void rtl88eu_dm_set_tx_ant_by_tx_info(struct odm_dm_struct *dm_odm, u8 *desc,
u8 mac_id);
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *pDM_Odm, u8 Ant);
void rtl88eu_dm_update_rx_idle_ant(struct odm_dm_struct *dm_odm, u8 ant);
void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm, u8 antsel_tr_mux,
u32 MacId, u8 RxPWDBAll);
void rtl88eu_dm_ant_sel_statistics(struct odm_dm_struct *dm_odm, u8 antsel_tr_mux,
u32 mac_id, u8 rx_pwdb_all);
void odm_FastAntTraining(struct odm_dm_struct *pDM_Odm);
@ -47,10 +47,6 @@ void odm_FastAntTrainingCallback(struct odm_dm_struct *pDM_Odm);
void odm_FastAntTrainingWorkItemCallback(struct odm_dm_struct *pDM_Odm);
void odm_PrimaryCCA_Init(struct odm_dm_struct *pDM_Odm);
bool ODM_DynamicPrimaryCCA_DupRTS(struct odm_dm_struct *pDM_Odm);
void odm_DynamicPrimaryCCA(struct odm_dm_struct *pDM_Odm);
#endif

42
include/odm_debug.h
View file

@ -83,9 +83,8 @@
#define ODM_COMP_INIT BIT31
/*------------------------Export Marco Definition---------------------------*/
#define DbgPrint pr_info
#define RT_PRINTK(fmt, args...) \
DbgPrint( "%s(): " fmt, __func__, ## args);
pr_info("%s(): " fmt, __func__, ## args);
#ifndef ASSERT
#define ASSERT(expr)
@ -94,51 +93,18 @@
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
if (pDM_Odm->SupportICType == ODM_RTL8192C) \
DbgPrint("[ODM-92C] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8192D) \
DbgPrint("[ODM-92D] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8723A) \
DbgPrint("[ODM-8723A] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8188E) \
DbgPrint("[ODM-8188E] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8812) \
DbgPrint("[ODM-8812] "); \
else if (pDM_Odm->SupportICType == ODM_RTL8821) \
DbgPrint("[ODM-8821] "); \
RT_PRINTK fmt; \
}
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
pr_info("[ODM-8188E] "); \
RT_PRINTK fmt; \
}
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
if (!(expr)) { \
DbgPrint( "Assertion failed! %s at ......\n", #expr); \
DbgPrint( " ......%s,%s,line=%d\n", __FILE__, \
pr_info("Assertion failed! %s at ......\n", #expr); \
pr_info(" ......%s,%s,line=%d\n", __FILE__, \
__func__, __LINE__); \
RT_PRINTK fmt; \
ASSERT(false); \
}
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __func__); }
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __func__); }
#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __func__, str); }
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
if (((comp) & pDM_Odm->DebugComponents) && \
(level <= pDM_Odm->DebugLevel)) { \
int __i; \
u8 *__ptr = (u8 *)ptr; \
DbgPrint("[ODM] "); \
DbgPrint(title_str); \
DbgPrint(" "); \
for (__i = 0; __i < 6; __i++) \
DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-");\
DbgPrint("\n"); \
}
void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm);

19
include/odm_precomp.h
View file

@ -30,29 +30,20 @@
#include <osdep_service.h>
#include <drv_types.h>
#include <hal_intf.h>
#include <usb_ops_linux.h>
/* 2 OutSrc Header Files */
#include "odm.h"
#include "odm_HWConfig.h"
#include "odm_debug.h"
#include "odm_RegDefine11AC.h"
#include "odm_RegDefine11N.h"
#include "HalPhyRf.h"
#include "HalPhyRf_8188e.h"/* for IQK,LCK,Power-tracking */
#include "Hal8188ERateAdaptive.h"/* for RA,Power training */
#include "rtl8188e_hal.h"
#include "odm_interface.h"
#include "odm_reg.h"
#include "HalHWImg8188E_MAC.h"
#include "HalHWImg8188E_RF.h"
#include "HalHWImg8188E_BB.h"
#include "Hal8188EReg.h"
#include "odm_RegConfig8188E.h"
#include "odm_RTL8188E.h"
void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm);
@ -64,7 +55,6 @@ void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm);
void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit_NIC(struct odm_dm_struct *pDM_Odm);
void odm_GlobalAdapterCheck(void);
void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm);
void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm);
@ -74,24 +64,17 @@ void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm);
void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step);
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm);
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivInit(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm);
void odm_1R_CCA(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm);
void odm_RefreshRateAdaptiveMaskAPADSL(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerNIC(struct odm_dm_struct *pDM_Odm);
void odm_DynamicTxPowerAP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_RSSIMonitorCheckAP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm);
void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckMP(struct odm_dm_struct *pDM_Odm);
void odm_TXPowerTrackingCheckAP(struct odm_dm_struct *pDM_Odm);
void odm_SwAntDivChkAntSwitchCallback(void *FunctionContext);
void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm);
void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm);

25
include/odm_types.h
View file

@ -20,31 +20,13 @@
#ifndef __ODM_TYPES_H__
#define __ODM_TYPES_H__
/* */
/* Define Different SW team support */
/* */
#define ODM_AP 0x01 /* BIT0 */
#define ODM_ADSL 0x02 /* BIT1 */
#define ODM_CE 0x04 /* BIT2 */
#define ODM_MP 0x08 /* BIT3 */
#define RT_PCI_INTERFACE 1
#define RT_USB_INTERFACE 2
#define RT_SDIO_INTERFACE 3
enum HAL_STATUS {
HAL_STATUS_SUCCESS,
HAL_STATUS_FAILURE,
};
enum RT_SPINLOCK_TYPE {
RT_TEMP = 1,
};
#include <basic_types.h>
#define DEV_BUS_TYPE RT_USB_INTERFACE
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
@ -52,11 +34,4 @@ enum RT_SPINLOCK_TYPE {
#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
/* define useless flag to avoid compile warning */
#define USE_WORKITEM 0
#define FOR_BRAZIL_PRETEST 0
#define BT_30_SUPPORT 0
#define FPGA_TWO_MAC_VERIFICATION 0
#endif /* __ODM_TYPES_H__ */

38
include/osdep_intf.h
View file

@ -24,38 +24,8 @@
#include <osdep_service.h>
#include <drv_types.h>
struct intf_priv {
u8 *intf_dev;
u32 max_iosz; /* USB2.0: 128, USB1.1: 64, SDIO:64 */
u32 max_xmitsz; /* USB2.0: unlimited, SDIO:512 */
u32 max_recvsz; /* USB2.0: unlimited, SDIO:512 */
u8 *io_rwmem;
u8 *allocated_io_rwmem;
u32 io_wsz; /* unit: 4bytes */
u32 io_rsz;/* unit: 4bytes */
u8 intf_status;
void (*_bus_io)(u8 *priv);
/*
Under Sync. IRP (SDIO/USB)
A protection mechanism is necessary for the io_rwmem(read/write protocol)
Under Async. IRP (SDIO/USB)
The protection mechanism is through the pending queue.
*/
struct mutex ioctl_mutex;
/* when in USB, IO is through interrupt in/out endpoints */
struct usb_device *udev;
struct urb *piorw_urb;
u8 io_irp_cnt;
u8 bio_irp_pending;
struct semaphore io_retevt;
struct timer_list io_timer;
u8 bio_irp_timeout;
u8 bio_timer_cancel;
};
extern char *rtw_initmac;
extern int rtw_mc2u_disable;
u8 rtw_init_drv_sw(struct adapter *padapter);
u8 rtw_free_drv_sw(struct adapter *padapter);
@ -73,11 +43,9 @@ u16 rtw_recv_select_queue(struct sk_buff *skb);
void rtw_proc_init_one(struct net_device *dev);
void rtw_proc_remove_one(struct net_device *dev);
int pm_netdev_open(struct net_device *pnetdev, u8 bnormal);
void rtw_ips_dev_unload(struct adapter *padapter);
int rtw_ips_pwr_up(struct adapter *padapter);
void rtw_ips_pwr_down(struct adapter *padapter);
int rtw_hw_suspend(struct adapter *padapter);
int rtw_hw_resume(struct adapter *padapter);
#endif /* _OSDEP_INTF_H_ */

380
include/osdep_service.h
View file

@ -24,13 +24,12 @@
#define _FAIL 0
#define _SUCCESS 1
#define RTW_RX_HANDLED 2
#define RTW_RX_HANDLED 2
#include <linux/spinlock.h>
#include <linux/compiler.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/kref.h>
@ -39,7 +38,7 @@
#include <linux/circ_buf.h>
#include <linux/uaccess.h>
#include <asm/byteorder.h>
#include <asm/atomic.h>
#include <linux/atomic.h>
#include <linux/io.h>
#include <linux/semaphore.h>
#include <linux/sem.h>
@ -63,54 +62,13 @@ struct __queue {
spinlock_t lock;
};
#define thread_exit() complete_and_exit(NULL, 0)
static inline struct list_head *get_next(struct list_head *list)
{
return list->next;
}
static inline struct list_head *get_list_head(struct __queue *queue)
{
return (&(queue->queue));
return &(queue->queue);
}
#define LIST_CONTAINOR(ptr, type, member) \
((type *)((char *)(ptr)-(size_t)(&((type *)0)->member)))
static inline void _enter_critical(spinlock_t *plock, unsigned long *pirqL)
{
spin_lock_irqsave(plock, *pirqL);
}
static inline void _exit_critical(spinlock_t *plock, unsigned long *pirqL)
{
spin_unlock_irqrestore(plock, *pirqL);
}
static inline void _enter_critical_ex(spinlock_t *plock, unsigned long *pirqL)
{
spin_lock_irqsave(plock, *pirqL);
}
static inline void _exit_critical_ex(spinlock_t *plock, unsigned long *pirqL)
{
spin_unlock_irqrestore(plock, *pirqL);
}
static inline void _enter_critical_bh(spinlock_t *plock, unsigned long *pirqL)
{
spin_lock_bh(plock);
}
static inline void _exit_critical_bh(spinlock_t *plock, unsigned long *pirqL)
{
spin_unlock_bh(plock);
}
static inline int _enter_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
static inline int _enter_critical_mutex(struct mutex *pmutex,
unsigned long *pirqL)
{
int ret;
@ -118,70 +76,24 @@ static inline int _enter_critical_mutex(struct mutex *pmutex, unsigned long *pir
return ret;
}
static inline void _exit_critical_mutex(struct mutex *pmutex, unsigned long *pirqL)
{
mutex_unlock(pmutex);
}
static inline void rtw_list_delete(struct list_head *plist)
{
list_del_init(plist);
}
static inline void _init_timer(struct timer_list *ptimer,struct net_device *nic_hdl,void *pfunc,void* cntx)
static inline void _init_timer(struct timer_list *ptimer,
struct net_device *nic_hdl,
void *pfunc, void *cntx)
{
ptimer->function = pfunc;
ptimer->data = (unsigned long)cntx;
init_timer(ptimer);
}
static inline void _set_timer(struct timer_list *ptimer,u32 delay_time)
static inline void _set_timer(struct timer_list *ptimer, u32 delay_time)
{
mod_timer(ptimer , (jiffies+(delay_time*HZ/1000)));
}
static inline void _cancel_timer(struct timer_list *ptimer,u8 *bcancelled)
{
del_timer_sync(ptimer);
*bcancelled= true;/* true ==1; false==0 */
}
#define RTW_TIMER_HDL_ARGS void *FunctionContext
#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
static inline void _init_workitem(struct work_struct *pwork, void *pfunc, void * cntx)
{
INIT_WORK(pwork, pfunc);
}
static inline void _set_workitem(struct work_struct *pwork)
{
schedule_work(pwork);
}
static inline void _cancel_workitem_sync(struct work_struct *pwork)
{
cancel_work_sync(pwork);
}
/* */
/* Global Mutex: can only be used at PASSIVE level. */
/* */
#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \
{ \
while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
msleep(10); \
} \
}
#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \
{ \
atomic_dec((atomic_t *)&(_MutexCounter)); \
}
#define RTW_DECLARE_TIMER_HDL(name) \
void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
{
@ -191,24 +103,6 @@ static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 3));
}
static inline void rtw_netif_wake_queue(struct net_device *pnetdev)
{
netif_tx_wake_all_queues(pnetdev);
}
static inline void rtw_netif_start_queue(struct net_device *pnetdev)
{
netif_tx_start_all_queues(pnetdev);
}
static inline void rtw_netif_stop_queue(struct net_device *pnetdev)
{
netif_tx_stop_all_queues(pnetdev);
}
#ifndef BIT
#define BIT(x) ( 1 << (x))
#endif
#define BIT0 0x00000001
#define BIT1 0x00000002
@ -250,185 +144,17 @@ static inline void rtw_netif_stop_queue(struct net_device *pnetdev)
extern int RTW_STATUS_CODE(int error_code);
/* flags used for rtw_update_mem_stat() */
enum {
MEM_STAT_VIR_ALLOC_SUCCESS,
MEM_STAT_VIR_ALLOC_FAIL,
MEM_STAT_VIR_FREE,
MEM_STAT_PHY_ALLOC_SUCCESS,
MEM_STAT_PHY_ALLOC_FAIL,
MEM_STAT_PHY_FREE,
MEM_STAT_TX, /* used to distinguish TX/RX, asigned from caller */
MEM_STAT_TX_ALLOC_SUCCESS,
MEM_STAT_TX_ALLOC_FAIL,
MEM_STAT_TX_FREE,
MEM_STAT_RX, /* used to distinguish TX/RX, asigned from caller */
MEM_STAT_RX_ALLOC_SUCCESS,
MEM_STAT_RX_ALLOC_FAIL,
MEM_STAT_RX_FREE
};
extern unsigned char MCS_rate_2R[16];
extern unsigned char MCS_rate_1R[16];
extern unsigned char RTW_WPA_OUI[];
extern unsigned char WPA_TKIP_CIPHER[4];
extern unsigned char RSN_TKIP_CIPHER[4];
#define rtw_update_mem_stat(flag, sz) do {} while (0)
u8 *_rtw_vmalloc(u32 sz);
u8 *_rtw_zvmalloc(u32 sz);
void _rtw_vmfree(u8 *pbuf, u32 sz);
u8 *_rtw_zmalloc(u32 sz);
u8 *_rtw_malloc(u32 sz);
void _rtw_mfree(u8 *pbuf, u32 sz);
#define rtw_vmalloc(sz) _rtw_vmalloc((sz))
#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz))
#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz))
#define rtw_malloc(sz) _rtw_malloc((sz))
#define rtw_zmalloc(sz) _rtw_zmalloc((sz))
#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz))
void *rtw_malloc2d(int h, int w, int size);
void rtw_mfree2d(void *pbuf, int h, int w, int size);
void _rtw_memcpy(void *dec, void *sour, u32 sz);
int _rtw_memcmp(void *dst, void *src, u32 sz);
void _rtw_memset(void *pbuf, int c, u32 sz);
void _rtw_init_listhead(struct list_head *list);
u32 rtw_is_list_empty(struct list_head *phead);
void rtw_list_insert_head(struct list_head *plist, struct list_head *phead);
void rtw_list_insert_tail(struct list_head *plist, struct list_head *phead);
void rtw_list_delete(struct list_head *plist);
void _rtw_init_sema(struct semaphore *sema, int init_val);
void _rtw_free_sema(struct semaphore *sema);
void _rtw_up_sema(struct semaphore *sema);
u32 _rtw_down_sema(struct semaphore *sema);
void _rtw_mutex_init(struct mutex *pmutex);
void _rtw_mutex_free(struct mutex *pmutex);
void _rtw_spinlock_init(spinlock_t *plock);
void _rtw_spinlock_free(spinlock_t *plock);
void _rtw_init_queue(struct __queue *pqueue);
u32 _rtw_queue_empty(struct __queue *pqueue);
u32 rtw_end_of_queue_search(struct list_head *queue, struct list_head *pelement);
u32 rtw_get_current_time(void);
u32 rtw_systime_to_ms(u32 systime);
u32 rtw_ms_to_systime(u32 ms);
s32 rtw_get_passing_time_ms(u32 start);
s32 rtw_get_time_interval_ms(u32 start, u32 end);
void rtw_sleep_schedulable(int ms);
void rtw_msleep_os(int ms);
void rtw_usleep_os(int us);
u32 rtw_atoi(u8 *s);
void rtw_mdelay_os(int ms);
void rtw_udelay_os(int us);
void rtw_yield_os(void);
static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
{
return del_timer_sync(ptimer);
}
static __inline void thread_enter(char *name)
{
#ifdef daemonize
daemonize("%s", name);
#endif
allow_signal(SIGTERM);
}
static inline void flush_signals_thread(void)
{
if (signal_pending (current))
flush_signals(current);
}
static inline int res_to_status(int res)
{
return res;
}
#define _RND(sz, r) ((((sz)+((r)-1))/(r))*(r))
#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2)
static inline u32 _RND4(u32 sz)
{
u32 val;
val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2;
return val;
}
static inline u32 _RND8(u32 sz)
{
u32 val;
val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3;
return val;
}
static inline u32 _RND128(u32 sz)
{
u32 val;
val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7;
return val;
}
static inline u32 _RND256(u32 sz)
{
u32 val;
val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8;
return val;
}
static inline u32 _RND512(u32 sz)
{
u32 val;
val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9;
return val;
}
static inline u32 bitshift(u32 bitmask)
{
u32 i;
for (i = 0; i <= 31; i++)
if (((bitmask>>i) & 0x1) == 1) break;
return i;
}
/* limitation of path length */
#define PATH_LENGTH_MAX PATH_MAX
void rtw_suspend_lock_init(void);
void rtw_suspend_lock_uninit(void);
void rtw_lock_suspend(void);
void rtw_unlock_suspend(void);
/* Atomic integer operations */
#define ATOMIC_T atomic_t
void ATOMIC_SET(ATOMIC_T *v, int i);
int ATOMIC_READ(ATOMIC_T *v);
void ATOMIC_ADD(ATOMIC_T *v, int i);
void ATOMIC_SUB(ATOMIC_T *v, int i);
void ATOMIC_INC(ATOMIC_T *v);
void ATOMIC_DEC(ATOMIC_T *v);
int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i);
int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i);
int ATOMIC_INC_RETURN(ATOMIC_T *v);
int ATOMIC_DEC_RETURN(ATOMIC_T *v);
struct rtw_netdev_priv_indicator {
void *priv;
@ -436,7 +162,6 @@ struct rtw_netdev_priv_indicator {
};
struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv,
void *old_priv);
struct net_device *rtw_alloc_etherdev(int sizeof_priv);
#define rtw_netdev_priv(netdev) \
(((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv)
@ -451,92 +176,15 @@ void rtw_free_netdev(struct net_device *netdev);
#define FUNC_ADPT_FMT "%s(%s)"
#define FUNC_ADPT_ARG(adapter) __func__, adapter->pnetdev->name
#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1)
#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)), (sig), 1)
u64 rtw_modular64(u64 x, u64 y);
u64 rtw_division64(u64 x, u64 y);
/* Macros for handling unaligned memory accesses */
#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1]))
#define RTW_PUT_BE16(a, val) \
do { \
(a)[0] = ((u16) (val)) >> 8; \
(a)[1] = ((u16) (val)) & 0xff; \
} while (0)
#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0]))
#define RTW_PUT_LE16(a, val) \
do { \
(a)[1] = ((u16) (val)) >> 8; \
(a)[0] = ((u16) (val)) & 0xff; \
} while (0)
#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
((u32) (a)[2]))
#define RTW_PUT_BE24(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[2] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \
(((u32) (a)[2]) << 8) | ((u32) (a)[3]))
#define RTW_PUT_BE32(a, val) \
do { \
(a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[3] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \
(((u32) (a)[1]) << 8) | ((u32) (a)[0]))
#define RTW_PUT_LE32(a, val) \
do { \
(a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
(a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
(a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
(a)[0] = (u8) (((u32) (val)) & 0xff); \
} while (0)
#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \
(((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \
(((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \
(((u64) (a)[6]) << 8) | ((u64) (a)[7]))
#define RTW_PUT_BE64(a, val) \
do { \
(a)[0] = (u8) (((u64) (val)) >> 56); \
(a)[1] = (u8) (((u64) (val)) >> 48); \
(a)[2] = (u8) (((u64) (val)) >> 40); \
(a)[3] = (u8) (((u64) (val)) >> 32); \
(a)[4] = (u8) (((u64) (val)) >> 24); \
(a)[5] = (u8) (((u64) (val)) >> 16); \
(a)[6] = (u8) (((u64) (val)) >> 8); \
(a)[7] = (u8) (((u64) (val)) & 0xff); \
} while (0)
#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \
(((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \
(((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \
(((u64) (a)[1]) << 8) | ((u64) (a)[0]))
#define RTW_GET_BE24(a) ((((u32)(a)[0]) << 16) | (((u32) (a)[1]) << 8) | \
((u32)(a)[2]))
void rtw_buf_free(u8 **buf, u32 *buf_len);
void rtw_buf_update(u8 **buf, u32 *buf_len, u8 *src, u32 src_len);
struct rtw_cbuf {
u32 write;
u32 read;
u32 size;
void *bufs[0];
};
bool rtw_cbuf_full(struct rtw_cbuf *cbuf);
bool rtw_cbuf_empty(struct rtw_cbuf *cbuf);
bool rtw_cbuf_push(struct rtw_cbuf *cbuf, void *buf);
void *rtw_cbuf_pop(struct rtw_cbuf *cbuf);
struct rtw_cbuf *rtw_cbuf_alloc(u32 size);
int wifirate2_ratetbl_inx(unsigned char rate);
#endif

30
include/phy.h Normal file
View file

@ -0,0 +1,30 @@
#include <odm.h>
#define IQK_DELAY_TIME_88E 10
#define index_mapping_NUM_88E 15
#define AVG_THERMAL_NUM_88E 4
#define ODM_TARGET_CHNL_NUM_2G_5G 59
bool rtl88eu_phy_mac_config(struct adapter *adapt);
bool rtl88eu_phy_rf_config(struct adapter *adapt);
bool rtl88eu_phy_bb_config(struct adapter *adapt);
u32 phy_query_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask);
void phy_set_bb_reg(struct adapter *adapt, u32 regaddr, u32 bitmask, u32 data);
u32 phy_query_rf_reg(struct adapter *adapt, enum rf_radio_path rf_path,
u32 reg_addr, u32 bit_mask);
void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path rf_path,
u32 reg_addr, u32 bit_mask, u32 data);
void phy_set_tx_power_level(struct adapter *adapt, u8 channel);
void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
unsigned char offset);
void phy_sw_chnl(struct adapter *adapt, u8 channel);
void rtl88eu_dm_txpower_track_adjust(struct odm_dm_struct *dm_odm,
u8 type, u8 *dir, u32 *out_write);
void rtl88eu_dm_txpower_tracking_callback_thermalmeter(struct adapter *adapt);
void rtl88eu_phy_iq_calibrate(struct adapter *adapter, bool recovery);
void rtl88eu_phy_lc_calibrate(struct adapter *adapter);

341
include/pwrseq.h Normal file
View file

@ -0,0 +1,341 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HAL8188EPWRSEQ_H__
#define __HAL8188EPWRSEQ_H__
#include "pwrseqcmd.h"
/*
Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd
There are 6 HW Power States:
0: POFF--Power Off
1: PDN--Power Down
2: CARDEMU--Card Emulation
3: ACT--Active Mode
4: LPS--Low Power State
5: SUS--Suspend
The transision from different states are defined below
TRANS_CARDEMU_TO_ACT
TRANS_ACT_TO_CARDEMU
TRANS_CARDEMU_TO_SUS
TRANS_SUS_TO_CARDEMU
TRANS_CARDEMU_TO_PDN
TRANS_ACT_TO_LPS
TRANS_LPS_TO_ACT
TRANS_END
PWR SEQ Version: rtl8188E_PwrSeq_V09.h
*/
#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10
#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10
#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10
#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10
#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15
#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15
#define RTL8188E_TRANS_END_STEPS 1
#define RTL8188E_TRANS_CARDEMU_TO_ACT \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value
* },
* comment here
*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1}, \
/* wait till 0x04[17] = 1 power ready*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0|BIT1, 0}, \
/* 0x02[1:0] = 0 reset BB*/ \
{0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, \
/*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, \
/* 0x04[15] = 0 disable HWPDN (control by DRV)*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4|BIT3, 0}, \
/*0x04[12:11] = 2b'00 disable WL suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, \
/*0x04[8] = 1 polling until return 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, \
/*wait till 0x04[8] = 0*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, \
/*LDO normal mode*/ \
{0x0074, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, \
/*SDIO Driving*/
#define RTL8188E_TRANS_ACT_TO_CARDEMU \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value
* },
* comments here
*/ \
{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, \
/*0x1F[7:0] = 0 turn off RF*/ \
{0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, \
/*LDO Sleep mode*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, \
/*0x04[9] = 1 turn off MAC by HW state machine*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, \
/*wait till 0x04[9] = 0 polling until return 0 to disable*/
#define RTL8188E_TRANS_CARDEMU_TO_SUS \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, BIT3|BIT4, BIT3}, \
/* 0x04[12:11] = 2b'01enable WL suspend */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, \
/* 0x04[12:11] = 2b'11enable WL suspend for PCIe */ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, 0xFF, BIT7}, \
/* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */\
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, BIT4, 0}, \
/*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, BIT4, BIT4}, \
/*Set USB suspend enable local register 0xfe10[4]=1 */ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, \
/*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, \
/*wait power state to suspend*/
#define RTL8188E_TRANS_SUS_TO_CARDEMU \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, \
/*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, \
/*wait power state to suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, \
/*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, \
/*0x24[23] = 2b'01 schmit trigger */ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, BIT3|BIT4, BIT3}, \
/*0x04[12:11] = 2b'01 enable WL suspend*/ \
{0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, 0xFF, 0}, \
/* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */\
{0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, \
PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, \
PWR_CMD_WRITE, BIT4, 0}, \
/*Clear SIC_EN register 0x40[12] = 1'b0 */ \
{0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, \
/*Set USB suspend enable local register 0xfe10[4]=1 */ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, \
/*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, \
/*wait power state to suspend*/
#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, \
/*Set SDIO suspend local register*/ \
{0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, \
/*wait power state to suspend*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3|BIT4, 0}, \
/*0x04[12:11] = 2b'01enable WL suspend*/
#define RTL8188E_TRANS_CARDEMU_TO_PDN \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, \
/* 0x04[16] = 0*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, \
/* 0x04[15] = 1*/
#define RTL8188E_TRANS_PDN_TO_CARDEMU \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, \
/* 0x04[15] = 0*/
/* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */
#define RTL8188E_TRANS_ACT_TO_LPS \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \
{0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0}, \
/*Should be zero if no packet is transmitting*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, \
/*CCK and OFDM are disabled,and clock are gated*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, \
PWRSEQ_DELAY_US},/*Delay 1us*/ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/\
{0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, \
/*Respond TxOK to scheduler*/
#define RTL8188E_TRANS_LPS_TO_ACT \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, \
PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/ \
{0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/ \
{0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/ \
{0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, \
/* 0x08[4] = 0 switch TSF to 40M */ \
{0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, \
/* Polling 0x109[7]=0 TSF in 40M */ \
{0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6|BIT7, 0}, \
/* 0x29[7:6] = 2b'00 enable BB clock */ \
{0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, \
/* 0x101[1] = 1 */ \
{0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, \
/* 0x100[7:0] = 0xFF enable WMAC TRX */ \
{0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, \
/* 0x02[1:0] = 2b'11 enable BB macro */ \
{0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, \
PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/
#define RTL8188E_TRANS_END \
/* format
* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk,
* value },
* comments here
*/ \
{0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, \
PWR_CMD_END, 0, 0},
extern struct wl_pwr_cfg rtl8188E_power_on_flow
[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_radio_off_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_disable_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_card_enable_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_suspend_flow[
RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_resume_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_hwpdn_flow
[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_enter_lps_flow
[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS];
extern struct wl_pwr_cfg rtl8188E_leave_lps_flow
[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS];
#endif /* __HAL8188EPWRSEQ_H__ */

90
include/pwrseqcmd.h Normal file
View file

@ -0,0 +1,90 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __HALPWRSEQCMD_H__
#define __HALPWRSEQCMD_H__
#include <drv_types.h>
/* The value of cmd: 4 bits */
#define PWR_CMD_READ 0x00
#define PWR_CMD_WRITE 0x01
#define PWR_CMD_POLLING 0x02
#define PWR_CMD_DELAY 0x03
#define PWR_CMD_END 0x04
/* The value of base: 4 bits */
/* define the base address of each block */
#define PWR_BASEADDR_MAC 0x00
#define PWR_BASEADDR_USB 0x01
#define PWR_BASEADDR_PCIE 0x02
#define PWR_BASEADDR_SDIO 0x03
/* The value of interface_msk: 4 bits */
#define PWR_INTF_SDIO_MSK BIT(0)
#define PWR_INTF_USB_MSK BIT(1)
#define PWR_INTF_PCI_MSK BIT(2)
#define PWR_INTF_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/* The value of fab_msk: 4 bits */
#define PWR_FAB_TSMC_MSK BIT(0)
#define PWR_FAB_UMC_MSK BIT(1)
#define PWR_FAB_ALL_MSK (BIT(0)|BIT(1)|BIT(2)|BIT(3))
/* The value of cut_msk: 8 bits */
#define PWR_CUT_TESTCHIP_MSK BIT(0)
#define PWR_CUT_A_MSK BIT(1)
#define PWR_CUT_B_MSK BIT(2)
#define PWR_CUT_C_MSK BIT(3)
#define PWR_CUT_D_MSK BIT(4)
#define PWR_CUT_E_MSK BIT(5)
#define PWR_CUT_F_MSK BIT(6)
#define PWR_CUT_G_MSK BIT(7)
#define PWR_CUT_ALL_MSK 0xFF
enum pwrseq_cmd_delat_unit {
PWRSEQ_DELAY_US,
PWRSEQ_DELAY_MS,
};
struct wl_pwr_cfg {
u16 offset;
u8 cut_msk;
u8 fab_msk:4;
u8 interface_msk:4;
u8 base:4;
u8 cmd:4;
u8 msk;
u8 value;
};
#define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) __PWR_CMD.cut_msk
#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) __PWR_CMD.fab_msk
#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) __PWR_CMD.interface_msk
#define GET_PWR_CFG_BASE(__PWR_CMD) __PWR_CMD.base
#define GET_PWR_CFG_CMD(__PWR_CMD) __PWR_CMD.cmd
#define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
#define GET_PWR_CFG_VALUE(__PWR_CMD) __PWR_CMD.value
u8 rtl88eu_pwrseqcmdparsing(struct adapter *padapter, u8 cut_vers, u8 fab_vers,
u8 ifacetype, struct wl_pwr_cfg pwrcfgCmd[]);
#endif

15
include/recv_osdep.h
View file

@ -28,27 +28,22 @@ int _rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void _rtw_free_recv_priv(struct recv_priv *precvpriv);
s32 rtw_recv_entry(union recv_frame *precv_frame);
int rtw_recv_indicatepkt(struct adapter *adapter, union recv_frame *recv_frame);
s32 rtw_recv_entry(struct recv_frame *precv_frame);
int rtw_recv_indicatepkt(struct adapter *adapter,
struct recv_frame *recv_frame);
void rtw_recv_returnpacket(struct net_device *cnxt, struct sk_buff *retpkt);
void rtw_hostapd_mlme_rx(struct adapter *padapter, union recv_frame *recv_fr);
void rtw_handle_tkip_mic_err(struct adapter *padapter, u8 bgroup);
int rtw_init_recv_priv(struct recv_priv *precvpriv, struct adapter *padapter);
void rtw_free_recv_priv(struct recv_priv *precvpriv);
int rtw_os_recv_resource_init(struct recv_priv *recvpr, struct adapter *adapt);
int rtw_os_recv_resource_alloc(struct adapter *adapt, union recv_frame *recvfr);
void rtw_os_recv_resource_free(struct recv_priv *precvpriv);
int rtw_os_recv_resource_alloc(struct adapter *adapt,
struct recv_frame *recvfr);
int rtw_os_recvbuf_resource_alloc(struct adapter *adapt, struct recv_buf *buf);
int rtw_os_recvbuf_resource_free(struct adapter *adapt, struct recv_buf *buf);
void rtw_os_read_port(struct adapter *padapter, struct recv_buf *precvbuf);
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl);
int nat25_handle_frame(struct adapter *priv, struct sk_buff *skb);
int _netdev_open(struct net_device *pnetdev);
int netdev_open(struct net_device *pnetdev);
int netdev_close(struct net_device *pnetdev);

11
include/rf.h Normal file
View file

@ -0,0 +1,11 @@
#define RF6052_MAX_TX_PWR 0x3F
#define RF6052_MAX_REG 0x3F
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth);
void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
u8 *powerlevel);
void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
u8 *powerlevel_ofdm,
u8 *powerlevel_bw20,
u8 *powerlevel_bw40, u8 channel);

5
include/rtl8188e_cmd.h
View file

@ -112,11 +112,6 @@ u8 rtl8188e_set_raid_cmd(struct adapter *padapter, u32 mask);
void rtl8188e_Add_RateATid(struct adapter *padapter, u32 bitmap, u8 arg,
u8 rssi_level);
#ifdef CONFIG_88EU_P2P
void rtl8188e_set_p2p_ps_offload_cmd(struct adapter *adapt, u8 p2p_ps_state);
#endif /* CONFIG_88EU_P2P */
void CheckFwRsvdPageContent(struct adapter *adapt);
void rtl8188e_set_FwMediaStatus_cmd(struct adapter *adapt, __le16 mstatus_rpt);
#endif/* __RTL8188E_CMD_H__ */

1
include/rtl8188e_dm.h
View file

@ -51,7 +51,6 @@ struct dm_priv {
};
void rtl8188e_init_dm_priv(struct adapter *adapt);
void rtl8188e_deinit_dm_priv(struct adapter *adapt);
void rtl8188e_InitHalDm(struct adapter *adapt);
void rtl8188e_HalDmWatchDog(struct adapter *adapt);

71
include/rtl8188e_hal.h
View file

@ -25,15 +25,13 @@
#include "rtl8188e_spec.h"
#include "Hal8188EPhyReg.h"
#include "Hal8188EPhyCfg.h"
#include "rtl8188e_rf.h"
#include "rtl8188e_dm.h"
#include "rtl8188e_recv.h"
#include "rtl8188e_xmit.h"
#include "rtl8188e_cmd.h"
#include "Hal8188EPwrSeq.h"
#include "rtl8188e_sreset.h"
#include "pwrseq.h"
#include "rtw_efuse.h"
#include "rtw_sreset.h"
#include "odm_precomp.h"
/* Fw Array */
@ -71,45 +69,10 @@
#define MAX_PAGE_SIZE 4096 /* @ page : 4k bytes */
#define IS_FW_HEADER_EXIST(_pFwHdr) \
((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300 || \
(le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88E0)
/* This structure must be careful with byte-ordering */
struct rt_firmware_hdr {
/* 8-byte alinment required */
/* LONG WORD 0 ---- */
__le16 Signature; /* 92C0: test chip; 92C,
* 88C0: test chip; 88C1: MP A-cut;
* 92C1: MP A-cut */
u8 Category; /* AP/NIC and USB/PCI */
u8 Function; /* Reserved for different FW function
* indcation, for further use when
* driver needs to download different
* FW for different conditions */
__le16 Version; /* FW Version */
u8 Subversion; /* FW Subversion, default 0x00 */
u16 Rsvd1;
/* LONG WORD 1 ---- */
u8 Month; /* Release time Month field */
u8 Date; /* Release time Date field */
u8 Hour; /* Release time Hour field */
u8 Minute; /* Release time Minute field */
__le16 RamCodeSize; /* The size of RAM code */
u8 Foundry;
u8 Rsvd2;
/* LONG WORD 2 ---- */
__le32 SvnIdx; /* The SVN entry index */
u32 Rsvd3;
/* LONG WORD 3 ---- */
u32 Rsvd4;
u32 Rsvd5;
};
((le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x92C0 || \
(le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x88C0 || \
(le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x2300 || \
(le16_to_cpu(_pFwHdr->signature)&0xFFF0) == 0x88E0)
#define DRIVER_EARLY_INT_TIME 0x05
#define BCN_DMA_ATIME_INT_TIME 0x02
@ -241,10 +204,10 @@ enum rt_regulator_mode {
struct hal_data_8188e {
struct HAL_VERSION VersionID;
enum rt_multi_func MultiFunc; /* For multi-function consideration. */
enum rt_regulator_mode RegulatorMode; /* switching regulator or LDO */
u16 CustomerID;
u8 *pfirmware;
u32 fwsize;
u16 FirmwareVersion;
u16 FirmwareVersionRev;
u16 FirmwareSubVersion;
@ -387,10 +350,6 @@ struct hal_data_8188e {
u16 EfuseUsedBytes;
#ifdef CONFIG_88EU_P2P
struct P2P_PS_Offload_t p2p_ps_offload;
#endif
/* Auto FSM to Turn On, include clock, isolation, power control
* for MAC only */
u8 bMacPwrCtrlOn;
@ -425,7 +384,6 @@ struct hal_data_8188e {
(GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS)
/* rtl8188e_hal_init.c */
s32 rtl8188e_FirmwareDownload(struct adapter *padapter);
void _8051Reset88E(struct adapter *padapter);
void rtl8188e_InitializeFirmwareVars(struct adapter *padapter);
@ -445,9 +403,9 @@ void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo,
bool AutoLoadFail);
void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter,u8 *PROMContent,
void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent,
bool AutoLoadFail);
void Hal_ReadThermalMeter_88E(struct adapter * dapter, u8 *PROMContent,
void Hal_ReadThermalMeter_88E(struct adapter *dapter, u8 *PROMContent,
bool AutoloadFail);
void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
@ -456,21 +414,16 @@ void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo,
void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo,
bool AutoLoadFail);
bool HalDetectPwrDownMode88E(struct adapter *Adapter);
void Hal_InitChannelPlan(struct adapter *padapter);
void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
/* register */
void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
void rtl8188e_clone_haldata(struct adapter *dst, struct adapter *src);
void rtl8188e_start_thread(struct adapter *padapter);
void rtl8188e_stop_thread(struct adapter *padapter);
void rtw_IOL_cmd_tx_pkt_buf_dump(struct adapter *Adapter, int len);
s32 iol_execute(struct adapter *padapter, u8 control);
void iol_mode_enable(struct adapter *padapter, u8 enable);
s32 rtl8188e_iol_efuse_patch(struct adapter *padapter);
void rtw_cancel_all_timer(struct adapter *padapter);
void _ps_open_RF(struct adapter *adapt);
#endif /* __RTL8188E_HAL_H__ */

14
include/rtl8188e_recv.h
View file

@ -56,14 +56,14 @@ enum rx_packet_type {
};
#define INTERRUPT_MSG_FORMAT_LEN 60
void rtl8188eu_init_recvbuf(struct adapter *padapter, struct recv_buf *buf);
s32 rtl8188eu_init_recv_priv(struct adapter *padapter);
void rtl8188eu_free_recv_priv(struct adapter * padapter);
void rtl8188eu_recv_hdl(struct adapter * padapter, struct recv_buf *precvbuf);
void rtl8188eu_free_recv_priv(struct adapter *padapter);
void rtl8188eu_recv_hdl(struct adapter *padapter, struct recv_buf *precvbuf);
void rtl8188eu_recv_tasklet(void *priv);
void rtl8188e_query_rx_phy_status(union recv_frame *fr, struct phy_stat *phy);
void rtl8188e_process_phy_info(struct adapter * padapter, void *prframe);
void update_recvframe_phyinfo_88e(union recv_frame *fra, struct phy_stat *phy);
void update_recvframe_attrib_88e(union recv_frame *fra, struct recv_stat *stat);
void rtl8188e_query_rx_phy_status(struct recv_frame *fr, struct phy_stat *phy);
void rtl8188e_process_phy_info(struct adapter *padapter, void *prframe);
void update_recvframe_phyinfo_88e(struct recv_frame *fra, struct phy_stat *phy);
void update_recvframe_attrib_88e(struct recv_frame *fra,
struct recv_stat *stat);
#endif

70
include/rtl8188e_spec.h
View file

@ -68,7 +68,7 @@
#define DISABLE_TRXPKT_BUF_ACCESS 0x0
/* 0x0000h ~ 0x00FFh System Configuration */
/* 0x0000h ~ 0x00FFh System Configuration */
#define REG_SYS_ISO_CTRL 0x0000
#define REG_SYS_FUNC_EN 0x0002
#define REG_APS_FSMCO 0x0004
@ -142,7 +142,7 @@
#define REG_MAC_PHY_CTRL_NORMAL 0x00f8
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
#define REG_CR 0x0100
#define REG_PBP 0x0104
#define REG_PKT_BUFF_ACCESS_CTRL 0x0106
@ -188,7 +188,7 @@
#define REG_LLT_INIT 0x01E0
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
#define REG_RQPN 0x0200
#define REG_FIFOPAGE 0x0204
#define REG_TDECTRL 0x0208
@ -196,12 +196,12 @@
#define REG_TXDMA_STATUS 0x0210
#define REG_RQPN_NPQ 0x0214
/* 0x0280h ~ 0x02FFh RXDMA Configuration */
/* 0x0280h ~ 0x02FFh RXDMA Configuration */
#define REG_RXDMA_AGG_PG_TH 0x0280
#define REG_RXPKT_NUM 0x0284
#define REG_RXDMA_STATUS 0x0288
/* 0x0300h ~ 0x03FFh PCIe */
/* 0x0300h ~ 0x03FFh PCIe */
#define REG_PCIE_CTRL_REG 0x0300
#define REG_INT_MIG 0x0304 /* Interrupt Migration */
#define REG_BCNQ_DESA 0x0308 /* TX Beacon Descr Address */
@ -222,7 +222,7 @@
#define REG_PCIE_HISR 0x03A0
/* spec version 11 */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
#define REG_VOQ_INFORMATION 0x0400
#define REG_VIQ_INFORMATION 0x0404
#define REG_BEQ_INFORMATION 0x0408
@ -276,7 +276,7 @@
#define REG_TX_RPT_TIME 0x04F0 /* 2 byte */
#define REG_DUMMY 0x04FC
/* 0x0500h ~ 0x05FFh EDCA Configuration */
/* 0x0500h ~ 0x05FFh EDCA Configuration */
#define REG_EDCA_VO_PARAM 0x0500
#define REG_EDCA_VI_PARAM 0x0504
#define REG_EDCA_BE_PARAM 0x0508
@ -294,16 +294,16 @@
#define REG_DIS_TXREQ_CLR 0x0523
#define REG_RD_CTRL 0x0524
/* Format for offset 540h-542h: */
/* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting
/* [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting
* beacon content before TBTT. */
/* [7:4]: Reserved. */
/* [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding
/* [7:4]: Reserved. */
/* [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding
* to send the beacon packet. */
/* [23:20]: Reserved */
/* [23:20]: Reserved */
/* Description: */
/* | */
/* | */
/* |<--Setup--|--Hold------------>| */
/* --------------|---------------------- */
/* --------------|---------------------- */
/* | */
/* TBTT */
/* Note: We cannot update beacon content to HW or send any AC packets during
@ -335,7 +335,7 @@
#define REG_FW_RESET_TSF_CNT_0 0x05FD
#define REG_FW_BCN_DIS_CNT 0x05FE
/* 0x0600h ~ 0x07FFh WMAC Configuration */
/* 0x0600h ~ 0x07FFh WMAC Configuration */
#define REG_APSD_CTRL 0x0600
#define REG_BWOPMODE 0x0603
#define REG_TCR 0x0604
@ -382,7 +382,7 @@
#define _RXERR_RPT_SEL(type) ((type) << 28)
/* Note: */
/* The NAV upper value is very important to WiFi 11n 5.2.3 NAV test.
/* The NAV upper value is very important to WiFi 11n 5.2.3 NAV test.
* The default value is always too small, but the WiFi TestPlan test
* by 25,000 microseconds of NAV through sending CTS in the air.
* We must update this value greater than 25,000 microseconds to pass
@ -422,7 +422,7 @@
#define REG_MACID1 0x0700
#define REG_BSSID1 0x0708
/* 0xFE00h ~ 0xFE55h USB Configuration */
/* 0xFE00h ~ 0xFE55h USB Configuration */
#define REG_USB_INFO 0xFE17
#define REG_USB_SPECIAL_OPTION 0xFE55
#define REG_USB_DMA_AGG_TO 0xFE5B
@ -689,13 +689,13 @@ Current IOREG MAP
0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes)
0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes)
*/
/* 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) */
/* 8192C (TXPAUSE) transmission pause (Offset 0x522, 8 bits) */
/* Note: */
/* The bits of stopping AC(VO/VI/BE/BK) queue in datasheet
/* The bits of stopping AC(VO/VI/BE/BK) queue in datasheet
* RTL8192S/RTL8192C are wrong, */
/* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2,
/* the correct arragement is VO - Bit0, VI - Bit1, BE - Bit2,
* and BK - Bit3. */
/* 8723 and 88E may be not correct either in the earlier version. */
/* 8723 and 88E may be not correct either in the earlier version. */
#define StopBecon BIT6
#define StopHigh BIT5
#define StopMgt BIT4
@ -733,7 +733,7 @@ Current IOREG MAP
#define RCR_MXDMA_OFFSET 8
#define RCR_FIFO_OFFSET 13
/* 0xFE00h ~ 0xFE55h USB Configuration */
/* 0xFE00h ~ 0xFE55h USB Configuration */
#define REG_USB_INFO 0xFE17
#define REG_USB_SPECIAL_OPTION 0xFE55
#define REG_USB_DMA_AGG_TO 0xFE5B
@ -743,7 +743,7 @@ Current IOREG MAP
#define REG_USB_HRPWM 0xFE58
#define REG_USB_HCPWM 0xFE57
/* 8192C Regsiter Bit and Content definition */
/* 0x0000h ~ 0x00FFh System Configuration */
/* 0x0000h ~ 0x00FFh System Configuration */
/* 2 SYS_ISO_CTRL */
#define ISO_MD2PP BIT(0)
@ -914,7 +914,7 @@ Current IOREG MAP
/* 2SYS_CFG */
#define RTL_ID BIT(23) /* TestChip ID, 1:Test(RLE); 0:MP(RL) */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
/* 0x0100h ~ 0x01FFh MACTOP General Configuration */
/* 2 Function Enable Registers */
/* 2 CR */
@ -975,9 +975,9 @@ Current IOREG MAP
#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14)
#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12)
#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10)
#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 )
#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 )
#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 )
#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8)
#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6)
#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4)
#define QUEUE_LOW 1
#define QUEUE_NORMAL 2
@ -995,7 +995,7 @@ Current IOREG MAP
#define _LLT_OP(x) (((x) & 0x3) << 30)
#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3)
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
/* 0x0200h ~ 0x027Fh TXDMA Configuration */
/* 2RQPN */
#define _HPQ(x) ((x) & 0xFF)
#define _LPQ(x) (((x) & 0xFF) << 8)
@ -1019,7 +1019,7 @@ Current IOREG MAP
/* 2 TXDMA_OFFSET_CHK */
#define DROP_DATA_EN BIT(9)
/* 0x0280h ~ 0x028Bh RX DMA Configuration */
/* 0x0280h ~ 0x028Bh RX DMA Configuration */
/* REG_RXDMA_CONTROL, 0x0286h */
@ -1028,7 +1028,7 @@ Current IOREG MAP
#define RXDMA_IDLE BIT(17)
#define RW_RELEASE_EN BIT(18)
/* 0x0400h ~ 0x047Fh Protocol Configuration */
/* 0x0400h ~ 0x047Fh Protocol Configuration */
/* 2 FWHW_TXQ_CTRL */
#define EN_AMPDU_RTY_NEW BIT(7)
@ -1040,7 +1040,7 @@ Current IOREG MAP
#define RETRY_LIMIT_SHORT_SHIFT 8
#define RETRY_LIMIT_LONG_SHIFT 0
/* 0x0500h ~ 0x05FFh EDCA Configuration */
/* 0x0500h ~ 0x05FFh EDCA Configuration */
/* 2 EDCA setting */
#define AC_PARAM_TXOP_LIMIT_OFFSET 16
@ -1071,7 +1071,7 @@ Current IOREG MAP
#define AcmHw_ViqStatus BIT(5)
#define AcmHw_VoqStatus BIT(6)
/* 0x0600h ~ 0x07FFh WMAC Configuration */
/* 0x0600h ~ 0x07FFh WMAC Configuration */
/* 2APSD_CTRL */
#define APSDOFF BIT(6)
#define APSDOFF_STATUS BIT(7)
@ -1128,7 +1128,7 @@ Current IOREG MAP
#define SCR_TXBCUSEDK BIT(6) /* Force Tx Bcast pkt Use Default Key */
#define SCR_RXBCUSEDK BIT(7) /* Force Rx Bcast pkt Use Default Key */
/* RTL8188E SDIO Configuration */
/* RTL8188E SDIO Configuration */
/* I/O bus domain address mapping */
#define SDIO_LOCAL_BASE 0x10250000
@ -1264,7 +1264,7 @@ Current IOREG MAP
#define SDIO_TX_FREE_PG_QUEUE 4
#define SDIO_TX_FIFO_PAGE_SZ 128
/* 0xFE00h ~ 0xFE55h USB Configuration */
/* 0xFE00h ~ 0xFE55h USB Configuration */
/* 2 USB Information (0xFE17) */
#define USB_IS_HIGH_SPEED 0
@ -1331,7 +1331,7 @@ Current IOREG MAP
/* 8192C EEPROM/EFUSE share register definition. */
/* EEPROM/Efuse PG Offset for 88EE/88EU/88ES */
/* EEPROM/Efuse PG Offset for 88EE/88EU/88ES */
#define EEPROM_TX_PWR_INX_88E 0x10
#define EEPROM_ChannelPlan_88E 0xB8
@ -1362,7 +1362,7 @@ Current IOREG MAP
/* RTL88ES */
#define EEPROM_MAC_ADDR_88ES 0x11A
/* EEPROM/Efuse Value Type */
/* EEPROM/Efuse Value Type */
#define EETYPE_TX_PWR 0x0
/* Default Value for EEPROM or EFUSE!!! */

1
include/rtl8188e_xmit.h
View file

@ -159,7 +159,6 @@ struct txrpt_ccx_88e {
void rtl8188e_fill_fake_txdesc(struct adapter *padapter, u8 *pDesc,
u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull);
s32 rtl8188eu_init_xmit_priv(struct adapter *padapter);
void rtl8188eu_free_xmit_priv(struct adapter *padapter);
s32 rtl8188eu_hal_xmit(struct adapter *padapter, struct xmit_frame *frame);
s32 rtl8188eu_mgnt_xmit(struct adapter *padapter, struct xmit_frame *frame);
s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter);

652
include/rtw_cmd.h
View file

@ -24,16 +24,11 @@
#include <rtw_rf.h>
#include <rtw_led.h>
#define C2H_MEM_SZ (16*1024)
#include <osdep_service.h>
#include <ieee80211.h> /* <ieee80211/ieee80211.h> */
#define FREE_CMDOBJ_SZ 128
#define MAX_CMDSZ 1024
#define MAX_RSPSZ 512
#define MAX_EVTSZ 1024
#define CMDBUFF_ALIGN_SZ 512
@ -52,32 +47,13 @@ struct cmd_priv {
struct semaphore cmd_queue_sema;
struct semaphore terminate_cmdthread_sema;
struct __queue cmd_queue;
u8 cmd_seq;
u8 *cmd_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *cmd_allocated_buf;
u8 *rsp_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *rsp_allocated_buf;
u32 cmd_issued_cnt;
u32 cmd_done_cnt;
u32 rsp_cnt;
u8 cmdthd_running;
struct adapter *padapter;
};
struct evt_priv {
struct work_struct c2h_wk;
bool c2h_wk_alive;
struct rtw_cbuf *c2h_queue;
#define C2H_QUEUE_MAX_LEN 10
ATOMIC_T event_seq;
u8 *evt_buf; /* shall be non-paged, and 4 bytes aligned */
u8 *evt_allocated_buf;
u32 evt_done_cnt;
};
#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \
do {\
_rtw_init_listhead(&pcmd->list);\
INIT_LIST_HEAD(&pcmd->list);\
pcmd->cmdcode = code;\
pcmd->parmbuf = (u8 *)(pparm);\
pcmd->cmdsz = sizeof(*pparm);\
@ -85,31 +61,13 @@ do {\
pcmd->rspsz = 0;\
} while (0)
struct c2h_evt_hdr {
u8 id:4;
u8 plen:4;
u8 seq;
u8 payload[0];
};
#define c2h_evt_exist(c2h_evt) ((c2h_evt)->id || (c2h_evt)->plen)
u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj);
struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv);
struct cmd_obj *rtw_dequeue_cmd(struct __queue *queue);
void rtw_free_cmd_obj(struct cmd_obj *pcmd);
int rtw_cmd_thread(void *context);
u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
void rtw_free_cmd_priv(struct cmd_priv *pcmdpriv);
u32 rtw_init_evt_priv(struct evt_priv *pevtpriv);
void rtw_free_evt_priv(struct evt_priv *pevtpriv);
void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv);
void rtw_evt_notify_isr(struct evt_priv *pevtpriv);
#ifdef CONFIG_88EU_P2P
u8 p2p_protocol_wk_cmd(struct adapter *padapter, int intCmdType);
#endif /* CONFIG_88EU_P2P */
int rtw_init_cmd_priv(struct cmd_priv *pcmdpriv);
enum rtw_drvextra_cmd_id {
NONE_WK_CID,
@ -146,39 +104,6 @@ enum RFINTFS {
/*
Caller Mode: Infra, Ad-HoC(C)
Notes: To enter USB suspend mode
Command Mode
*/
struct usb_suspend_parm {
u32 action;/* 1: sleep, 0:resume */
};
/*
Caller Mode: Infra, Ad-HoC
Notes: To join a known BSS.
Command-Event Mode
*/
/*
Caller Mode: Infra, Ad-Hoc
Notes: To join the specified bss
Command Event Mode
*/
struct joinbss_parm {
struct wlan_bssid_ex network;
};
/*
Caller Mode: Infra, Ad-HoC(C)
Notes: To disconnect the current associated BSS
Command Mode
@ -188,17 +113,6 @@ struct disconnect_parm {
u32 deauth_timeout_ms;
};
/*
Caller Mode: AP, Ad-HoC(M)
Notes: To create a BSS
Command Mode
*/
struct createbss_parm {
struct wlan_bssid_ex network;
};
struct setopmode_parm {
u8 mode;
u8 rsvd[3];
@ -328,161 +242,6 @@ struct setstapwrstate_parm {
u8 hwaddr[6];
};
/*
Caller Mode: Any
Notes: To setup the basic rate of RTL8711
Command Mode
*/
struct setbasicrate_parm {
u8 basicrates[NumRates];
};
/*
Caller Mode: Any
Notes: To read the current basic rate
Command-Rsp Mode
*/
struct getbasicrate_parm {
u32 rsvd;
};
struct getbasicrate_rsp {
u8 basicrates[NumRates];
};
/*
Caller Mode: Any
Notes: To setup the data rate of RTL8711
Command Mode
*/
struct setdatarate_parm {
u8 mac_id;
u8 datarates[NumRates];
};
/*
Caller Mode: Any
Notes: To read the current data rate
Command-Rsp Mode
*/
struct getdatarate_parm {
u32 rsvd;
};
struct getdatarate_rsp {
u8 datarates[NumRates];
};
/*
Caller Mode: Any
AP: AP can use the info for the contents of beacon frame
Infra: STA can use the info when sitesurveying
Ad-HoC(M): Like AP
Ad-HoC(C): Like STA
Notes: To set the phy capability of the NIC
Command Mode
*/
struct setphyinfo_parm {
struct regulatory_class class_sets[NUM_REGULATORYS];
u8 status;
};
struct getphyinfo_parm {
u32 rsvd;
};
struct getphyinfo_rsp {
struct regulatory_class class_sets[NUM_REGULATORYS];
u8 status;
};
/*
Caller Mode: Any
Notes: To set the channel/modem/band
This command will be used when channel/modem/band is changed.
Command Mode
*/
struct setphy_parm {
u8 rfchannel;
u8 modem;
};
/*
Caller Mode: Any
Notes: To get the current setting of channel/modem/band
Command-Rsp Mode
*/
struct getphy_parm {
u32 rsvd;
};
struct getphy_rsp {
u8 rfchannel;
u8 modem;
};
struct readBB_parm {
u8 offset;
};
struct readBB_rsp {
u8 value;
};
struct readTSSI_parm {
u8 offset;
};
struct readTSSI_rsp {
u8 value;
};
struct writeBB_parm {
u8 offset;
u8 value;
};
struct readRF_parm {
u8 offset;
};
struct readRF_rsp {
u32 value;
};
struct writeRF_parm {
u32 offset;
u32 value;
};
struct getrfintfs_parm {
u8 rfintfs;
};
struct Tx_Beacon_param
{
struct wlan_bssid_ex network;
};
/*
Notes: This command is used for H2C/C2H loopback testing
@ -541,167 +300,6 @@ struct drvextra_cmd_parm {
unsigned char *pbuf;
};
/*------------------- Below are used for RF/BB tunning ---------------------*/
struct setantenna_parm {
u8 tx_antset;
u8 rx_antset;
u8 tx_antenna;
u8 rx_antenna;
};
struct enrateadaptive_parm {
u32 en;
};
struct settxagctbl_parm {
u32 txagc[MAX_RATES_LENGTH];
};
struct gettxagctbl_parm {
u32 rsvd;
};
struct gettxagctbl_rsp {
u32 txagc[MAX_RATES_LENGTH];
};
struct setagcctrl_parm {
u32 agcctrl; /* 0: pure hw, 1: fw */
};
struct setssup_parm {
u32 ss_ForceUp[MAX_RATES_LENGTH];
};
struct getssup_parm {
u32 rsvd;
};
struct getssup_rsp {
u8 ss_ForceUp[MAX_RATES_LENGTH];
};
struct setssdlevel_parm {
u8 ss_DLevel[MAX_RATES_LENGTH];
};
struct getssdlevel_parm {
u32 rsvd;
};
struct getssdlevel_rsp {
u8 ss_DLevel[MAX_RATES_LENGTH];
};
struct setssulevel_parm {
u8 ss_ULevel[MAX_RATES_LENGTH];
};
struct getssulevel_parm {
u32 rsvd;
};
struct getssulevel_rsp {
u8 ss_ULevel[MAX_RATES_LENGTH];
};
struct setcountjudge_parm {
u8 count_judge[MAX_RATES_LENGTH];
};
struct getcountjudge_parm {
u32 rsvd;
};
struct getcountjudge_rsp {
u8 count_judge[MAX_RATES_LENGTH];
};
struct setratable_parm {
u8 ss_ForceUp[NumRates];
u8 ss_ULevel[NumRates];
u8 ss_DLevel[NumRates];
u8 count_judge[NumRates];
};
struct getratable_parm {
uint rsvd;
};
struct getratable_rsp {
u8 ss_ForceUp[NumRates];
u8 ss_ULevel[NumRates];
u8 ss_DLevel[NumRates];
u8 count_judge[NumRates];
};
/* to get TX,RX retry count */
struct gettxretrycnt_parm {
unsigned int rsvd;
};
struct gettxretrycnt_rsp {
unsigned long tx_retrycnt;
};
struct getrxretrycnt_parm {
unsigned int rsvd;
};
struct getrxretrycnt_rsp {
unsigned long rx_retrycnt;
};
/* to get BCNOK,BCNERR count */
struct getbcnokcnt_parm {
unsigned int rsvd;
};
struct getbcnokcnt_rsp {
unsigned long bcnokcnt;
};
struct getbcnerrcnt_parm {
unsigned int rsvd;
};
struct getbcnerrcnt_rsp {
unsigned long bcnerrcnt;
};
/* to get current TX power level */
struct getcurtxpwrlevel_parm {
unsigned int rsvd;
};
struct getcurtxpwrlevel_rspi {
unsigned short tx_power;
};
struct setprobereqextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct setassocreqextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct setproberspextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct setassocrspextraie_parm {
unsigned char e_id;
unsigned char ie_len;
unsigned char ie[0];
};
struct addBaReq_parm {
unsigned int tid;
u8 addr[ETH_ALEN];
@ -715,30 +313,10 @@ struct set_ch_parm {
};
/*H2C Handler index: 59 */
struct SetChannelPlan_param
{
struct SetChannelPlan_param {
u8 channel_plan;
};
/*H2C Handler index: 60 */
struct LedBlink_param
{
struct LED_871x *pLed;
};
/*H2C Handler index: 61 */
struct SetChannelSwitch_param
{
u8 new_ch_no;
};
/*H2C Handler index: 62 */
struct TDLSoption_param
{
u8 addr[ETH_ALEN];
u8 option;
};
#define GEN_CMD_CODE(cmd) cmd ## _CMD_
/*
@ -752,75 +330,46 @@ Result:
*/
#define H2C_RSP_OFFSET 512
#define H2C_SUCCESS 0x00
#define H2C_SUCCESS_RSP 0x01
#define H2C_DUPLICATED 0x02
#define H2C_DROPPED 0x03
#define H2C_PARAMETERS_ERROR 0x04
#define H2C_REJECTED 0x05
#define H2C_CMD_OVERFLOW 0x06
#define H2C_RESERVED 0x07
u8 rtw_setassocsta_cmd(struct adapter *padapter, u8 *mac_addr);
u8 rtw_setstandby_cmd(struct adapter *padapter, uint action);
u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid,
u8 rtw_sitesurvey_cmd(struct adapter *padapter, struct ndis_802_11_ssid *ssid,
int ssid_num, struct rtw_ieee80211_channel *ch,
int ch_num);
u8 rtw_createbss_cmd(struct adapter *padapter);
u8 rtw_createbss_cmd_ex(struct adapter *padapter, unsigned char *pbss,
unsigned int sz);
u8 rtw_setphy_cmd(struct adapter *padapter, u8 modem, u8 ch);
u8 rtw_createbss_cmd(struct adapter *padapter);
u8 rtw_setstakey_cmd(struct adapter *padapter, u8 *psta, u8 unicast_key);
u8 rtw_clearstakey_cmd(struct adapter *padapter, u8 *psta, u8 entry, u8 enqueue);
u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network* pnetwork);
u8 rtw_disassoc_cmd(struct adapter *padapter, u32 deauth_timeout_ms, bool enqueue);
u8 rtw_setopmode_cmd(struct adapter *padapter, enum ndis_802_11_network_infra networktype);
u8 rtw_setdatarate_cmd(struct adapter *padapter, u8 *rateset);
u8 rtw_setbasicrate_cmd(struct adapter *padapter, u8 *rateset);
u8 rtw_setbbreg_cmd(struct adapter * padapter, u8 offset, u8 val);
u8 rtw_setrfreg_cmd(struct adapter * padapter, u8 offset, u32 val);
u8 rtw_getbbreg_cmd(struct adapter * padapter, u8 offset, u8 * pval);
u8 rtw_getrfreg_cmd(struct adapter * padapter, u8 offset, u8 * pval);
u8 rtw_setrfintfs_cmd(struct adapter *padapter, u8 mode);
u8 rtw_setrttbl_cmd(struct adapter *padapter, struct setratable_parm *prate_table);
u8 rtw_getrttbl_cmd(struct adapter *padapter, struct getratable_rsp *pval);
u8 rtw_gettssi_cmd(struct adapter *padapter, u8 offset,u8 *pval);
u8 rtw_setfwdig_cmd(struct adapter*padapter, u8 type);
u8 rtw_setfwra_cmd(struct adapter*padapter, u8 type);
u8 rtw_addbareq_cmd(struct adapter*padapter, u8 tid, u8 *addr);
u8 rtw_clearstakey_cmd(struct adapter *padapter, u8 *psta, u8 entry,
u8 enqueue);
u8 rtw_joinbss_cmd(struct adapter *padapter, struct wlan_network *pnetwork);
u8 rtw_disassoc_cmd(struct adapter *padapter, u32 deauth_timeout_ms,
bool enqueue);
u8 rtw_setopmode_cmd(struct adapter *padapter,
enum ndis_802_11_network_infra networktype);
u8 rtw_addbareq_cmd(struct adapter *padapter, u8 tid, u8 *addr);
u8 rtw_dynamic_chk_wk_cmd(struct adapter *adapter);
u8 rtw_lps_ctrl_wk_cmd(struct adapter*padapter, u8 lps_ctrl_type, u8 enqueue);
u8 rtw_rpt_timer_cfg_cmd(struct adapter*padapter, u16 minRptTime);
u8 rtw_lps_ctrl_wk_cmd(struct adapter *padapter, u8 lps_ctrl_type, u8 enqueue);
u8 rtw_rpt_timer_cfg_cmd(struct adapter *padapter, u16 minRptTime);
u8 rtw_antenna_select_cmd(struct adapter*padapter, u8 antenna,u8 enqueue);
u8 rtw_ps_cmd(struct adapter*padapter);
u8 rtw_antenna_select_cmd(struct adapter *padapter, u8 antenna, u8 enqueue);
u8 rtw_ps_cmd(struct adapter *padapter);
#ifdef CONFIG_88EU_AP_MODE
u8 rtw_chk_hi_queue_cmd(struct adapter*padapter);
u8 rtw_chk_hi_queue_cmd(struct adapter *padapter);
#endif
u8 rtw_set_ch_cmd(struct adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue);
u8 rtw_set_chplan_cmd(struct adapter*padapter, u8 chplan, u8 enqueue);
u8 rtw_led_blink_cmd(struct adapter*padapter, struct LED_871x * pLed);
u8 rtw_set_csa_cmd(struct adapter*padapter, u8 new_ch_no);
u8 rtw_tdls_cmd(struct adapter *padapter, u8 *addr, u8 option);
u8 rtw_c2h_wk_cmd(struct adapter *padapter, u8 *c2h_evt);
u8 rtw_set_chplan_cmd(struct adapter *padapter, u8 chplan, u8 enqueue);
u8 rtw_drvextra_cmd_hdl(struct adapter *padapter, unsigned char *pbuf);
void rtw_survey_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_disassoc_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_joinbss_cmd_callback(struct adapter *padapter, struct cmd_obj *pcmd);
void rtw_createbss_cmd_callback(struct adapter *adapt, struct cmd_obj *pcmd);
void rtw_getbbrfreg_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_readtssi_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_readtssi_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_setstaKey_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cmd);
void rtw_setassocsta_cmdrsp_callback(struct adapter *adapt, struct cmd_obj *cm);
@ -832,159 +381,42 @@ struct _cmd_callback {
};
enum rtw_h2c_cmd {
GEN_CMD_CODE(_Read_MACREG), /*0*/
GEN_CMD_CODE(_Write_MACREG),
GEN_CMD_CODE(_Read_BBREG),
GEN_CMD_CODE(_Write_BBREG),
GEN_CMD_CODE(_Read_RFREG),
GEN_CMD_CODE(_Write_RFREG), /*5*/
GEN_CMD_CODE(_Read_EEPROM),
GEN_CMD_CODE(_Write_EEPROM),
GEN_CMD_CODE(_Read_EFUSE),
GEN_CMD_CODE(_Write_EFUSE),
GEN_CMD_CODE(_Read_CAM), /*10*/
GEN_CMD_CODE(_Write_CAM),
GEN_CMD_CODE(_setBCNITV),
GEN_CMD_CODE(_setMBIDCFG),
GEN_CMD_CODE(_JoinBss), /*14*/
GEN_CMD_CODE(_DisConnect), /*15*/
GEN_CMD_CODE(_JoinBss),
GEN_CMD_CODE(_DisConnect),
GEN_CMD_CODE(_CreateBss),
GEN_CMD_CODE(_SetOpMode),
GEN_CMD_CODE(_SiteSurvey), /*18*/
GEN_CMD_CODE(_SiteSurvey),
GEN_CMD_CODE(_SetAuth),
GEN_CMD_CODE(_SetKey), /*20*/
GEN_CMD_CODE(_SetKey),
GEN_CMD_CODE(_SetStaKey),
GEN_CMD_CODE(_SetAssocSta),
GEN_CMD_CODE(_DelAssocSta),
GEN_CMD_CODE(_SetStaPwrState),
GEN_CMD_CODE(_SetBasicRate), /*25*/
GEN_CMD_CODE(_GetBasicRate),
GEN_CMD_CODE(_SetDataRate),
GEN_CMD_CODE(_GetDataRate),
GEN_CMD_CODE(_SetPhyInfo),
GEN_CMD_CODE(_GetPhyInfo), /*30*/
GEN_CMD_CODE(_SetPhy),
GEN_CMD_CODE(_GetPhy),
GEN_CMD_CODE(_readRssi),
GEN_CMD_CODE(_readGain),
GEN_CMD_CODE(_SetAtim), /*35*/
GEN_CMD_CODE(_SetPwrMode),
GEN_CMD_CODE(_JoinbssRpt),
GEN_CMD_CODE(_SetRaTable),
GEN_CMD_CODE(_GetRaTable),
GEN_CMD_CODE(_GetCCXReport), /*40*/
GEN_CMD_CODE(_GetDTMReport),
GEN_CMD_CODE(_GetTXRateStatistics),
GEN_CMD_CODE(_SetUsbSuspend),
GEN_CMD_CODE(_SetH2cLbk),
GEN_CMD_CODE(_AddBAReq), /*45*/
GEN_CMD_CODE(_SetChannel), /*46*/
GEN_CMD_CODE(_SetTxPower),
GEN_CMD_CODE(_SwitchAntenna),
GEN_CMD_CODE(_SetCrystalCap),
GEN_CMD_CODE(_SetSingleCarrierTx), /*50*/
GEN_CMD_CODE(_SetSingleToneTx),/*51*/
GEN_CMD_CODE(_SetCarrierSuppressionTx),
GEN_CMD_CODE(_SetContinuousTx),
GEN_CMD_CODE(_SwitchBandwidth), /*54*/
GEN_CMD_CODE(_TX_Beacon), /*55*/
GEN_CMD_CODE(_Set_MLME_EVT), /*56*/
GEN_CMD_CODE(_Set_Drv_Extra), /*57*/
GEN_CMD_CODE(_Set_H2C_MSG), /*58*/
GEN_CMD_CODE(_SetChannelPlan), /*59*/
GEN_CMD_CODE(_LedBlink), /*60*/
GEN_CMD_CODE(_SetChannelSwitch), /*61*/
GEN_CMD_CODE(_TDLS), /*62*/
GEN_CMD_CODE(_AddBAReq),
GEN_CMD_CODE(_SetChannel),
GEN_CMD_CODE(_TX_Beacon),
GEN_CMD_CODE(_Set_MLME_EVT),
GEN_CMD_CODE(_Set_Drv_Extra),
GEN_CMD_CODE(_SetChannelPlan),
MAX_H2CCMD
};
#define _GetBBReg_CMD_ _Read_BBREG_CMD_
#define _SetBBReg_CMD_ _Write_BBREG_CMD_
#define _GetRFReg_CMD_ _Read_RFREG_CMD_
#define _SetRFReg_CMD_ _Write_RFREG_CMD_
#ifdef _RTW_CMD_C_
static struct _cmd_callback rtw_cmd_callback[] =
{
{GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/
{GEN_CMD_CODE(_Write_MACREG), NULL},
{GEN_CMD_CODE(_Read_BBREG), &rtw_getbbrfreg_cmdrsp_callback},
{GEN_CMD_CODE(_Write_BBREG), NULL},
{GEN_CMD_CODE(_Read_RFREG), &rtw_getbbrfreg_cmdrsp_callback},
{GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/
{GEN_CMD_CODE(_Read_EEPROM), NULL},
{GEN_CMD_CODE(_Write_EEPROM), NULL},
{GEN_CMD_CODE(_Read_EFUSE), NULL},
{GEN_CMD_CODE(_Write_EFUSE), NULL},
{GEN_CMD_CODE(_Read_CAM), NULL}, /*10*/
{GEN_CMD_CODE(_Write_CAM), NULL},
{GEN_CMD_CODE(_setBCNITV), NULL},
{GEN_CMD_CODE(_setMBIDCFG), NULL},
{GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback}, /*14*/
{GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback}, /*15*/
static struct _cmd_callback rtw_cmd_callback[] = {
{GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback},
{GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback},
{GEN_CMD_CODE(_CreateBss), &rtw_createbss_cmd_callback},
{GEN_CMD_CODE(_SetOpMode), NULL},
{GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback}, /*18*/
{GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback},
{GEN_CMD_CODE(_SetAuth), NULL},
{GEN_CMD_CODE(_SetKey), NULL}, /*20*/
{GEN_CMD_CODE(_SetKey), NULL},
{GEN_CMD_CODE(_SetStaKey), &rtw_setstaKey_cmdrsp_callback},
{GEN_CMD_CODE(_SetAssocSta), &rtw_setassocsta_cmdrsp_callback},
{GEN_CMD_CODE(_DelAssocSta), NULL},
{GEN_CMD_CODE(_SetStaPwrState), NULL},
{GEN_CMD_CODE(_SetBasicRate), NULL}, /*25*/
{GEN_CMD_CODE(_GetBasicRate), NULL},
{GEN_CMD_CODE(_SetDataRate), NULL},
{GEN_CMD_CODE(_GetDataRate), NULL},
{GEN_CMD_CODE(_SetPhyInfo), NULL},
{GEN_CMD_CODE(_GetPhyInfo), NULL}, /*30*/
{GEN_CMD_CODE(_SetPhy), NULL},
{GEN_CMD_CODE(_GetPhy), NULL},
{GEN_CMD_CODE(_readRssi), NULL},
{GEN_CMD_CODE(_readGain), NULL},
{GEN_CMD_CODE(_SetAtim), NULL}, /*35*/
{GEN_CMD_CODE(_SetPwrMode), NULL},
{GEN_CMD_CODE(_JoinbssRpt), NULL},
{GEN_CMD_CODE(_SetRaTable), NULL},
{GEN_CMD_CODE(_GetRaTable), NULL},
{GEN_CMD_CODE(_GetCCXReport), NULL}, /*40*/
{GEN_CMD_CODE(_GetDTMReport), NULL},
{GEN_CMD_CODE(_GetTXRateStatistics), NULL},
{GEN_CMD_CODE(_SetUsbSuspend), NULL},
{GEN_CMD_CODE(_SetH2cLbk), NULL},
{GEN_CMD_CODE(_AddBAReq), NULL}, /*45*/
{GEN_CMD_CODE(_SetChannel), NULL}, /*46*/
{GEN_CMD_CODE(_SetTxPower), NULL},
{GEN_CMD_CODE(_SwitchAntenna), NULL},
{GEN_CMD_CODE(_SetCrystalCap), NULL},
{GEN_CMD_CODE(_SetSingleCarrierTx), NULL}, /*50*/
{GEN_CMD_CODE(_SetSingleToneTx), NULL}, /*51*/
{GEN_CMD_CODE(_SetCarrierSuppressionTx), NULL},
{GEN_CMD_CODE(_SetContinuousTx), NULL},
{GEN_CMD_CODE(_SwitchBandwidth), NULL}, /*54*/
{GEN_CMD_CODE(_TX_Beacon), NULL},/*55*/
{GEN_CMD_CODE(_Set_MLME_EVT), NULL},/*56*/
{GEN_CMD_CODE(_Set_Drv_Extra), NULL},/*57*/
{GEN_CMD_CODE(_Set_H2C_MSG), NULL},/*58*/
{GEN_CMD_CODE(_SetChannelPlan), NULL},/*59*/
{GEN_CMD_CODE(_LedBlink), NULL},/*60*/
{GEN_CMD_CODE(_SetChannelSwitch), NULL},/*61*/
{GEN_CMD_CODE(_TDLS), NULL},/*62*/
{GEN_CMD_CODE(_AddBAReq), NULL},
{GEN_CMD_CODE(_SetChannel), NULL},
{GEN_CMD_CODE(_TX_Beacon), NULL},
{GEN_CMD_CODE(_Set_MLME_EVT), NULL},
{GEN_CMD_CODE(_Set_Drv_Extra), NULL},
{GEN_CMD_CODE(_SetChannelPlan), NULL},
};
#endif

30
include/rtw_debug.h
View file

@ -23,7 +23,7 @@
#include <osdep_service.h>
#include <drv_types.h>
#define DRIVERVERSION "v4.1.4_6773.20130222"
#define _drv_always_ 1
#define _drv_emerg_ 2
#define _drv_alert_ 3
@ -75,7 +75,7 @@ extern u32 GlobalDebugLevel;
#define DBG_88E_LEVEL(_level, fmt, arg...) \
do { \
if (_level <= GlobalDebugLevel) \
pr_info(DRIVER_PREFIX"ERROR " fmt, ##arg); \
pr_info(DRIVER_PREFIX"Info " fmt, ##arg); \
} while (0)
#define DBG_88E(...) \
@ -99,20 +99,6 @@ extern u32 GlobalDebugLevel;
} \
} while (0)
#define _func_enter_ \
do { \
if (GlobalDebugLevel >= _drv_debug_) \
pr_info("%s : %s enters at %d\n", \
DRIVER_PREFIX, __func__, __LINE__); \
} while (0)
#define _func_exit_ \
do { \
if (GlobalDebugLevel >= _drv_debug_) \
pr_info("%s : %s exits at %d\n", \
DRIVER_PREFIX, __func__, __LINE__); \
} while (0)
#define RT_PRINT_DATA(_comp, _level, _titlestring, _hexdata, _hexdatalen)\
do { \
if (_level <= GlobalDebugLevel) { \
@ -120,7 +106,7 @@ extern u32 GlobalDebugLevel;
u8 *ptr = (u8 *)_hexdata; \
pr_info("%s", DRIVER_PREFIX); \
pr_info(_titlestring); \
for (__i = 0; __i < (int)_hexdatalen; __i++ ) { \
for (__i = 0; __i < (int)_hexdatalen; __i++) { \
pr_info("%02X%s", ptr[__i], \
(((__i + 1) % 4) == 0) ? \
" " : " "); \
@ -277,14 +263,4 @@ int proc_get_rssi_disp(char *page, char **start,
int proc_set_rssi_disp(struct file *file, const char __user *buffer,
unsigned long count, void *data);
#ifdef CONFIG_BT_COEXIST
int proc_get_btcoex_dbg(char *page, char **start,
off_t offset, int count,
int *eof, void *data);
int proc_set_btcoex_dbg(struct file *file, const char *buffer,
signed long count, void *data);
#endif /* CONFIG_BT_COEXIST */
#endif /* __RTW_DEBUG_H__ */

4
include/rtw_eeprom.h
View file

@ -108,7 +108,7 @@ enum RT_CUSTOMER_ID {
RT_CID_CC_C = 38,
RT_CID_819x_Xavi = 39,
RT_CID_819x_FUNAI_TV = 40,
RT_CID_819x_ALPHA_WD=41,
RT_CID_819x_ALPHA_WD = 41,
};
struct eeprom_priv {
@ -118,7 +118,7 @@ struct eeprom_priv {
u8 mac_addr[6]; /* PermanentAddress */
u16 channel_plan;
u8 EepromOrEfuse;
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512] __aligned(4);
u8 efuse_eeprom_data[HWSET_MAX_SIZE_512];
};
void eeprom_write16(struct adapter *padapter, u16 reg, u16 data);

52
include/rtw_efuse.h
View file

@ -99,52 +99,20 @@ struct efuse_hal {
u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
};
/*------------------------Export global variable----------------------------*/
extern u8 fakeEfuseBank;
extern u32 fakeEfuseUsedBytes;
extern u8 fakeEfuseContent[];
extern u8 fakeEfuseInitMap[];
extern u8 fakeEfuseModifiedMap[];
extern u32 BTEfuseUsedBytes;
extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
extern u8 BTEfuseInitMap[];
extern u8 BTEfuseModifiedMap[];
extern u32 fakeBTEfuseUsedBytes;
extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
extern u8 fakeBTEfuseInitMap[];
extern u8 fakeBTEfuseModifiedMap[];
/*------------------------Export global variable----------------------------*/
u8 efuse_GetCurrentSize(struct adapter *adapter, u16 *size);
u16 efuse_GetMaxSize(struct adapter *adapter);
u8 rtw_efuse_access(struct adapter *adapter, u8 read, u16 start_addr,
u16 cnts, u8 *data);
u8 rtw_efuse_map_read(struct adapter *adapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_efuse_map_write(struct adapter *adapter, u16 addr, u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_read(struct adapter *adapter, u16 addr,
u16 cnts, u8 *data);
u8 rtw_BT_efuse_map_write(struct adapter *adapter, u16 addr,
u16 cnts, u8 *data);
u16 Efuse_GetCurrentSize(struct adapter *adapter, u8 efusetype, bool test);
u8 Efuse_CalculateWordCnts(u8 word_en);
void ReadEFuseByte(struct adapter *adapter, u16 _offset, u8 *pbuf, bool test);
void EFUSE_GetEfuseDefinition(struct adapter *adapt, u8 type, u8 type1,
void *out, bool bPseudoTest);
u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data, bool test);
u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data, bool test);
void *out);
u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data);
u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data);
void Efuse_PowerSwitch(struct adapter *adapt,u8 bWrite,u8 PwrState);
int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data, bool test);
int Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data,
bool test);
void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset,
u16 _size_byte, u8 *pbuf);
void Efuse_PowerSwitch(struct adapter *adapt, u8 bWrite, u8 PwrState);
int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data);
bool Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data);
void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
u8 Efuse_WordEnableDataWrite(struct adapter *adapter, u16 efuse_addr,
u8 word_en, u8 *data, bool test);
u8 EFUSE_Read1Byte(struct adapter *adapter, u16 address);
void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype, bool test);
void EFUSE_ShadowRead(struct adapter *adapt, u8 type, u16 offset, u32 *val);
u8 word_en, u8 *data);
void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype);
#endif

2
include/rtw_ioctl.h
View file

@ -102,8 +102,6 @@ struct oid_obj_priv {
#if defined(_RTW_MP_IOCTL_C_)
static int oid_null_function(struct oid_par_priv *poid_par_priv) {
_func_enter_;
_func_exit_;
return NDIS_STATUS_SUCCESS;
}
#endif

12
include/rtw_ioctl_set.h
View file

@ -25,26 +25,18 @@
typedef u8 NDIS_802_11_PMKID_VALUE[16];
u8 rtw_set_802_11_add_key(struct adapter *adapt, struct ndis_802_11_key *key);
u8 rtw_set_802_11_authentication_mode(struct adapter *adapt,
enum ndis_802_11_auth_mode authmode);
u8 rtw_set_802_11_bssid(struct adapter*adapter, u8 *bssid);
u8 rtw_set_802_11_bssid(struct adapter *adapter, u8 *bssid);
u8 rtw_set_802_11_add_wep(struct adapter *adapter, struct ndis_802_11_wep *wep);
u8 rtw_set_802_11_disassociate(struct adapter *adapter);
u8 rtw_set_802_11_bssid_list_scan(struct adapter*adapter,
u8 rtw_set_802_11_bssid_list_scan(struct adapter *adapter,
struct ndis_802_11_ssid *pssid,
int ssid_max_num);
u8 rtw_set_802_11_infrastructure_mode(struct adapter *adapter,
enum ndis_802_11_network_infra type);
u8 rtw_set_802_11_remove_wep(struct adapter *adapter, u32 keyindex);
u8 rtw_set_802_11_ssid(struct adapter *adapt, struct ndis_802_11_ssid *ssid);
u8 rtw_set_802_11_remove_key(struct adapter *adapt,
struct ndis_802_11_remove_key *key);
u8 rtw_validate_ssid(struct ndis_802_11_ssid *ssid);
u16 rtw_get_cur_max_rate(struct adapter *adapter);
int rtw_set_scan_mode(struct adapter *adapter, enum rt_scan_type scan_mode);
int rtw_set_channel_plan(struct adapter *adapter, u8 channel_plan);
int rtw_set_country(struct adapter *adapter, const char *country_code);
int rtw_change_ifname(struct adapter *padapter, const char *ifname);
#endif

56
include/rtw_iol.h
View file

@ -23,62 +23,6 @@
#include <osdep_service.h>
#include <drv_types.h>
#define IOREG_CMD_END_LEN 4
struct ioreg_cfg {
u8 length;
u8 cmd_id;
__le16 address;
__le32 data;
__le32 mask;
};
enum ioreg_cmd {
IOREG_CMD_LLT = 0x01,
IOREG_CMD_REFUSE = 0x02,
IOREG_CMD_EFUSE_PATH = 0x03,
IOREG_CMD_WB_REG = 0x04,
IOREG_CMD_WW_REG = 0x05,
IOREG_CMD_WD_REG = 0x06,
IOREG_CMD_W_RF = 0x07,
IOREG_CMD_DELAY_US = 0x10,
IOREG_CMD_DELAY_MS = 0x11,
IOREG_CMD_END = 0xFF,
};
struct xmit_frame *rtw_IOL_accquire_xmit_frame(struct adapter *adapter);
int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds,
u32 cmd_len);
int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary);
int rtw_IOL_exec_cmds_sync(struct adapter *adapter,
struct xmit_frame *xmit_frame, u32 max_wating_ms,
u32 bndy_cnt);
bool rtw_IOL_applied(struct adapter *adapter);
int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us);
int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms);
int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame);
void read_efuse_from_txpktbuf(struct adapter *adapter, int bcnhead,
u8 *content, u16 *size);
int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr,
u8 value, u8 mask);
int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr,
u16 value, u16 mask);
int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr,
u32 value, u32 mask);
int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path,
u16 addr, u32 value, u32 mask);
#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value, mask) \
_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value) ,(mask))
#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value, mask) \
_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value),(mask))
#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value, mask) \
_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), (mask))
#define rtw_IOL_append_WRF_cmd(xmit_frame, rf_path, addr, value, mask) \
_rtw_IOL_append_WRF_cmd((xmit_frame),(rf_path), (addr), (value), (mask))
u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame);
void rtw_IOL_cmd_buf_dump(struct adapter *Adapter,int buf_len,u8 *pbuf);
#endif /* __RTW_IOL_H_ */

125
include/rtw_led.h
View file

@ -23,92 +23,43 @@
#include <osdep_service.h>
#include <drv_types.h>
#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000)
#define LED_BLINK_NORMAL_INTERVAL 100
#define LED_BLINK_SLOWLY_INTERVAL 200
#define LED_BLINK_LONG_INTERVAL 400
#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000
#define LED_BLINK_LINK_INTERVAL_ALPHA 500 /* 500 */
#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 /* 150 */
#define LED_BLINK_FASTER_INTERVAL_ALPHA 50
#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000
#define LED_BLINK_NORMAL_INTERVAL_NETTRONIX 100
#define LED_BLINK_SLOWLY_INTERVAL_NETTRONIX 2000
#define LED_BLINK_SLOWLY_INTERVAL_PORNET 1000
#define LED_BLINK_NORMAL_INTERVAL_PORNET 100
#define LED_BLINK_FAST_INTERVAL_BITLAND 30
/* 060403, rcnjko: Customized for AzWave. */
#define LED_CM2_BLINK_ON_INTERVAL 250
#define LED_CM2_BLINK_OFF_INTERVAL 4750
#define LED_CM8_BLINK_INTERVAL 500 /* for QMI */
#define LED_CM8_BLINK_OFF_INTERVAL 3750 /* for QMI */
/* 080124, lanhsin: Customized for RunTop */
#define LED_RunTop_BLINK_INTERVAL 300
/* 060421, rcnjko: Customized for Sercomm Printer Server case. */
#define LED_CM3_BLINK_INTERVAL 1500
enum LED_CTL_MODE {
LED_CTL_POWER_ON = 1,
LED_CTL_LINK = 2,
LED_CTL_NO_LINK = 3,
LED_CTL_TX = 4,
LED_CTL_RX = 5,
LED_CTL_SITE_SURVEY = 6,
LED_CTL_POWER_OFF = 7,
LED_CTL_START_TO_LINK = 8,
LED_CTL_START_WPS = 9,
LED_CTL_STOP_WPS = 10,
LED_CTL_START_WPS_BOTTON = 11, /* added for runtop */
LED_CTL_STOP_WPS_FAIL = 12, /* added for ALPHA */
LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, /* added for BELKIN */
LED_CTL_CONNECTION_NO_TRANSFER = 14,
LED_CTL_POWER_ON,
LED_CTL_LINK,
LED_CTL_NO_LINK,
LED_CTL_TX,
LED_CTL_RX ,
LED_CTL_SITE_SURVEY,
LED_CTL_POWER_OFF,
LED_CTL_START_TO_LINK,
LED_CTL_START_WPS,
LED_CTL_STOP_WPS,
LED_CTL_START_WPS_BOTTON,
LED_CTL_STOP_WPS_FAIL
};
enum LED_STATE_871x {
LED_UNKNOWN = 0,
RTW_LED_ON = 1,
RTW_LED_OFF = 2,
LED_BLINK_NORMAL = 3,
LED_BLINK_SLOWLY = 4,
LED_BLINK_POWER_ON = 5,
LED_BLINK_SCAN = 6, /* LED is blinking during scanning period,
* the # of times to blink is depend on time
* for scanning. */
LED_BLINK_NO_LINK = 7, /* LED is blinking during no link state. */
LED_BLINK_StartToBlink = 8,/* Customzied for Sercomm Printer
* Server case */
LED_BLINK_TXRX = 9,
LED_BLINK_WPS = 10, /* LED is blinkg during WPS communication */
LED_BLINK_WPS_STOP = 11, /* for ALPHA */
LED_BLINK_WPS_STOP_OVERLAP = 12, /* for BELKIN */
LED_BLINK_RUNTOP = 13, /* Customized for RunTop */
LED_BLINK_CAMEO = 14,
LED_BLINK_XAVI = 15,
LED_BLINK_ALWAYS_ON = 16,
};
enum LED_PIN_871x {
LED_PIN_NULL = 0,
LED_PIN_LED0 = 1,
LED_PIN_LED1 = 2,
LED_PIN_LED2 = 3,
LED_PIN_GPIO0 = 4,
LED_UNKNOWN,
RTW_LED_ON,
RTW_LED_OFF,
LED_BLINK_NORMAL,
LED_BLINK_SLOWLY,
LED_BLINK_POWER_ON,
LED_BLINK_SCAN,
LED_BLINK_TXRX,
LED_BLINK_WPS,
LED_BLINK_WPS_STOP
};
struct LED_871x {
struct adapter *padapter;
enum LED_PIN_871x LedPin; /* Identify how to implement this
* SW led. */
enum LED_STATE_871x CurrLedState; /* Current LED state. */
enum LED_STATE_871x BlinkingLedState; /* Next state for blinking,
* either RTW_LED_ON or RTW_LED_OFF are. */
@ -139,34 +90,11 @@ struct LED_871x {
((struct LED_871x *)_LED_871x)->CurrLedState == LED_BLINK_WPS_STOP || \
((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress)
#define IS_LED_BLINKING(_LED_871x) \
(((struct LED_871x *)_LED_871x)->bLedWPSBlinkInProgress || \
((struct LED_871x *)_LED_871x)->bLedScanBlinkInProgress)
/* LED customization. */
enum LED_STRATEGY_871x {
SW_LED_MODE0 = 0, /* SW control 1 LED via GPIO0. It is default option.*/
SW_LED_MODE1= 1, /* 2 LEDs, through LED0 and LED1. For ALPHA. */
SW_LED_MODE2 = 2, /* SW control 1 LED via GPIO0, customized for AzWave
* 8187 minicard. */
SW_LED_MODE3 = 3, /* SW control 1 LED via GPIO0, customized for Sercomm
* Printer Server case. */
SW_LED_MODE4 = 4, /* for Edimax / Belkin */
SW_LED_MODE5 = 5, /* for Sercomm / Belkin */
SW_LED_MODE6 = 6, /* for 88CU minicard, porting from ce SW_LED_MODE7 */
HW_LED = 50, /* HW control 2 LEDs, LED0 and LED1 (there are 4
* different control modes, see MAC.CONFIG1 for details.)*/
LED_ST_NONE = 99,
};
void LedControl8188eu(struct adapter *padapter, enum LED_CTL_MODE LedAction);
struct led_priv{
struct led_priv {
/* add for led control */
struct LED_871x SwLed0;
struct LED_871x SwLed1;
enum LED_STRATEGY_871x LedStrategy;
u8 bRegUseLed;
void (*LedControlHandler)(struct adapter *padapter,
enum LED_CTL_MODE LedAction);
@ -182,15 +110,14 @@ struct led_priv{
void BlinkTimerCallback(void *data);
void BlinkWorkItemCallback(struct work_struct *work);
void ResetLedStatus(struct LED_871x * pLed);
void ResetLedStatus(struct LED_871x *pLed);
void InitLed871x(struct adapter *padapter, struct LED_871x *pLed,
enum LED_PIN_871x LedPin);
void InitLed871x(struct adapter *padapter, struct LED_871x *pLed);
void DeInitLed871x(struct LED_871x *pLed);
/* hal... */
void BlinkHandler(struct LED_871x * pLed);
void BlinkHandler(struct LED_871x *pLed);
void SwLedOn(struct adapter *padapter, struct LED_871x *pLed);
void SwLedOff(struct adapter *padapter, struct LED_871x *pLed);

118
include/rtw_mlme.h
View file

@ -106,13 +106,6 @@ SHALL not lock up more than one lock at a time!
#define traffic_threshold 10
#define traffic_scan_period 500
struct sitesurvey_ctrl {
u64 last_tx_pkts;
uint last_rx_pkts;
int traffic_busy;
struct timer_list sitesurvey_ctrl_timer;
};
struct rt_link_detect {
u32 NumTxOkInPeriod;
u32 NumRxOkInPeriod;
@ -129,17 +122,17 @@ struct rt_link_detect {
struct profile_info {
u8 ssidlen;
u8 ssid[ WLAN_SSID_MAXLEN ];
u8 peermac[ ETH_ALEN ];
u8 ssid[WLAN_SSID_MAXLEN];
u8 peermac[ETH_ALEN];
};
struct tx_invite_req_info {
u8 token;
u8 benable;
u8 go_ssid[ WLAN_SSID_MAXLEN ];
u8 go_ssid[WLAN_SSID_MAXLEN];
u8 ssidlen;
u8 go_bssid[ ETH_ALEN ];
u8 peer_macaddr[ ETH_ALEN ];
u8 go_bssid[ETH_ALEN];
u8 peer_macaddr[ETH_ALEN];
u8 operating_ch; /* This information will be set by using the
* p2p_set op_ch=x */
u8 peer_ch; /* The listen channel for peer P2P device */
@ -182,9 +175,9 @@ struct tx_nego_req_info {
};
struct group_id_info {
u8 go_device_addr[ ETH_ALEN ]; /* The GO's device address of
u8 go_device_addr[ETH_ALEN]; /* The GO's device address of
* this P2P group */
u8 ssid[ WLAN_SSID_MAXLEN ]; /* The SSID of this P2P group */
u8 ssid[WLAN_SSID_MAXLEN]; /* The SSID of this P2P group */
};
struct scan_limit_info {
@ -304,31 +297,6 @@ struct wifidirect_info {
u32 noa_start_time[P2P_MAX_NOA_NUM];
};
struct tdls_ss_record { /* signal strength record */
u8 macaddr[ETH_ALEN];
u8 RxPWDBAll;
u8 is_tdls_sta; /* true: direct link sta, false: else */
};
struct tdls_info {
u8 ap_prohibited;
uint setup_state;
u8 sta_cnt;
u8 sta_maximum; /* 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; */
struct tdls_ss_record ss_record;
u8 macid_index; /* macid entry that is ready to write */
u8 clear_cam; /* cam entry that is trying to clear, using it in direct link teardown */
u8 ch_sensing;
u8 cur_channel;
u8 candidate_ch;
u8 collect_pkt_num[MAX_CHANNEL_NUM];
spinlock_t cmd_lock;
spinlock_t hdl_lock;
u8 watchdog_count;
u8 dev_discovered; /* WFD_TDLS: for sigma test */
u8 enable;
};
struct mlme_priv {
spinlock_t lock;
int fw_state; /* shall we protect this variable? maybe not necessarily... */
@ -388,7 +356,7 @@ struct mlme_priv {
u8 *assoc_rsp;
u32 assoc_rsp_len;
#if defined (CONFIG_88EU_AP_MODE)
#if defined(CONFIG_88EU_AP_MODE)
/* Number of associated Non-ERP stations (i.e., stations using 802.11b
* in 802.11g BSS) */
int num_sta_non_erp;
@ -468,11 +436,9 @@ void indicate_wx_scan_complete_event(struct adapter *padapter);
void rtw_indicate_wx_assoc_event(struct adapter *padapter);
void rtw_indicate_wx_disassoc_event(struct adapter *padapter);
int event_thread(void *context);
void rtw_join_timeout_handler(void *FunctionContext);
void _rtw_scan_timeout_handler(void *FunctionContext);
void rtw_free_network_queue(struct adapter *adapter, u8 isfreeall);
int rtw_init_mlme_priv(struct adapter *adapter);
void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv);
void rtw_free_mlme_priv(struct mlme_priv *pmlmepriv);
int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv);
int rtw_set_key(struct adapter *adapter, struct security_priv *psecuritypriv,
int keyid, u8 set_tx);
@ -508,7 +474,7 @@ static inline void set_fwstate(struct mlme_priv *pmlmepriv, int state)
{
pmlmepriv->fw_state |= state;
/* FOR HW integration */
if (_FW_UNDER_SURVEY==state)
if (_FW_UNDER_SURVEY == state)
pmlmepriv->bScanInProcess = true;
}
@ -516,7 +482,7 @@ static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, int state)
{
pmlmepriv->fw_state &= ~state;
/* FOR HW integration */
if (_FW_UNDER_SURVEY==state)
if (_FW_UNDER_SURVEY == state)
pmlmepriv->bScanInProcess = false;
}
@ -526,48 +492,38 @@ static inline void _clr_fwstate_(struct mlme_priv *pmlmepriv, int state)
*/
static inline void clr_fwstate(struct mlme_priv *pmlmepriv, int state)
{
unsigned long irql;
_enter_critical_bh(&pmlmepriv->lock, &irql);
spin_lock_bh(&pmlmepriv->lock);
if (check_fwstate(pmlmepriv, state) == true)
pmlmepriv->fw_state ^= state;
_exit_critical_bh(&pmlmepriv->lock, &irql);
spin_unlock_bh(&pmlmepriv->lock);
}
static inline void clr_fwstate_ex(struct mlme_priv *pmlmepriv, int state)
{
unsigned long irql;
_enter_critical_bh(&pmlmepriv->lock, &irql);
spin_lock_bh(&pmlmepriv->lock);
_clr_fwstate_(pmlmepriv, state);
_exit_critical_bh(&pmlmepriv->lock, &irql);
spin_unlock_bh(&pmlmepriv->lock);
}
static inline void up_scanned_network(struct mlme_priv *pmlmepriv)
{
unsigned long irql;
_enter_critical_bh(&pmlmepriv->lock, &irql);
spin_lock_bh(&pmlmepriv->lock);
pmlmepriv->num_of_scanned++;
_exit_critical_bh(&pmlmepriv->lock, &irql);
spin_unlock_bh(&pmlmepriv->lock);
}
static inline void down_scanned_network(struct mlme_priv *pmlmepriv)
{
unsigned long irql;
_enter_critical_bh(&pmlmepriv->lock, &irql);
spin_lock_bh(&pmlmepriv->lock);
pmlmepriv->num_of_scanned--;
_exit_critical_bh(&pmlmepriv->lock, &irql);
spin_unlock_bh(&pmlmepriv->lock);
}
static inline void set_scanned_network_val(struct mlme_priv *pmlmepriv, int val)
{
unsigned long irql;
_enter_critical_bh(&pmlmepriv->lock, &irql);
spin_lock_bh(&pmlmepriv->lock);
pmlmepriv->num_of_scanned = val;
_exit_critical_bh(&pmlmepriv->lock, &irql);
spin_unlock_bh(&pmlmepriv->lock);
}
u16 rtw_get_capability(struct wlan_bssid_ex *bss);
@ -582,7 +538,7 @@ struct wlan_network *rtw_get_oldest_wlan_network(struct __queue *scanned_queue);
void rtw_free_assoc_resources(struct adapter *adapter, int lock_scanned_queue);
void rtw_indicate_disconnect(struct adapter *adapter);
void rtw_indicate_connect(struct adapter *adapter);
void rtw_indicate_scan_done( struct adapter *padapter, bool aborted);
void rtw_indicate_scan_done(struct adapter *padapter, bool aborted);
void rtw_scan_abort(struct adapter *adapter);
int rtw_restruct_sec_ie(struct adapter *adapter, u8 *in_ie, u8 *out_ie,
@ -595,47 +551,27 @@ void rtw_update_registrypriv_dev_network(struct adapter *adapter);
void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter);
void _rtw_join_timeout_handler(struct adapter *adapter);
void rtw_scan_timeout_handler(struct adapter *adapter);
void _rtw_join_timeout_handler(void *function_context);
void rtw_scan_timeout_handler(void *function_context);
void rtw_dynamic_check_timer_handlder(struct adapter *adapter);
void rtw_dynamic_check_timer_handlder(void *function_context);
#define rtw_is_scan_deny(adapter) false
#define rtw_clear_scan_deny(adapter) do {} while (0)
#define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0)
#define rtw_set_scan_deny(adapter, ms) do {} while (0)
int _rtw_init_mlme_priv(struct adapter *padapter);
void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv);
void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv);
struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv);
int _rtw_enqueue_network(struct __queue *queue, struct wlan_network *pnetwork);
struct wlan_network *_rtw_dequeue_network(struct __queue *queue);
struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv);
void _rtw_free_network(struct mlme_priv *pmlmepriv,
struct wlan_network *pnetwork, u8 isfreeall);
void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv,
struct wlan_network *pnetwork);
struct wlan_network* _rtw_find_network(struct __queue *scanned_queue, u8 *addr);
void _rtw_free_network_queue(struct adapter *padapter, u8 isfreeall);
int rtw_if_up(struct adapter *padapter);
u8 *rtw_get_capability_from_ie(u8 *ie);
u8 *rtw_get_timestampe_from_ie(u8 *ie);
u8 *rtw_get_beacon_interval_from_ie(u8 *ie);
void rtw_joinbss_reset(struct adapter *padapter);
unsigned int rtw_restructure_ht_ie(struct adapter *padapter, u8 *in_ie,
@ -650,6 +586,6 @@ int is_same_network(struct wlan_bssid_ex *src, struct wlan_bssid_ex *dst);
void rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network);
void _rtw_roaming(struct adapter *padapter, struct wlan_network *tgt_network);
void rtw_stassoc_hw_rpt(struct adapter *adapter,struct sta_info *psta);
void rtw_stassoc_hw_rpt(struct adapter *adapter, struct sta_info *psta);
#endif /* __RTL871X_MLME_H_ */

168
include/rtw_mlme_ext.h
View file

@ -236,13 +236,13 @@ enum SCAN_STATE {
struct mlme_handler {
unsigned int num;
char *str;
unsigned int (*func)(struct adapter *adapt, union recv_frame *frame);
unsigned int (*func)(struct adapter *adapt, struct recv_frame *frame);
};
struct action_handler {
unsigned int num;
char* str;
unsigned int (*func)(struct adapter *adapt, union recv_frame *frame);
char *str;
unsigned int (*func)(struct adapter *adapt, struct recv_frame *frame);
};
struct ss_res {
@ -401,7 +401,7 @@ struct p2p_oper_class_map {
struct mlme_ext_priv {
struct adapter *padapter;
u8 mlmeext_init;
ATOMIC_T event_seq;
atomic_t event_seq;
u16 mgnt_seq;
unsigned char cur_channel;
@ -448,7 +448,7 @@ struct mlme_ext_priv {
int init_mlme_ext_priv(struct adapter *adapter);
int init_hw_mlme_ext(struct adapter *padapter);
void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext);
void free_mlme_ext_priv(struct mlme_ext_priv *pmlmeext);
extern void init_mlme_ext_timer(struct adapter *padapter);
extern void init_addba_retry_timer(struct adapter *adapt, struct sta_info *sta);
extern struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv);
@ -484,13 +484,13 @@ void write_cam(struct adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key);
void clear_cam_entry(struct adapter *padapter, u8 entry);
void invalidate_cam_all(struct adapter *padapter);
void CAM_empty_entry(struct adapter * Adapter, u8 ucIndex);
void CAM_empty_entry(struct adapter *Adapter, u8 ucIndex);
int allocate_fw_sta_entry(struct adapter *padapter);
void flush_all_cam_entry(struct adapter *padapter);
void site_survey(struct adapter *padapter);
u8 collect_bss_info(struct adapter *padapter, union recv_frame *precv_frame,
u8 collect_bss_info(struct adapter *padapter, struct recv_frame *precv_frame,
struct wlan_bssid_ex *bssid);
void update_network(struct wlan_bssid_ex *dst, struct wlan_bssid_ex *src,
struct adapter *adapter, bool update_ie);
@ -544,15 +544,16 @@ unsigned int is_ap_in_wep(struct adapter *padapter);
unsigned int should_forbid_n_rate(struct adapter *padapter);
void report_join_res(struct adapter *padapter, int res);
void report_survey_event(struct adapter *padapter, union recv_frame *precv_frame);
void report_survey_event(struct adapter *padapter,
struct recv_frame *precv_frame);
void report_surveydone_event(struct adapter *padapter);
void report_del_sta_event(struct adapter *padapter,
unsigned char *addr, unsigned short reason);
void report_add_sta_event(struct adapter *padapter, unsigned char* addr,
void report_add_sta_event(struct adapter *padapter, unsigned char *addr,
int cam_idx);
void beacon_timing_control(struct adapter *padapter);
extern u8 set_tx_beacon_cmd(struct adapter*padapter);
extern u8 set_tx_beacon_cmd(struct adapter *padapter);
unsigned int setup_beacon_frame(struct adapter *padapter,
unsigned char *beacon_frame);
void update_mgnt_tx_rate(struct adapter *padapter, u8 rate);
@ -564,18 +565,6 @@ s32 dump_mgntframe_and_wait(struct adapter *padapter,
s32 dump_mgntframe_and_wait_ack(struct adapter *padapter,
struct xmit_frame *pmgntframe);
#ifdef CONFIG_88EU_P2P
void issue_probersp_p2p(struct adapter *padapter, unsigned char *da);
void issue_p2p_provision_request(struct adapter *padapter, u8 *pssid,
u8 ussidlen, u8 *pdev_raddr);
void issue_p2p_GO_request(struct adapter *padapter, u8 *raddr);
void issue_probereq_p2p(struct adapter *padapter, u8 *da);
int issue_probereq_p2p_ex(struct adapter *adapter, u8 *da, int try_cnt,
int wait_ms);
void issue_p2p_invitation_response(struct adapter *padapter, u8 *raddr,
u8 dialogToken, u8 success);
void issue_p2p_invitation_request(struct adapter *padapter, u8* raddr);
#endif /* CONFIG_88EU_P2P */
void issue_beacon(struct adapter *padapter, int timeout_ms);
void issue_probersp(struct adapter *padapter, unsigned char *da,
u8 is_valid_p2p_probereq);
@ -587,7 +576,7 @@ void issue_auth(struct adapter *padapter, struct sta_info *psta,
void issue_probereq(struct adapter *padapter, struct ndis_802_11_ssid *pssid,
u8 *da);
s32 issue_probereq_ex(struct adapter *adapter, struct ndis_802_11_ssid *pssid,
u8* da, int try_cnt, int wait_ms);
u8 *da, int try_cnt, int wait_ms);
int issue_nulldata(struct adapter *padapter, unsigned char *da,
unsigned int power_mode, int try_cnt, int wait_ms);
int issue_qos_nulldata(struct adapter *padapter, unsigned char *da,
@ -609,46 +598,46 @@ void start_clnt_join(struct adapter *padapter);
void start_create_ibss(struct adapter *padapter);
unsigned int OnAssocReq(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAssocRsp(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnProbeReq(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnProbeRsp(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int DoReserved(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnBeacon(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAtim(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnDisassoc(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAuth(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAuthClient(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnDeAuth(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int on_action_spct(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction_qos(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction_dls(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction_back(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int on_action_public(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction_ht(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction_wmm(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
unsigned int OnAction_p2p(struct adapter *padapter,
union recv_frame *precv_frame);
struct recv_frame *precv_frame);
void mlmeext_joinbss_event_callback(struct adapter *padapter, int join_res);
void mlmeext_sta_del_event_callback(struct adapter *padapter);
@ -657,9 +646,9 @@ void mlmeext_sta_add_event_callback(struct adapter *padapter,
void linked_status_chk(struct adapter *padapter);
void survey_timer_hdl (struct adapter *padapter);
void link_timer_hdl (struct adapter *padapter);
void addba_timer_hdl(struct sta_info *psta);
void survey_timer_hdl(void *function_context);
void link_timer_hdl(void *funtion_context);
void addba_timer_hdl(void *function_context);
#define set_survey_timer(mlmeext, ms) \
do { \
@ -719,78 +708,21 @@ u8 tdls_hdl(struct adapter *padapter, unsigned char *pbuf);
#ifdef _RTW_CMD_C_
static struct cmd_hdl wlancmds[] = {
GEN_DRV_CMD_HANDLER(0, NULL) /*0*/
GEN_DRV_CMD_HANDLER(0, NULL)
GEN_DRV_CMD_HANDLER(0, NULL)
GEN_DRV_CMD_HANDLER(0, NULL)
GEN_DRV_CMD_HANDLER(0, NULL)
GEN_DRV_CMD_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL) /*10*/
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct joinbss_parm), join_cmd_hdl) /*14*/
GEN_MLME_EXT_HANDLER(sizeof (struct disconnect_parm), disconnect_hdl)
GEN_MLME_EXT_HANDLER(sizeof (struct createbss_parm), createbss_hdl)
GEN_MLME_EXT_HANDLER(sizeof (struct setopmode_parm), setopmode_hdl)
GEN_MLME_EXT_HANDLER(sizeof (struct sitesurvey_parm),
sitesurvey_cmd_hdl) /*18*/
GEN_MLME_EXT_HANDLER(sizeof (struct setauth_parm), setauth_hdl)
GEN_MLME_EXT_HANDLER(sizeof (struct setkey_parm), setkey_hdl) /*20*/
GEN_MLME_EXT_HANDLER(sizeof (struct set_stakey_parm), set_stakey_hdl)
GEN_MLME_EXT_HANDLER(sizeof (struct set_assocsta_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct del_assocsta_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct setstapwrstate_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct setbasicrate_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct getbasicrate_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct setdatarate_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct getdatarate_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct setphyinfo_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct getphyinfo_parm), NULL) /*30*/
GEN_MLME_EXT_HANDLER(sizeof (struct setphy_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof (struct getphy_parm), NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL) /*40*/
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(sizeof(struct wlan_bssid_ex), join_cmd_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct disconnect_parm), disconnect_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct wlan_bssid_ex), createbss_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct setopmode_parm), setopmode_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct sitesurvey_parm), sitesurvey_cmd_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct setauth_parm), setauth_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct setkey_parm), setkey_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct set_stakey_parm), set_stakey_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct set_assocsta_parm), NULL)
GEN_MLME_EXT_HANDLER(sizeof(struct addBaReq_parm), add_ba_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct set_ch_parm), set_ch_hdl) /* 46 */
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL) /*50*/
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(0, NULL)
GEN_MLME_EXT_HANDLER(sizeof(struct Tx_Beacon_param),
tx_beacon_hdl) /*55*/
GEN_MLME_EXT_HANDLER(0, mlme_evt_hdl) /*56*/
GEN_MLME_EXT_HANDLER(0, rtw_drvextra_cmd_hdl) /*57*/
GEN_MLME_EXT_HANDLER(0, h2c_msg_hdl) /*58*/
GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param),
set_chplan_hdl) /*59*/
GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param),
led_blink_hdl) /*60*/
GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param),
set_csa_hdl) /*61*/
GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param),
tdls_hdl) /*62*/
GEN_MLME_EXT_HANDLER(sizeof(struct set_ch_parm), set_ch_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct wlan_bssid_ex), tx_beacon_hdl)
GEN_MLME_EXT_HANDLER(0, mlme_evt_hdl)
GEN_MLME_EXT_HANDLER(0, rtw_drvextra_cmd_hdl)
GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl)
};
#endif
@ -855,7 +787,7 @@ static struct fwevent wlanevents[] = {
{0, NULL},
{0, NULL},
{0, &rtw_survey_event_callback}, /*8*/
{sizeof (struct surveydone_event), &rtw_surveydone_event_callback},/*9*/
{sizeof(struct surveydone_event), &rtw_surveydone_event_callback},/*9*/
{0, &rtw_joinbss_event_callback}, /*10*/
{sizeof(struct stassoc_event), &rtw_stassoc_event_callback},
{sizeof(struct stadel_event), &rtw_stadel_event_callback},

18
include/rtw_pwrctrl.h
View file

@ -99,12 +99,7 @@ struct reportpwrstate_parm {
static inline void _init_pwrlock(struct semaphore *plock)
{
_rtw_init_sema(plock, 1);
}
static inline void _free_pwrlock(struct semaphore *plock)
{
_rtw_free_sema(plock);
sema_init(plock, 1);
}
static inline void _enter_pwrlock(struct semaphore *plock)
@ -114,7 +109,7 @@ static inline void _enter_pwrlock(struct semaphore *plock)
static inline void _exit_pwrlock(struct semaphore *plock)
{
_rtw_up_sema(plock);
up(plock);
}
#define LPS_DELAY_TIME 1*HZ /* 1 sec */
@ -197,7 +192,7 @@ struct pwrctrl_priv {
u8 ips_mode_req; /* used to accept the mode setting request,
* will update to ipsmode later */
uint bips_processing;
u32 ips_deny_time; /* will deny IPS when system time less than this */
unsigned long ips_deny_time; /* will deny IPS when system time less than this */
u8 ps_processing; /* temp used to mark whether in rtw_ps_processor */
u8 bLeisurePs;
@ -211,10 +206,6 @@ struct pwrctrl_priv {
u8 bInternalAutoSuspend;
u8 bInSuspend;
#ifdef CONFIG_BT_COEXIST
u8 bAutoResume;
u8 autopm_cnt;
#endif
u8 bSupportRemoteWakeup;
struct timer_list pwr_state_check_timer;
int pwr_state_check_interval;
@ -251,7 +242,6 @@ struct pwrctrl_priv {
(pwrctrl)->pwr_state_check_interval)
void rtw_init_pwrctrl_priv(struct adapter *adapter);
void rtw_free_pwrctrl_priv(struct adapter *adapter);
void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps,
u8 bcn_ant_mode);
@ -268,8 +258,6 @@ s32 LPS_RF_ON_check(struct adapter *adapter, u32 delay_ms);
void LPS_Enter(struct adapter *adapter);
void LPS_Leave(struct adapter *adapter);
u8 rtw_interface_ps_func(struct adapter *adapter,
enum hal_intf_ps_func efunc_id, u8 *val);
void rtw_set_ips_deny(struct adapter *adapter, u32 ms);
int _rtw_pwr_wakeup(struct adapter *adapter, u32 ips_defer_ms,
const char *caller);

178
include/rtw_recv.h
View file

@ -175,7 +175,6 @@ recv_thread(passive) ; returnpkt(dispatch)
using enter_critical section to protect
*/
struct recv_priv {
spinlock_t lock;
struct __queue free_recv_queue;
struct __queue recv_pending_queue;
struct __queue uc_swdec_pending_queue;
@ -189,11 +188,6 @@ struct recv_priv {
u64 rx_drop;
u64 last_rx_bytes;
uint rx_icv_err;
uint rx_largepacket_crcerr;
uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr;
struct semaphore allrxreturnevt;
uint ff_hwaddr;
u8 rx_pending_cnt;
@ -213,9 +207,7 @@ struct recv_priv {
u8 signal_strength;
u8 signal_qual;
u8 noise;
int RxSNRdB[2];
s8 RxRssi[2];
int FalseAlmCnt_all;
struct timer_list signal_stat_timer;
u32 signal_stat_sampling_interval;
@ -235,22 +227,8 @@ struct sta_recv_priv {
};
struct recv_buf {
struct list_head list;
spinlock_t recvbuf_lock;
u32 ref_cnt;
struct adapter *adapter;
u8 *pbuf;
u8 *pallocated_buf;
u32 len;
u8 *phead;
u8 *pdata;
u8 *ptail;
u8 *pend;
struct urb *purb;
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u32 alloc_sz;
u8 irp_pending;
int transfer_len;
struct sk_buff *pskb;
u8 reuse;
};
@ -270,94 +248,47 @@ struct recv_buf {
len = (unsigned int )(tail - data);
*/
struct recv_frame_hdr {
struct recv_frame {
struct list_head list;
struct sk_buff *pkt;
struct sk_buff *pkt_newalloc;
struct adapter *adapter;
u8 fragcnt;
int frame_tag;
struct rx_pkt_attrib attrib;
uint len;
u8 *rx_head;
u8 *rx_data;
u8 *rx_tail;
u8 *rx_end;
void *precvbuf;
struct sta_info *psta;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl *preorder_ctrl;
};
union recv_frame {
union {
struct list_head list;
struct recv_frame_hdr hdr;
uint mem[RECVFRAME_HDR_ALIGN>>2];
} u;
};
union recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
union recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
void rtw_init_recvframe(union recv_frame *precvframe,
struct recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
struct recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
void rtw_init_recvframe(struct recv_frame *precvframe,
struct recv_priv *precvpriv);
int rtw_free_recvframe(union recv_frame *precvframe,
int rtw_free_recvframe(struct recv_frame *precvframe,
struct __queue *pfree_recv_queue);
#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue)
int _rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue);
int rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue);
int _rtw_enqueue_recvframe(struct recv_frame *precvframe,
struct __queue *queue);
int rtw_enqueue_recvframe(struct recv_frame *precvframe, struct __queue *queue);
void rtw_free_recvframe_queue(struct __queue *pframequeue,
struct __queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter);
int rtw_enqueue_recvbuf_to_head(struct recv_buf *buf, struct __queue *queue);
int rtw_enqueue_recvbuf(struct recv_buf *precvbuf, struct __queue *queue);
struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue);
void rtw_reordering_ctrl_timeout_handler(void *pcontext);
static inline u8 *get_rxmem(union recv_frame *precvframe)
static inline u8 *get_rxmem(struct recv_frame *precvframe)
{
/* always return rx_head... */
if (precvframe == NULL)
return NULL;
return precvframe->u.hdr.rx_head;
return precvframe->rx_head;
}
static inline u8 *get_rx_status(union recv_frame *precvframe)
{
return get_rxmem(precvframe);
}
static inline u8 *get_recvframe_data(union recv_frame *precvframe)
{
/* always return rx_data */
if (precvframe == NULL)
return NULL;
return precvframe->u.hdr.rx_data;
}
static inline u8 *recvframe_push(union recv_frame *precvframe, int sz)
{
/* append data before rx_data */
/* add data to the start of recv_frame
*
* This function extends the used data area of the recv_frame at the buffer
* start. rx_data must be still larger than rx_head, after pushing.
*/
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_data -= sz ;
if (precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head) {
precvframe->u.hdr.rx_data += sz;
return NULL;
}
precvframe->u.hdr.len += sz;
return precvframe->u.hdr.rx_data;
}
static inline u8 *recvframe_pull(union recv_frame *precvframe, int sz)
static inline u8 *recvframe_pull(struct recv_frame *precvframe, int sz)
{
/* rx_data += sz; move rx_data sz bytes hereafter */
@ -366,16 +297,16 @@ static inline u8 *recvframe_pull(union recv_frame *precvframe, int sz)
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_data += sz;
if (precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) {
precvframe->u.hdr.rx_data -= sz;
precvframe->rx_data += sz;
if (precvframe->rx_data > precvframe->rx_tail) {
precvframe->rx_data -= sz;
return NULL;
}
precvframe->u.hdr.len -= sz;
return precvframe->u.hdr.rx_data;
precvframe->len -= sz;
return precvframe->rx_data;
}
static inline u8 *recvframe_put(union recv_frame *precvframe, int sz)
static inline u8 *recvframe_put(struct recv_frame *precvframe, int sz)
{
/* used for append sz bytes from ptr to rx_tail, update rx_tail
* and return the updated rx_tail to the caller */
@ -384,17 +315,17 @@ static inline u8 *recvframe_put(union recv_frame *precvframe, int sz)
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_tail += sz;
precvframe->rx_tail += sz;
if (precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) {
precvframe->u.hdr.rx_tail -= sz;
if (precvframe->rx_tail > precvframe->rx_end) {
precvframe->rx_tail -= sz;
return NULL;
}
precvframe->u.hdr.len += sz;
return precvframe->u.hdr.rx_tail;
precvframe->len += sz;
return precvframe->rx_tail;
}
static inline u8 *recvframe_pull_tail(union recv_frame *precvframe, int sz)
static inline u8 *recvframe_pull_tail(struct recv_frame *precvframe, int sz)
{
/* rmv data from rx_tail (by yitsen) */
@ -404,64 +335,13 @@ static inline u8 *recvframe_pull_tail(union recv_frame *precvframe, int sz)
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_tail -= sz;
if (precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) {
precvframe->u.hdr.rx_tail += sz;
precvframe->rx_tail -= sz;
if (precvframe->rx_tail < precvframe->rx_data) {
precvframe->rx_tail += sz;
return NULL;
}
precvframe->u.hdr.len -= sz;
return precvframe->u.hdr.rx_tail;
}
static inline unsigned char *get_rxbuf_desc(union recv_frame *precvframe)
{
unsigned char *buf_desc;
if (precvframe == NULL)
return NULL;
return buf_desc;
}
static inline union recv_frame *rxmem_to_recvframe(u8 *rxmem)
{
/* due to the design of 2048 bytes alignment of recv_frame,
* we can reference the union recv_frame */
/* from any given member of recv_frame. */
/* rxmem indicates the any member/address in recv_frame */
return (union recv_frame *)(((size_t)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN);
}
static inline union recv_frame *pkt_to_recvframe(struct sk_buff *pkt)
{
u8 *buf_star;
union recv_frame *precv_frame;
precv_frame = rxmem_to_recvframe((unsigned char *)buf_star);
return precv_frame;
}
static inline u8 *pkt_to_recvmem(struct sk_buff *pkt)
{
/* return the rx_head */
union recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->u.hdr.rx_head;
}
static inline u8 *pkt_to_recvdata(struct sk_buff *pkt)
{
/* return the rx_data */
union recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->u.hdr.rx_data;
}
static inline int get_recvframe_len(union recv_frame *precvframe)
{
return precvframe->u.hdr.len;
precvframe->len -= sz;
return precvframe->rx_tail;
}
static inline s32 translate_percentage_to_dbm(u32 sig_stren_index)
@ -480,6 +360,6 @@ struct sta_info;
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
void mgt_dispatcher(struct adapter *padapter, union recv_frame *precv_frame);
void mgt_dispatcher(struct adapter *padapter, struct recv_frame *precv_frame);
#endif

3
include/rtw_security.h
View file

@ -354,7 +354,7 @@ static const unsigned long K[64] = {
#define RORc(x, y) \
(((((unsigned long)(x) & 0xFFFFFFFFUL) >> (unsigned long)((y)&31)) | \
((unsigned long)(x) << (unsigned long)(32-((y)&31)))) & 0xFFFFFFFFUL)
#define Ch(x, y ,z) (z ^ (x & (y ^ z)))
#define Ch(x, y , z) (z ^ (x & (y ^ z)))
#define Maj(x, y, z) (((x | y) & z) | (x & y))
#define S(x, n) RORc((x), (n))
#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n))
@ -378,6 +378,5 @@ void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe);
u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe);
u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe);
void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe);
void rtw_use_tkipkey_handler(void *FunctionContext);
#endif /* __RTL871X_SECURITY_H_ */

5
include/rtw_sreset.h
View file

@ -24,11 +24,7 @@
#include <drv_types.h>
struct sreset_priv {
struct mutex silentreset_mutex;
u8 silent_reset_inprogress;
u8 Wifi_Error_Status;
unsigned long last_tx_time;
unsigned long last_tx_complete_time;
};
#include <rtl8188e_hal.h>
@ -43,7 +39,6 @@ struct sreset_priv {
#define WIFI_IF_NOT_EXIST BIT6
void sreset_init_value(struct adapter *padapter);
void sreset_reset_value(struct adapter *padapter);
u8 sreset_get_wifi_status(struct adapter *padapter);
void sreset_set_wifi_error_status(struct adapter *padapter, u32 status);

5
include/rtw_xmit.h
View file

@ -105,11 +105,6 @@ struct tx_desc {
__le32 txdw7;
};
union txdesc {
struct tx_desc txdesc;
unsigned int value[TXDESC_SIZE>>2];
};
struct hw_xmit {
struct __queue *sta_queue;
int accnt;

15
include/sta_info.h
View file

@ -182,21 +182,6 @@ struct sta_info {
unsigned int sleepq_ac_len;
#endif /* CONFIG_88EU_AP_MODE */
#ifdef CONFIG_88EU_P2P
/* p2p priv data */
u8 is_p2p_device;
u8 p2p_status_code;
/* p2p client info */
u8 dev_addr[ETH_ALEN];
u8 dev_cap;
u16 config_methods;
u8 primary_dev_type[8];
u8 num_of_secdev_type;
u8 secdev_types_list[32];/* 32/8 == 4; */
u16 dev_name_len;
u8 dev_name[32];
#endif /* CONFIG_88EU_P2P */
u8 under_exist_checking;
u8 keep_alive_trycnt;

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