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rtl8188eu: Remove CONFIG_TX_EARLY_MODE

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2015-02-28 12:41:56 -06:00
parent 1eb356210f
commit ee0ecc2037
8 changed files with 4 additions and 214 deletions
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128
hal/rtl8188e_xmit.c
View file

@ -94,132 +94,4 @@ void _dbg_dump_tx_info(struct adapter *padapter,int frame_tag,struct tx_desc *pt
DBG_8192C("txdw7(0x%08x)\n",ptxdesc->txdw7); DBG_8192C("txdw7(0x%08x)\n",ptxdesc->txdw7);
DBG_8192C("=====================================\n"); DBG_8192C("=====================================\n");
} }
} }
/*
* Description:
* Aggregation packets and send to hardware
*
* Return:
* 0 Success
* -1 Hardware resource(TX FIFO) not ready
* -2 Software resource(xmitbuf) not ready
*/
#ifdef CONFIG_TX_EARLY_MODE
/* define DBG_EMINFO */
#define EARLY_MODE_MAX_PKT_NUM 5
struct EMInfo{
u8 EMPktNum;
u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
};
void
InsertEMContent_8188E(
struct EMInfo *pEMInfo,
IN u8 * VirtualAddress)
{
memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE);
if(pEMInfo->EMPktNum==0)
return;
#ifdef DBG_EMINFO
{
int i;
DBG_8192C("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum);
for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){
DBG_8192C("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]);
}
}
#endif
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF);
SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
}
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf )
{
/* struct adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq */
int index,j;
u16 offset,pktlen;
PTXDESC ptxdesc;
u8 *pmem,*pEMInfo_mem;
s8 node_num_0=0,node_num_1=0;
struct EMInfo eminfo;
struct agg_pkt_info *paggpkt;
struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data;
pmem= pframe->buf_addr;
#ifdef DBG_EMINFO
DBG_8192C("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num);
for(index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset);
DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen);
}
#endif
if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
{
node_num_0 = pframe->agg_num;
node_num_1= EARLY_MODE_MAX_PKT_NUM-1;
}
for(index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
memset(&eminfo,0,sizeof(struct EMInfo));
if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){
eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM;
node_num_0--;
}
else{
eminfo.EMPktNum = node_num_1;
node_num_1--;
}
}
else{
eminfo.EMPktNum = pframe->agg_num-(index+1);
}
for(j=0;j< eminfo.EMPktNum ;j++){
eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;/* 4 bytes CRC */
}
if(pmem){
if(index==0){
ptxdesc = (PTXDESC)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}
else{
pmem = pmem + pxmitpriv->agg_pkt[index-1].offset;
ptxdesc = (PTXDESC)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}
#ifdef DBG_EMINFO
DBG_8192C("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen);
#endif
InsertEMContent_8188E(&eminfo,pEMInfo_mem);
}
}
memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM);
}
#endif

34
hal/rtl8188eu_xmit.c
View file

@ -35,9 +35,6 @@ s32 rtl8188eu_init_xmit_priv(struct adapter *padapter)
tasklet_init(&pxmitpriv->xmit_tasklet, tasklet_init(&pxmitpriv->xmit_tasklet,
(void(*)(unsigned long))rtl8188eu_xmit_tasklet, (void(*)(unsigned long))rtl8188eu_xmit_tasklet,
(unsigned long)padapter); (unsigned long)padapter);
#ifdef CONFIG_TX_EARLY_MODE
pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode;
#endif
return _SUCCESS; return _SUCCESS;
} }
@ -255,12 +252,6 @@ if (padapter->registrypriv.mp_mode == 0)
offset = TXDESC_SIZE + OFFSET_SZ; offset = TXDESC_SIZE + OFFSET_SZ;
#ifdef CONFIG_TX_EARLY_MODE
if(bagg_pkt){
offset += EARLY_MODE_INFO_SIZE ;/* 0x28 */
}
#endif
/* DBG_8192C("%s==>offset(0x%02x) \n",__FUNCTION__,offset); */
ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */ ptxdesc->txdw0 |= cpu_to_le32(((offset) << OFFSET_SHT) & 0x00ff0000);/* 32 bytes for TX Desc */
if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BMC); if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BMC);
@ -725,11 +716,7 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
pxmitbuf->priv_data = pxmitframe; pxmitbuf->priv_data = pxmitframe;
pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */ pxmitframe->agg_num = 1; /* alloc xmitframe should assign to 1. */
#ifdef CONFIG_TX_EARLY_MODE
pxmitframe->pkt_offset = 2; /* first frame of aggregation, reserve one offset for EM info ,another for usb bulk-out block check */
#else
pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */ pxmitframe->pkt_offset = 1; /* first frame of aggregation, reserve offset */
#endif
if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == false) { if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == false) {
DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__); DBG_871X("%s coalesce 1st xmitframe failed \n",__FUNCTION__);
@ -811,16 +798,11 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
xmitframe_plist = get_next(xmitframe_plist); xmitframe_plist = get_next(xmitframe_plist);
pxmitframe->agg_num = 0; /* not first frame of aggregation */ pxmitframe->agg_num = 0; /* not first frame of aggregation */
#ifdef CONFIG_TX_EARLY_MODE
pxmitframe->pkt_offset = 1;/* not first frame of aggregation,reserve offset for EM Info */
#else
pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */ pxmitframe->pkt_offset = 0; /* not first frame of aggregation, no need to reserve offset */
#endif
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ); len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ);
if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) {
{
pxmitframe->agg_num = 1; pxmitframe->agg_num = 1;
pxmitframe->pkt_offset = 1; pxmitframe->pkt_offset = 1;
break; break;
@ -875,10 +857,6 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
pfirstframe->agg_num++; pfirstframe->agg_num++;
#ifdef CONFIG_TX_EARLY_MODE
pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len);
pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz;
#endif
if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
break; break;
@ -911,23 +889,13 @@ s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxm
pbuf_tail -= PACKET_OFFSET_SZ; pbuf_tail -= PACKET_OFFSET_SZ;
pfirstframe->buf_addr += PACKET_OFFSET_SZ; pfirstframe->buf_addr += PACKET_OFFSET_SZ;
pfirstframe->pkt_offset--; pfirstframe->pkt_offset--;
/* DBG_8192C("$$$$$ buf size equal to USB block size $$$$$$\n"); */
} }
#endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ #endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */
update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,true); update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,true);
#ifdef CONFIG_TX_EARLY_MODE
/* prepare EM info for first frame, agg_num value start from 1 */
pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz +TXDESC_SIZE +(pfirstframe->pkt_offset*PACKET_OFFSET_SZ));
pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;/* get from rtw_xmitframe_coalesce */
UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf );
#endif
/* 3 4. write xmit buffer to USB FIFO */ /* 3 4. write xmit buffer to USB FIFO */
ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
/* DBG_8192C("%s ===================================== write port,buf_size(%d) \n",__FUNCTION__,pbuf_tail); */
/* xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr */ /* xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr */
rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf);

19
hal/usb_halinit.c
View file

@ -1529,26 +1529,7 @@ HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02);
} }
#endif #endif
#ifdef CONFIG_TX_EARLY_MODE
if( pHalData->bEarlyModeEnable)
{
RT_TRACE(_module_hci_hal_init_c_, _drv_info_,("EarlyMode Enabled!!!\n"));
value8 = rtw_read8(Adapter, REG_EARLY_MODE_CONTROL);
value8 = value8|0xf;
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, value8);
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL+3, 0x80);
value8 = rtw_read8(Adapter, REG_TCR+1);
value8 = value8|0x40;
rtw_write8(Adapter,REG_TCR+1, value8);
}
else
#endif
{
rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0); rtw_write8(Adapter, REG_EARLY_MODE_CONTROL, 0);
}
rtw_write32(Adapter,REG_MACID_NO_LINK_0,0xFFFFFFFF); rtw_write32(Adapter,REG_MACID_NO_LINK_0,0xFFFFFFFF);
rtw_write32(Adapter,REG_MACID_NO_LINK_1,0xFFFFFFFF); rtw_write32(Adapter,REG_MACID_NO_LINK_1,0xFFFFFFFF);

3
include/drv_types.h
View file

@ -126,9 +126,6 @@ struct registry_priv
u8 mp_mode; u8 mp_mode;
u8 software_encrypt; u8 software_encrypt;
u8 software_decrypt; u8 software_decrypt;
#ifdef CONFIG_TX_EARLY_MODE
u8 early_mode;
#endif
u8 acm_method; u8 acm_method;
//UAPSD //UAPSD
u8 wmm_enable; u8 wmm_enable;

4
include/rtl8188e_hal.h
View file

@ -485,10 +485,6 @@ typedef struct hal_data_8188e
u8 UsbRxAggBlockTimeout; u8 UsbRxAggBlockTimeout;
u8 UsbRxAggPageCount; // 8192C DMA page count u8 UsbRxAggPageCount; // 8192C DMA page count
u8 UsbRxAggPageTimeout; u8 UsbRxAggPageTimeout;
#ifdef CONFIG_TX_EARLY_MODE
u8 bEarlyModeEnable;
#endif
} HAL_DATA_8188E, *PHAL_DATA_8188E; } HAL_DATA_8188E, *PHAL_DATA_8188E;
typedef struct hal_data_8188e HAL_DATA_TYPE, *PHAL_DATA_TYPE; typedef struct hal_data_8188e HAL_DATA_TYPE, *PHAL_DATA_TYPE;

5
include/rtl8188e_xmit.h
View file

@ -265,12 +265,9 @@ s32 rtl8188eu_xmit_buf_handler(struct adapter *padapter);
void rtl8188eu_xmit_tasklet(void *priv); void rtl8188eu_xmit_tasklet(void *priv);
s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); s32 rtl8188eu_xmitframe_complete(struct adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
#ifdef CONFIG_TX_EARLY_MODE
void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf );
#endif
void dump_txrpt_ccx_88e(void *buf); void dump_txrpt_ccx_88e(void *buf);
void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf); void handle_txrpt_ccx_88e(struct adapter *adapter, u8 *buf);
void _dbg_dump_tx_info(struct adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); void _dbg_dump_tx_info(struct adapter *padapter,int frame_tag,struct tx_desc *ptxdesc);
#endif //__RTL8188E_XMIT_H__ #endif //__RTL8188E_XMIT_H__

12
include/rtw_xmit.h
View file

@ -98,11 +98,6 @@ do{\
#define TXDESC_SIZE 32 #define TXDESC_SIZE 32
#ifdef CONFIG_TX_EARLY_MODE
#define EARLY_MODE_INFO_SIZE 8
#endif
#define PACKET_OFFSET_SZ (8) #define PACKET_OFFSET_SZ (8)
#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ)
@ -411,13 +406,6 @@ struct xmit_priv {
uint free_xmit_extbuf_cnt; uint free_xmit_extbuf_cnt;
u16 nqos_ssn; u16 nqos_ssn;
#ifdef CONFIG_TX_EARLY_MODE
#define MAX_AGG_PKT_NUM 256 //Max tx ampdu coounts
struct agg_pkt_info agg_pkt[MAX_AGG_PKT_NUM];
#endif
int ack_tx; int ack_tx;
_mutex ack_tx_mutex; _mutex ack_tx_mutex;
struct submit_ctx ack_tx_ops; struct submit_ctx ack_tx_ops;

9
os_dep/os_intfs.c
View file

@ -77,9 +77,6 @@ static int rtw_ips_mode = IPS_NONE;
static int rtw_smart_ps = 2; static int rtw_smart_ps = 2;
#ifdef CONFIG_TX_EARLY_MODE
static int rtw_early_mode=1;
#endif
module_param(rtw_ips_mode, int, 0644); module_param(rtw_ips_mode, int, 0644);
MODULE_PARM_DESC(rtw_ips_mode,"The default IPS mode"); MODULE_PARM_DESC(rtw_ips_mode,"The default IPS mode");
@ -221,9 +218,6 @@ module_param(rtw_hwpwrp_detect, int, 0644);
module_param(rtw_hw_wps_pbc, int, 0644); module_param(rtw_hw_wps_pbc, int, 0644);
#ifdef CONFIG_TX_EARLY_MODE
module_param(rtw_early_mode, int, 0644);
#endif
#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE
char *rtw_adaptor_info_caching_file_path= "/data/misc/wifi/rtw_cache"; char *rtw_adaptor_info_caching_file_path= "/data/misc/wifi/rtw_cache";
module_param(rtw_adaptor_info_caching_file_path, charp, 0644); module_param(rtw_adaptor_info_caching_file_path, charp, 0644);
@ -344,9 +338,6 @@ static uint loadparam( struct adapter *padapter, _nic_hdl pnetdev)
registry_par->ampdu_enable = (u8)rtw_ampdu_enable; registry_par->ampdu_enable = (u8)rtw_ampdu_enable;
registry_par->rx_stbc = (u8)rtw_rx_stbc; registry_par->rx_stbc = (u8)rtw_rx_stbc;
registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu; registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu;
#ifdef CONFIG_TX_EARLY_MODE
registry_par->early_mode = (u8)rtw_early_mode;
#endif
registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit; registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit;
registry_par->rf_config = (u8)rtw_rf_config; registry_par->rf_config = (u8)rtw_rf_config;
registry_par->low_power = (u8)rtw_low_power; registry_par->low_power = (u8)rtw_low_power;