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rtl8188eu: Remove trailing white space from all source files

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Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-05-18 23:28:07 -05:00
parent 77e736c66a
commit f5f3863bc5
205 changed files with 55371 additions and 55581 deletions
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1784
hal/Hal8188EFWImg_CE.c
View file

File diff suppressed because it is too large Load diff

193
hal/Hal8188EPwrSeq.c
View file

@ -1,97 +1,96 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Hal8188EPwrSeq.h"
#include <rtl8188e_hal.h>
/*
drivers should parse below arrays and do the corresponding actions
*/
//3 Power on Array
WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
//3Radio off Array
WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
};
//3Card Disable Array
WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
};
//3 Card Enable Array
WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_CARDDIS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
//3Suspend Array
WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
};
//3 Resume Array
WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
//3HWPDN Array
WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
};
//3 Enter LPS
WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]=
{
//FW behavior
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
};
//3 Leave LPS
WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]=
{
//FW behavior
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END
};
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "Hal8188EPwrSeq.h"
#include <rtl8188e_hal.h>
/*
drivers should parse below arrays and do the corresponding actions
*/
//3 Power on Array
WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
//3Radio off Array
WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_END
};
//3Card Disable Array
WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_CARDDIS
RTL8188E_TRANS_END
};
//3 Card Enable Array
WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_CARDDIS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
//3Suspend Array
WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_SUS
RTL8188E_TRANS_END
};
//3 Resume Array
WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_SUS_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_ACT
RTL8188E_TRANS_END
};
//3HWPDN Array
WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS+RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS+RTL8188E_TRANS_END_STEPS]=
{
RTL8188E_TRANS_ACT_TO_CARDEMU
RTL8188E_TRANS_CARDEMU_TO_PDN
RTL8188E_TRANS_END
};
//3 Enter LPS
WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS+RTL8188E_TRANS_END_STEPS]=
{
//FW behavior
RTL8188E_TRANS_ACT_TO_LPS
RTL8188E_TRANS_END
};
//3 Leave LPS
WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS+RTL8188E_TRANS_END_STEPS]=
{
//FW behavior
RTL8188E_TRANS_LPS_TO_ACT
RTL8188E_TRANS_END
};

319
hal/Hal8188ERateAdaptive.c
View file

@ -3,19 +3,19 @@ Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
RateAdaptive.c
Abstract:
Implement Rate Adaptive functions for common operations.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-08-12 Page Create.
---------- --------------- -------------------------------
2011-08-12 Page Create.
--*/
#include "odm_precomp.h"
//#if ( DM_ODM_SUPPORT_TYPE == ODM_MP)
//#if ( DM_ODM_SUPPORT_TYPE == ODM_MP)
//#include "Mp_Precomp.h"
//#endif
@ -61,19 +61,19 @@ static u1Byte RETRY_PENALTY_UP[RETRYSIZE+1]={49,44,16,16,0,48}; // 12% for rate
static u1Byte PT_PENALTY[RETRYSIZE+1]={34,31,30,24,0,32};
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH
4,4,4,4,6,0x0a,0x0b,0x0d,
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
{0x0a,0x0a,0x0a,0x0a,0x0c,0x0c,0x0e,0x10,0x11,0x12,0x12,0x13, // SS<TH
0x0e,0x0f,0x10,0x10,0x11,0x14,0x14,0x15,
9,9,9,9,0x0c,0x0e,0x11,0x13}};
9,9,9,9,0x0c,0x0e,0x11,0x13}};
static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x10,0x10,0x10,0x10,0x11,0x11,0x12,0x12,0x12,0x13,0x13,0x14, // SS>TH
static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x10,0x10,0x10,0x10,0x11,0x11,0x12,0x12,0x12,0x13,0x13,0x14, // SS>TH
0x13,0x13,0x14,0x14,0x15,0x15,0x15,0x15,
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
0x13,0x15,0x17,0x18,0x1a,0x1c,0x1d,0x1f,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
@ -82,21 +82,21 @@ static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
// wilson modify
static u1Byte RETRY_PENALTY_IDX[2][RATESIZE] = {{4,4,4,5,4,4,5,7,7,7,8,0x0a, // SS>TH
4,4,4,4,6,0x0a,0x0b,0x0d,
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
5,5,7,7,8,0x0b,0x0d,0x0f}, // 0329 R01
{0x0a,0x0a,0x0b,0x0c,0x0a,0x0a,0x0b,0x0c,0x0d,0x10,0x13,0x14, // SS<TH
0x0b,0x0c,0x0d,0x0e,0x0f,0x11,0x13,0x15,
9,9,9,9,0x0c,0x0e,0x11,0x13}};
9,9,9,9,0x0c,0x0e,0x11,0x13}};
static u1Byte RETRY_PENALTY_UP_IDX[RATESIZE] = {0x0c,0x0d,0x0d,0x0f,0x0d,0x0e,0x0f,0x0f,0x10,0x12,0x13,0x14, // SS>TH
0x0f,0x10,0x10,0x12,0x12,0x13,0x14,0x15,
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
0x11,0x11,0x12,0x13,0x13,0x13,0x14,0x15};
static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,
0,0,0,0x1f,0x23,0x28,0x2a,0x2c};
#endif
#endif
/*static u1Byte RSSI_THRESHOLD[RATESIZE] = {0,0,0,0,
0,0,0,0,0,0x24,0x26,0x2a,
@ -106,7 +106,7 @@ static u2Byte N_THRESHOLD_HIGH[RATESIZE] = {4,4,8,16,
24,36,48,72,96,144,192,216,
60,80,100,160,240,400,560,640,
300,320,480,720,1000,1200,1600,2000};
static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
static u2Byte N_THRESHOLD_LOW[RATESIZE] = {2,2,4,8,
12,18,24,36,48,72,96,108,
30,40,50,80,120,200,280,320,
150,160,240,360,500,600,800,1000};
@ -137,18 +137,18 @@ static u4Byte INIT_RATE_FALLBACK_TABLE[16]={0x0f8ff015, // 0: 40M BGN mode
0, // 13:
0, // 14:
0, // 15:
};
static u1Byte PendingForRateUpFail[5]={2,10,24,40,60};
static u2Byte DynamicTxRPTTiming[6]={0x186a, 0x30d4, 0x493e, 0x61a8, 0x7a12 ,0x927c}; // 200ms-1200ms
// End Rate adaptive parameters
static void
static void
odm_SetTxRPTTiming_8188E(
IN PDM_ODM_T pDM_Odm,
IN PODM_RA_INFO_T pRaInfo,
IN u1Byte extend
IN PODM_RA_INFO_T pRaInfo,
IN u1Byte extend
)
{
u1Byte idx = 0;
@ -169,14 +169,14 @@ odm_SetTxRPTTiming_8188E(
idx-=1;
}
pRaInfo->RptTime=DynamicTxRPTTiming[idx];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("pRaInfo->RptTime=0x%x\n", pRaInfo->RptTime));
}
static int
static int
odm_RateDown_8188E(
IN PDM_ODM_T pDM_Odm,
IN PODM_RA_INFO_T pRaInfo
IN PODM_RA_INFO_T pRaInfo
)
{
u1Byte RateID, LowestRate, HighestRate;
@ -192,8 +192,8 @@ odm_RateDown_8188E(
LowestRate = pRaInfo->LowestRate;
HighestRate = pRaInfo->HighestRate;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID=%d LowestRate=%d HighestRate=%d RateSGI=%d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID=%d LowestRate=%d HighestRate=%d RateSGI=%d\n",
RateID, LowestRate, HighestRate, pRaInfo->RateSGI));
if (RateID > HighestRate)
{
@ -213,7 +213,7 @@ odm_RateDown_8188E(
{
RateID=i;
goto RateDownFinish;
}
}
}
@ -236,7 +236,7 @@ RateDownFinish:
if (pRaInfo->RAPendingCounter>=4)
pRaInfo->RAPendingCounter=4;
pRaInfo->DecisionRate=RateID;
odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 2);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("Rate down, RPT Timing default\n"));
@ -246,10 +246,10 @@ RateDownFinish:
return 0;
}
static int
static int
odm_RateUp_8188E(
IN PDM_ODM_T pDM_Odm,
IN PODM_RA_INFO_T pRaInfo
IN PODM_RA_INFO_T pRaInfo
)
{
u1Byte RateID, HighestRate;
@ -263,20 +263,20 @@ odm_RateUp_8188E(
}
RateID = pRaInfo->PreRate;
HighestRate = pRaInfo->HighestRate;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID=%d HighestRate=%d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" RateID=%d HighestRate=%d\n",
RateID, HighestRate));
if (pRaInfo->RAWaitingCounter==1){
pRaInfo->RAWaitingCounter=0;
pRaInfo->RAPendingCounter=0;
}
}
else if (pRaInfo->RAWaitingCounter>1){
pRaInfo->PreRssiStaRA=pRaInfo->RssiStaRA;
goto RateUpfinish;
}
odm_SetTxRPTTiming_8188E(pDM_Odm,pRaInfo, 0);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("odm_RateUp_8188E():Decrease RPT Timing\n"));
if (RateID < HighestRate)
{
for (i=RateID+1; i<=HighestRate; i++)
@ -298,7 +298,7 @@ odm_RateUp_8188E(
else //if ((sta_info_ra->Decision_rate) > (sta_info_ra->Highest_rate))
{
RateID = HighestRate;
}
RateUpfinish:
//if (pRaInfo->RAWaitingCounter==10)
@ -321,18 +321,18 @@ static void odm_ResetRaCounter_8188E( IN PODM_RA_INFO_T pRaInfo){
pRaInfo->NscDown=(N_THRESHOLD_HIGH[RateID]+N_THRESHOLD_LOW[RateID])>>1;
}
static void
static void
odm_RateDecision_8188E(
IN PDM_ODM_T pDM_Odm,
IN PODM_RA_INFO_T pRaInfo
IN PODM_RA_INFO_T pRaInfo
)
{
u1Byte RateID = 0, RtyPtID = 0, PenaltyID1 = 0, PenaltyID2 = 0;
//u4Byte pool_retry;
static u1Byte DynamicTxRPTTimingCounter=0;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("=====>odm_RateDecision_8188E()\n"));
if (pRaInfo->Active && (pRaInfo->TOTAL > 0)) // STA used and data packet exits
{
if ( (pRaInfo->RssiStaRA<(pRaInfo->PreRssiStaRA-3))|| (pRaInfo->RssiStaRA>(pRaInfo->PreRssiStaRA+3))){
@ -342,15 +342,15 @@ odm_RateDecision_8188E(
// Start RA decision
if (pRaInfo->PreRate > pRaInfo->HighestRate)
RateID = pRaInfo->HighestRate;
else
else
RateID = pRaInfo->PreRate;
if (pRaInfo->RssiStaRA > RSSI_THRESHOLD[RateID])
RtyPtID=0;
else
RtyPtID=1;
PenaltyID1 = RETRY_PENALTY_IDX[RtyPtID][RateID]; //TODO by page
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown init is %d\n", pRaInfo->NscDown));
//pool_retry=pRaInfo->RTY[2]+pRaInfo->RTY[3]+pRaInfo->RTY[4]+pRaInfo->DROP;
pRaInfo->NscDown += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID1][0];
@ -358,33 +358,33 @@ odm_RateDecision_8188E(
pRaInfo->NscDown += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID1][2];
pRaInfo->NscDown += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID1][3];
pRaInfo->NscDown += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID1][4];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown is %d, total*penalty[5] is %d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscDown is %d, total*penalty[5] is %d\n",
pRaInfo->NscDown, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5])));
if (pRaInfo->NscDown > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5]))
pRaInfo->NscDown -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID1][5];
else
pRaInfo->NscDown=0;
// rate up
PenaltyID2 = RETRY_PENALTY_UP_IDX[RateID];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" NscUp init is %d\n", pRaInfo->NscUp));
pRaInfo->NscUp += pRaInfo->RTY[0] * RETRY_PENALTY[PenaltyID2][0];
pRaInfo->NscUp += pRaInfo->RTY[1] * RETRY_PENALTY[PenaltyID2][1];
pRaInfo->NscUp += pRaInfo->RTY[2] * RETRY_PENALTY[PenaltyID2][2];
pRaInfo->NscUp += pRaInfo->RTY[3] * RETRY_PENALTY[PenaltyID2][3];
pRaInfo->NscUp += pRaInfo->RTY[4] * RETRY_PENALTY[PenaltyID2][4];
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("NscUp is %d, total*up[5] is %d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("NscUp is %d, total*up[5] is %d\n",
pRaInfo->NscUp, (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5])));
if (pRaInfo->NscUp > (pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5]))
pRaInfo->NscUp -= pRaInfo->TOTAL * RETRY_PENALTY[PenaltyID2][5];
else
pRaInfo->NscUp = 0;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD,
(" RssiStaRa= %d RtyPtID=%d PenaltyID1=0x%x PenaltyID2=0x%x RateID=%d NscDown=%d NscUp=%d SGI=%d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE|ODM_COMP_INIT, ODM_DBG_LOUD,
(" RssiStaRa= %d RtyPtID=%d PenaltyID1=0x%x PenaltyID2=0x%x RateID=%d NscDown=%d NscUp=%d SGI=%d\n",
pRaInfo->RssiStaRA,RtyPtID, PenaltyID1,PenaltyID2, RateID, pRaInfo->NscDown, pRaInfo->NscUp, pRaInfo->RateSGI));
if ((pRaInfo->NscDown < N_THRESHOLD_LOW[RateID]) ||(pRaInfo->DROP>DROPING_NECESSARY[RateID]))
odm_RateDown_8188E(pDM_Odm,pRaInfo);
@ -394,8 +394,8 @@ odm_RateDecision_8188E(
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate))
if ((pRaInfo->DecisionRate)==(pRaInfo->PreRate))
DynamicTxRPTTimingCounter+=1;
else
DynamicTxRPTTimingCounter=0;
@ -413,10 +413,10 @@ odm_RateDecision_8188E(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE, ("<=====odm_RateDecision_8188E()\n"));
}
static int
static int
odm_ARFBRefresh_8188E(
IN PDM_ODM_T pDM_Odm,
IN PODM_RA_INFO_T pRaInfo
IN PDM_ODM_T pDM_Odm,
IN PODM_RA_INFO_T pRaInfo
)
{ // Wilson 2011/10/26
u4Byte MaskFromReg;
@ -444,7 +444,7 @@ odm_ARFBRefresh_8188E(
case RATR_INX_WIRELESS_B:
pRaInfo->RAUseRate=(pRaInfo->RateMask)&0x0000000d;
break;
case 12:
case 12:
MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR0);
pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg;
break;
@ -460,7 +460,7 @@ odm_ARFBRefresh_8188E(
MaskFromReg=ODM_Read4Byte(pDM_Odm, REG_ARFR3);
pRaInfo->RAUseRate=(pRaInfo->RateMask)&MaskFromReg;
break;
default:
pRaInfo->RAUseRate=(pRaInfo->RateMask);
break;
@ -492,7 +492,7 @@ odm_ARFBRefresh_8188E(
else{
pRaInfo->LowestRate=0;
}
#if POWER_TRAINING_ACTIVE == 1
if (pRaInfo->HighestRate >0x13)
pRaInfo->PTModeSS=3;
@ -502,41 +502,41 @@ odm_ARFBRefresh_8188E(
pRaInfo->PTModeSS=1;
else
pRaInfo->PTModeSS=0;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): PTModeSS=%d\n", pRaInfo->PTModeSS));
#endif
if (pRaInfo->DecisionRate > pRaInfo->HighestRate)
pRaInfo->DecisionRate = pRaInfo->HighestRate;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_ARFBRefresh_8188E(): RateID=%d RateMask=%8.8x RAUseRate=%8.8x HighestRate=%d,DecisionRate=%d\n",
pRaInfo->RateID, pRaInfo->RateMask, pRaInfo->RAUseRate, pRaInfo->HighestRate,pRaInfo->DecisionRate));
return 0;
}
#if POWER_TRAINING_ACTIVE == 1
static void
static void
odm_PTTryState_8188E(
IN PODM_RA_INFO_T pRaInfo
IN PODM_RA_INFO_T pRaInfo
)
{
pRaInfo->PTTryState=0;
switch (pRaInfo->PTModeSS)
{
case 3:
if (pRaInfo->DecisionRate>=0x19)
case 3:
if (pRaInfo->DecisionRate>=0x19)
pRaInfo->PTTryState=1;
break;
case 2:
if (pRaInfo->DecisionRate>=0x11)
pRaInfo->PTTryState=1;
break;
break;
case 1:
if (pRaInfo->DecisionRate>=0x0a)
pRaInfo->PTTryState=1;
break;
break;
case 0:
if (pRaInfo->DecisionRate>=0x03)
pRaInfo->PTTryState=1;
@ -563,7 +563,7 @@ odm_PTTryState_8188E(
pRaInfo->PTPreRssi=pRaInfo->RssiStaRA;
pRaInfo->PTStopCount=0;
}
else{
pRaInfo->RAstage=0;
@ -577,9 +577,9 @@ odm_PTTryState_8188E(
pRaInfo->PTPreRate=pRaInfo->DecisionRate;
}
static void
static void
odm_PTDecision_8188E(
IN PODM_RA_INFO_T pRaInfo
IN PODM_RA_INFO_T pRaInfo
)
{
u1Byte stage_BUF;
@ -588,7 +588,7 @@ odm_PTDecision_8188E(
u4Byte numsc;
u4Byte num_total;
u1Byte stage_id;
stage_BUF=pRaInfo->PTStage;
numsc = 0;
num_total= pRaInfo->TOTAL* PT_PENALTY[5];
@ -605,7 +605,7 @@ odm_PTDecision_8188E(
stage_id=temp_stage-j;
else
stage_id=0;
pRaInfo->PTSmoothFactor=(pRaInfo->PTSmoothFactor>>1) + (pRaInfo->PTSmoothFactor>>2) + stage_id*16+2;
if (pRaInfo->PTSmoothFactor>192)
pRaInfo->PTSmoothFactor=192;
@ -623,31 +623,31 @@ odm_PTDecision_8188E(
static VOID
odm_RATxRPTTimerSetting(
IN PDM_ODM_T pDM_Odm,
IN u2Byte minRptTime
IN u2Byte minRptTime
)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" =====>odm_RATxRPTTimerSetting()\n"));
if (pDM_Odm->CurrminRptTime != minRptTime){
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
(" CurrminRptTime =0x%04x minRptTime=0x%04x\n", pDM_Odm->CurrminRptTime, minRptTime));
#if (DM_ODM_SUPPORT_TYPE & (ODM_MP|ODM_AP))
ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime);
ODM_RA_Set_TxRPT_Time(pDM_Odm,minRptTime);
#else
rtw_rpt_timer_cfg_cmd(pDM_Odm->Adapter,minRptTime);
#endif
#endif
pDM_Odm->CurrminRptTime = minRptTime;
}
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,(" <=====odm_RATxRPTTimerSetting()\n"));
}
VOID
ODM_RASupport_Init(
IN PDM_ODM_T pDM_Odm
)
{
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RASupport_Init()\n"));
// 2012/02/14 MH Be noticed, the init must be after IC type is recognized!!!!!
@ -658,10 +658,10 @@ ODM_RASupport_Init(
int
int
ODM_RAInfo_Init(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
PODM_RA_INFO_T pRaInfo = &pDM_Odm->RAInfo[MacID];
@ -669,7 +669,7 @@ ODM_RAInfo_Init(
u1Byte WirelessMode=0xFF; //invalid value
u1Byte max_rate_idx = 0x13; //MCS7
if (pDM_Odm->pWirelessMode!=NULL){
WirelessMode=*(pDM_Odm->pWirelessMode);
WirelessMode=*(pDM_Odm->pWirelessMode);
}
if (WirelessMode != 0xFF ){
@ -680,19 +680,19 @@ ODM_RAInfo_Init(
else if (WirelessMode & ODM_WM_B)
max_rate_idx = 0x03;
}
//printk("%s ==>WirelessMode:0x%08x ,max_raid_idx:0x%02x\n ",__func__,WirelessMode,max_rate_idx);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("ODM_RAInfo_Init(): WirelessMode:0x%08x ,max_raid_idx:0x%02x\n",
WirelessMode,max_rate_idx));
pRaInfo->DecisionRate = max_rate_idx;
pRaInfo->PreRate = max_rate_idx;
pRaInfo->HighestRate=max_rate_idx;
#else
pRaInfo->DecisionRate = 0x13;
pRaInfo->PreRate = 0x13;
pRaInfo->HighestRate= 0x13;
#else
pRaInfo->DecisionRate = 0x13;
pRaInfo->PreRate = 0x13;
pRaInfo->HighestRate= 0x13;
#endif
pRaInfo->LowestRate=0;
pRaInfo->RateID=0;
@ -729,7 +729,7 @@ ODM_RAInfo_Init(
return 0;
}
int
int
ODM_RAInfo_Init_all(
IN PDM_ODM_T pDM_Odm
)
@ -748,21 +748,21 @@ ODM_RAInfo_Init_all(
u1Byte
ODM_RA_GetShortGI_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return 0;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("MacID=%d SGI=%d\n", MacID, pDM_Odm->RAInfo[MacID].RateSGI));
return pDM_Odm->RAInfo[MacID].RateSGI;
}
u1Byte
u1Byte
ODM_RA_GetDecisionRate_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
u1Byte DecisionRate = 0;
@ -770,43 +770,43 @@ ODM_RA_GetDecisionRate_8188E(
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return 0;
DecisionRate = (pDM_Odm->RAInfo[MacID].DecisionRate);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" MacID=%d DecisionRate=0x%x\n", MacID, DecisionRate));
return DecisionRate;
}
u1Byte
ODM_RA_GetHwPwrStatus_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
u1Byte PTStage = 5;
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return 0;
PTStage = (pDM_Odm->RAInfo[MacID].PTStage);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("MacID=%d PTStage=0x%x\n", MacID, PTStage));
return PTStage;
}
VOID
VOID
ODM_RA_UpdateRateInfo_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID,
IN u1Byte RateID,
IN u1Byte RateID,
IN u4Byte RateMask,
IN u1Byte SGIEnable
)
{
PODM_RA_INFO_T pRaInfo = NULL;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("MacID=%d RateID=0x%x RateMask=0x%x SGIEnable=%d\n",
MacID, RateID, RateMask, SGIEnable));
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return;
pRaInfo = &(pDM_Odm->RAInfo[MacID]);
pRaInfo->RateID = RateID;
pRaInfo->RateMask = RateMask;
@ -814,16 +814,16 @@ ODM_RA_UpdateRateInfo_8188E(
odm_ARFBRefresh_8188E(pDM_Odm, pRaInfo);
}
VOID
VOID
ODM_RA_SetRSSI_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID,
IN u1Byte Rssi
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID,
IN u1Byte Rssi
)
{
PODM_RA_INFO_T pRaInfo = NULL;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" MacID=%d Rssi=%d\n", MacID, Rssi));
if ((NULL == pDM_Odm) || (MacID >= ASSOCIATE_ENTRY_NUM))
return;
@ -832,10 +832,10 @@ ODM_RA_SetRSSI_8188E(
pRaInfo->RssiStaRA = Rssi;
}
VOID
VOID
ODM_RA_Set_TxRPT_Time(
IN PDM_ODM_T pDM_Odm,
IN u2Byte minRptTime
IN u2Byte minRptTime
)
{
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
@ -846,7 +846,7 @@ ODM_RA_Set_TxRPT_Time(
VOID
ODM_RA_TxRPT2Handle_8188E(
ODM_RA_TxRPT2Handle_8188E(
IN PDM_ODM_T pDM_Odm,
IN pu1Byte TxRPT_Buf,
IN u2Byte TxRPT_Len,
@ -858,11 +858,11 @@ ODM_RA_TxRPT2Handle_8188E(
u1Byte MacId = 0;
pu1Byte pBuffer = NULL;
u4Byte valid = 0, ItemNum = 0;
u2Byte minRptTime = 0x927c;
u2Byte minRptTime = 0x927c;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("=====>ODM_RA_TxRPT2Handle_8188E(): valid0=%d valid1=%d BufferLength=%d\n",
MacIDValidEntry0, MacIDValidEntry1, TxRPT_Len));
ItemNum = TxRPT_Len >> 3;
pBuffer = TxRPT_Buf;
@ -902,8 +902,8 @@ ODM_RA_TxRPT2Handle_8188E(
pRAInfo->DROP;
if (pRAInfo->TOTAL != 0)
{
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n",
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD,
("macid=%d Total=%d R0=%d R1=%d R2=%d R3=%d R4=%d D0=%d valid0=%x valid1=%x\n",
MacId,
pRAInfo->TOTAL,
pRAInfo->RTY[0],
@ -945,11 +945,11 @@ ODM_RA_TxRPT2Handle_8188E(
#ifdef DETECT_STA_EXISTANCE
void RTL8188E_DetectSTAExistance(PDM_ODM_T pDM_Odm, PODM_RA_INFO_T pRAInfo, int MacID);
RTL8188E_DetectSTAExistance(pDM_Odm, pRAInfo, MacId);
#endif
#endif
#endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n",
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
("macid=%d R0=%d R1=%d R2=%d R3=%d R4=%d drop=%d valid0=%x RateID=%d SGI=%d\n",
MacId,
pRAInfo->RTY[0],
pRAInfo->RTY[1],
@ -966,14 +966,14 @@ ODM_RA_TxRPT2Handle_8188E(
}
if (minRptTime > pRAInfo->RptTime)
minRptTime = pRAInfo->RptTime;
minRptTime = pRAInfo->RptTime;
pBuffer += TX_RPT2_ITEM_SIZE;
MacId++;
}while (MacId < ItemNum);
odm_RATxRPTTimerSetting(pDM_Odm,minRptTime);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_RATE_ADAPTIVE, ODM_DBG_LOUD, ("<===== ODM_RA_TxRPT2Handle_8188E()\n"));
}
@ -983,7 +983,7 @@ ODM_RA_TxRPT2Handle_8188E(
static VOID
odm_RATxRPTTimerSetting(
IN PDM_ODM_T pDM_Odm,
IN u2Byte minRptTime
IN u2Byte minRptTime
)
{
return;
@ -992,22 +992,22 @@ odm_RATxRPTTimerSetting(
VOID
ODM_RASupport_Init(
IN PDM_ODM_T pDM_Odm
IN PDM_ODM_T pDM_Odm
)
{
return;
}
int
int
ODM_RAInfo_Init(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
return 0;
}
int
int
ODM_RAInfo_Init_all(
IN PDM_ODM_T pDM_Odm
)
@ -1015,37 +1015,37 @@ ODM_RAInfo_Init_all(
return 0;
}
u1Byte
u1Byte
ODM_RA_GetShortGI_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
return 0;
}
u1Byte
u1Byte
ODM_RA_GetDecisionRate_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
return 0;
}
u1Byte
ODM_RA_GetHwPwrStatus_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID
)
{
return 0;
}
VOID
VOID
ODM_RA_UpdateRateInfo_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID,
IN u1Byte RateID,
IN u1Byte RateID,
IN u4Byte RateMask,
IN u1Byte SGIEnable
)
@ -1053,27 +1053,27 @@ ODM_RA_UpdateRateInfo_8188E(
return;
}
VOID
VOID
ODM_RA_SetRSSI_8188E(
IN PDM_ODM_T pDM_Odm,
IN u1Byte MacID,
IN u1Byte Rssi
)
{
return;
}
VOID
ODM_RA_Set_TxRPT_Time(
IN PDM_ODM_T pDM_Odm,
IN u2Byte minRptTime
IN u1Byte MacID,
IN u1Byte Rssi
)
{
return;
}
VOID
ODM_RA_TxRPT2Handle_8188E(
ODM_RA_Set_TxRPT_Time(
IN PDM_ODM_T pDM_Odm,
IN u2Byte minRptTime
)
{
return;
}
VOID
ODM_RA_TxRPT2Handle_8188E(
IN PDM_ODM_T pDM_Odm,
IN pu1Byte TxRPT_Buf,
IN u2Byte TxRPT_Len,
@ -1083,7 +1083,6 @@ ODM_RA_TxRPT2Handle_8188E(
{
return;
}
#endif

1781
hal/HalHWImg8188E_BB.c
View file

File diff suppressed because it is too large Load diff

657
hal/HalHWImg8188E_MAC.c
View file

@ -1,329 +1,328 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static BOOLEAN
CheckCondition(
const u4Byte Condition,
const u4Byte Hex
)
{
u4Byte _board = (Hex & 0x000000FF);
u4Byte _interface = (Hex & 0x0000FF00) >> 8;
u4Byte _platform = (Hex & 0x00FF0000) >> 16;
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
}
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
u4Byte Array_MAC_REG_8188E[] = {
0x026, 0x00000041,
0x027, 0x00000035,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x431, 0x00000001,
0x432, 0x00000002,
0x433, 0x00000004,
0x434, 0x00000005,
0x435, 0x00000006,
0x436, 0x00000007,
0x437, 0x00000008,
0x438, 0x00000000,
0x439, 0x00000000,
0x43A, 0x00000001,
0x43B, 0x00000002,
0x43C, 0x00000004,
0x43D, 0x00000005,
0x43E, 0x00000006,
0x43F, 0x00000007,
0x440, 0x0000005D,
0x441, 0x00000001,
0x442, 0x00000000,
0x444, 0x00000015,
0x445, 0x000000F0,
0x446, 0x0000000F,
0x447, 0x00000000,
0x458, 0x00000041,
0x459, 0x000000A8,
0x45A, 0x00000072,
0x45B, 0x000000B9,
0x460, 0x00000066,
0x461, 0x00000066,
0x480, 0x00000008,
0x4C8, 0x000000FF,
0x4C9, 0x00000008,
0x4CC, 0x000000FF,
0x4CD, 0x000000FF,
0x4CE, 0x00000001,
0x4D3, 0x00000001,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
0x503, 0x00000000,
0x504, 0x00000028,
0x505, 0x000000A3,
0x506, 0x0000005E,
0x507, 0x00000000,
0x508, 0x0000002B,
0x509, 0x000000A4,
0x50A, 0x0000005E,
0x50B, 0x00000000,
0x50C, 0x0000004F,
0x50D, 0x000000A4,
0x50E, 0x00000000,
0x50F, 0x00000000,
0x512, 0x0000001C,
0x514, 0x0000000A,
0x516, 0x0000000A,
0x525, 0x0000004F,
0x550, 0x00000010,
0x551, 0x00000010,
0x559, 0x00000002,
0x55D, 0x000000FF,
0x605, 0x00000030,
0x608, 0x0000000E,
0x609, 0x0000002A,
0x620, 0x000000FF,
0x621, 0x000000FF,
0x622, 0x000000FF,
0x623, 0x000000FF,
0x624, 0x000000FF,
0x625, 0x000000FF,
0x626, 0x000000FF,
0x627, 0x000000FF,
0x652, 0x00000020,
0x63C, 0x0000000A,
0x63D, 0x0000000A,
0x63E, 0x0000000E,
0x63F, 0x0000000E,
0x640, 0x00000040,
0x66E, 0x00000005,
0x700, 0x00000021,
0x701, 0x00000043,
0x702, 0x00000065,
0x703, 0x00000087,
0x708, 0x00000021,
0x709, 0x00000043,
0x70A, 0x00000065,
0x70B, 0x00000087,
};
HAL_STATUS
ODM_ReadAndConfig_MAC_REG_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
u2Byte count = 0;
pu4Byte ptr_array = NULL;
u1Byte platform = pDM_Odm->SupportPlatform;
u1Byte interfaceValue = pDM_Odm->SupportInterface;
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_MAC_REG_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_MAC_REG_8188E;
BOOLEAN biol = FALSE;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt = 1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif //CONFIG_IOL_IOREG_CFG
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
#endif //CONFIG_IOL_IOREG_CFG
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
else
#endif //endif CONFIG_IOL_IOREG_CFG
{
odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2);
}
continue;
}
else
{ // This line is the start line of branch.
if ( !CheckCondition(Array[i], hex) )
{ // Discard the following (offset, data) pairs.
READ_NEXT_PAIR(v1, v2, i);
while ( v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
READ_NEXT_PAIR(v1, v2, i);
while ( v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
else
#endif //#ifdef CONFIG_IOL_IOREG_CFG
{
odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2);
}
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ IOL Config MAC Success !!!\n");
//compare writed data
{
u4Byte idx;
u1Byte cdata;
// HAL_STATUS_FAILURE;
printk(" MAC data compare => array_len:%d\n",cmpdata_idx);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_Read1Byte(pDM_Odm, cmpdata[idx].addr);
if (cdata != cmpdata[idx].value){
printk("### MAC data compared failed !! addr:0x%04x, data:(0x%02x : 0x%02x) ###\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
//rst = HAL_STATUS_FAILURE;
}
}
//dump data from TX packet buffer
//if (rst == HAL_STATUS_FAILURE)
{
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
}
else{
printk("~~~ MAC IOL_exec_cmds Failed !!!\n");
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
rst = HAL_STATUS_FAILURE;
}
}
#endif //#ifdef CONFIG_IOL_IOREG_CFG
return rst;
}
#endif // end of HWIMG_SUPPORT
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static BOOLEAN
CheckCondition(
const u4Byte Condition,
const u4Byte Hex
)
{
u4Byte _board = (Hex & 0x000000FF);
u4Byte _interface = (Hex & 0x0000FF00) >> 8;
u4Byte _platform = (Hex & 0x00FF0000) >> 16;
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
}
/******************************************************************************
* MAC_REG.TXT
******************************************************************************/
u4Byte Array_MAC_REG_8188E[] = {
0x026, 0x00000041,
0x027, 0x00000035,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x431, 0x00000001,
0x432, 0x00000002,
0x433, 0x00000004,
0x434, 0x00000005,
0x435, 0x00000006,
0x436, 0x00000007,
0x437, 0x00000008,
0x438, 0x00000000,
0x439, 0x00000000,
0x43A, 0x00000001,
0x43B, 0x00000002,
0x43C, 0x00000004,
0x43D, 0x00000005,
0x43E, 0x00000006,
0x43F, 0x00000007,
0x440, 0x0000005D,
0x441, 0x00000001,
0x442, 0x00000000,
0x444, 0x00000015,
0x445, 0x000000F0,
0x446, 0x0000000F,
0x447, 0x00000000,
0x458, 0x00000041,
0x459, 0x000000A8,
0x45A, 0x00000072,
0x45B, 0x000000B9,
0x460, 0x00000066,
0x461, 0x00000066,
0x480, 0x00000008,
0x4C8, 0x000000FF,
0x4C9, 0x00000008,
0x4CC, 0x000000FF,
0x4CD, 0x000000FF,
0x4CE, 0x00000001,
0x4D3, 0x00000001,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
0x503, 0x00000000,
0x504, 0x00000028,
0x505, 0x000000A3,
0x506, 0x0000005E,
0x507, 0x00000000,
0x508, 0x0000002B,
0x509, 0x000000A4,
0x50A, 0x0000005E,
0x50B, 0x00000000,
0x50C, 0x0000004F,
0x50D, 0x000000A4,
0x50E, 0x00000000,
0x50F, 0x00000000,
0x512, 0x0000001C,
0x514, 0x0000000A,
0x516, 0x0000000A,
0x525, 0x0000004F,
0x550, 0x00000010,
0x551, 0x00000010,
0x559, 0x00000002,
0x55D, 0x000000FF,
0x605, 0x00000030,
0x608, 0x0000000E,
0x609, 0x0000002A,
0x620, 0x000000FF,
0x621, 0x000000FF,
0x622, 0x000000FF,
0x623, 0x000000FF,
0x624, 0x000000FF,
0x625, 0x000000FF,
0x626, 0x000000FF,
0x627, 0x000000FF,
0x652, 0x00000020,
0x63C, 0x0000000A,
0x63D, 0x0000000A,
0x63E, 0x0000000E,
0x63F, 0x0000000E,
0x640, 0x00000040,
0x66E, 0x00000005,
0x700, 0x00000021,
0x701, 0x00000043,
0x702, 0x00000065,
0x703, 0x00000087,
0x708, 0x00000021,
0x709, 0x00000043,
0x70A, 0x00000065,
0x70B, 0x00000087,
};
HAL_STATUS
ODM_ReadAndConfig_MAC_REG_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
u2Byte count = 0;
pu4Byte ptr_array = NULL;
u1Byte platform = pDM_Odm->SupportPlatform;
u1Byte interfaceValue = pDM_Odm->SupportInterface;
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_MAC_REG_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_MAC_REG_8188E;
BOOLEAN biol = FALSE;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt = 1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif //CONFIG_IOL_IOREG_CFG
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
#endif //CONFIG_IOL_IOREG_CFG
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
else
#endif //endif CONFIG_IOL_IOREG_CFG
{
odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2);
}
continue;
}
else
{ // This line is the start line of branch.
if ( !CheckCondition(Array[i], hex) )
{ // Discard the following (offset, data) pairs.
READ_NEXT_PAIR(v1, v2, i);
while ( v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
READ_NEXT_PAIR(v1, v2, i);
while ( v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
rtw_IOL_append_WB_cmd(pxmit_frame,(u2Byte)v1, (u1Byte)v2,0xFF);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
else
#endif //#ifdef CONFIG_IOL_IOREG_CFG
{
odm_ConfigMAC_8188E(pDM_Odm, v1, (u1Byte)v2);
}
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ IOL Config MAC Success !!!\n");
//compare writed data
{
u4Byte idx;
u1Byte cdata;
// HAL_STATUS_FAILURE;
printk(" MAC data compare => array_len:%d\n",cmpdata_idx);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_Read1Byte(pDM_Odm, cmpdata[idx].addr);
if (cdata != cmpdata[idx].value){
printk("### MAC data compared failed !! addr:0x%04x, data:(0x%02x : 0x%02x) ###\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
//rst = HAL_STATUS_FAILURE;
}
}
//dump data from TX packet buffer
//if (rst == HAL_STATUS_FAILURE)
{
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
}
else{
printk("~~~ MAC IOL_exec_cmds Failed !!!\n");
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
rst = HAL_STATUS_FAILURE;
}
}
#endif //#ifdef CONFIG_IOL_IOREG_CFG
return rst;
}
#endif // end of HWIMG_SUPPORT

753
hal/HalHWImg8188E_RF.c
View file

@ -1,377 +1,376 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static BOOLEAN
CheckCondition(
const u4Byte Condition,
const u4Byte Hex
)
{
u4Byte _board = (Hex & 0x000000FF);
u4Byte _interface = (Hex & 0x0000FF00) >> 8;
u4Byte _platform = (Hex & 0x00FF0000) >> 16;
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
}
/******************************************************************************
* RadioA_1T.TXT
******************************************************************************/
u4Byte Array_RadioA_1T_8188E[] = {
0x000, 0x00030000,
0x008, 0x00084000,
0x018, 0x00000407,
0x019, 0x00000012,
0x01E, 0x00080009,
0x01F, 0x00000880,
0x02F, 0x0001A060,
0x03F, 0x00000000,
0x042, 0x000060C0,
0x057, 0x000D0000,
0x058, 0x000BE180,
0x067, 0x00001552,
0x083, 0x00000000,
0x0B0, 0x000FF8FC,
0x0B1, 0x00054400,
0x0B2, 0x000CCC19,
0x0B4, 0x00043003,
0x0B6, 0x0004953E,
0x0B7, 0x0001C718,
0x0B8, 0x000060FF,
0x0B9, 0x00080001,
0x0BA, 0x00040000,
0x0BB, 0x00000400,
0x0BF, 0x000C0000,
0x0C2, 0x00002400,
0x0C3, 0x00000009,
0x0C4, 0x00040C91,
0x0C5, 0x00099999,
0x0C6, 0x000000A3,
0x0C7, 0x00088820,
0x0C8, 0x00076C06,
0x0C9, 0x00000000,
0x0CA, 0x00080000,
0x0DF, 0x00000180,
0x0EF, 0x000001A0,
0x051, 0x0006B27D,
0xFF0F041F, 0xABCD,
0x052, 0x0007E4DD,
0xCDCDCDCD, 0xCDCD,
0x052, 0x0007E49D,
0xFF0F041F, 0xDEAD,
0x053, 0x00000073,
0x056, 0x00051FF3,
0x035, 0x00000086,
0x035, 0x00000186,
0x035, 0x00000286,
0x036, 0x00001C25,
0x036, 0x00009C25,
0x036, 0x00011C25,
0x036, 0x00019C25,
0x0B6, 0x00048538,
0x018, 0x00000C07,
0x05A, 0x0004BD00,
0x019, 0x000739D0,
0x034, 0x0000ADF3,
0x034, 0x00009DF0,
0x034, 0x00008DED,
0x034, 0x00007DEA,
0x034, 0x00006DE7,
0x034, 0x000054EE,
0x034, 0x000044EB,
0x034, 0x000034E8,
0x034, 0x0000246B,
0x034, 0x00001468,
0x034, 0x0000006D,
0x000, 0x00030159,
0x084, 0x00068200,
0x086, 0x000000CE,
0x087, 0x00048A00,
0x08E, 0x00065540,
0x08F, 0x00088000,
0x0EF, 0x000020A0,
0x03B, 0x000F02B0,
0x03B, 0x000EF7B0,
0x03B, 0x000D4FB0,
0x03B, 0x000CF060,
0x03B, 0x000B0090,
0x03B, 0x000A0080,
0x03B, 0x00090080,
0x03B, 0x0008F780,
0x03B, 0x000722B0,
0x03B, 0x0006F7B0,
0x03B, 0x00054FB0,
0x03B, 0x0004F060,
0x03B, 0x00030090,
0x03B, 0x00020080,
0x03B, 0x00010080,
0x03B, 0x0000F780,
0x0EF, 0x000000A0,
0x000, 0x00010159,
0x018, 0x0000F407,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01F, 0x00080003,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01E, 0x00000001,
0x01F, 0x00080000,
0x000, 0x00033E60,
};
HAL_STATUS
ODM_ReadAndConfig_RadioA_1T_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
u2Byte count = 0;
pu4Byte ptr_array = NULL;
u1Byte platform = pDM_Odm->SupportPlatform;
u1Byte interfaceValue = pDM_Odm->SupportInterface;
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_RadioA_1T_8188E;
BOOLEAN biol = FALSE;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt = 1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif//#ifdef CONFIG_IOL_IOREG_CFG
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
#endif//#ifdef CONFIG_IOL_IOREG_CFG
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xffe)
{
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
}
else if (v1 == 0xfd){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5);
}
else if (v1 == 0xfc){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1);
}
else if (v1 == 0xfb){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50);
}
else if (v1 == 0xfa){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5);
}
else if (v1 == 0xf9){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1);
}
else{
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif //#ifdef CONFIG_IOL_IOREG_CFG
{
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
continue;
}
else
{ // This line is the start line of branch.
if ( !CheckCondition(Array[i], hex) )
{ // Discard the following (offset, data) pairs.
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xffe)
{
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
}
else if (v1 == 0xfd){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5);
}
else if (v1 == 0xfc){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1);
}
else if (v1 == 0xfb){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50);
}
else if (v1 == 0xfa){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5);
}
else if (v1 == 0xf9){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1);
}
else{
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif //#ifdef CONFIG_IOL_IOREG_CFG
{
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s Success !!!\n",__func__);
{
u4Byte idx;
u4Byte cdata;
printk(" %s data compare => array_len:%d\n",__func__,cmpdata_idx);
printk("### %s data compared !!###\n",__func__);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A,cmpdata[idx].addr,bRFRegOffsetMask);
if (cdata != cmpdata[idx].value){
printk("addr:0x%04x, data:(0x%02x : 0x%02x)\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
rst = HAL_STATUS_FAILURE;
}
}
printk("### %s data compared !!###\n",__func__);
//if (rst == HAL_STATUS_FAILURE)
{//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
}
else{
rst = HAL_STATUS_FAILURE;
printk("~~~ IOL Config %s Failed !!!\n",__func__);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
}
}
#endif //#ifdef CONFIG_IOL_IOREG_CFG
return rst;
}
#endif // end of HWIMG_SUPPORT
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#include "odm_precomp.h"
#ifdef CONFIG_IOL_IOREG_CFG
#include <rtw_iol.h>
#endif
#if (RTL8188E_SUPPORT == 1)
static BOOLEAN
CheckCondition(
const u4Byte Condition,
const u4Byte Hex
)
{
u4Byte _board = (Hex & 0x000000FF);
u4Byte _interface = (Hex & 0x0000FF00) >> 8;
u4Byte _platform = (Hex & 0x00FF0000) >> 16;
u4Byte cond = Condition;
if ( Condition == 0xCDCDCDCD )
return TRUE;
cond = Condition & 0x000000FF;
if ( (_board == cond) && cond != 0x00)
return FALSE;
cond = Condition & 0x0000FF00;
cond = cond >> 8;
if ( (_interface & cond) == 0 && cond != 0x07)
return FALSE;
cond = Condition & 0x00FF0000;
cond = cond >> 16;
if ( (_platform & cond) == 0 && cond != 0x0F)
return FALSE;
return TRUE;
}
/******************************************************************************
* RadioA_1T.TXT
******************************************************************************/
u4Byte Array_RadioA_1T_8188E[] = {
0x000, 0x00030000,
0x008, 0x00084000,
0x018, 0x00000407,
0x019, 0x00000012,
0x01E, 0x00080009,
0x01F, 0x00000880,
0x02F, 0x0001A060,
0x03F, 0x00000000,
0x042, 0x000060C0,
0x057, 0x000D0000,
0x058, 0x000BE180,
0x067, 0x00001552,
0x083, 0x00000000,
0x0B0, 0x000FF8FC,
0x0B1, 0x00054400,
0x0B2, 0x000CCC19,
0x0B4, 0x00043003,
0x0B6, 0x0004953E,
0x0B7, 0x0001C718,
0x0B8, 0x000060FF,
0x0B9, 0x00080001,
0x0BA, 0x00040000,
0x0BB, 0x00000400,
0x0BF, 0x000C0000,
0x0C2, 0x00002400,
0x0C3, 0x00000009,
0x0C4, 0x00040C91,
0x0C5, 0x00099999,
0x0C6, 0x000000A3,
0x0C7, 0x00088820,
0x0C8, 0x00076C06,
0x0C9, 0x00000000,
0x0CA, 0x00080000,
0x0DF, 0x00000180,
0x0EF, 0x000001A0,
0x051, 0x0006B27D,
0xFF0F041F, 0xABCD,
0x052, 0x0007E4DD,
0xCDCDCDCD, 0xCDCD,
0x052, 0x0007E49D,
0xFF0F041F, 0xDEAD,
0x053, 0x00000073,
0x056, 0x00051FF3,
0x035, 0x00000086,
0x035, 0x00000186,
0x035, 0x00000286,
0x036, 0x00001C25,
0x036, 0x00009C25,
0x036, 0x00011C25,
0x036, 0x00019C25,
0x0B6, 0x00048538,
0x018, 0x00000C07,
0x05A, 0x0004BD00,
0x019, 0x000739D0,
0x034, 0x0000ADF3,
0x034, 0x00009DF0,
0x034, 0x00008DED,
0x034, 0x00007DEA,
0x034, 0x00006DE7,
0x034, 0x000054EE,
0x034, 0x000044EB,
0x034, 0x000034E8,
0x034, 0x0000246B,
0x034, 0x00001468,
0x034, 0x0000006D,
0x000, 0x00030159,
0x084, 0x00068200,
0x086, 0x000000CE,
0x087, 0x00048A00,
0x08E, 0x00065540,
0x08F, 0x00088000,
0x0EF, 0x000020A0,
0x03B, 0x000F02B0,
0x03B, 0x000EF7B0,
0x03B, 0x000D4FB0,
0x03B, 0x000CF060,
0x03B, 0x000B0090,
0x03B, 0x000A0080,
0x03B, 0x00090080,
0x03B, 0x0008F780,
0x03B, 0x000722B0,
0x03B, 0x0006F7B0,
0x03B, 0x00054FB0,
0x03B, 0x0004F060,
0x03B, 0x00030090,
0x03B, 0x00020080,
0x03B, 0x00010080,
0x03B, 0x0000F780,
0x0EF, 0x000000A0,
0x000, 0x00010159,
0x018, 0x0000F407,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01F, 0x00080003,
0xFFE, 0x00000000,
0xFFE, 0x00000000,
0x01E, 0x00000001,
0x01F, 0x00080000,
0x000, 0x00033E60,
};
HAL_STATUS
ODM_ReadAndConfig_RadioA_1T_8188E(
IN PDM_ODM_T pDM_Odm
)
{
#define READ_NEXT_PAIR(v1, v2, i) do { i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
u4Byte hex = 0;
u4Byte i = 0;
u2Byte count = 0;
pu4Byte ptr_array = NULL;
u1Byte platform = pDM_Odm->SupportPlatform;
u1Byte interfaceValue = pDM_Odm->SupportInterface;
u1Byte board = pDM_Odm->BoardType;
u4Byte ArrayLen = sizeof(Array_RadioA_1T_8188E)/sizeof(u4Byte);
pu4Byte Array = Array_RadioA_1T_8188E;
BOOLEAN biol = FALSE;
#ifdef CONFIG_IOL_IOREG_CFG
PADAPTER Adapter = pDM_Odm->Adapter;
struct xmit_frame *pxmit_frame;
u8 bndy_cnt = 1;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
struct cmd_cmp cmpdata[ArrayLen];
u4Byte cmpdata_idx=0;
#endif
#endif//#ifdef CONFIG_IOL_IOREG_CFG
HAL_STATUS rst =HAL_STATUS_SUCCESS;
hex += board;
hex += interfaceValue << 8;
hex += platform << 16;
hex += 0xFF000000;
#ifdef CONFIG_IOL_IOREG_CFG
biol = rtw_IOL_applied(Adapter);
if (biol){
if ((pxmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL)
{
printk("rtw_IOL_accquire_xmit_frame failed\n");
return HAL_STATUS_FAILURE;
}
}
#endif//#ifdef CONFIG_IOL_IOREG_CFG
for (i = 0; i < ArrayLen; i += 2 )
{
u4Byte v1 = Array[i];
u4Byte v2 = Array[i+1];
// This (offset, data) pair meets the condition.
if ( v1 < 0xCDCDCDCD )
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xffe)
{
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
}
else if (v1 == 0xfd){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5);
}
else if (v1 == 0xfc){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1);
}
else if (v1 == 0xfb){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50);
}
else if (v1 == 0xfa){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5);
}
else if (v1 == 0xf9){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1);
}
else{
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif //#ifdef CONFIG_IOL_IOREG_CFG
{
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
continue;
}
else
{ // This line is the start line of branch.
if ( !CheckCondition(Array[i], hex) )
{ // Discard the following (offset, data) pairs.
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
i -= 2; // prevent from for-loop += 2
}
else // Configure matched pairs and skip to end of if-else.
{
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen -2)
{
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
if (rtw_IOL_cmd_boundary_handle(pxmit_frame))
bndy_cnt++;
if (v1 == 0xffe)
{
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,50);
}
else if (v1 == 0xfd){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,5);
}
else if (v1 == 0xfc){
rtw_IOL_append_DELAY_MS_cmd(pxmit_frame,1);
}
else if (v1 == 0xfb){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,50);
}
else if (v1 == 0xfa){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,5);
}
else if (v1 == 0xf9){
rtw_IOL_append_DELAY_US_cmd(pxmit_frame,1);
}
else{
rtw_IOL_append_WRF_cmd(pxmit_frame, ODM_RF_PATH_A,(u2Byte)v1, v2,bRFRegOffsetMask) ;
#ifdef CONFIG_IOL_IOREG_CFG_DBG
cmpdata[cmpdata_idx].addr = v1;
cmpdata[cmpdata_idx].value= v2;
cmpdata_idx++;
#endif
}
}
else
#endif //#ifdef CONFIG_IOL_IOREG_CFG
{
odm_ConfigRF_RadioA_8188E(pDM_Odm, v1, v2);
}
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen -2)
{
READ_NEXT_PAIR(v1, v2, i);
}
}
}
}
#ifdef CONFIG_IOL_IOREG_CFG
if (biol){
//printk("==> %s, pktlen = %d,bndy_cnt = %d\n",__func__,pxmit_frame->attrib.pktlen+4+32,bndy_cnt);
if (rtw_IOL_exec_cmds_sync(pDM_Odm->Adapter, pxmit_frame, 1000, bndy_cnt))
{
#ifdef CONFIG_IOL_IOREG_CFG_DBG
printk("~~~ %s Success !!!\n",__func__);
{
u4Byte idx;
u4Byte cdata;
printk(" %s data compare => array_len:%d\n",__func__,cmpdata_idx);
printk("### %s data compared !!###\n",__func__);
for (idx=0;idx< cmpdata_idx;idx++)
{
cdata = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A,cmpdata[idx].addr,bRFRegOffsetMask);
if (cdata != cmpdata[idx].value){
printk("addr:0x%04x, data:(0x%02x : 0x%02x)\n",
cmpdata[idx].addr,cmpdata[idx].value,cdata);
rst = HAL_STATUS_FAILURE;
}
}
printk("### %s data compared !!###\n",__func__);
//if (rst == HAL_STATUS_FAILURE)
{//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
}
else{
rst = HAL_STATUS_FAILURE;
printk("~~~ IOL Config %s Failed !!!\n",__func__);
#ifdef CONFIG_IOL_IOREG_CFG_DBG
{
//dump data from TX packet buffer
rtw_IOL_cmd_tx_pkt_buf_dump(pDM_Odm->Adapter,pxmit_frame->attrib.pktlen+32);
}
#endif //CONFIG_IOL_IOREG_CFG_DBG
}
}
#endif //#ifdef CONFIG_IOL_IOREG_CFG
return rst;
}
#endif // end of HWIMG_SUPPORT

609
hal/HalPhyRf.c
View file

File diff suppressed because it is too large Load diff

6774
hal/HalPhyRf_8188e.c
View file

File diff suppressed because it is too large Load diff

372
hal/HalPwrSeqCmd.c
View file

@ -1,187 +1,185 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
HalPwrSeqCmd.c
Abstract:
Implement HW Power sequence configuration CMD handling routine for Realtek devices.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
2011-07-07 Roger Create.
--*/
#include <HalPwrSeqCmd.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_ops.h>
#endif
//
// Description:
// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
//
// Assumption:
// We should follow specific format which was released from HW SD.
//
// 2011.07.07, added by Roger.
//
u8 HalPwrSeqCmdParsing(
PADAPTER padapter,
u8 CutVersion,
u8 FabVersion,
u8 InterfaceType,
WLAN_PWR_CFG PwrSeqCmd[])
{
WLAN_PWR_CFG PwrCfgCmd = {0};
u8 bPollingBit = _FALSE;
u32 AryIdx = 0;
u8 value = 0;
u32 offset = 0;
u32 pollingCount = 0; // polling autoload done.
u32 maxPollingCnt = 5000;
do {
PwrCfgCmd = PwrSeqCmd[AryIdx];
RT_TRACE(_module_hal_init_c_ , _drv_info_,
("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
GET_PWR_CFG_OFFSET(PwrCfgCmd),
GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
GET_PWR_CFG_BASE(PwrCfgCmd),
GET_PWR_CFG_CMD(PwrCfgCmd),
GET_PWR_CFG_MASK(PwrCfgCmd),
GET_PWR_CFG_VALUE(PwrCfgCmd)));
//2 Only Handle the command whose FAB, CUT, and Interface are matched
if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType))
{
switch (GET_PWR_CFG_CMD(PwrCfgCmd))
{
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_SDIO_HCI
//
// <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface
// 2011.07.07.
//
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
{
// Read Back SDIO Local value
value = SdioLocalCmd52Read1Byte(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write Back SDIO Local value
SdioLocalCmd52Write1Byte(padapter, offset, value);
}
else
#endif
{
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
// Read the value from system register
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write the value back to sytem register
rtw_write8(padapter, offset, value);
}
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
bPollingBit = _FALSE;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
do {
#ifdef CONFIG_SDIO_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
value = SdioLocalCmd52Read1Byte(padapter, offset);
else
#endif
value = rtw_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
bPollingBit = _TRUE;
else
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
DBG_871X("Fail to polling Offset[%#x]\n", offset);
return _FALSE;
}
} while (!bPollingBit);
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
break;
case PWR_CMD_END:
// When this command is parsed, end the process
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
return _TRUE;
break;
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
break;
}
}
AryIdx++;//Add Array Index
}while (1);
return _TRUE;
}
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
/*++
Copyright (c) Realtek Semiconductor Corp. All rights reserved.
Module Name:
HalPwrSeqCmd.c
Abstract:
Implement HW Power sequence configuration CMD handling routine for Realtek devices.
Major Change History:
When Who What
---------- --------------- -------------------------------
2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
2011-07-07 Roger Create.
--*/
#include <HalPwrSeqCmd.h>
#ifdef CONFIG_SDIO_HCI
#include <sdio_ops.h>
#elif defined(CONFIG_GSPI_HCI)
#include <gspi_ops.h>
#endif
//
// Description:
// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
//
// Assumption:
// We should follow specific format which was released from HW SD.
//
// 2011.07.07, added by Roger.
//
u8 HalPwrSeqCmdParsing(
PADAPTER padapter,
u8 CutVersion,
u8 FabVersion,
u8 InterfaceType,
WLAN_PWR_CFG PwrSeqCmd[])
{
WLAN_PWR_CFG PwrCfgCmd = {0};
u8 bPollingBit = _FALSE;
u32 AryIdx = 0;
u8 value = 0;
u32 offset = 0;
u32 pollingCount = 0; // polling autoload done.
u32 maxPollingCnt = 5000;
do {
PwrCfgCmd = PwrSeqCmd[AryIdx];
RT_TRACE(_module_hal_init_c_ , _drv_info_,
("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
GET_PWR_CFG_OFFSET(PwrCfgCmd),
GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
GET_PWR_CFG_BASE(PwrCfgCmd),
GET_PWR_CFG_CMD(PwrCfgCmd),
GET_PWR_CFG_MASK(PwrCfgCmd),
GET_PWR_CFG_VALUE(PwrCfgCmd)));
//2 Only Handle the command whose FAB, CUT, and Interface are matched
if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType))
{
switch (GET_PWR_CFG_CMD(PwrCfgCmd))
{
case PWR_CMD_READ:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
break;
case PWR_CMD_WRITE:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_SDIO_HCI
//
// <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface
// 2011.07.07.
//
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
{
// Read Back SDIO Local value
value = SdioLocalCmd52Read1Byte(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write Back SDIO Local value
SdioLocalCmd52Write1Byte(padapter, offset, value);
}
else
#endif
{
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
// Read the value from system register
value = rtw_read8(padapter, offset);
value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
// Write the value back to sytem register
rtw_write8(padapter, offset, value);
}
break;
case PWR_CMD_POLLING:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
bPollingBit = _FALSE;
offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
#ifdef CONFIG_GSPI_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
offset = SPI_LOCAL_OFFSET | offset;
#endif
do {
#ifdef CONFIG_SDIO_HCI
if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
value = SdioLocalCmd52Read1Byte(padapter, offset);
else
#endif
value = rtw_read8(padapter, offset);
value &= GET_PWR_CFG_MASK(PwrCfgCmd);
if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
bPollingBit = _TRUE;
else
rtw_udelay_os(10);
if (pollingCount++ > maxPollingCnt) {
DBG_871X("Fail to polling Offset[%#x]\n", offset);
return _FALSE;
}
} while (!bPollingBit);
break;
case PWR_CMD_DELAY:
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
else
rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
break;
case PWR_CMD_END:
// When this command is parsed, end the process
RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
return _TRUE;
break;
default:
RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
break;
}
}
AryIdx++;//Add Array Index
}while (1);
return _TRUE;
}

89
hal/hal_com.c
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@ -114,7 +114,7 @@ hal_com_get_channel_plan(
u8 MRateToHwRate(u8 rate)
{
u8 ret = DESC_RATE1M;
switch (rate)
{
// CCK and OFDM non-HT rates
@ -158,9 +158,9 @@ void HalSetBrateCfg(
{
is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
brate = mBratesOS[i] & 0x7f;
if ( is_brate )
{
{
switch (brate)
{
case IEEE80211_CCK_RATE_1MB: *pBrateCfg |= RATE_1M; break;
@ -191,7 +191,7 @@ _OneOutPipeMapping(
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];//BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
@ -201,89 +201,89 @@ _OneOutPipeMapping(
static VOID
_TwoOutPipeMapping(
IN PADAPTER pAdapter,
IN BOOLEAN bWIFICfg
IN BOOLEAN bWIFICfg
)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
if (bWIFICfg){ //WMM
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 0, 1, 0, 1, 0, 0, 0, 0, 0 };
//0:H, 1:L
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 0, 1, 0, 1, 0, 0, 0, 0, 0 };
//0:H, 1:L
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
}
else{//typical setting
//BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 1, 1, 0, 0, 0, 0, 0, 0, 0 };
//0:H, 1:L
//BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 1, 1, 0, 0, 0, 0, 0, 0, 0 };
//0:H, 1:L
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
}
}
static VOID _ThreeOutPipeMapping(
IN PADAPTER pAdapter,
IN BOOLEAN bWIFICfg
IN BOOLEAN bWIFICfg
)
{
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
if (bWIFICfg){//for WMM
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
//0:H, 1:N, 2:L
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
//0:H, 1:N, 2:L
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
}
else{//typical setting
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
//0:H, 1:N, 2:L
// BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
//{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
//0:H, 1:N, 2:L
pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
}
}
@ -297,7 +297,7 @@ Hal_MappingOutPipe(
struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
BOOLEAN result = _TRUE;
switch (NumOutPipe)
@ -317,7 +317,7 @@ Hal_MappingOutPipe(
}
return result;
}
void hal_init_macaddr(_adapter *adapter)
@ -329,10 +329,10 @@ void hal_init_macaddr(_adapter *adapter)
#endif
}
/*
/*
* C2H event format:
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
* Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
*/
void c2h_evt_clear(_adapter *adapter)
@ -363,7 +363,7 @@ s32 c2h_evt_read(_adapter *adapter, u8 *buf)
_rtw_memset(c2h_evt, 0, 16);
*buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
*(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
&c2h_evt , sizeof(c2h_evt));
@ -383,7 +383,7 @@ s32 c2h_evt_read(_adapter *adapter, u8 *buf)
ret = _SUCCESS;
clear_evt:
/*
/*
* Clear event to notify FW we have read the command.
* If this field isn't clear, the FW won't update the next command message.
*/
@ -391,4 +391,3 @@ clear_evt:
exit:
return ret;
}

101
hal/hal_intf.c
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@ -70,7 +70,7 @@ void rtw_hal_dm_deinit(_adapter *padapter)
{
// cancel dm timer
if (padapter->HalFunc.dm_deinit)
padapter->HalFunc.dm_deinit(padapter);
padapter->HalFunc.dm_deinit(padapter);
}
void rtw_hal_sw_led_init(_adapter *padapter)
{
@ -92,7 +92,7 @@ u32 rtw_hal_power_on(_adapter *padapter)
}
uint rtw_hal_init(_adapter *padapter)
uint rtw_hal_init(_adapter *padapter)
{
uint status = _SUCCESS;
@ -113,12 +113,12 @@ uint rtw_hal_init(_adapter *padapter)
}
else
{
status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
status = padapter->HalFunc.hal_init(padapter->pbuddy_adapter);
if (status == _SUCCESS){
padapter->pbuddy_adapter->hw_init_completed = _TRUE;
}
else{
padapter->pbuddy_adapter->hw_init_completed = _FALSE;
padapter->pbuddy_adapter->hw_init_completed = _FALSE;
RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail(pbuddy_adapter)\n"));
DBG_871X("rtw_hal_init: hal__init fail(pbuddy_adapter)\n");
return status;
@ -133,14 +133,14 @@ uint rtw_hal_init(_adapter *padapter)
if (status == _SUCCESS){
padapter->hw_init_completed = _TRUE;
if (padapter->registrypriv.notch_filter == 1)
rtw_hal_notch_filter(padapter, 1);
rtw_hal_reset_security_engine(padapter);
}
else{
padapter->hw_init_completed = _FALSE;
padapter->hw_init_completed = _FALSE;
DBG_871X("rtw_hal_init: hal__init fail\n");
}
@ -148,12 +148,12 @@ uint rtw_hal_init(_adapter *padapter)
return status;
}
}
uint rtw_hal_deinit(_adapter *padapter)
{
uint status = _SUCCESS;
_func_enter_;
status = padapter->HalFunc.hal_deinit(padapter);
@ -165,9 +165,9 @@ _func_enter_;
{
DBG_871X("\n rtw_hal_deinit: hal_init fail\n");
}
_func_exit_;
return status;
}
@ -184,17 +184,17 @@ void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
}
u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
{
{
if (padapter->HalFunc.SetHalDefVarHandler)
return padapter->HalFunc.SetHalDefVarHandler(padapter,eVariable,pValue);
return _FAIL;
}
u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
{
{
if (padapter->HalFunc.GetHalDefVarHandler)
return padapter->HalFunc.GetHalDefVarHandler(padapter,eVariable,pValue);
return _FAIL;
}
return _FAIL;
}
void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1,BOOLEAN bSet)
{
@ -211,43 +211,43 @@ void rtw_hal_enable_interrupt(_adapter *padapter)
{
if (padapter->HalFunc.enable_interrupt)
padapter->HalFunc.enable_interrupt(padapter);
else
else
DBG_871X("%s: HalFunc.enable_interrupt is NULL!\n", __func__);
}
void rtw_hal_disable_interrupt(_adapter *padapter)
{
if (padapter->HalFunc.disable_interrupt)
padapter->HalFunc.disable_interrupt(padapter);
else
else
DBG_871X("%s: HalFunc.disable_interrupt is NULL!\n", __func__);
}
u32 rtw_hal_inirp_init(_adapter *padapter)
{
u32 rst = _FAIL;
if (padapter->HalFunc.inirp_init)
rst = padapter->HalFunc.inirp_init(padapter);
else
DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__func__);
if (padapter->HalFunc.inirp_init)
rst = padapter->HalFunc.inirp_init(padapter);
else
DBG_871X(" %s HalFunc.inirp_init is NULL!!!\n",__func__);
return rst;
}
u32 rtw_hal_inirp_deinit(_adapter *padapter)
{
if (padapter->HalFunc.inirp_deinit)
return padapter->HalFunc.inirp_deinit(padapter);
return _FAIL;
}
u8 rtw_hal_intf_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id, u8* val)
{
if (padapter->HalFunc.interface_ps_func)
{
if (padapter->HalFunc.interface_ps_func)
return padapter->HalFunc.interface_ps_func(padapter,efunc_id,val);
return _FAIL;
}
@ -257,7 +257,7 @@ s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
if (padapter->HalFunc.hal_xmit)
return padapter->HalFunc.hal_xmit(padapter, pxmitframe);
return _FALSE;
return _FALSE;
}
s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
@ -269,7 +269,7 @@ s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
}
s32 rtw_hal_init_xmit_priv(_adapter *padapter)
{
{
if (padapter->HalFunc.init_xmit_priv != NULL)
return padapter->HalFunc.init_xmit_priv(padapter);
return _FAIL;
@ -281,14 +281,14 @@ void rtw_hal_free_xmit_priv(_adapter *padapter)
}
s32 rtw_hal_init_recv_priv(_adapter *padapter)
{
{
if (padapter->HalFunc.init_recv_priv)
return padapter->HalFunc.init_recv_priv(padapter);
return _FAIL;
}
void rtw_hal_free_recv_priv(_adapter *padapter)
{
{
if (padapter->HalFunc.free_recv_priv)
padapter->HalFunc.free_recv_priv(padapter);
}
@ -300,19 +300,19 @@ void rtw_hal_update_ra_mask(_adapter *padapter, u32 mac_id, u8 rssi_level)
if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)
{
struct sta_info *psta = NULL;
struct sta_priv *pstapriv = &padapter->stapriv;
#ifdef CONFIG_NATIVEAP_MLME
struct sta_priv *pstapriv = &padapter->stapriv;
#ifdef CONFIG_NATIVEAP_MLME
if ((mac_id-1)>0)
psta = pstapriv->sta_aid[(mac_id-1) - 1];
psta = pstapriv->sta_aid[(mac_id-1) - 1];
#endif
if (psta)
add_RATid(padapter, psta, 0);//todo: based on rssi_level
}
else
{
{
if (padapter->HalFunc.UpdateRAMaskHandler)
padapter->HalFunc.UpdateRAMaskHandler(padapter,mac_id,rssi_level);
}
}
}
void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg, u8 rssi_level)
@ -320,7 +320,7 @@ void rtw_hal_add_ra_tid(_adapter *padapter, u32 bitmap, u8 arg, u8 rssi_level)
if (padapter->HalFunc.Add_RateATid)
padapter->HalFunc.Add_RateATid(padapter, bitmap, arg, rssi_level);
}
#ifdef CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
void rtw_hal_clone_data(_adapter *dst_padapter, _adapter *src_padapter)
{
if (dst_padapter->HalFunc.clone_haldata)
@ -363,7 +363,7 @@ u32 rtw_hal_read_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask
void rtw_hal_write_rfreg(_adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
{
if (padapter->HalFunc.write_rfreg)
padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
padapter->HalFunc.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
}
s32 rtw_hal_interrupt_handler(_adapter *padapter)
@ -390,7 +390,7 @@ void rtw_hal_dm_watchdog(_adapter *padapter)
#if defined(CONFIG_CONCURRENT_MODE)
if (padapter->adapter_type != PRIMARY_ADAPTER)
return;
#endif
#endif
if (padapter->HalFunc.hal_dm_watchdog)
padapter->HalFunc.hal_dm_watchdog(padapter);
}
@ -398,16 +398,16 @@ void rtw_hal_dm_watchdog(_adapter *padapter)
void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
{
if (padapter->HalFunc.SetBeaconRelatedRegistersHandler)
padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter);
padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter);
}
#ifdef CONFIG_ANTENNA_DIVERSITY
u8 rtw_hal_antdiv_before_linked(_adapter *padapter)
{
{
if (padapter->HalFunc.AntDivBeforeLinkHandler)
return padapter->HalFunc.AntDivBeforeLinkHandler(padapter);
return _FALSE;
return _FALSE;
}
void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src)
{
@ -429,12 +429,12 @@ s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
void rtw_hal_sreset_init(_adapter *padapter)
{
if (padapter->HalFunc.sreset_init_value)
padapter->HalFunc.sreset_init_value(padapter);
padapter->HalFunc.sreset_init_value(padapter);
}
void rtw_hal_sreset_reset(_adapter *padapter)
{
if (padapter->HalFunc.silentreset)
padapter->HalFunc.silentreset(padapter);
padapter->HalFunc.silentreset(padapter);
}
void rtw_hal_sreset_reset_value(_adapter *padapter)
@ -450,18 +450,18 @@ void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
return;
#endif
if (padapter->HalFunc.sreset_xmit_status_check)
padapter->HalFunc.sreset_xmit_status_check(padapter);
padapter->HalFunc.sreset_xmit_status_check(padapter);
}
void rtw_hal_sreset_linked_status_check(_adapter *padapter)
{
if (padapter->HalFunc.sreset_linked_status_check)
padapter->HalFunc.sreset_linked_status_check(padapter);
padapter->HalFunc.sreset_linked_status_check(padapter);
}
u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
{
u8 status = 0;
if (padapter->HalFunc.sreset_get_wifi_status)
status = padapter->HalFunc.sreset_get_wifi_status(padapter);
if (padapter->HalFunc.sreset_get_wifi_status)
status = padapter->HalFunc.sreset_get_wifi_status(padapter);
return status;
}
@ -488,7 +488,7 @@ s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
void rtw_hal_notch_filter(_adapter *adapter, bool enable)
{
if (adapter->HalFunc.hal_notch_filter)
adapter->HalFunc.hal_notch_filter(adapter,enable);
adapter->HalFunc.hal_notch_filter(adapter,enable);
}
void rtw_hal_reset_security_engine(_adapter * adapter)
@ -509,4 +509,3 @@ c2h_id_filter rtw_hal_c2h_id_filter_ccx(_adapter *adapter)
{
return adapter->HalFunc.c2h_id_filter_ccx;
}

2330
hal/odm.c
View file

File diff suppressed because it is too large Load diff

2313
hal/odm_HWConfig.c
View file

File diff suppressed because it is too large Load diff

2457
hal/odm_RTL8188E.c
View file

File diff suppressed because it is too large Load diff

95
hal/odm_RegConfig8188E.c
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@ -20,22 +20,22 @@
#include "odm_precomp.h"
#if (RTL8188E_SUPPORT == 1)
#if (RTL8188E_SUPPORT == 1)
void
odm_ConfigRFReg_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data,
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data,
IN ODM_RF_RADIO_PATH_E RF_PATH,
IN u4Byte RegAddr
)
{
if (Addr == 0xffe)
{
{
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
#else
ODM_delay_ms(50);
#endif
}
@ -64,15 +64,15 @@ odm_ConfigRFReg_8188E(
ODM_SetRFReg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
}
}
}
void
void
odm_ConfigRF_RadioA_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
)
{
u4Byte content = 0x1000; // RF_Content: radioa_txt
@ -83,60 +83,60 @@ odm_ConfigRF_RadioA_8188E(
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
}
void
void
odm_ConfigRF_RadioB_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Data
)
{
u4Byte content = 0x1001; // RF_Content: radiob_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8188E(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
}
void
void
odm_ConfigMAC_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u1Byte Data
)
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u1Byte Data
)
{
ODM_Write1Byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
}
void
void
odm_ConfigBB_AGC_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
)
{
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data));
}
void
odm_ConfigBB_PHY_REG_PG_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
)
{
{
if (Addr == 0xfe){
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
#else
ODM_delay_ms(50);
#endif
}
@ -165,18 +165,18 @@ odm_ConfigBB_PHY_REG_PG_8188E(
}
void
void
odm_ConfigBB_PHY_8188E(
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
IN PDM_ODM_T pDM_Odm,
IN u4Byte Addr,
IN u4Byte Bitmask,
IN u4Byte Data
)
{
{
if (Addr == 0xfe){
#ifdef CONFIG_LONG_DELAY_ISSUE
ODM_sleep_ms(50);
#else
#else
ODM_delay_ms(50);
#endif
}
@ -197,13 +197,12 @@ odm_ConfigBB_PHY_8188E(
}
else{
if (Addr == 0xa24)
pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
pDM_Odm->RFCalibrateInfo.RegA24 = Data;
ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
// Add 1us delay between BB/RF register setting.
ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
}
}
#endif

79
hal/odm_debug.c
View file

@ -1,40 +1,39 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "odm_precomp.h"
VOID
ODM_InitDebugSetting(
IN PDM_ODM_T pDM_Odm
)
{
pDM_Odm->DebugLevel = ODM_DBG_TRACE;
pDM_Odm->DebugComponents =
\
0;
}
u32 GlobalDebugLevel;
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
//============================================================
// include files
//============================================================
#include "odm_precomp.h"
VOID
ODM_InitDebugSetting(
IN PDM_ODM_T pDM_Odm
)
{
pDM_Odm->DebugLevel = ODM_DBG_TRACE;
pDM_Odm->DebugComponents =
\
0;
}
u32 GlobalDebugLevel;

1327
hal/odm_interface.c
View file

File diff suppressed because it is too large Load diff

2398
hal/rtl8188e_cmd.c
View file

File diff suppressed because it is too large Load diff

1225
hal/rtl8188e_dm.c
View file

File diff suppressed because it is too large Load diff

512
hal/rtl8188e_hal_init.c
View file

File diff suppressed because it is too large Load diff

2124
hal/rtl8188e_mp.c
View file

File diff suppressed because it is too large Load diff

5961
hal/rtl8188e_phycfg.c
View file

File diff suppressed because it is too large Load diff

2021
hal/rtl8188e_rf6052.c
View file

File diff suppressed because it is too large Load diff

79
hal/rtl8188e_rxdesc.c
View file

@ -48,7 +48,7 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
//DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength);
//if (pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon)
{
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
if (signal_stat->update_req) {
signal_stat->total_num = 0;
@ -58,9 +58,9 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
signal_stat->total_num++;
signal_stat->total_val += pattrib->phy_info.SignalStrength;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
//Adapter->RxStats.RssiCalculateCnt++; //For antenna Test
if (padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX)
{
@ -76,7 +76,7 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num;
if (padapter->recvpriv.is_signal_dbg) {
padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg;
padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg);
@ -96,7 +96,7 @@ static void process_rssi(_adapter *padapter,union recv_frame *prframe)
static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
{
u32 last_evm=0, tmpVal;
struct rx_pkt_attrib *pattrib;
struct rx_pkt_attrib *pattrib;
#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS
struct signal_stat * signal_stat;
#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS
@ -122,7 +122,7 @@ static void process_link_qual(_adapter *padapter,union recv_frame *prframe)
signal_stat->total_num++;
signal_stat->total_val += pattrib->phy_info.SignalQuality;
signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num;
#else //CONFIG_NEW_SIGNAL_STAT_PROCESS
if (pattrib->phy_info.SignalQuality != 0)
{
@ -168,7 +168,7 @@ void rtl8188e_process_phy_info(_adapter *padapter, void *prframe)
//
// Check PWDB.
//
//process_PWDB(padapter, precvframe);
//process_PWDB(padapter, precvframe);
//UpdateRxSignalStatistics8192C(Adapter, pRfd);
//
@ -202,17 +202,17 @@ void update_recvframe_attrib_88e(
pattrib = &precvframe->u.hdr.attrib;
_rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;//(u8)prxreport->crc32;
pattrib->crc_err = (u8)((report.rxdw0 >> 14) & 0x1);;//(u8)prxreport->crc32;
// update rx report to recv_frame attribute
pattrib->pkt_rpt_type = (u8)((report.rxdw3 >> 14) & 0x3);//prxreport->rpt_sel;
if (pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
if (pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet
{
pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen;
pattrib->drvinfo_sz = (u8)((report.rxdw0 >> 16) & 0xf) * 8;//(u8)(prxreport->drvinfosize << 3);
pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1);//(u8)prxreport->physt;
pattrib->physt = (u8)((report.rxdw0 >> 26) & 0x1);//(u8)prxreport->physt;
pattrib->bdecrypted = (report.rxdw0 & BIT(27))? 0:1;//(u8)(prxreport->swdec ? 0 : 1);
pattrib->encrypt = (u8)((report.rxdw0 >> 20) & 0x7);//(u8)prxreport->security;
@ -229,10 +229,10 @@ void update_recvframe_attrib_88e(
pattrib->mcs_rate = (u8)(report.rxdw3 & 0x3f);//(u8)prxreport->rxmcs;
pattrib->rxht = (u8)((report.rxdw3 >> 6) & 0x1);//(u8)prxreport->rxht;
pattrib->icv_err = (u8)((report.rxdw0 >> 15) & 0x1);//(u8)prxreport->icverr;
pattrib->shift_sz = (u8)((report.rxdw0 >> 24) & 0x3);
}
else if (pattrib->pkt_rpt_type == TX_REPORT1)//CCX
{
@ -249,13 +249,13 @@ void update_recvframe_attrib_88e(
//
pattrib->MacIDValidEntry[0] = report.rxdw4;
pattrib->MacIDValidEntry[1] = report.rxdw5;
}
else if (pattrib->pkt_rpt_type == HIS_REPORT)// USB HISR RPT
{
pattrib->pkt_len = (u16)(report.rxdw0 &0x00003fff);//(u16)prxreport->pktlen;
}
}
}
/*
@ -267,21 +267,21 @@ void update_recvframe_phyinfo_88e(
union recv_frame *precvframe,
struct phy_stat *pphy_status)
{
PADAPTER padapter = precvframe->u.hdr.adapter;
PADAPTER padapter = precvframe->u.hdr.adapter;
struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info);
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
PODM_PHY_INFO_T pPHYInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info);
u8 *wlanhdr;
ODM_PACKET_INFO_T pkt_info;
u8 *sa;
struct sta_priv *pstapriv;
struct sta_info *psta;
//_irqL irqL;
pkt_info.bPacketMatchBSSID =_FALSE;
pkt_info.bPacketToSelf = _FALSE;
pkt_info.bPacketBeacon = _FALSE;
wlanhdr = get_recvframe_data(precvframe);
pkt_info.bPacketMatchBSSID = ((!IsFrameTypeCtrl(wlanhdr)) &&
@ -293,57 +293,56 @@ void update_recvframe_phyinfo_88e(
pkt_info.bPacketBeacon = pkt_info.bPacketMatchBSSID && (GetFrameSubType(wlanhdr) == WIFI_BEACON);
if (pkt_info.bPacketBeacon){
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){
if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE) == _TRUE){
sa = padapter->mlmepriv.cur_network.network.MacAddress;
}
//to do Ad-hoc
}
else{
sa = get_sa(wlanhdr);
}
}
pstapriv = &padapter->stapriv;
pkt_info.StationID = 0xFF;
psta = rtw_get_stainfo(pstapriv, sa);
if (psta)
{
pkt_info.StationID = psta->mac_id;
pkt_info.StationID = psta->mac_id;
//DBG_8192C("%s ==> StationID(%d)\n",__func__,pkt_info.StationID);
}
pkt_info.Rate = pattrib->mcs_rate;
}
pkt_info.Rate = pattrib->mcs_rate;
//rtl8188e_query_rx_phy_status(precvframe, pphy_status);
#ifdef CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
//get Primary adapter's odmpriv
if (padapter->adapter_type > PRIMARY_ADAPTER){
pHalData = GET_HAL_DATA(padapter->pbuddy_adapter);
pHalData = GET_HAL_DATA(padapter->pbuddy_adapter);
}
#endif
//_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
//_enter_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
ODM_PhyStatusQuery(&pHalData->odmpriv,pPHYInfo,(u8 *)pphy_status,&(pkt_info));
//_exit_critical_bh(&pHalData->odm_stainfo_lock, &irqL);
precvframe->u.hdr.psta = NULL;
if (pkt_info.bPacketMatchBSSID &&
(check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE))
{
{
if (psta)
{
{
precvframe->u.hdr.psta = psta;
rtl8188e_process_phy_info(padapter, precvframe);
}
}
}
else if (pkt_info.bPacketToSelf || pkt_info.bPacketBeacon)
{
if (check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE)
{
{
if (psta)
{
{
precvframe->u.hdr.psta = psta;
}
}
rtl8188e_process_phy_info(padapter, precvframe);
rtl8188e_process_phy_info(padapter, precvframe);
}
}

481
hal/rtl8188e_sreset.c
View file

@ -1,241 +1,240 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_SRESET_C_
#include <rtl8188e_sreset.h>
#include <rtl8188e_hal.h>
#ifdef DBG_CONFIG_ERROR_DETECT
extern void rtw_cancel_all_timer(_adapter *padapter);
static void _restore_security_setting(_adapter *padapter)
{
u8 EntryId = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv * pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct security_priv* psecuritypriv=&(padapter->securitypriv);
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)
? rtw_write8(padapter, REG_SECCFG, 0xcc)
: rtw_write8(padapter, REG_SECCFG, 0xcf);
if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))
{
for (EntryId=0; EntryId<4; EntryId++)
{
if (EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
}
}
else if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta == NULL) {
//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n"));
}
else
{
//pairwise key
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
//group key
rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
}
}
}
static void _restore_network_status(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
unsigned short caps;
u8 join_type;
#if 1
//=======================================================
// reset related register of Beacon control
//set MSR to nolink
Set_MSR(padapter, _HW_STATE_NOLINK_);
// reject all data frame
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
//reset TSF
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
// disable update TSF
SetBcnCtrlReg(padapter, BIT(4), 0);
//=======================================================
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
//pmlmeinfo->assoc_AP_vendor = maxAP;
if (padapter->registrypriv.wifi_spec) {
// for WiFi test, follow WMM test plan spec
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
#ifdef CONFIG_80211N_HT
// for WiFi test, mixed mode with intel STA under bg mode throughput issue
if (padapter->mlmepriv.htpriv.ht_option == 0)
#endif //CONFIG_80211N_HT
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
//disable dynamic functions, such as high power, DIG
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
#endif
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
join_type = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
//restore Sequence No.
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
}
void rtl8188e_silentreset_for_specific_platform(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_irqL irqL;
#ifdef DBG_CONFIG_ERROR_RESET
DBG_871X("%s\n", __func__);
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
if (!netif_queue_stopped(padapter->pnetdev))
netif_stop_queue(padapter->pnetdev);
rtw_cancel_all_timer(padapter);
tasklet_kill(&pxmitpriv->xmit_tasklet);
_enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
psrtpriv->silent_reset_inprogress = _TRUE;
pwrpriv->change_rfpwrstate = rf_off;
#ifdef CONFIG_IPS
ips_enter(padapter);
ips_leave(padapter);
#endif
if (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
{
_restore_network_status(padapter);
_restore_security_setting(padapter);
}
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING);
psrtpriv->silent_reset_inprogress = _FALSE;
_exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
if (netif_queue_stopped(padapter->pnetdev))
netif_wake_queue(padapter->pnetdev);
#endif
}
void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
if ( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_write32(padapter,REG_TXDMA_STATUS,txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
}
#ifdef CONFIG_USB_HCI
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__func__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if (pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
current_time = rtw_get_current_time();
if (0==pxmitpriv->free_xmitbuf_cnt)
{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if (diff_time > 2000){
if (psrtpriv->last_tx_complete_time==0){
psrtpriv->last_tx_complete_time = current_time;
}
else{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if (diff_time > 4000){
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
DBG_8192C("%s tx hang\n", __func__);
rtl8188e_silentreset_for_specific_platform(padapter);
}
}
}
}
#endif //CONFIG_USB_HCI
}
void rtl8188e_sreset_linked_status_check(_adapter *padapter)
{
u32 rx_dma_status = 0;
u8 fw_status=0;
rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
if (rx_dma_status!= 0x00){
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x\n",__func__,rx_dma_status);
rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status);
}
fw_status = rtw_read8(padapter,REG_FMETHR);
if (fw_status != 0x00)
{
if (fw_status == 1)
DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__func__,fw_status);
else if (fw_status == 2)
DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__func__,fw_status);
}
}
#endif
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#define _RTL8188E_SRESET_C_
#include <rtl8188e_sreset.h>
#include <rtl8188e_hal.h>
#ifdef DBG_CONFIG_ERROR_DETECT
extern void rtw_cancel_all_timer(_adapter *padapter);
static void _restore_security_setting(_adapter *padapter)
{
u8 EntryId = 0;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct sta_priv * pstapriv = &padapter->stapriv;
struct sta_info *psta;
struct security_priv* psecuritypriv=&(padapter->securitypriv);
struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
(pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)
? rtw_write8(padapter, REG_SECCFG, 0xcc)
: rtw_write8(padapter, REG_SECCFG, 0xcf);
if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) ||
( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ ))
{
for (EntryId=0; EntryId<4; EntryId++)
{
if (EntryId == psecuritypriv->dot11PrivacyKeyIndex)
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1);
else
rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0);
}
}
else if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_))
{
psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv));
if (psta == NULL) {
//DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n"));
}
else
{
//pairwise key
rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE);
//group key
rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0);
}
}
}
static void _restore_network_status(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network));
unsigned short caps;
u8 join_type;
#if 1
//=======================================================
// reset related register of Beacon control
//set MSR to nolink
Set_MSR(padapter, _HW_STATE_NOLINK_);
// reject all data frame
rtw_write16(padapter, REG_RXFLTMAP2,0x00);
//reset TSF
rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1)));
// disable update TSF
SetBcnCtrlReg(padapter, BIT(4), 0);
//=======================================================
rtw_joinbss_reset(padapter);
set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
//pmlmeinfo->assoc_AP_vendor = maxAP;
if (padapter->registrypriv.wifi_spec) {
// for WiFi test, follow WMM test plan spec
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549);
#ifdef CONFIG_80211N_HT
// for WiFi test, mixed mode with intel STA under bg mode throughput issue
if (padapter->mlmepriv.htpriv.ht_option == 0)
#endif //CONFIG_80211N_HT
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320);
} else {
rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217);
rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317);
rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320);
rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444);
}
//disable dynamic functions, such as high power, DIG
//Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE);
#endif
rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
join_type = 0;
rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
Set_MSR(padapter, (pmlmeinfo->state & 0x3));
mlmeext_joinbss_event_callback(padapter, 1);
//restore Sequence No.
rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn);
}
void rtl8188e_silentreset_for_specific_platform(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv;
struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
_irqL irqL;
#ifdef DBG_CONFIG_ERROR_RESET
DBG_871X("%s\n", __func__);
psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
if (!netif_queue_stopped(padapter->pnetdev))
netif_stop_queue(padapter->pnetdev);
rtw_cancel_all_timer(padapter);
tasklet_kill(&pxmitpriv->xmit_tasklet);
_enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
psrtpriv->silent_reset_inprogress = _TRUE;
pwrpriv->change_rfpwrstate = rf_off;
#ifdef CONFIG_IPS
ips_enter(padapter);
ips_leave(padapter);
#endif
if (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)
{
_restore_network_status(padapter);
_restore_security_setting(padapter);
}
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING);
psrtpriv->silent_reset_inprogress = _FALSE;
_exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL);
tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
if (netif_queue_stopped(padapter->pnetdev))
netif_wake_queue(padapter->pnetdev);
#endif
}
void rtl8188e_sreset_xmit_status_check(_adapter *padapter)
{
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct sreset_priv *psrtpriv = &pHalData->srestpriv;
unsigned long current_time;
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
unsigned int diff_time;
u32 txdma_status;
if ( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){
DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __func__, txdma_status);
rtw_write32(padapter,REG_TXDMA_STATUS,txdma_status);
rtl8188e_silentreset_for_specific_platform(padapter);
}
#ifdef CONFIG_USB_HCI
//total xmit irp = 4
//DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__func__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt);
//if (pxmitpriv->txirp_cnt == NR_XMITBUFF+1)
current_time = rtw_get_current_time();
if (0==pxmitpriv->free_xmitbuf_cnt)
{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time);
if (diff_time > 2000){
if (psrtpriv->last_tx_complete_time==0){
psrtpriv->last_tx_complete_time = current_time;
}
else{
diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time);
if (diff_time > 4000){
//padapter->Wifi_Error_Status = WIFI_TX_HANG;
DBG_8192C("%s tx hang\n", __func__);
rtl8188e_silentreset_for_specific_platform(padapter);
}
}
}
}
#endif //CONFIG_USB_HCI
}
void rtl8188e_sreset_linked_status_check(_adapter *padapter)
{
u32 rx_dma_status = 0;
u8 fw_status=0;
rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS);
if (rx_dma_status!= 0x00){
DBG_8192C("%s REG_RXDMA_STATUS:0x%08x\n",__func__,rx_dma_status);
rtw_write32(padapter,REG_RXDMA_STATUS,rx_dma_status);
}
fw_status = rtw_read8(padapter,REG_FMETHR);
if (fw_status != 0x00)
{
if (fw_status == 1)
DBG_8192C("%s REG_FW_STATUS (0x%02x), Read_Efuse_Fail !! \n",__func__,fw_status);
else if (fw_status == 2)
DBG_8192C("%s REG_FW_STATUS (0x%02x), Condition_No_Match !! \n",__func__,fw_status);
}
}
#endif

70
hal/rtl8188e_xmit.c
View file

@ -39,7 +39,7 @@ void dump_txrpt_ccx_88e(void *buf)
, __func__
, txrpt_ccx->tag1, txrpt_ccx->pkt_num, txrpt_ccx->txdma_underflow, txrpt_ccx->int_bt, txrpt_ccx->int_tri, txrpt_ccx->int_ccx
, txrpt_ccx->mac_id, txrpt_ccx->pkt_ok, txrpt_ccx->bmc
, txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over
, txrpt_ccx->retry_cnt, txrpt_ccx->lifetime_over, txrpt_ccx->retry_over
, txrpt_ccx_qtime_88e(txrpt_ccx)
, txrpt_ccx->final_data_rate
, txrpt_ccx->qsel, txrpt_ccx_sw_88e(txrpt_ccx)
@ -71,16 +71,16 @@ void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc)
if (bDumpTxPkt ==1){//dump txdesc for data frame
DBG_871X("dump tx_desc for data frame\n");
if ((frame_tag&0x0f) == DATA_FRAMETAG){
bDumpTxDesc = _TRUE;
if ((frame_tag&0x0f) == DATA_FRAMETAG){
bDumpTxDesc = _TRUE;
}
}
}
else if (bDumpTxPkt ==2){//dump txdesc for mgnt frame
DBG_871X("dump tx_desc for mgnt frame\n");
if ((frame_tag&0x0f) == MGNT_FRAMETAG){
bDumpTxDesc = _TRUE;
if ((frame_tag&0x0f) == MGNT_FRAMETAG){
bDumpTxDesc = _TRUE;
}
}
}
else if (bDumpTxPkt ==3){//dump early info
}
@ -114,7 +114,7 @@ void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc)
//#define DBG_EMINFO
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
#define EARLY_MODE_MAX_PKT_NUM 10
#else
#define EARLY_MODE_MAX_PKT_NUM 5
@ -122,7 +122,7 @@ void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc)
struct EMInfo{
u8 EMPktNum;
u8 EMPktNum;
u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM];
};
@ -152,7 +152,7 @@ InsertEMContent_8188E(
}
#endif
#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
@ -197,7 +197,7 @@ InsertEMContent_8188E(
dwtmp += pEMInfo->EMPktLen[9];
}
SET_EARLYMODE_LEN4(VirtualAddress, dwtmp);
#else
#else
SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum);
SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]);
SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]);
@ -205,7 +205,7 @@ InsertEMContent_8188E(
SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4);
SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]);
SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]);
#endif
#endif
//RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8);
}
@ -218,34 +218,34 @@ void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
int index,j;
u16 offset,pktlen;
PTXDESC ptxdesc;
u8 *pmem,*pEMInfo_mem;
s8 node_num_0=0,node_num_1=0;
struct EMInfo eminfo;
struct agg_pkt_info *paggpkt;
struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data;
pmem= pframe->buf_addr;
#ifdef DBG_EMINFO
struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data;
pmem= pframe->buf_addr;
#ifdef DBG_EMINFO
DBG_8192C("\n%s ==> agg_num:%d\n",__func__, pframe->agg_num);
for (index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
DBG_8192C("%s ==> agg_pkt[%d].offset=%d\n",__func__,index,offset);
DBG_8192C("%s ==> agg_pkt[%d].pkt_len=%d\n",__func__,index,pktlen);
}
#endif
if ( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM)
{
{
node_num_0 = pframe->agg_num;
node_num_1= EARLY_MODE_MAX_PKT_NUM-1;
}
for (index=0;index<pframe->agg_num;index++){
offset = pxmitpriv->agg_pkt[index].offset;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
pktlen = pxmitpriv->agg_pkt[index].pkt_len;
_rtw_memset(&eminfo,0,sizeof(struct EMInfo));
if ( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){
@ -255,38 +255,36 @@ void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmit
}
else{
eminfo.EMPktNum = node_num_1;
node_num_1--;
}
node_num_1--;
}
}
else{
eminfo.EMPktNum = pframe->agg_num-(index+1);
}
eminfo.EMPktNum = pframe->agg_num-(index+1);
}
for (j=0;j< eminfo.EMPktNum ;j++){
eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC
}
if (pmem){
if (index==0){
ptxdesc = (PTXDESC)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}
else{
pmem = pmem + pxmitpriv->agg_pkt[index-1].offset;
ptxdesc = (PTXDESC)(pmem);
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE;
}
#ifdef DBG_EMINFO
DBG_8192C("%s ==> desc.pkt_len=%d\n",__func__,ptxdesc->pktlen);
#endif
InsertEMContent_8188E(&eminfo,pEMInfo_mem);
}
}
}
}
_rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM);
}
#endif

19
hal/rtl8188eu_led.c
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@ -34,7 +34,7 @@
//================================================================================
// LED_819xUsb routines.
// LED_819xUsb routines.
//================================================================================
//
@ -53,7 +53,7 @@ void SwLedOn(_adapter *padapter, PLED_871x pLed)
LedCfg = rtw_read8(padapter, REG_LEDCFG2);
switch (pLed->LedPin)
{
{
case LED_PIN_LED0:
rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on.
break;
@ -65,7 +65,7 @@ void SwLedOn(_adapter *padapter, PLED_871x pLed)
default:
break;
}
pLed->bLedOn = _TRUE;
}
@ -79,7 +79,7 @@ void SwLedOff(_adapter *padapter, PLED_871x pLed)
u8 LedCfg;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
if ((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
if ((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE))
{
goto exit;
}
@ -92,11 +92,11 @@ void SwLedOff(_adapter *padapter, PLED_871x pLed)
case LED_PIN_LED0:
if (pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED)
{
LedCfg &= 0x90; // Set to software control.
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg &= 0x90; // Set to software control.
rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3));
LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG);
LedCfg &= 0xFE;
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg);
}
else
{
@ -114,7 +114,7 @@ void SwLedOff(_adapter *padapter, PLED_871x pLed)
}
exit:
pLed->bLedOn = _FALSE;
}
//================================================================================
@ -159,4 +159,3 @@ rtl8188eu_DeInitSwLeds(
DeInitLed871x( &(ledpriv->SwLed0) );
DeInitLed871x( &(ledpriv->SwLed1) );
}

6
hal/rtl8188eu_recv.c
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@ -64,7 +64,7 @@ int rtl8188eu_init_recv_priv(_adapter *padapter)
int i, res = _SUCCESS;
struct recv_buf *precvbuf;
#ifdef CONFIG_RECV_THREAD_MODE
#ifdef CONFIG_RECV_THREAD_MODE
_rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed
_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed
#endif
@ -235,5 +235,3 @@ void rtl8188eu_free_recv_priv (_adapter *padapter)
#endif
}

297
hal/rtl8188eu_xmit.c
View file

@ -1,7 +1,7 @@
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
@ -58,10 +58,10 @@ u8 urb_zero_packet_chk(_adapter *padapter, int sz)
u8 blnSetTxDescOffset;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
blnSetTxDescOffset = (((sz + TXDESC_SIZE) % pHalData->UsbBulkOutSize) ==0)?1:0;
#else
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
if ( pdvobj->ishighspeed )
{
if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) {
@ -72,15 +72,15 @@ u8 urb_zero_packet_chk(_adapter *padapter, int sz)
}
else
{
if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) {
if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) {
blnSetTxDescOffset = 1;
} else {
blnSetTxDescOffset = 0;
}
}
#endif
#endif
return blnSetTxDescOffset;
}
void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
@ -92,12 +92,12 @@ void rtl8188eu_cal_txdesc_chksum(struct tx_desc *ptxdesc)
//Clear first
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
for (index = 0 ; index < count ; index++){
checksum = checksum ^ le16_to_cpu(*(usPtr + index));
}
ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum);
ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum);
}
//
@ -160,15 +160,15 @@ void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
if ((pattrib->encrypt > 0) && !pattrib->bswenc)
{
switch (pattrib->encrypt)
{
{
//SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES
case _WEP40_:
case _WEP104_:
ptxdesc->txdw1 |= cpu_to_le32((0x01<<SEC_TYPE_SHT)&0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
break;
case _TKIP_:
case _TKIP_WTMIC_:
case _TKIP_WTMIC_:
ptxdesc->txdw1 |= cpu_to_le32((0x01<<SEC_TYPE_SHT)&0x00c00000);
ptxdesc->txdw2 |= cpu_to_le32(0x7 << AMPDU_DENSITY_SHT);
break;
@ -185,16 +185,16 @@ void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc)
case _NO_PRIVACY_:
default:
break;
}
}
}
void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
{
//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
//DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode);
switch (pattrib->vcs_mode)
{
@ -206,7 +206,7 @@ void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw)
break;
case NONE_VCS:
default:
break;
break;
}
if (pattrib->vcs_mode) {
@ -238,7 +238,7 @@ void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw)
*pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0;
if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER)
*pdw |= cpu_to_le32((0x01<<DATA_SC_SHT)&0x003f0000);
*pdw |= cpu_to_le32((0x01<<DATA_SC_SHT)&0x003f0000);
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER)
*pdw |= cpu_to_le32((0x02<<DATA_SC_SHT)&0x003f0000);
else if (pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)
@ -250,12 +250,12 @@ void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw)
static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bagg_pkt)
{
{
int pull=0;
uint qsel;
u8 data_rate,pwr_status,offset;
_adapter *padapter = pxmitframe->padapter;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
//struct dm_priv *pdmpriv = &pHalData->dmpriv;
@ -263,21 +263,21 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bag
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
sint bmcst = IS_MCAST(pattrib->ra);
#ifdef CONFIG_P2P
struct wifidirect_info* pwdinfo = &padapter->wdinfo;
#endif //CONFIG_P2P
#ifdef CONFIG_CONCURRENT_MODE
if (rtw_buddy_adapter_up(padapter) && padapter->adapter_type > PRIMARY_ADAPTER)
pHalData = GET_HAL_DATA(padapter->pbuddy_adapter);
if (rtw_buddy_adapter_up(padapter) && padapter->adapter_type > PRIMARY_ADAPTER)
pHalData = GET_HAL_DATA(padapter->pbuddy_adapter);
#endif //CONFIG_CONCURRENT_MODE
#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
if (padapter->registrypriv.mp_mode == 0)
{
if ((!bagg_pkt) &&(urb_zero_packet_chk(padapter, sz)==0))//(sz %512) != 0
//if ((!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE))
//if ((!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE))
{
ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ);
//DBG_8192C("==> non-agg-pkt,shift pointer...\n");
@ -287,17 +287,17 @@ if (padapter->registrypriv.mp_mode == 0)
#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX
_rtw_memset(ptxdesc, 0, sizeof(struct tx_desc));
//4 offset 0
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
//DBG_8192C("%s==> pkt_len=%d,bagg_pkt=%02x\n",__func__,sz,bagg_pkt);
ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff);//update TXPKTSIZE
offset = TXDESC_SIZE + OFFSET_SZ;
#ifdef CONFIG_TX_EARLY_MODE
if (bagg_pkt){
offset += EARLY_MODE_INFO_SIZE ;//0x28
offset = TXDESC_SIZE + OFFSET_SZ;
#ifdef CONFIG_TX_EARLY_MODE
if (bagg_pkt){
offset += EARLY_MODE_INFO_SIZE ;//0x28
}
#endif
//DBG_8192C("%s==>offset(0x%02x) \n",__func__,offset);
@ -309,11 +309,11 @@ if (padapter->registrypriv.mp_mode == 0)
if (padapter->registrypriv.mp_mode == 0)
{
if (!bagg_pkt){
if ((pull) && (pxmitframe->pkt_offset>0)) {
pxmitframe->pkt_offset = pxmitframe->pkt_offset -1;
if ((pull) && (pxmitframe->pkt_offset>0)) {
pxmitframe->pkt_offset = pxmitframe->pkt_offset -1;
}
}
}
}
#endif
//DBG_8192C("%s, pkt_offset=0x%02x\n",__func__,pxmitframe->pkt_offset);
@ -326,7 +326,7 @@ if (padapter->registrypriv.mp_mode == 0)
if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
{
//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");
//DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n");
//offset 4
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3F);
@ -341,20 +341,20 @@ if (padapter->registrypriv.mp_mode == 0)
if (pattrib->ampdu_en==_TRUE){
ptxdesc->txdw2 |= cpu_to_le32(AGG_EN);//AGG EN
//SET_TX_DESC_MAX_AGG_NUM_88E(pDesc, 0x1F);
//SET_TX_DESC_MCSG1_MAX_LEN_88E(pDesc, 0x6);
//SET_TX_DESC_MCSG2_MAX_LEN_88E(pDesc, 0x6);
//SET_TX_DESC_MCSG3_MAX_LEN_88E(pDesc, 0x6);
//SET_TX_DESC_MCS7_SGI_MAX_LEN_88E(pDesc, 0x6);
ptxdesc->txdw6 = 0x6666f800;
ptxdesc->txdw6 = 0x6666f800;
}
else{
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK
}
//offset 8
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<< SEQ_SHT)&0x0FFF0000);
@ -378,38 +378,38 @@ if (padapter->registrypriv.mp_mode == 0)
(pattrib->dhcp_pkt != 1))
{
//Non EAP & ARP & DHCP type data packet
fill_txdesc_vcs(pattrib, &ptxdesc->txdw4);
fill_txdesc_phy(pattrib, &ptxdesc->txdw4);
ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M
ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//DATA/RTS Rate FB LMT
ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);//DATA/RTS Rate FB LMT
#if (RATE_ADAPTIVE_SUPPORT == 1)
#if (RATE_ADAPTIVE_SUPPORT == 1)
if (pattrib->ht_en){
if ( ODM_RA_GetShortGI_8188E(&pHalData->odmpriv,pattrib->mac_id))
ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI
}
data_rate =ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id);
data_rate =ODM_RA_GetDecisionRate_8188E(&pHalData->odmpriv,pattrib->mac_id);
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
#if (POWER_TRAINING_ACTIVE==1)
pwr_status = ODM_RA_GetHwPwrStatus_8188E(&pHalData->odmpriv,pattrib->mac_id);
ptxdesc->txdw4 |=cpu_to_le32( (pwr_status & 0x7)<< PWR_STATUS_SHT);
#endif //(POWER_TRAINING_ACTIVE==1)
#else//if (RATE_ADAPTIVE_SUPPORT == 1)
#else//if (RATE_ADAPTIVE_SUPPORT == 1)
if (pattrib->ht_en)
ptxdesc->txdw5 |= cpu_to_le32(SGI);//SGI
data_rate = 0x13; //default rate: MCS7
data_rate = 0x13; //default rate: MCS7
if (padapter->fix_rate!= 0xFF){//rate control by iwpriv
data_rate = padapter->fix_rate;
data_rate = padapter->fix_rate;
}
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
ptxdesc->txdw5 |= cpu_to_le32(data_rate & 0x3F);
#endif//if (RATE_ADAPTIVE_SUPPORT == 1)
#endif//if (RATE_ADAPTIVE_SUPPORT == 1)
}
else
@ -418,7 +418,7 @@ if (padapter->registrypriv.mp_mode == 0)
// Use the 1M data rate to send the EAP/ARP packet.
// This will maybe make the handshake smooth.
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK
ptxdesc->txdw2 |= cpu_to_le32(AGG_BK);//AGG BK
if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
ptxdesc->txdw4 |= cpu_to_le32(BIT(24));// DATA_SHORT
@ -438,19 +438,19 @@ if (padapter->registrypriv.mp_mode == 0)
}
else if ((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG)
{
//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");
//offset 4
//DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n");
//offset 4
ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x3f);
qsel = (uint)(pattrib->qsel&0x0000001f);
ptxdesc->txdw1 |= cpu_to_le32((qsel<<QSEL_SHT)&0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< RATE_ID_SHT) & 0x000f0000);
//fill_txdesc_sectype(pattrib, ptxdesc);
//offset 8
//offset 8
#ifdef CONFIG_XMIT_ACK
//CCX-TXRPT ack for xmit mgmt frames.
if (pxmitframe->ack_report) {
@ -466,7 +466,7 @@ if (padapter->registrypriv.mp_mode == 0)
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<SEQ_SHT)&0x0FFF0000);
//offset 20
ptxdesc->txdw5 |= cpu_to_le32(RTY_LMT_EN);//retry limit enable
if (pattrib->retry_ctrl == _TRUE)
@ -500,12 +500,12 @@ if (padapter->registrypriv.mp_mode == 0)
{
DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag);
//offset 4
//offset 4
ptxdesc->txdw1 |= cpu_to_le32((4)&0x3f);//CAM_ID(MAC_ID)
ptxdesc->txdw1 |= cpu_to_le32((6<< RATE_ID_SHT) & 0x000f0000);//raid
//offset 8
//offset 8
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<SEQ_SHT)&0x0fff0000);
@ -523,23 +523,23 @@ if (padapter->registrypriv.mp_mode == 0)
// (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
// 2010.06.23. Added by tynli.
if (!pattrib->qos_en)
{
{
//ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
//ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
ptxdesc->txdw3 |= cpu_to_le32(EN_HWSEQ); // Hw set sequence number
ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); // Hw set sequence number
ptxdesc->txdw4 |= cpu_to_le32(HW_SSN); // Hw set sequence number
}
#ifdef CONFIG_HW_ANTENNA_DIVERSITY //CONFIG_ANTENNA_DIVERSITY
#ifdef CONFIG_HW_ANTENNA_DIVERSITY //CONFIG_ANTENNA_DIVERSITY
ODM_SetTxAntByTxInfo_88E(&pHalData->odmpriv, pmem, pattrib->mac_id);
#endif
rtl8188eu_cal_txdesc_chksum(ptxdesc);
_dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc);
_dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc);
return pull;
}
@ -634,18 +634,18 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
mem_addr = pxmitframe->buf_addr;
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n"));
for (t = 0; t < pattrib->nr_frags; t++)
{
if (inner_ret != _SUCCESS && ret == _SUCCESS)
ret = _FAIL;
if (t != (pattrib->nr_frags - 1))
{
RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags));
sz = pxmitpriv->frag_len;
sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);
sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len);
}
else //no frag
{
@ -653,12 +653,12 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
}
pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE);
if (pull)
{
mem_addr += PACKET_OFFSET_SZ; //pull txdesc head
//pxmitbuf ->pbuf = mem_addr;
//pxmitbuf ->pbuf = mem_addr;
pxmitframe->buf_addr = mem_addr;
w_sz = sz + TXDESC_SIZE;
@ -666,10 +666,10 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
else
{
w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ;
}
#ifdef CONFIG_IOL_IOREG_CFG_DBG
}
#ifdef CONFIG_IOL_IOREG_CFG_DBG
rtw_IOL_cmd_buf_dump(padapter,w_sz,pxmitframe->buf_addr);
#endif
#endif
ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe);
#ifdef CONFIG_XMIT_THREAD_MODE
@ -683,19 +683,19 @@ static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe)
rtw_count_tx_stats(padapter, pxmitframe, sz);
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz));
//DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority);
//DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority);
mem_addr += w_sz;
mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr)));
}
rtw_free_xmitframe(pxmitpriv, pxmitframe);
if (ret != _SUCCESS)
rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN);
return ret;
}
@ -764,7 +764,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
//3 1. pick up first frame
do {
rtw_free_xmitframe(pxmitpriv, pxmitframe);
pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry);
if (pxmitframe == NULL) {
// no more xmit frame, release xmit buffer
@ -872,7 +872,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
xmitframe_phead = get_list_head(&ptxservq->sta_pending);
xmitframe_plist = get_next(xmitframe_phead);
while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE)
{
pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list);
@ -883,17 +883,17 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
pxmitframe->pkt_offset = 1;// not first frame of aggregation,reserve offset for EM Info
#else
pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset
#endif
#endif
len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ);
if (_RND8(pbuf + len) > MAX_XMITBUF_SZ)
//if (_RND8(pbuf + len) > (MAX_XMITBUF_SZ/2))//to do : for TX TP finial tune , Georgia 2012-0323
{
//DBG_8192C("%s....len> MAX_XMITBUF_SZ\n",__func__);
pxmitframe->agg_num = 1;
pxmitframe->pkt_offset = 1;
break;
pxmitframe->pkt_offset = 1;
break;
}
rtw_list_delete(&pxmitframe->list);
ptxservq->qcnt--;
@ -922,7 +922,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
// pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf;
#ifdef IDEA_CONDITION
rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
#else
@ -939,7 +939,7 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
// (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz
update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz,_TRUE);
// don't need xmitframe any more
rtw_free_xmitframe(pxmitpriv, pxmitframe);
@ -949,9 +949,9 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
pfirstframe->agg_num++;
#ifdef CONFIG_TX_EARLY_MODE
pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len);
pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz;
#ifdef CONFIG_TX_EARLY_MODE
pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len);
pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz;
#endif
if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num)
break;
@ -992,15 +992,15 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX
update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,_TRUE);
#ifdef CONFIG_TX_EARLY_MODE
//prepare EM info for first frame, agg_num value start from 1
pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz +TXDESC_SIZE +(pfirstframe->pkt_offset*PACKET_OFFSET_SZ));
pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;//get from rtw_xmitframe_coalesce
pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;//get from rtw_xmitframe_coalesce
UpdateEarlyModeInfo8188E(pxmitpriv,pxmitbuf );
#endif
//3 4. write xmit buffer to USB FIFO
ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe);
//DBG_8192C("%s ===================================== write port,buf_size(%d)\n",__func__,pbuf_tail);
@ -1011,8 +1011,8 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
//3 5. update statisitc
pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE);
pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ);
rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail);
rtw_free_xmitframe(pxmitpriv, pfirstframe);
@ -1023,11 +1023,11 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
#else
s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf)
{
{
struct hw_xmit *phwxmits;
sint hwentry;
struct xmit_frame *pxmitframe=NULL;
struct xmit_frame *pxmitframe=NULL;
int res=_SUCCESS, xcnt = 0;
phwxmits = pxmitpriv->hwxmits;
@ -1037,65 +1037,65 @@ s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv
if (pxmitbuf==NULL)
{
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
if (!pxmitbuf)
{
return _FALSE;
}
}
}
}
do
{
{
pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry);
if (pxmitframe)
{
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->pxmitbuf = pxmitbuf;
pxmitframe->buf_addr = pxmitbuf->pbuf;
pxmitbuf->priv_data = pxmitframe;
pxmitbuf->priv_data = pxmitframe;
if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG)
{
{
if (pxmitframe->attrib.priority<=15)//TID0~15
{
res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
}
}
//DBG_8192C("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority);
rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce
rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce
}
RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n"));
if (res == _SUCCESS)
{
rtw_dump_xframe(padapter, pxmitframe);
rtw_dump_xframe(padapter, pxmitframe);
}
else
{
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
rtw_free_xmitframe(pxmitpriv, pxmitframe);
rtw_free_xmitframe(pxmitpriv, pxmitframe);
}
xcnt++;
}
else
{
{
rtw_free_xmitbuf(pxmitpriv, pxmitbuf);
return _FALSE;
}
break;
}while (0/*xcnt < (NR_XMITFRAME >> 3)*/);
return _TRUE;
}
#endif
@ -1130,11 +1130,11 @@ static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
struct pkt_attrib *pattrib = &pxmitframe->attrib;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#ifdef CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
PADAPTER pbuddy_adapter = padapter->pbuddy_adapter;
struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv);
struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv);
#endif
_enter_critical_bh(&pxmitpriv->lock, &irqL);
//DBG_8192C("==> %s\n",__func__);
@ -1149,7 +1149,7 @@ static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe)
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
goto enqueue;
#ifdef CONFIG_CONCURRENT_MODE
#ifdef CONFIG_CONCURRENT_MODE
if (check_fwstate(pbuddy_mlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE)
goto enqueue;
#endif
@ -1206,37 +1206,37 @@ s32 rtl8188eu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
#ifdef CONFIG_HOSTAPD_MLME
static void rtl8188eu_hostap_mgnt_xmit_cb(struct urb *urb)
{
{
#ifdef PLATFORM_LINUX
struct sk_buff *skb = (struct sk_buff *)urb->context;
//DBG_8192C("%s\n", __func__);
dev_kfree_skb_any(skb);
#endif
#endif
}
s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
{
#ifdef PLATFORM_LINUX
u16 fc;
int rc, len, pipe;
int rc, len, pipe;
unsigned int bmcst, tid, qsel;
struct sk_buff *skb, *pxmit_skb;
struct urb *urb;
unsigned char *pxmitbuf;
struct tx_desc *ptxdesc;
struct rtw_ieee80211_hdr *tx_hdr;
struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;
struct hostapd_priv *phostapdpriv = padapter->phostapdpriv;
struct net_device *pnetdev = padapter->pnetdev;
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter);
//DBG_8192C("%s\n", __func__);
skb = pkt;
len = skb->len;
tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data);
fc = le16_to_cpu(tx_hdr->frame_ctl);
@ -1246,10 +1246,10 @@ s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
goto _exit;
#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html
pxmit_skb = dev_alloc_skb(len + TXDESC_SIZE);
#else
pxmit_skb = dev_alloc_skb(len + TXDESC_SIZE);
#else
pxmit_skb = netdev_alloc_skb(pnetdev, len + TXDESC_SIZE);
#endif
#endif
if (!pxmit_skb)
goto _exit;
@ -1261,42 +1261,42 @@ s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
goto _exit;
}
// ----- fill tx desc -----
ptxdesc = (struct tx_desc *)pxmitbuf;
// ----- fill tx desc -----
ptxdesc = (struct tx_desc *)pxmitbuf;
_rtw_memset(ptxdesc, 0, sizeof(*ptxdesc));
//offset 0
ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff);
//offset 0
ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff);
ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<<OFFSET_SHT)&0x00ff0000);//default = 32 bytes for TX Desc
ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
if (bmcst)
if (bmcst)
{
ptxdesc->txdw0 |= cpu_to_le32(BIT(24));
}
}
//offset 4
//offset 4
ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID
ptxdesc->txdw1 |= cpu_to_le32((0x12<<QSEL_SHT)&0x00001f00);
ptxdesc->txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode
//offset 8
//offset 8
//offset 12
//offset 12
ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000);
//offset 16
//offset 16
ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate
//offset 20
//HW append seq
ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number
ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29.
rtl8188eu_cal_txdesc_chksum(ptxdesc);
// ----- end of fill tx desc -----
@ -1310,14 +1310,14 @@ s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
// ----- prepare urb for submit -----
//translate DMA FIFO addr to pipehandle
//pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX);
pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f);
usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe,
pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb);
urb->transfer_flags |= URB_ZERO_PACKET;
usb_anchor_urb(urb, &phostapdpriv->anchored);
rc = usb_submit_urb(urb, GFP_ATOMIC);
@ -1327,9 +1327,9 @@ s32 rtl8188eu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
}
usb_free_urb(urb);
_exit:
_exit:
dev_kfree_skb_any(skb);
#endif
@ -1338,4 +1338,3 @@ _exit:
}
#endif

887
hal/usb_halinit.c
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577
hal/usb_ops_linux.c
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