skyfall/rtl8188eu
1
0
Fork 0
mirror of https://github.com/lwfinger/rtl8188eu.git synced 2025-05-08 22:43:04 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

rtl8188eu: Remove trailing white space from all source files

Browse source 
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2013-05-18 23:28:07 -05:00
parent 77e736c66a
commit f5f3863bc5
205 changed files with 55371 additions and 55581 deletions
Download patch file Download diff file Expand all files Collapse all files

45
include/rtw_pwrctrl.h
View file

@ -29,15 +29,15 @@
#endif //CONFIG_HAS_EARLYSUSPEND
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR3 0
#define HW_PWR4 8
@ -108,7 +108,7 @@ struct reportpwrstate_parm {
unsigned char mode;
unsigned char state; //the CPWM value
unsigned short rsvd;
};
};
typedef _sema _pwrlock;
@ -179,7 +179,7 @@ enum _PS_BBRegBackup_ {
enum { // for ips_mode
IPS_NONE=0,
IPS_NORMAL,
IPS_LEVEL_2,
IPS_LEVEL_2,
};
struct pwrctrl_priv
@ -216,17 +216,17 @@ struct pwrctrl_priv
#ifdef CONFIG_PCI_HCI
//just for PCIE ASPM
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00.
u8 b_support_backdoor;
//just for PCIE ASPM
u8 const_amdpci_aspm;
#endif
uint ips_enter_cnts;
uint ips_leave_cnts;
uint ips_enter_cnts;
uint ips_leave_cnts;
u8 ips_mode;
u8 ips_mode;
u8 ips_mode_req; // used to accept the mode setting request, will update to ipsmode later
uint bips_processing;
u32 ips_deny_time; /* will deny IPS when system time is smaller than this */
@ -237,7 +237,7 @@ struct pwrctrl_priv
u8 power_mgnt;
u8 bFwCurrentInPSMode;
u32 DelayLPSLastTimeStamp;
u8 btcoex_rfon;
u8 btcoex_rfon;
s32 pnp_current_pwr_state;
u8 pnp_bstop_trx;
@ -248,7 +248,7 @@ struct pwrctrl_priv
u8 bAutoResume;
u8 autopm_cnt;
#endif
u8 bSupportRemoteWakeup;
u8 bSupportRemoteWakeup;
#ifdef CONFIG_WOWLAN
u8 wowlan_mode;
u8 wowlan_pattern;
@ -258,20 +258,20 @@ struct pwrctrl_priv
u8 wowlan_wake_reason;
u32 wowlan_pattern_context[8][5];
#endif // CONFIG_WOWLAN
_timer pwr_state_check_timer;
_timer pwr_state_check_timer;
int pwr_state_check_interval;
u8 pwr_state_check_cnts;
int ps_flag;
int ps_flag;
rt_rf_power_state rf_pwrstate;//cur power state
//rt_rf_power_state current_rfpwrstate;
//rt_rf_power_state current_rfpwrstate;
rt_rf_power_state change_rfpwrstate;
u8 wepkeymask;
u8 bHWPowerdown;//if support hw power down
u8 bHWPwrPindetect;
u8 bkeepfwalive;
u8 bkeepfwalive;
u8 brfoffbyhw;
unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
@ -284,7 +284,7 @@ struct pwrctrl_priv
struct early_suspend early_suspend;
u8 do_late_resume;
#endif //CONFIG_HAS_EARLYSUSPEND
#ifdef CONFIG_ANDROID_POWER
android_early_suspend_t early_suspend;
u8 do_late_resume;
@ -308,7 +308,7 @@ struct pwrctrl_priv
/*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __func__, (pwrctrlpriv), (ms));*/ \
_set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
} while (0)
#define rtw_set_pwr_state_check_timer(pwrctrlpriv) \
_rtw_set_pwr_state_check_timer((pwrctrlpriv), (pwrctrlpriv)->pwr_state_check_interval)
@ -371,4 +371,3 @@ int rtw_pm_set_ips(_adapter *padapter, u8 mode);
int rtw_pm_set_lps(_adapter *padapter, u8 mode);
#endif //__RTL871X_PWRCTRL_H_