mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-09-20 08:07:06 +00:00
0e4009c999
The vendor code has pieces of code for PCI, SDIO, and GSPI. Remove it and CONFIG_USB_HCI. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
280 lines
6.5 KiB
C
280 lines
6.5 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTL8188E_XMIT_H__
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#define __RTL8188E_XMIT_H__
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#define MAX_TX_AGG_PACKET_NUMBER 0xFF
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//
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// Queue Select Value in TxDesc
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//
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#define QSLT_BK 0x2//0x01
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#define QSLT_BE 0x0
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#define QSLT_VI 0x5//0x4
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#define QSLT_VO 0x7//0x6
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#define QSLT_BEACON 0x10
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#define QSLT_HIGH 0x11
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#define QSLT_MGNT 0x12
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#define QSLT_CMD 0x13
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//For 88e early mode
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#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
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#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
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#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
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#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
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#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
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#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
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#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
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//
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//defined for TX DESC Operation
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//
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#define MAX_TID (15)
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//OFFSET 0
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#define OFFSET_SZ 0
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#define OFFSET_SHT 16
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#define BMC BIT(24)
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#define LSG BIT(26)
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#define FSG BIT(27)
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#define OWN BIT(31)
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//OFFSET 4
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#define PKT_OFFSET_SZ 0
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#define QSEL_SHT 8
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#define RATE_ID_SHT 16
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#define NAVUSEHDR BIT(20)
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#define SEC_TYPE_SHT 22
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#define PKT_OFFSET_SHT 26
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//OFFSET 8
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#define AGG_EN BIT(12)
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#define AGG_BK BIT(16)
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#define AMPDU_DENSITY_SHT 20
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#define ANTSEL_A BIT(24)
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#define ANTSEL_B BIT(25)
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#define TX_ANT_CCK_SHT 26
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#define TX_ANTL_SHT 28
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#define TX_ANT_HT_SHT 30
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//OFFSET 12
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#define SEQ_SHT 16
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#define EN_HWSEQ BIT(31)
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//OFFSET 16
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#define QOS BIT(6)
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#define HW_SSN BIT(7)
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#define USERATE BIT(8)
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#define DISDATAFB BIT(10)
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#define CTS_2_SELF BIT(11)
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#define RTS_EN BIT(12)
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#define HW_RTS_EN BIT(13)
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#define DATA_SHORT BIT(24)
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#define PWR_STATUS_SHT 15
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#define DATA_SC_SHT 20
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#define DATA_BW BIT(25)
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//OFFSET 20
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#define RTY_LMT_EN BIT(17)
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enum TXDESC_SC{
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SC_DONT_CARE = 0x00,
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SC_UPPER= 0x01,
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SC_LOWER=0x02,
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SC_DUPLICATE=0x03
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};
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//OFFSET 20
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#define SGI BIT(6)
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#define USB_TXAGG_NUM_SHT 24
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typedef struct txdesc_88e
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{
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//Offset 0
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u32 pktlen:16;
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u32 offset:8;
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u32 bmc:1;
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u32 htc:1;
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u32 ls:1;
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u32 fs:1;
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u32 linip:1;
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u32 noacm:1;
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u32 gf:1;
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u32 own:1;
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//Offset 4
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u32 macid:6;
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u32 rsvd0406:2;
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u32 qsel:5;
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u32 rd_nav_ext:1;
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u32 lsig_txop_en:1;
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u32 pifs:1;
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u32 rate_id:4;
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u32 navusehdr:1;
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u32 en_desc_id:1;
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u32 sectype:2;
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u32 rsvd0424:2;
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u32 pkt_offset:5; // unit: 8 bytes
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u32 rsvd0431:1;
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//Offset 8
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u32 rts_rc:6;
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u32 data_rc:6;
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u32 agg_en:1;
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u32 rd_en:1;
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u32 bar_rty_th:2;
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u32 bk:1;
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u32 morefrag:1;
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u32 raw:1;
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u32 ccx:1;
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u32 ampdu_density:3;
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u32 bt_null:1;
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u32 ant_sel_a:1;
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u32 ant_sel_b:1;
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u32 tx_ant_cck:2;
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u32 tx_antl:2;
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u32 tx_ant_ht:2;
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//Offset 12
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u32 nextheadpage:8;
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u32 tailpage:8;
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u32 seq:12;
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u32 cpu_handle:1;
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u32 tag1:1;
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u32 trigger_int:1;
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u32 hwseq_en:1;
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//Offset 16
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u32 rtsrate:5;
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u32 ap_dcfe:1;
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u32 hwseq_sel:2;
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u32 userate:1;
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u32 disrtsfb:1;
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u32 disdatafb:1;
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u32 cts2self:1;
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u32 rtsen:1;
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u32 hw_rts_en:1;
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u32 port_id:1;
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u32 pwr_status:3;
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u32 wait_dcts:1;
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u32 cts2ap_en:1;
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u32 data_sc:2;
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u32 data_stbc:2;
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u32 data_short:1;
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u32 data_bw:1;
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u32 rts_short:1;
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u32 rts_bw:1;
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u32 rts_sc:2;
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u32 vcs_stbc:2;
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//Offset 20
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u32 datarate:6;
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u32 sgi:1;
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u32 try_rate:1;
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u32 data_ratefb_lmt:5;
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u32 rts_ratefb_lmt:4;
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u32 rty_lmt_en:1;
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u32 data_rt_lmt:6;
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u32 usb_txagg_num:8;
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//Offset 24
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u32 txagg_a:5;
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u32 txagg_b:5;
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u32 use_max_len:1;
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u32 max_agg_num:5;
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u32 mcsg1_max_len:4;
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u32 mcsg2_max_len:4;
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u32 mcsg3_max_len:4;
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u32 mcs7_sgi_max_len:4;
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//Offset 28
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u32 checksum:16; // TxBuffSize(PCIe)/CheckSum(USB)
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u32 sw0:8; /* offset 30 */
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u32 sw1:4;
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u32 mcs15_sgi_max_len:4;
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}TXDESC, *PTXDESC;
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#define txdesc_set_ccx_sw_88e(txdesc, value) \
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do { \
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((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \
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((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \
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} while (0)
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struct txrpt_ccx_88e {
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/* offset 0 */
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u8 tag1:1;
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u8 pkt_num:3;
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u8 txdma_underflow:1;
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u8 int_bt:1;
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u8 int_tri:1;
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u8 int_ccx:1;
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/* offset 1 */
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u8 mac_id:6;
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u8 pkt_ok:1;
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u8 bmc:1;
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/* offset 2 */
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u8 retry_cnt:6;
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u8 lifetime_over:1;
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u8 retry_over:1;
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/* offset 3 */
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u8 ccx_qtime0;
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u8 ccx_qtime1;
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/* offset 5 */
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u8 final_data_rate;
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/* offset 6 */
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u8 sw1:4;
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u8 qsel:4;
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/* offset 7 */
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u8 sw0;
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};
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#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8))
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#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8))
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void rtl8188e_fill_fake_txdesc(PADAPTER padapter,u8*pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull);
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s32 rtl8188eu_init_xmit_priv(PADAPTER padapter);
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void rtl8188eu_free_xmit_priv(PADAPTER padapter);
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s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
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s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
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s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter);
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#define hal_xmit_handler rtl8188eu_xmit_buf_handler
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void rtl8188eu_xmit_tasklet(void *priv);
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s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
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#ifdef CONFIG_TX_EARLY_MODE
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void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf );
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#endif
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#ifdef CONFIG_XMIT_ACK
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void dump_txrpt_ccx_88e(void *buf);
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void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf);
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#else
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#define dump_txrpt_ccx_88e(buf) do {} while (0)
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#define handle_txrpt_ccx_88e(adapter, buf) do {} while (0)
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#endif //CONFIG_XMIT_ACK
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void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc);
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#endif //__RTL8188E_XMIT_H__
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