mirror of
https://github.com/lwfinger/rtl8188eu.git
synced 2024-11-22 12:33:40 +00:00
0e4009c999
The vendor code has pieces of code for PCI, SDIO, and GSPI. Remove it and CONFIG_USB_HCI. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
573 lines
16 KiB
C
573 lines
16 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef _RTW_MP_H_
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#define _RTW_MP_H_
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// 00 - Success
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// 11 - Error
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#define STATUS_SUCCESS (0x00000000L)
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#define STATUS_PENDING (0x00000103L)
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#define STATUS_UNSUCCESSFUL (0xC0000001L)
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#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL)
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#define STATUS_NOT_SUPPORTED (0xC00000BBL)
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#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS)
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#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING)
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#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L)
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#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L)
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#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L)
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#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L)
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#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL)
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#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES)
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#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L)
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#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L)
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#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L)
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#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L)
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#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L)
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#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L)
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#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L)
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#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL)
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#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL)
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#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL)
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#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL)
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#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL)
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#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED)
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#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL)
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#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L)
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#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L)
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#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L)
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#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L)
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#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L)
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#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L)
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#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L)
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#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L)
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#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L)
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#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L)
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#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL)
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#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL)
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#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL)
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#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL)
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#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL)
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#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL)
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#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L)
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#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L)
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#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L)
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#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L)
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#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) // cause 27
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#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) // cause 35,45
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#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) // cause 37
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#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) // cause 49
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#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) // cause 93
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#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3
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typedef enum _ANTENNA_PATH{
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ANTENNA_NONE = 0x00,
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ANTENNA_D ,
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ANTENNA_C ,
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ANTENNA_CD ,
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ANTENNA_B ,
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ANTENNA_BD ,
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ANTENNA_BC ,
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ANTENNA_BCD ,
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ANTENNA_A ,
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ANTENNA_AD ,
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ANTENNA_AC ,
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ANTENNA_ACD ,
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ANTENNA_AB ,
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ANTENNA_ABD ,
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ANTENNA_ABC ,
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ANTENNA_ABCD
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} ANTENNA_PATH;
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#define MAX_MP_XMITBUF_SZ 2048
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#define NR_MP_XMITFRAME 8
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struct mp_xmit_frame
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{
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_list list;
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struct pkt_attrib attrib;
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_pkt *pkt;
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int frame_tag;
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_adapter *padapter;
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//insert urb, irp, and irpcnt info below...
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u8 *mem_addr;
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u32 sz[8];
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PURB pxmit_urb[8];
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u8 bpending[8];
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sint ac_tag[8];
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sint last[8];
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uint irpcnt;
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uint fragcnt;
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uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
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};
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struct mp_wiparam
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{
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u32 bcompleted;
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u32 act_type;
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u32 io_offset;
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u32 io_value;
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};
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typedef void(*wi_act_func)(void* padapter);
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struct mp_tx
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{
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u8 stop;
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u32 count, sended;
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u8 payload;
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struct pkt_attrib attrib;
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struct tx_desc desc;
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u8 *pallocated_buf;
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u8 *buf;
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u32 buf_size, write_size;
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_thread_hdl_ PktTxThread;
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};
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#include <Hal8188EPhyCfg.h>
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#define MP_MAX_LINES 1000
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#define MP_MAX_LINES_BYTES 256
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#define u1Byte u8
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#define s1Byte s8
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#define u4Byte u32
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#define s4Byte s32
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#define u1Byte u8
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#define pu1Byte u8*
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#define u2Byte u16
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#define pu2Byte u16*
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#define u4Byte u32
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#define pu4Byte u32*
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#define u8Byte u64
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#define pu8Byte u64*
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#define s1Byte s8
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#define ps1Byte s8*
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#define s2Byte s16
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#define ps2Byte s16*
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#define s4Byte s32
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#define ps4Byte s32*
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#define s8Byte s64
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#define ps8Byte s64*
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#define UCHAR u8
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#define USHORT u16
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#define UINT u32
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#define ULONG u32
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#define PULONG u32*
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typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
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typedef struct _MPT_CONTEXT
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{
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// Indicate if we have started Mass Production Test.
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bool bMassProdTest;
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// Indicate if the driver is unloading or unloaded.
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bool bMptDrvUnload;
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_sema MPh2c_Sema;
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_timer MPh2c_timeout_timer;
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// Event used to sync H2c for BT control
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bool MptH2cRspEvent;
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bool MptBtC2hEvent;
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bool bMPh2c_timeout;
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/* 8190 PCI does not support NDIS_WORK_ITEM. */
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// Work Item for Mass Production Test.
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//NDIS_WORK_ITEM MptWorkItem;
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// RT_WORK_ITEM MptWorkItem;
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// Event used to sync the case unloading driver and MptWorkItem is still in progress.
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// NDIS_EVENT MptWorkItemEvent;
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// To protect the following variables.
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// NDIS_SPIN_LOCK MptWorkItemSpinLock;
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// Indicate a MptWorkItem is scheduled and not yet finished.
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bool bMptWorkItemInProgress;
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// An instance which implements function and context of MptWorkItem.
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MPT_WORK_ITEM_HANDLER CurrMptAct;
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// 1=Start, 0=Stop from UI.
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ULONG MptTestStart;
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// _TEST_MODE, defined in MPT_Req2.h
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ULONG MptTestItem;
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// Variable needed in each implementation of CurrMptAct.
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ULONG MptActType; // Type of action performed in CurrMptAct.
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// The Offset of IO operation is depend of MptActType.
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ULONG MptIoOffset;
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// The Value of IO operation is depend of MptActType.
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ULONG MptIoValue;
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// The RfPath of IO operation is depend of MptActType.
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ULONG MptRfPath;
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WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch.
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u8 MptChannelToSw; // Channel to switch.
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u8 MptInitGainToSet; // Initial gain to set.
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//ULONG bMptAntennaA; // true if we want to use antenna A.
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ULONG MptBandWidth; // bandwidth to switch.
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ULONG MptRateIndex; // rate index.
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// Register value kept for Single Carrier Tx test.
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u8 btMpCckTxPower;
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// Register value kept for Single Carrier Tx test.
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u8 btMpOfdmTxPower;
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// For MP Tx Power index
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u8 TxPwrLevel[2]; // rf-A, rf-B
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// Content of RCR Regsiter for Mass Production Test.
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ULONG MptRCR;
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// true if we only receive packets with specific pattern.
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bool bMptFilterPattern;
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// Rx OK count, statistics used in Mass Production Test.
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ULONG MptRxOkCnt;
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// Rx CRC32 error count, statistics used in Mass Production Test.
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ULONG MptRxCrcErrCnt;
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bool bCckContTx; // true if we are in CCK Continuous Tx test.
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bool bOfdmContTx; // true if we are in OFDM Continuous Tx test.
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bool bStartContTx; // true if we have start Continuous Tx test.
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// true if we are in Single Carrier Tx test.
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bool bSingleCarrier;
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// true if we are in Carrier Suppression Tx Test.
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bool bCarrierSuppression;
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//true if we are in Single Tone Tx test.
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bool bSingleTone;
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// ACK counter asked by K.Y..
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bool bMptEnableAckCounter;
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ULONG MptAckCounter;
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// SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~!
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//s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT];
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//s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES];
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//s4Byte RfReadLine[2];
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u8 APK_bound[2]; //for APK path A/path B
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bool bMptIndexEven;
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u8 backup0xc50;
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u8 backup0xc58;
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u8 backup0xc30;
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u8 backup0x52_RF_A;
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u8 backup0x52_RF_B;
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u1Byte h2cReqNum;
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u1Byte c2hBuf[20];
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u1Byte btInBuf[100];
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ULONG mptOutLen;
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u1Byte mptOutBuf[100];
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}MPT_CONTEXT, *PMPT_CONTEXT;
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enum {
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WRITE_REG = 1,
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READ_REG,
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WRITE_RF,
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READ_RF,
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MP_START,
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MP_STOP,
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MP_RATE,
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MP_CHANNEL,
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MP_BANDWIDTH,
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MP_TXPOWER,
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MP_ANT_TX,
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MP_ANT_RX,
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MP_CTX,
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MP_QUERY,
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MP_ARX,
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MP_PSD,
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MP_PWRTRK,
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MP_THER,
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MP_IOCTL,
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EFUSE_GET,
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EFUSE_SET,
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MP_RESET_STATS,
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MP_DUMP,
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MP_PHYPARA,
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MP_SetRFPathSwh,
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MP_QueryDrvStats,
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MP_SetBT,
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CTA_TEST,
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MP_NULL,
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};
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struct mp_priv
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{
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_adapter *papdater;
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//Testing Flag
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u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD)
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u32 prev_fw_state;
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//OID cmd handler
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struct mp_wiparam workparam;
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// u8 act_in_progress;
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//Tx Section
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u8 TID;
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u32 tx_pktcount;
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struct mp_tx tx;
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//Rx Section
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u32 rx_pktcount;
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u32 rx_crcerrpktcount;
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u32 rx_pktloss;
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struct recv_stat rxstat;
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//RF/BB relative
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u8 channel;
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u8 bandwidth;
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u8 prime_channel_offset;
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u8 txpoweridx;
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u8 txpoweridx_b;
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u8 rateidx;
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u32 preamble;
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// u8 modem;
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u32 CrystalCap;
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// u32 curr_crystalcap;
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u16 antenna_tx;
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u16 antenna_rx;
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// u8 curr_rfpath;
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u8 check_mp_pkt;
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u8 bSetTxPower;
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// uint ForcedDataRate;
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struct wlan_network mp_network;
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NDIS_802_11_MAC_ADDRESS network_macaddr;
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u8 *pallocated_mp_xmitframe_buf;
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u8 *pmp_xmtframe_buf;
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_queue free_mp_xmitqueue;
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u32 free_mp_xmitframe_cnt;
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MPT_CONTEXT MptCtx;
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};
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typedef struct _IOCMD_STRUCT_ {
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u8 cmdclass;
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u16 value;
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u8 index;
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}IOCMD_STRUCT;
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struct rf_reg_param {
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u32 path;
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u32 offset;
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u32 value;
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};
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struct bb_reg_param {
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u32 offset;
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u32 value;
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};
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//=======================================================================
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#define LOWER true
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#define RAISE false
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/* Hardware Registers */
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#define BB_REG_BASE_ADDR 0x800
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/* MP variables */
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typedef enum _MP_MODE_ {
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MP_OFF,
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MP_ON,
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MP_ERR,
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MP_CONTINUOUS_TX,
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MP_SINGLE_CARRIER_TX,
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MP_CARRIER_SUPPRISSION_TX,
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MP_SINGLE_TONE_TX,
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MP_PACKET_TX,
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MP_PACKET_RX
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} MP_MODE;
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#define MAX_RF_PATH_NUMS RF_PATH_MAX
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extern u8 mpdatarate[NumRates];
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/* MP set force data rate base on the definition. */
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typedef enum _MPT_RATE_INDEX
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{
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/* CCK rate. */
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MPT_RATE_1M, /* 0 */
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MPT_RATE_2M,
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MPT_RATE_55M,
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MPT_RATE_11M, /* 3 */
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/* OFDM rate. */
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MPT_RATE_6M, /* 4 */
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MPT_RATE_9M,
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MPT_RATE_12M,
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MPT_RATE_18M,
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MPT_RATE_24M,
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MPT_RATE_36M,
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MPT_RATE_48M,
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MPT_RATE_54M, /* 11 */
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/* HT rate. */
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MPT_RATE_MCS0, /* 12 */
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MPT_RATE_MCS1,
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MPT_RATE_MCS2,
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MPT_RATE_MCS3,
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MPT_RATE_MCS4,
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MPT_RATE_MCS5,
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MPT_RATE_MCS6,
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MPT_RATE_MCS7, /* 19 */
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MPT_RATE_MCS8,
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MPT_RATE_MCS9,
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MPT_RATE_MCS10,
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MPT_RATE_MCS11,
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MPT_RATE_MCS12,
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MPT_RATE_MCS13,
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MPT_RATE_MCS14,
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MPT_RATE_MCS15, /* 27 */
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MPT_RATE_LAST
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}MPT_RATE_E, *PMPT_RATE_E;
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#define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F
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typedef enum _POWER_MODE_ {
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POWER_LOW = 0,
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POWER_NORMAL
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}POWER_MODE;
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#define RX_PKT_BROADCAST 1
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#define RX_PKT_DEST_ADDR 2
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#define RX_PKT_PHY_MATCH 3
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typedef enum _ENCRY_CTRL_STATE_ {
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HW_CONTROL, //hw encryption& decryption
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SW_CONTROL, //sw encryption& decryption
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HW_ENCRY_SW_DECRY, //hw encryption & sw decryption
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SW_ENCRY_HW_DECRY //sw encryption & hw decryption
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}ENCRY_CTRL_STATE;
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//=======================================================================
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//extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv);
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//extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe);
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extern s32 init_mp_priv(PADAPTER padapter);
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extern void free_mp_priv(struct mp_priv *pmp_priv);
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extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel);
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extern void MPT_DeInitAdapter(PADAPTER padapter);
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extern s32 mp_start_test(PADAPTER padapter);
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extern void mp_stop_test(PADAPTER padapter);
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//=======================================================================
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extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask);
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extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
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extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz);
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extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz);
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extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask);
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extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val);
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extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr);
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extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val);
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extern void SetChannel(PADAPTER pAdapter);
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extern void SetBandwidth(PADAPTER pAdapter);
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extern void SetTxPower(PADAPTER pAdapter);
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extern void SetAntennaPathPower(PADAPTER pAdapter);
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//extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset);
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extern void SetDataRate(PADAPTER pAdapter);
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extern void SetAntenna(PADAPTER pAdapter);
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//extern void SetCrystalCap(PADAPTER pAdapter);
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extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
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extern void GetThermalMeter(PADAPTER pAdapter, u8 *value);
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extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart);
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extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart);
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extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart);
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extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
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extern void PhySetTxPowerLevel(PADAPTER pAdapter);
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extern void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc);
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extern void SetPacketTx(PADAPTER padapter);
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extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx);
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extern void ResetPhyRxPktCount(PADAPTER pAdapter);
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extern u32 GetPhyRxPktReceived(PADAPTER pAdapter);
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extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter);
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extern s32 SetPowerTracking(PADAPTER padapter, u8 enable);
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extern void GetPowerTracking(PADAPTER padapter, u8 *enable);
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extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data);
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extern void Hal_SetAntenna(PADAPTER pAdapter);
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extern void Hal_SetBandwidth(PADAPTER pAdapter);
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extern void Hal_SetTxPower(PADAPTER pAdapter);
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extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart);
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extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart );
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extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart);
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extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart);
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extern void Hal_SetBandwidth(PADAPTER pAdapter);
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extern void Hal_SetDataRate(PADAPTER pAdapter);
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extern void Hal_SetChannel(PADAPTER pAdapter);
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extern void Hal_SetAntennaPathPower(PADAPTER pAdapter);
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extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther);
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extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable);
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extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable);
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extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value);
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extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter);
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extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, bool bInCH14);
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extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, bool beven);
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extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower);
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extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower);
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extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter);
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extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter);
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extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart);
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extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart);
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extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal);
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extern void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
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extern void MP_PHY_SetRFPathSwitch(PADAPTER pAdapter ,bool bMain);
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#endif //_RTW_MP_H_
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