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rtl8188eu: Remove dead code for devices other than RTL8188EU

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This commit handles files in hal/.

Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2018-11-03 13:38:59 -05:00
parent 539f476e87
commit 0fcf3c2f5e
9 changed files with 9 additions and 1801 deletions
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104
hal/efuse_mask.h
View file

@ -1,106 +1,2 @@
#if DEV_BUS_TYPE == RT_USB_INTERFACE
#if defined(CONFIG_RTL8188E)
#include "HalEfuseMask8188E_USB.h" #include "HalEfuseMask8188E_USB.h"
#endif
#if defined(CONFIG_RTL8812A)
#include "HalEfuseMask8812A_USB.h"
#endif
#if defined(CONFIG_RTL8821A)
#include "HalEfuseMask8821A_USB.h"
#endif
#if defined(CONFIG_RTL8192E)
#include "HalEfuseMask8192E_USB.h"
#endif
#if defined(CONFIG_RTL8723B)
#include "HalEfuseMask8723B_USB.h"
#endif
#if defined(CONFIG_RTL8814A)
#include "HalEfuseMask8814A_USB.h"
#endif
#if defined(CONFIG_RTL8703B)
#include "HalEfuseMask8703B_USB.h"
#endif
#if defined(CONFIG_RTL8723D)
#include "HalEfuseMask8723D_USB.h"
#endif
#if defined(CONFIG_RTL8188F)
#include "HalEfuseMask8188F_USB.h"
#endif
#if defined(CONFIG_RTL8822B)
#include "HalEfuseMask8822B_USB.h"
#endif
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
#if defined(CONFIG_RTL8188E)
#include "HalEfuseMask8188E_PCIE.h"
#endif
#if defined(CONFIG_RTL8812A)
#include "HalEfuseMask8812A_PCIE.h"
#endif
#if defined(CONFIG_RTL8821A)
#include "HalEfuseMask8821A_PCIE.h"
#endif
#if defined(CONFIG_RTL8192E)
#include "HalEfuseMask8192E_PCIE.h"
#endif
#if defined(CONFIG_RTL8723B)
#include "HalEfuseMask8723B_PCIE.h"
#endif
#if defined(CONFIG_RTL8814A)
#include "HalEfuseMask8814A_PCIE.h"
#endif
#if defined(CONFIG_RTL8703B)
#include "HalEfuseMask8703B_PCIE.h"
#endif
#if defined(CONFIG_RTL8822B)
#include "HalEfuseMask8822B_PCIE.h"
#endif
#if defined(CONFIG_RTL8723D)
#include "HalEfuseMask8723D_PCIE.h"
#endif
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
#if defined(CONFIG_RTL8188E)
#include "HalEfuseMask8188E_SDIO.h"
#endif
#if defined(CONFIG_RTL8703B)
#include "HalEfuseMask8703B_SDIO.h"
#endif
#if defined(CONFIG_RTL8188F)
#include "HalEfuseMask8188F_SDIO.h"
#endif
#if defined(CONFIG_RTL8723D)
#include "HalEfuseMask8723D_SDIO.h"
#endif
#if defined(CONFIG_RTL8821C)
#include "HalEfuseMask8821C_SDIO.h"
#endif
#if defined(CONFIG_RTL8822B)
#include "HalEfuseMask8822B_SDIO.h"
#endif
#endif

34
hal/hal_btcoex.c
View file

@ -2137,38 +2137,6 @@ u32 halbtcoutsrc_GetPhydmVersion(void *pBtcContext)
{ {
struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
PADAPTER Adapter = pBtCoexist->Adapter; PADAPTER Adapter = pBtCoexist->Adapter;
#ifdef CONFIG_RTL8192E
return RELEASE_VERSION_8192E;
#endif
#ifdef CONFIG_RTL8821A
return RELEASE_VERSION_8821A;
#endif
#ifdef CONFIG_RTL8723B
return RELEASE_VERSION_8723B;
#endif
#ifdef CONFIG_RTL8812A
return RELEASE_VERSION_8812A;
#endif
#ifdef CONFIG_RTL8703B
return RELEASE_VERSION_8703B;
#endif
#ifdef CONFIG_RTL8822B
return RELEASE_VERSION_8822B;
#endif
#ifdef CONFIG_RTL8723D
return RELEASE_VERSION_8723D;
#endif
#ifdef CONFIG_RTL8821C
return RELEASE_VERSION_8821C;
#endif
} }
void halbtcoutsrc_phydm_modify_RA_PCR_threshold(void *pBtcContext, u8 RA_offset_direction, u8 RA_threshold_offset) void halbtcoutsrc_phydm_modify_RA_PCR_threshold(void *pBtcContext, u8 RA_offset_direction, u8 RA_threshold_offset)
@ -2176,9 +2144,7 @@ void halbtcoutsrc_phydm_modify_RA_PCR_threshold(void *pBtcContext, u8 RA_offset_
struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext; struct btc_coexist *pBtCoexist = (struct btc_coexist *)pBtcContext;
/* switch to #if 0 in case the phydm version does not provide the function */ /* switch to #if 0 in case the phydm version does not provide the function */
#if 1
phydm_modify_RA_PCR_threshold(pBtCoexist->odm_priv, RA_offset_direction, RA_threshold_offset); phydm_modify_RA_PCR_threshold(pBtCoexist->odm_priv, RA_offset_direction, RA_threshold_offset);
#endif
} }
u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type) u32 halbtcoutsrc_phydm_query_PHY_counter(void *pBtcContext, u8 info_type)

332
hal/hal_com.c
View file

@ -2539,22 +2539,12 @@ void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val)
case HW_PORT1: case HW_PORT1:
reg_macid = REG_MACID1; reg_macid = REG_MACID1;
break; break;
#if defined(CONFIG_RTL8814A)
case HW_PORT2:
reg_macid = REG_MACID2;
break;
case HW_PORT3:
reg_macid = REG_MACID3;
break;
case HW_PORT4:
reg_macid = REG_MACID4;
break;
#endif/*defined(CONFIG_RTL8814A)*/
} }
for (idx = 0; idx < 6; idx++) for (idx = 0; idx < 6; idx++)
rtw_write8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx), val[idx]); rtw_write8(GET_PRIMARY_ADAPTER(adapter), (reg_macid + idx), val[idx]);
} }
void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr) void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr)
{ {
u8 idx = 0; u8 idx = 0;
@ -2572,17 +2562,6 @@ void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr)
case HW_PORT1: case HW_PORT1:
reg_macid = REG_MACID1; reg_macid = REG_MACID1;
break; break;
#if defined(CONFIG_RTL8814A)
case HW_PORT2:
reg_macid = REG_MACID2;
break;
case HW_PORT3:
reg_macid = REG_MACID3;
break;
case HW_PORT4:
reg_macid = REG_MACID4;
break;
#endif /*defined(CONFIG_RTL8814A)*/
} }
for (idx = 0; idx < 6; idx++) for (idx = 0; idx < 6; idx++)
@ -2605,17 +2584,6 @@ void rtw_hal_set_bssid(_adapter *adapter, u8 *val)
case HW_PORT1: case HW_PORT1:
reg_bssid = REG_BSSID1; reg_bssid = REG_BSSID1;
break; break;
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)
case HW_PORT2:
reg_bssid = REG_BSSID2;
break;
case HW_PORT3:
reg_bssid = REG_BSSID3;
break;
case HW_PORT4:
reg_bssid = REG_BSSID4;
break;
#endif/*defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/
} }
for (idx = 0 ; idx < 6; idx++) for (idx = 0 ; idx < 6; idx++)
@ -2635,20 +2603,6 @@ static void rtw_hal_get_msr(_adapter *adapter, u8 *net_type)
/*REG_CR - BIT[19:18]-Network Type for port 1*/ /*REG_CR - BIT[19:18]-Network Type for port 1*/
*net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2; *net_type = (rtw_read8(adapter, MSR) & 0x0C) >> 2;
break; break;
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)
case HW_PORT2:
/*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/
*net_type = rtw_read8(adapter, MSR1) & 0x03;
break;
case HW_PORT3:
/*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/
*net_type = (rtw_read8(adapter, MSR1) & 0x0C) >> 2;
break;
case HW_PORT4:
/*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/
*net_type = (rtw_read8(adapter, MSR1) & 0x30) >> 4;
break;
#endif /*#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)*/
default: default:
RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n",
ADPT_ARG(adapter), adapter->hw_port); ADPT_ARG(adapter), adapter->hw_port);
@ -2680,26 +2634,6 @@ void rtw_hal_set_msr(_adapter *adapter, u8 net_type)
val8 |= net_type << 2; val8 |= net_type << 2;
rtw_write8(adapter, MSR, val8); rtw_write8(adapter, MSR, val8);
break; break;
#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
case HW_PORT2:
/*REG_CR_EXT- BIT[1:0]-Network Type for port 2*/
val8 = rtw_read8(adapter, MSR1) & 0xFC;
val8 |= net_type;
rtw_write8(adapter, MSR1, val8);
break;
case HW_PORT3:
/*REG_CR_EXT- BIT[3:2]-Network Type for port 3*/
val8 = rtw_read8(adapter, MSR1) & 0xF3;
val8 |= net_type << 2;
rtw_write8(adapter, MSR1, val8);
break;
case HW_PORT4:
/*REG_CR_EXT- BIT[5:4]-Network Type for port 4*/
val8 = rtw_read8(adapter, MSR1) & 0xCF;
val8 |= net_type << 4;
rtw_write8(adapter, MSR1, val8);
break;
#endif /* CONFIG_RTL8814A | CONFIG_RTL8822B */
default: default:
RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n", RTW_INFO("[WARN] "ADPT_FMT"- invalid hw port -%d\n",
ADPT_ARG(adapter), adapter->hw_port); ADPT_ARG(adapter), adapter->hw_port);
@ -3035,8 +2969,6 @@ s32 rtw_hal_set_FwMediaStatusRpt_cmd(_adapter *adapter, bool opmode, bool miraca
#ifdef CONFIG_DFS_MASTER #ifdef CONFIG_DFS_MASTER
post_action: post_action:
#endif #endif
#if defined(CONFIG_RTL8188E)
if (rtw_get_chip_type(adapter) == RTL8188E) { if (rtw_get_chip_type(adapter) == RTL8188E) {
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
@ -3056,17 +2988,6 @@ post_action:
} }
#endif #endif
} }
#endif
#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A)
/* TODO: this should move to IOT issue area */
if (rtw_get_chip_type(adapter) == RTL8812
|| rtw_get_chip_type(adapter) == RTL8821
) {
if (MLME_IS_STA(adapter))
Hal_PatchwithJaguar_8812(adapter, opmode);
}
#endif
SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0); SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0);
if (macid_ind == 0) if (macid_ind == 0)
@ -3346,7 +3267,6 @@ static void rtw_hal_force_enable_rxdma(_adapter *adapter)
rtw_write32(adapter, REG_RXPKT_NUM, rtw_write32(adapter, REG_RXPKT_NUM,
(rtw_read32(adapter, REG_RXPKT_NUM) & (~RW_RELEASE_EN))); (rtw_read32(adapter, REG_RXPKT_NUM) & (~RW_RELEASE_EN)));
} }
#if defined(CONFIG_RTL8188E)
static void rtw_hal_disable_tx_report(_adapter *adapter) static void rtw_hal_disable_tx_report(_adapter *adapter)
{ {
rtw_write8(adapter, REG_TX_RPT_CTRL, rtw_write8(adapter, REG_TX_RPT_CTRL,
@ -3360,7 +3280,7 @@ static void rtw_hal_enable_tx_report(_adapter *adapter)
((rtw_read8(adapter, REG_TX_RPT_CTRL) | BIT(1))) | BIT(5)); ((rtw_read8(adapter, REG_TX_RPT_CTRL) | BIT(1))) | BIT(5));
RTW_INFO("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL)); RTW_INFO("enable TX_RPT:0x%02x\n", rtw_read8(adapter, REG_TX_RPT_CTRL));
} }
#endif
static void rtw_hal_release_rx_dma(_adapter *adapter) static void rtw_hal_release_rx_dma(_adapter *adapter)
{ {
u32 val32 = 0; u32 val32 = 0;
@ -4282,10 +4202,8 @@ static void rtw_hal_ap_wow_enable(_adapter *padapter)
issue_beacon(padapter, 0); issue_beacon(padapter, 0);
rtw_msleep_os(2); rtw_msleep_os(2);
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(padapter)) if (IS_HARDWARE_TYPE_8188E(padapter))
rtw_hal_disable_tx_report(padapter); rtw_hal_disable_tx_report(padapter);
#endif
/* RX DMA stop */ /* RX DMA stop */
res = rtw_hal_pause_rx_dma(padapter); res = rtw_hal_pause_rx_dma(padapter);
if (res == _FAIL) if (res == _FAIL)
@ -4343,10 +4261,8 @@ static void rtw_hal_ap_wow_disable(_adapter *padapter)
} }
#endif /*DBG_CHECK_FW_PS_STATE*/ #endif /*DBG_CHECK_FW_PS_STATE*/
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(padapter)) if (IS_HARDWARE_TYPE_8188E(padapter))
rtw_hal_enable_tx_report(padapter); rtw_hal_enable_tx_report(padapter);
#endif
rtw_hal_force_enable_rxdma(padapter); rtw_hal_force_enable_rxdma(padapter);
@ -7660,10 +7576,8 @@ static void rtw_hal_wow_enable(_adapter *adapter)
rtw_hal_backup_rate(adapter); rtw_hal_backup_rate(adapter);
/* RX DMA stop */ /* RX DMA stop */
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(adapter)) if (IS_HARDWARE_TYPE_8188E(adapter))
rtw_hal_disable_tx_report(adapter); rtw_hal_disable_tx_report(adapter);
#endif
res = rtw_hal_pause_rx_dma(adapter); res = rtw_hal_pause_rx_dma(adapter);
if (res == _FAIL) if (res == _FAIL)
@ -7845,10 +7759,8 @@ static void rtw_hal_wow_disable(_adapter *adapter)
#endif #endif
rtw_hal_release_rx_dma(adapter); rtw_hal_release_rx_dma(adapter);
#if defined(CONFIG_RTL8188E)
if (IS_HARDWARE_TYPE_8188E(adapter)) if (IS_HARDWARE_TYPE_8188E(adapter))
rtw_hal_enable_tx_report(adapter); rtw_hal_enable_tx_report(adapter);
#endif
#ifdef CONFIG_GTK_OL #ifdef CONFIG_GTK_OL
if (((pwrctl->wowlan_wake_reason != RX_DISASSOC) || if (((pwrctl->wowlan_wake_reason != RX_DISASSOC) ||
@ -8499,7 +8411,7 @@ static void rtw_hal_set_hw_update_tsf(PADAPTER padapter)
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
#if defined(CONFIG_RTL8822B) || defined(CONFIG_MI_WITH_MBSSID_CAM) #if defined(CONFIG_MI_WITH_MBSSID_CAM)
RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter)); RTW_INFO("[Warn] %s "ADPT_FMT" enter func\n", __func__, ADPT_ARG(padapter));
rtw_warn_on(1); rtw_warn_on(1);
return; return;
@ -9726,36 +9638,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
interface_type = rtw_get_intf_type(adapter); interface_type = rtw_get_intf_type(adapter);
switch (rtw_get_chip_type(adapter)) { switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723B
case RTL8723B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8723BU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8723BS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8723BE;
break;
#endif
#ifdef CONFIG_RTL8703B
case RTL8703B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8703BU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8703BS;
break;
#endif
#ifdef CONFIG_RTL8723D
case RTL8723D:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8723DU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8723DS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8723DE;
break;
#endif
#ifdef CONFIG_RTL8188E
case RTL8188E: case RTL8188E:
if (interface_type == RTW_USB) if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_88EU; addr_offset = EEPROM_MAC_ADDR_88EU;
@ -9764,73 +9646,6 @@ int hal_efuse_macaddr_offset(_adapter *adapter)
else if (interface_type == RTW_PCIE) else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_88EE; addr_offset = EEPROM_MAC_ADDR_88EE;
break; break;
#endif
#ifdef CONFIG_RTL8188F
case RTL8188F:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8188FU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8188FS;
break;
#endif
#ifdef CONFIG_RTL8812A
case RTL8812:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8812AU;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8812AE;
break;
#endif
#ifdef CONFIG_RTL8821A
case RTL8821:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8821AU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8821AS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8821AE;
break;
#endif
#ifdef CONFIG_RTL8192E
case RTL8192E:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8192EU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8192ES;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8192EE;
break;
#endif
#ifdef CONFIG_RTL8814A
case RTL8814A:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8814AU;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8814AE;
break;
#endif
#ifdef CONFIG_RTL8822B
case RTL8822B:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8822BU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8822BS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8822BE;
break;
#endif /* CONFIG_RTL8822B */
#ifdef CONFIG_RTL8821C
case RTL8821C:
if (interface_type == RTW_USB)
addr_offset = EEPROM_MAC_ADDR_8821CU;
else if (interface_type == RTW_SDIO)
addr_offset = EEPROM_MAC_ADDR_8821CS;
else if (interface_type == RTW_PCIE)
addr_offset = EEPROM_MAC_ADDR_8821CE;
break;
#endif /* CONFIG_RTL8821C */
} }
if (addr_offset == -1) { if (addr_offset == -1) {
@ -10009,46 +9824,6 @@ void rtw_bb_rf_gain_offset(_adapter *padapter)
return; return;
} }
#if defined(CONFIG_RTL8723B)
if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) {
RTW_INFO("Offset RF Gain.\n");
RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x\n", pHalData->EEPROMRFGainVal);
if (pHalData->EEPROMRFGainVal != 0xff) {
if (pHalData->ant_path == ODM_RF_PATH_A)
GainValue = (pHalData->EEPROMRFGainVal & 0x0f);
else
GainValue = (pHalData->EEPROMRFGainVal & 0xf0) >> 4;
RTW_INFO("Ant PATH_%d GainValue Offset = 0x%x\n", (pHalData->ant_path == ODM_RF_PATH_A) ? (ODM_RF_PATH_A) : (ODM_RF_PATH_B), GainValue);
for (i = 0; i < ArrayLen; i += 2) {
/* RTW_INFO("ArrayLen in =%d ,Array 1 =0x%x ,Array2 =0x%x\n",i,Array[i],Array[i]+1); */
v1 = Array[i];
v2 = Array[i + 1];
if (v1 == GainValue) {
RTW_INFO("Offset RF Gain. got v1 =0x%x ,v2 =0x%x\n", v1, v2);
target = v2;
break;
}
}
RTW_INFO("pHalData->EEPROMRFGainVal=0x%x ,Gain offset Target Value=0x%x\n", pHalData->EEPROMRFGainVal, target);
res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
RTW_INFO("Offset RF Gain. before reg 0x7f=0x%08x\n", res);
phy_set_rf_reg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18 | BIT17 | BIT16 | BIT15, target);
res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
RTW_INFO("Offset RF Gain. After reg 0x7f=0x%08x\n", res);
} else
RTW_INFO("Offset RF Gain. pHalData->EEPROMRFGainVal=0x%x != 0xff, didn't run Kfree\n", pHalData->EEPROMRFGainVal);
} else
RTW_INFO("Using the default RF gain.\n");
#elif defined(CONFIG_RTL8188E)
if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) { if (value & BIT4 || (registry_par->RegPwrTrimEnable == 1)) {
RTW_INFO("8188ES Offset RF Gain.\n"); RTW_INFO("8188ES Offset RF Gain.\n");
RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n", RTW_INFO("8188ES Offset RF Gain. EEPROMRFGainVal=0x%x\n",
@ -10073,12 +9848,6 @@ void rtw_bb_rf_gain_offset(_adapter *padapter)
} }
} else } else
RTW_INFO("Using the default RF gain.\n"); RTW_INFO("Using the default RF gain.\n");
#else
/* TODO: call this when channel switch */
if (kfree_data->flag & KFREE_FLAG_ON)
rtw_rf_apply_tx_gain_offset(padapter, 6); /* input ch6 to select BB_GAIN_2G */
#endif
} }
#endif /*CONFIG_RF_POWER_TRIM */ #endif /*CONFIG_RF_POWER_TRIM */
@ -10808,15 +10577,11 @@ u8 rtw_get_current_tx_sgi(_adapter *padapter, u8 macid)
struct _rate_adaptive_table_ *pRA_Table = &pDM_Odm->dm_ra_table; struct _rate_adaptive_table_ *pRA_Table = &pDM_Odm->dm_ra_table;
u8 curr_tx_sgi = 0; u8 curr_tx_sgi = 0;
#if defined(CONFIG_RTL8188E)
curr_tx_sgi = odm_ra_get_decision_rate_8188e(pDM_Odm, macid); curr_tx_sgi = odm_ra_get_decision_rate_8188e(pDM_Odm, macid);
#else
curr_tx_sgi = ((pRA_Table->link_tx_rate[macid]) & 0x80) >> 7;
#endif
return curr_tx_sgi; return curr_tx_sgi;
} }
u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid) u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid)
{ {
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
@ -10895,47 +10660,11 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap)
crystal_cap = crystal_cap & 0x3F; crystal_cap = crystal_cap & 0x3F;
switch (rtw_get_chip_type(adapter)) { switch (rtw_get_chip_type(adapter)) {
#if defined(CONFIG_RTL8188E) || defined(CONFIG_RTL8188F)
case RTL8188E: case RTL8188E:
case RTL8188F: case RTL8188F:
/* write 0x24[16:11] = 0x24[22:17] = CrystalCap */ /* write 0x24[16:11] = 0x24[22:17] = CrystalCap */
phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6))); phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x007FF800, (crystal_cap | (crystal_cap << 6)));
break; break;
#endif
#if defined(CONFIG_RTL8812A)
case RTL8812:
/* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */
phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x7FF80000, (crystal_cap | (crystal_cap << 6)));
break;
#endif
#if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \
defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \
defined(CONFIG_RTL8192E)
case RTL8723B:
case RTL8703B:
case RTL8723D:
case RTL8821:
case RTL8192E:
/* write 0x2C[23:18] = 0x2C[17:12] = CrystalCap */
phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x00FFF000, (crystal_cap | (crystal_cap << 6)));
break;
#endif
#if defined(CONFIG_RTL8814A)
case RTL8814A:
/* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap*/
phy_set_bb_reg(adapter, REG_MAC_PHY_CTRL, 0x07FF8000, (crystal_cap | (crystal_cap << 6)));
break;
#endif
#if defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
case RTL8822B:
case RTL8821C:
/* write 0x28[6:1] = 0x24[30:25] = CrystalCap */
crystal_cap = crystal_cap & 0x3F;
phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap);
phy_set_bb_reg(adapter, REG_AFE_PLL_CTRL, 0x7E, crystal_cap);
break;
#endif
default: default:
rtw_warn_on(1); rtw_warn_on(1);
} }
@ -10949,68 +10678,15 @@ int hal_spec_init(_adapter *adapter)
interface_type = rtw_get_intf_type(adapter); interface_type = rtw_get_intf_type(adapter);
switch (rtw_get_chip_type(adapter)) { switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723B
case RTL8723B:
init_hal_spec_8723b(adapter);
break;
#endif
#ifdef CONFIG_RTL8703B
case RTL8703B:
init_hal_spec_8703b(adapter);
break;
#endif
#ifdef CONFIG_RTL8723D
case RTL8723D:
init_hal_spec_8723d(adapter);
break;
#endif
#ifdef CONFIG_RTL8188E
case RTL8188E: case RTL8188E:
init_hal_spec_8188e(adapter); init_hal_spec_8188e(adapter);
break; break;
#endif
#ifdef CONFIG_RTL8188F
case RTL8188F:
init_hal_spec_8188f(adapter);
break;
#endif
#ifdef CONFIG_RTL8812A
case RTL8812:
init_hal_spec_8812a(adapter);
break;
#endif
#ifdef CONFIG_RTL8821A
case RTL8821:
init_hal_spec_8821a(adapter);
break;
#endif
#ifdef CONFIG_RTL8192E
case RTL8192E:
init_hal_spec_8192e(adapter);
break;
#endif
#ifdef CONFIG_RTL8814A
case RTL8814A:
init_hal_spec_8814a(adapter);
break;
#endif
#ifdef CONFIG_RTL8822B
case RTL8822B:
rtl8822b_init_hal_spec(adapter);
break;
#endif
#ifdef CONFIG_RTL8821C
case RTL8821C:
init_hal_spec_rtl8821c(adapter);
break;
#endif
default: default:
RTW_ERR("%s: unknown chip_type:%u\n" RTW_ERR("%s: unknown chip_type:%u\n"
, __func__, rtw_get_chip_type(adapter)); , __func__, rtw_get_chip_type(adapter));
ret = _FAIL; ret = _FAIL;
break; break;
} }
return ret; return ret;
} }

165
hal/hal_com_phycfg.c
View file

@ -241,124 +241,11 @@ static const struct map_t pg_txpwr_def_info =
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE) 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE)
); );
#ifdef CONFIG_RTL8188E
static const struct map_t rtl8188e_pg_txpwr_def_info = static const struct map_t rtl8188e_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12, , MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24) 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24)
); );
#endif
#ifdef CONFIG_RTL8188F
static const struct map_t rtl8188f_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x27, 0x27, 0x27, 0x27, 0x27, 0x24)
);
#endif
#ifdef CONFIG_RTL8723B
static const struct map_t rtl8723b_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0)
, MAPSEG_ARRAY_ENT(0x3A, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0xE0)
);
#endif
#ifdef CONFIG_RTL8703B
static const struct map_t rtl8703b_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
);
#endif
#ifdef CONFIG_RTL8723D
static const struct map_t rtl8723d_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 12,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
, MAPSEG_ARRAY_ENT(0x3A, 12,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x02)
);
#endif
#ifdef CONFIG_RTL8192E
static const struct map_t rtl8192e_pg_txpwr_def_info =
MAP_ENT(0xB8, 2, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 14,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
, MAPSEG_ARRAY_ENT(0x3A, 14,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xEE, 0xEE)
);
#endif
#ifdef CONFIG_RTL8821A
static const struct map_t rtl8821a_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 39,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x24, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x04, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00)
);
#endif
#ifdef CONFIG_RTL8821C
static const struct map_t rtl8821c_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 54,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
0x02, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02)
);
#endif
#ifdef CONFIG_RTL8812A
static const struct map_t rtl8812a_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 82,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF,
0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0x00, 0xEE, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF,
0x00, 0xEE)
);
#endif
#ifdef CONFIG_RTL8822B
static const struct map_t rtl8822b_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 82,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF,
0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF, 0xEC, 0xEC, 0xFF, 0xFF, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xFF, 0xFF, 0xFF, 0xFF, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xFF, 0xFF, 0xEE, 0xFF,
0xEC, 0xEC)
);
#endif
#ifdef CONFIG_RTL8814A
static const struct map_t rtl8814a_pg_txpwr_def_info =
MAP_ENT(0xB8, 1, 0xFF
, MAPSEG_ARRAY_ENT(0x10, 168,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE,
0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02,
0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A,
0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE, 0x2D, 0x2D,
0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x2D, 0x02, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x02, 0xEE,
0xEE, 0xEE, 0xEE, 0xEE, 0x00, 0xEE, 0xEE, 0xEE)
);
#endif
const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter) const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter)
{ {
@ -368,61 +255,9 @@ const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter)
interface_type = rtw_get_intf_type(adapter); interface_type = rtw_get_intf_type(adapter);
switch (rtw_get_chip_type(adapter)) { switch (rtw_get_chip_type(adapter)) {
#ifdef CONFIG_RTL8723B
case RTL8723B:
map = &rtl8723b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8703B
case RTL8703B:
map = &rtl8703b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8723D
case RTL8723D:
map = &rtl8723d_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8188E
case RTL8188E: case RTL8188E:
map = &rtl8188e_pg_txpwr_def_info; map = &rtl8188e_pg_txpwr_def_info;
break; break;
#endif
#ifdef CONFIG_RTL8188F
case RTL8188F:
map = &rtl8188f_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8812A
case RTL8812:
map = &rtl8812a_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8821A
case RTL8821:
map = &rtl8821a_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8192E
case RTL8192E:
map = &rtl8192e_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8814A
case RTL8814A:
map = &rtl8814a_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8822B
case RTL8822B:
map = &rtl8822b_pg_txpwr_def_info;
break;
#endif
#ifdef CONFIG_RTL8821C
case RTL8821C:
map = &rtl8821c_pg_txpwr_def_info;
break;
#endif
} }
if (map == NULL) { if (map == NULL) {

15
hal/hal_intf.c
View file

@ -825,9 +825,6 @@ exit:
} }
#endif /* CONFIG_FW_C2H_PKT */ #endif /* CONFIG_FW_C2H_PKT */
#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
#include <rtw_bt_mp.h> /* for MPTBT_FwC2hBtMpCtrl */
#endif
s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
{ {
HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
@ -842,26 +839,20 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
case C2H_FW_SCAN_COMPLETE: case C2H_FW_SCAN_COMPLETE:
RTW_INFO("[C2H], FW Scan Complete\n"); RTW_INFO("[C2H], FW Scan Complete\n");
break; break;
#ifdef CONFIG_BT_COEXIST #ifdef CONFIG_BT_COEXIST
case C2H_BT_INFO: case C2H_BT_INFO:
rtw_btcoex_BtInfoNotify(adapter, plen, payload); rtw_btcoex_BtInfoNotify(adapter, plen, payload);
break; break;
case C2H_BT_MP_INFO: case C2H_BT_MP_INFO:
#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
MPTBT_FwC2hBtMpCtrl(adapter, payload, plen);
#endif
rtw_btcoex_BtMpRptNotify(adapter, plen, payload); rtw_btcoex_BtMpRptNotify(adapter, plen, payload);
break; break;
case C2H_MAILBOX_STATUS: case C2H_MAILBOX_STATUS:
RTW_INFO_DUMP("C2H_MAILBOX_STATUS: ", payload, plen); RTW_INFO_DUMP("C2H_MAILBOX_STATUS: ", payload, plen);
break; break;
#endif /* CONFIG_BT_COEXIST */ #endif /* CONFIG_BT_COEXIST */
case C2H_IQK_FINISH: case C2H_IQK_FINISH:
c2h_iqk_offload(adapter, payload, plen); c2h_iqk_offload(adapter, payload, plen);
break; break;
#if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW) #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
case C2H_FW_CHNL_SWITCH_COMPLETE: case C2H_FW_CHNL_SWITCH_COMPLETE:
rtw_tdls_chsw_oper_done(adapter); rtw_tdls_chsw_oper_done(adapter);
@ -870,7 +861,6 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
rtw_tdls_ch_sw_back_to_base_chnl(adapter); rtw_tdls_ch_sw_back_to_base_chnl(adapter);
break; break;
#endif #endif
#ifdef CONFIG_MCC_MODE #ifdef CONFIG_MCC_MODE
case C2H_MCC: case C2H_MCC:
rtw_hal_mcc_c2h_handler(adapter, plen, payload); rtw_hal_mcc_c2h_handler(adapter, plen, payload);
@ -1311,11 +1301,6 @@ u8 rtw_hal_ops_check(_adapter *padapter)
rtw_hal_error_msg("hal_mac_c2h_handler"); rtw_hal_error_msg("hal_mac_c2h_handler");
ret = _FAIL; ret = _FAIL;
} }
#elif !defined(CONFIG_RTL8188E)
if (NULL == padapter->hal_func.c2h_handler) {
rtw_hal_error_msg("c2h_handler");
ret = _FAIL;
}
#endif #endif
#if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)

1074
hal/hal_mp.c
View file

File diff suppressed because it is too large Load diff

4
hal/phydm/halphyrf_ap.c
View file

@ -997,10 +997,6 @@ odm_txpowertracking_callback_thermal_meter_jaguar_series(
delay_ms(200); /* frequency deviation */ delay_ms(200); /* frequency deviation */
phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0); phy_set_rf_reg(priv, RF_PATH_A, 0xB4, BIT(14), 0);
phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18); phy_set_rf_reg(priv, RF_PATH_A, 0x18, MASK20BITS, reg0x18);
#ifdef CONFIG_RTL_8812_SUPPORT
if (GET_CHIP_VER(priv) == VERSION_8812E)
update_bbrf_val8812(priv, priv->pmib->dot11RFEntry.dot11channel);
#endif
RTL_W8(0x522, 0x0); RTL_W8(0x522, 0x0);
priv->pshare->thermal_value_lck = thermal_value; priv->pshare->thermal_value_lck = thermal_value;
} }

55
hal/phydm/phydm_powertracking_ap.c
View file

@ -966,7 +966,6 @@ odm_txpowertracking_thermal_meter_init(
p_hal_data->txpowertrack_control = true; p_hal_data->txpowertrack_control = true;
ODM_RT_TRACE(p_dm_odm, COMP_POWER_TRACKING, DBG_LOUD, ("p_mgnt_info->is_txpowertracking = %d\n", p_mgnt_info->is_txpowertracking)); ODM_RT_TRACE(p_dm_odm, COMP_POWER_TRACKING, DBG_LOUD, ("p_mgnt_info->is_txpowertracking = %d\n", p_mgnt_info->is_txpowertracking));
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#ifdef CONFIG_RTL8188E
{ {
p_dm_odm->rf_calibrate_info.is_txpowertracking = _TRUE; p_dm_odm->rf_calibrate_info.is_txpowertracking = _TRUE;
p_dm_odm->rf_calibrate_info.tx_powercount = 0; p_dm_odm->rf_calibrate_info.tx_powercount = 0;
@ -977,38 +976,6 @@ odm_txpowertracking_thermal_meter_init(
MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_dm_odm->rf_calibrate_info.txpowertrack_control); MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_dm_odm->rf_calibrate_info.txpowertrack_control);
} }
#else
{
struct _ADAPTER *adapter = p_dm_odm->adapter;
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &p_hal_data->dmpriv;
/* if(IS_HARDWARE_TYPE_8192C(p_hal_data)) */
{
pdmpriv->is_txpowertracking = _TRUE;
pdmpriv->tx_powercount = 0;
pdmpriv->is_txpowertracking_init = _FALSE;
if (p_dm_odm->mp_mode == false) /* for mp driver, turn off txpwrtracking as default */
pdmpriv->txpowertrack_control = _TRUE;
}
MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
}
#endif/* endif (CONFIG_RTL8188E==1) */
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#ifdef RTL8188E_SUPPORT
{
p_dm_odm->rf_calibrate_info.is_txpowertracking = _TRUE;
p_dm_odm->rf_calibrate_info.tx_powercount = 0;
p_dm_odm->rf_calibrate_info.is_txpowertracking_init = _FALSE;
p_dm_odm->rf_calibrate_info.txpowertrack_control = _TRUE;
p_dm_odm->rf_calibrate_info.tm_trigger = 0;
}
#endif
#endif
p_dm_odm->rf_calibrate_info.txpowertrack_control = true; p_dm_odm->rf_calibrate_info.txpowertrack_control = true;
p_dm_odm->rf_calibrate_info.delta_power_index = 0; p_dm_odm->rf_calibrate_info.delta_power_index = 0;
@ -1017,26 +984,7 @@ odm_txpowertracking_thermal_meter_init(
p_dm_odm->rf_calibrate_info.thermal_value = 0; p_dm_odm->rf_calibrate_info.thermal_value = 0;
p_rf_calibrate_info->default_ofdm_index = 28; p_rf_calibrate_info->default_ofdm_index = 28;
#if (RTL8197F_SUPPORT == 1)
if (GET_CHIP_VER(priv) == VERSION_8197F) {
p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= (OFDM_TABLE_SIZE_92D - 1)) ? 30 : default_swing_index;
p_rf_calibrate_info->default_cck_index = 28;
}
#endif
#if (RTL8822B_SUPPORT == 1)
if (GET_CHIP_VER(priv) == VERSION_8822B) {
p_rf_calibrate_info->default_ofdm_index = (default_swing_index >= (TXSCALE_TABLE_SIZE - 1)) ? 24 : default_swing_index;
p_rf_calibrate_info->default_cck_index = 20;
}
#endif
#if RTL8188E_SUPPORT
p_rf_calibrate_info->default_cck_index = 20; /* -6 dB */ p_rf_calibrate_info->default_cck_index = 20; /* -6 dB */
#elif RTL8192E_SUPPORT
p_rf_calibrate_info->default_cck_index = 8; /* -12 dB */
#endif
p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->default_ofdm_index; p_rf_calibrate_info->bb_swing_idx_ofdm_base = p_rf_calibrate_info->default_ofdm_index;
p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index; p_rf_calibrate_info->bb_swing_idx_cck_base = p_rf_calibrate_info->default_cck_index;
p_dm_odm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->default_cck_index; p_dm_odm->rf_calibrate_info.CCK_index = p_rf_calibrate_info->default_cck_index;
@ -1049,11 +997,8 @@ odm_txpowertracking_thermal_meter_init(
p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->default_cck_index; p_rf_calibrate_info->bb_swing_idx_cck = p_rf_calibrate_info->default_cck_index;
ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("p_rf_calibrate_info->default_ofdm_index=%d p_rf_calibrate_info->default_cck_index=%d\n", p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index)); ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("p_rf_calibrate_info->default_ofdm_index=%d p_rf_calibrate_info->default_cck_index=%d\n", p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index));
} }
void void
odm_txpowertracking_check( odm_txpowertracking_check(
void *p_dm_void void *p_dm_void

27
hal/phydm/phydm_powertracking_win.c
View file

@ -535,7 +535,6 @@ odm_txpowertracking_thermal_meter_init(
if (p_dm_odm->mp_mode == false) if (p_dm_odm->mp_mode == false)
p_rf_calibrate_info->txpowertrack_control = true; p_rf_calibrate_info->txpowertrack_control = true;
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
#ifdef CONFIG_RTL8188E
{ {
p_rf_calibrate_info->is_txpowertracking = _TRUE; p_rf_calibrate_info->is_txpowertracking = _TRUE;
p_rf_calibrate_info->tx_powercount = 0; p_rf_calibrate_info->tx_powercount = 0;
@ -546,32 +545,6 @@ odm_txpowertracking_thermal_meter_init(
MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control); MSG_8192C("p_dm_odm txpowertrack_control = %d\n", p_rf_calibrate_info->txpowertrack_control);
} }
#else
{
struct _ADAPTER *adapter = p_dm_odm->adapter;
HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
struct dm_priv *pdmpriv = &p_hal_data->dmpriv;
pdmpriv->is_txpowertracking = _TRUE;
pdmpriv->tx_powercount = 0;
pdmpriv->is_txpowertracking_init = _FALSE;
if (p_dm_odm->mp_mode == false)
pdmpriv->txpowertrack_control = _TRUE;
MSG_8192C("pdmpriv->txpowertrack_control = %d\n", pdmpriv->txpowertrack_control);
}
#endif
#elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
#ifdef RTL8188E_SUPPORT
{
p_rf_calibrate_info->is_txpowertracking = _TRUE;
p_rf_calibrate_info->tx_powercount = 0;
p_rf_calibrate_info->is_txpowertracking_init = _FALSE;
p_rf_calibrate_info->txpowertrack_control = _TRUE;
}
#endif
#endif #endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)