mirror of
https://github.com/lwfinger/rtl8188eu.git
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rtl8188eu: Convert non-standard variable types to regular ones
These include changing s1Byte to s8, etc. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
parent
9dd1827027
commit
2db42a3fbf
39 changed files with 1041 additions and 1120 deletions
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@ -52,24 +52,24 @@ void ODM_RASupport_Init(struct odm_dm_struct *dm_odm);
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int ODM_RAInfo_Init_all(struct odm_dm_struct *dm_odm);
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int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u1Byte MacID);
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int ODM_RAInfo_Init(struct odm_dm_struct *dm_odm, u8 MacID);
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u1Byte ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID);
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u8 ODM_RA_GetShortGI_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
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u1Byte ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID);
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u8 ODM_RA_GetDecisionRate_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
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u1Byte ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID);
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void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u1Byte MacID,
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u1Byte RateID, u4Byte RateMask,
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u1Byte SGIEnable);
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u8 ODM_RA_GetHwPwrStatus_8188E(struct odm_dm_struct *dm_odm, u8 MacID);
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void ODM_RA_UpdateRateInfo_8188E(struct odm_dm_struct *dm_odm, u8 MacID,
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u8 RateID, u32 RateMask,
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u8 SGIEnable);
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void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u1Byte macid,
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u1Byte rssi);
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void ODM_RA_SetRSSI_8188E(struct odm_dm_struct *dm_odm, u8 macid,
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u8 rssi);
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void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm,
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u1Byte *txrpt_buf, u2Byte txrpt_len,
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u4Byte validentry0, u4Byte validentry1);
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u8 *txrpt_buf, u16 txrpt_len,
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u32 validentry0, u32 validentry1);
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void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u2Byte minRptTime);
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void ODM_RA_Set_TxRPT_Time(struct odm_dm_struct *dm_odm, u16 minRptTime);
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#endif
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@ -21,7 +21,7 @@
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#ifndef __INC_BB_8188E_HW_IMG_H
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#define __INC_BB_8188E_HW_IMG_H
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/* static bool CheckCondition(const u4Byte Condition, const u4Byte Hex); */
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/* static bool CheckCondition(const u32 Condition, const u32 Hex); */
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/******************************************************************************
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* AGC_TAB_1T.TXT
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@ -25,6 +25,6 @@
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void ODM_ResetIQKResult(struct odm_dm_struct *pDM_Odm);
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u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl);
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u8 ODM_GetRightChnlPlaceforIQK(u8 chnl);
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#endif /* #ifndef __HAL_PHY_RF_H__ */
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@ -28,9 +28,9 @@
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void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *pDM_Odm,
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u1Byte Type, /* 0 = OFDM, 1 = CCK */
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pu1Byte pDirection,/* 1 = +(incr) 2 = -(decr) */
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pu4Byte pOutWriteVal); /* Tx tracking CCK/OFDM BB
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u8 Type, /* 0 = OFDM, 1 = CCK */
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u8 *pDirection,/* 1 = +(incr) 2 = -(decr) */
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u32 *pOutWriteVal); /* Tx tracking CCK/OFDM BB
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* swing index adjust */
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@ -45,18 +45,18 @@ void PHY_IQCalibrate_8188E(struct adapter *Adapter, bool ReCovery);
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void PHY_LCCalibrate_8188E(struct adapter *pAdapter);
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/* AP calibrate */
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void PHY_APCalibrate_8188E(struct adapter *pAdapter, s1Byte delta);
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void PHY_APCalibrate_8188E(struct adapter *pAdapter, s8 delta);
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void PHY_DigitalPredistortion_8188E(struct adapter * pAdapter);
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void PHY_DigitalPredistortion_8188E(struct adapter *pAdapter);
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void _PHY_SaveADDARegisters(struct adapter *pAdapter, pu4Byte ADDAReg,
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pu4Byte ADDABackup, u4Byte RegisterNum);
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void _PHY_SaveADDARegisters(struct adapter *pAdapter, u32 *ADDAReg,
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u32 *ADDABackup, u32 RegisterNum);
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void _PHY_PathADDAOn(struct adapter *pAdapter, pu4Byte ADDAReg,
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void _PHY_PathADDAOn(struct adapter *pAdapter, u32 *ADDAReg,
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bool isPathAOn, bool is2T);
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void _PHY_MACSettingCalibration(struct adapter *pAdapter, pu4Byte MACReg,
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pu4Byte MACBackup);
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void _PHY_MACSettingCalibration(struct adapter *pAdapter, u32 *MACReg,
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u32 *MACBackup);
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void _PHY_PathAStandBy(struct adapter *pAdapter);
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@ -26,11 +26,6 @@
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#include <linux/types.h>
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#define NDIS_OID uint
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#define UCHAR u8
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#define USHORT u16
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#define UINT u32
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#define ULONG u32
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typedef void (*proc_t)(void *);
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#define FIELD_OFFSET(s, field) ((ssize_t)&((s *)(0))->field)
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@ -158,9 +158,9 @@ struct registry_priv {
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};
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/* For registry parameters */
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#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv, field))
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#define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field))
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#define RGTRY_SZ(field) sizeof(((struct registry_priv *)0)->field)
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#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(struct wlan_bssid_ex, field))
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#define BSSID_OFT(field) ((u32)FIELD_OFFSET(struct wlan_bssid_ex, field))
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#define BSSID_SZ(field) sizeof(((struct wlan_bssid_ex *)0)->field)
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#define MAX_CONTINUAL_URB_ERR 4
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@ -29,14 +29,14 @@
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#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 /* Max Ethernet Packet Size */
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/* Is Multicast Address? */
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#define RT_ETH_IS_MULTICAST(_addr) ((((UCHAR *)(_addr))[0]&0x01) != 0)
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#define RT_ETH_IS_MULTICAST(_addr) ((((u8 *)(_addr))[0]&0x01) != 0)
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#define RT_ETH_IS_BROADCAST(_addr) ( \
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((UCHAR *)(_addr))[0] == 0xff && \
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((UCHAR *)(_addr))[1] == 0xff && \
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((UCHAR *)(_addr))[2] == 0xff && \
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((UCHAR *)(_addr))[3] == 0xff && \
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((UCHAR *)(_addr))[4] == 0xff && \
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((UCHAR *)(_addr))[5] == 0xff) /* Is Broadcast Address? */
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((u8 *)(_addr))[0] == 0xff && \
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((u8 *)(_addr))[1] == 0xff && \
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((u8 *)(_addr))[2] == 0xff && \
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((u8 *)(_addr))[3] == 0xff && \
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((u8 *)(_addr))[4] == 0xff && \
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((u8 *)(_addr))[5] == 0xff) /* Is Broadcast Address? */
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#endif /* #ifndef __INC_ETHERNET_H */
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581
include/odm.h
581
include/odm.h
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@ -114,102 +114,102 @@
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/* We need to remove to other position??? */
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/* */
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struct rtl8192cd_priv {
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u1Byte temp;
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u8 temp;
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};
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struct rtw_dig {
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u1Byte Dig_Enable_Flag;
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u1Byte Dig_Ext_Port_Stage;
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u8 Dig_Enable_Flag;
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u8 Dig_Ext_Port_Stage;
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int RssiLowThresh;
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int RssiHighThresh;
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u4Byte FALowThresh;
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u4Byte FAHighThresh;
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u32 FALowThresh;
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u32 FAHighThresh;
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u1Byte CurSTAConnectState;
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u1Byte PreSTAConnectState;
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u1Byte CurMultiSTAConnectState;
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u8 CurSTAConnectState;
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u8 PreSTAConnectState;
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u8 CurMultiSTAConnectState;
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u1Byte PreIGValue;
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u1Byte CurIGValue;
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u1Byte BackupIGValue;
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u8 PreIGValue;
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u8 CurIGValue;
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u8 BackupIGValue;
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s1Byte BackoffVal;
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s1Byte BackoffVal_range_max;
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s1Byte BackoffVal_range_min;
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u1Byte rx_gain_range_max;
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u1Byte rx_gain_range_min;
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u1Byte Rssi_val_min;
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s8 BackoffVal;
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s8 BackoffVal_range_max;
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s8 BackoffVal_range_min;
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u8 rx_gain_range_max;
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u8 rx_gain_range_min;
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u8 Rssi_val_min;
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u1Byte PreCCK_CCAThres;
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u1Byte CurCCK_CCAThres;
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u1Byte PreCCKPDState;
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u1Byte CurCCKPDState;
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u8 PreCCK_CCAThres;
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u8 CurCCK_CCAThres;
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u8 PreCCKPDState;
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u8 CurCCKPDState;
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u1Byte LargeFAHit;
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u1Byte ForbiddenIGI;
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u4Byte Recover_cnt;
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u8 LargeFAHit;
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u8 ForbiddenIGI;
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u32 Recover_cnt;
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u1Byte DIG_Dynamic_MIN_0;
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u1Byte DIG_Dynamic_MIN_1;
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u8 DIG_Dynamic_MIN_0;
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u8 DIG_Dynamic_MIN_1;
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bool bMediaConnect_0;
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bool bMediaConnect_1;
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u4Byte AntDiv_RSSI_max;
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u4Byte RSSI_max;
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u32 AntDiv_RSSI_max;
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u32 RSSI_max;
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};
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struct rtl_ps {
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u1Byte PreCCAState;
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u1Byte CurCCAState;
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u8 PreCCAState;
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u8 CurCCAState;
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u1Byte PreRFState;
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u1Byte CurRFState;
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u8 PreRFState;
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u8 CurRFState;
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int Rssi_val_min;
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u1Byte initialize;
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u4Byte Reg874,RegC70,Reg85C,RegA74;
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u8 initialize;
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u32 Reg874,RegC70,Reg85C,RegA74;
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};
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struct false_alarm_stats {
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u4Byte Cnt_Parity_Fail;
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u4Byte Cnt_Rate_Illegal;
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u4Byte Cnt_Crc8_fail;
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u4Byte Cnt_Mcs_fail;
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u4Byte Cnt_Ofdm_fail;
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u4Byte Cnt_Cck_fail;
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u4Byte Cnt_all;
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u4Byte Cnt_Fast_Fsync;
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u4Byte Cnt_SB_Search_fail;
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u4Byte Cnt_OFDM_CCA;
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u4Byte Cnt_CCK_CCA;
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u4Byte Cnt_CCA_all;
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u4Byte Cnt_BW_USC; /* Gary */
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u4Byte Cnt_BW_LSC; /* Gary */
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u32 Cnt_Parity_Fail;
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u32 Cnt_Rate_Illegal;
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u32 Cnt_Crc8_fail;
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u32 Cnt_Mcs_fail;
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u32 Cnt_Ofdm_fail;
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u32 Cnt_Cck_fail;
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u32 Cnt_all;
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u32 Cnt_Fast_Fsync;
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u32 Cnt_SB_Search_fail;
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u32 Cnt_OFDM_CCA;
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u32 Cnt_CCK_CCA;
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u32 Cnt_CCA_all;
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u32 Cnt_BW_USC; /* Gary */
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u32 Cnt_BW_LSC; /* Gary */
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};
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struct dyn_primary_cca {
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u1Byte PriCCA_flag;
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u1Byte intf_flag;
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u1Byte intf_type;
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u1Byte DupRTS_flag;
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u1Byte Monitor_flag;
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u8 PriCCA_flag;
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u8 intf_flag;
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u8 intf_type;
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u8 DupRTS_flag;
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u8 Monitor_flag;
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};
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struct rx_hpc {
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u1Byte RXHP_flag;
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u1Byte PSD_func_trigger;
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u1Byte PSD_bitmap_RXHP[80];
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u1Byte Pre_IGI;
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u1Byte Cur_IGI;
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u1Byte Pre_pw_th;
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u1Byte Cur_pw_th;
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u8 RXHP_flag;
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u8 PSD_func_trigger;
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u8 PSD_bitmap_RXHP[80];
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u8 Pre_IGI;
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u8 Cur_IGI;
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u8 Pre_pw_th;
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u8 Cur_pw_th;
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bool First_time_enter;
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bool RXHP_enable;
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u1Byte TP_Mode;
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u8 TP_Mode;
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struct timer_list PSDTimer;
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};
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@ -229,60 +229,60 @@ struct rx_hpc {
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#define TRAFFIC_HIGH 1
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struct sw_ant_switch {
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u1Byte try_flag;
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s4Byte PreRSSI;
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u1Byte CurAntenna;
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u1Byte PreAntenna;
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u1Byte RSSI_Trying;
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u1Byte TestMode;
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u1Byte bTriggerAntennaSwitch;
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u1Byte SelectAntennaMap;
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u1Byte RSSI_target;
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u8 try_flag;
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s32 PreRSSI;
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u8 CurAntenna;
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u8 PreAntenna;
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u8 RSSI_Trying;
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u8 TestMode;
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u8 bTriggerAntennaSwitch;
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u8 SelectAntennaMap;
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u8 RSSI_target;
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/* Before link Antenna Switch check */
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u1Byte SWAS_NoLink_State;
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u4Byte SWAS_NoLink_BK_Reg860;
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u8 SWAS_NoLink_State;
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u32 SWAS_NoLink_BK_Reg860;
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bool ANTA_ON; /* To indicate Ant A is or not */
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bool ANTB_ON; /* To indicate Ant B is on or not */
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s4Byte RSSI_sum_A;
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s4Byte RSSI_sum_B;
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s4Byte RSSI_cnt_A;
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s4Byte RSSI_cnt_B;
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s32 RSSI_sum_A;
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s32 RSSI_sum_B;
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s32 RSSI_cnt_A;
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s32 RSSI_cnt_B;
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u8Byte lastTxOkCnt;
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u8Byte lastRxOkCnt;
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u8Byte TXByteCnt_A;
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u8Byte TXByteCnt_B;
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u8Byte RXByteCnt_A;
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u8Byte RXByteCnt_B;
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u1Byte TrafficLoad;
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u64 lastTxOkCnt;
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u64 lastRxOkCnt;
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u64 TXByteCnt_A;
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u64 TXByteCnt_B;
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u64 RXByteCnt_A;
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u64 RXByteCnt_B;
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u8 TrafficLoad;
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struct timer_list SwAntennaSwitchTimer;
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/* Hybrid Antenna Diversity */
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u4Byte CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
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u4Byte CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
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u4Byte OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
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u4Byte OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
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u4Byte RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM];
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u4Byte RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM];
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u1Byte TxAnt[ASSOCIATE_ENTRY_NUM];
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u1Byte TargetSTA;
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u1Byte antsel;
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u1Byte RxIdleAnt;
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u32 CCK_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
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u32 CCK_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
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u32 OFDM_Ant1_Cnt[ASSOCIATE_ENTRY_NUM];
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u32 OFDM_Ant2_Cnt[ASSOCIATE_ENTRY_NUM];
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u32 RSSI_Ant1_Sum[ASSOCIATE_ENTRY_NUM];
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u32 RSSI_Ant2_Sum[ASSOCIATE_ENTRY_NUM];
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u8 TxAnt[ASSOCIATE_ENTRY_NUM];
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u8 TargetSTA;
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u8 antsel;
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u8 RxIdleAnt;
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};
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struct edca_turbo {
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bool bCurrentTurboEDCA;
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bool bIsCurRDLState;
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u4Byte prv_traffic_idx; /* edca turbo */
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u32 prv_traffic_idx; /* edca turbo */
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};
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struct odm_rate_adapt {
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u1Byte Type; /* DM_Type_ByFW/DM_Type_ByDriver */
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u1Byte HighRSSIThresh; /* if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH */
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u1Byte LowRSSIThresh; /* if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW */
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u1Byte RATRState; /* Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW */
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u4Byte LastRATR; /* RATR Register Content */
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u8 Type; /* DM_Type_ByFW/DM_Type_ByDriver */
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u8 HighRSSIThresh; /* if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH */
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u8 LowRSSIThresh; /* if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW */
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u8 RATRState; /* Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW */
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u32 LastRATR; /* RATR Register Content */
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};
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|
|
@ -307,27 +307,27 @@ struct odm_rate_adapt {
|
|||
#define MAX_PATH_NUM_92CS 2
|
||||
|
||||
struct odm_phy_status_info {
|
||||
u1Byte RxPWDBAll;
|
||||
u1Byte SignalQuality; /* in 0-100 index. */
|
||||
u1Byte RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
|
||||
u1Byte RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
|
||||
s1Byte RxPower; /* in dBm Translate from PWdB */
|
||||
s1Byte RecvSignalPower;/* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */
|
||||
u1Byte BTRxRSSIPercentage;
|
||||
u1Byte SignalStrength; /* in 0-100 index. */
|
||||
u1Byte RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
|
||||
u1Byte RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
|
||||
u8 RxPWDBAll;
|
||||
u8 SignalQuality; /* in 0-100 index. */
|
||||
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
|
||||
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
|
||||
s8 RxPower; /* in dBm Translate from PWdB */
|
||||
s8 RecvSignalPower;/* Real power in dBm for this packet, no beautification and aggregation. Keep this raw info to be used for the other procedures. */
|
||||
u8 BTRxRSSIPercentage;
|
||||
u8 SignalStrength; /* in 0-100 index. */
|
||||
u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
|
||||
u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
|
||||
};
|
||||
|
||||
|
||||
struct odm_phy_dbg_info {
|
||||
/* ODM Write,debug info */
|
||||
s1Byte RxSNRdB[MAX_PATH_NUM_92CS];
|
||||
u8Byte NumQryPhyStatus;
|
||||
u8Byte NumQryPhyStatusCCK;
|
||||
u8Byte NumQryPhyStatusOFDM;
|
||||
s8 RxSNRdB[MAX_PATH_NUM_92CS];
|
||||
u64 NumQryPhyStatus;
|
||||
u64 NumQryPhyStatusCCK;
|
||||
u64 NumQryPhyStatusOFDM;
|
||||
/* Others */
|
||||
s4Byte RxEVM[MAX_PATH_NUM_92CS];
|
||||
s32 RxEVM[MAX_PATH_NUM_92CS];
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -340,7 +340,7 @@ struct odm_per_pkt_info {
|
|||
};
|
||||
|
||||
struct odm_mac_status_info {
|
||||
u1Byte test;
|
||||
u8 test;
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -367,14 +367,14 @@ enum odm_ability {
|
|||
struct odm_sta_info {
|
||||
/* Driver Write */
|
||||
bool bUsed; /* record the sta status link or not? */
|
||||
u1Byte IOTPeer; /* Enum value. HT_IOT_PEER_E */
|
||||
u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
|
||||
|
||||
/* ODM Write */
|
||||
/* 1 PHY_STATUS_INFO */
|
||||
u1Byte RSSI_Path[4]; /* */
|
||||
u1Byte RSSI_Ave;
|
||||
u1Byte RXEVM[4];
|
||||
u1Byte RXSNR[4];
|
||||
u8 RSSI_Path[4]; /* */
|
||||
u8 RSSI_Ave;
|
||||
u8 RXEVM[4];
|
||||
u8 RXSNR[4];
|
||||
|
||||
/* */
|
||||
/* Please use compile flag to disable the struictrue for other IC except 88E. */
|
||||
|
|
@ -445,11 +445,11 @@ enum odm_common_info_def {
|
|||
ODM_CMNINFO_WIFI_DISPLAY,
|
||||
ODM_CMNINFO_LINK,
|
||||
ODM_CMNINFO_RSSI_MIN,
|
||||
ODM_CMNINFO_DBG_COMP, /* u8Byte */
|
||||
ODM_CMNINFO_DBG_LEVEL, /* u4Byte */
|
||||
ODM_CMNINFO_RA_THRESHOLD_HIGH, /* u1Byte */
|
||||
ODM_CMNINFO_RA_THRESHOLD_LOW, /* u1Byte */
|
||||
ODM_CMNINFO_RF_ANTENNA_TYPE, /* u1Byte */
|
||||
ODM_CMNINFO_DBG_COMP, /* u64 */
|
||||
ODM_CMNINFO_DBG_LEVEL, /* u32 */
|
||||
ODM_CMNINFO_RA_THRESHOLD_HIGH, /* u8 */
|
||||
ODM_CMNINFO_RA_THRESHOLD_LOW, /* u8 */
|
||||
ODM_CMNINFO_RF_ANTENNA_TYPE, /* u8 */
|
||||
ODM_CMNINFO_BT_DISABLED,
|
||||
ODM_CMNINFO_BT_OPERATION,
|
||||
ODM_CMNINFO_BT_DIG,
|
||||
|
|
@ -659,136 +659,136 @@ enum odm_cca_path {
|
|||
};
|
||||
|
||||
struct odm_ra_info {
|
||||
u1Byte RateID;
|
||||
u4Byte RateMask;
|
||||
u4Byte RAUseRate;
|
||||
u1Byte RateSGI;
|
||||
u1Byte RssiStaRA;
|
||||
u1Byte PreRssiStaRA;
|
||||
u1Byte SGIEnable;
|
||||
u1Byte DecisionRate;
|
||||
u1Byte PreRate;
|
||||
u1Byte HighestRate;
|
||||
u1Byte LowestRate;
|
||||
u4Byte NscUp;
|
||||
u4Byte NscDown;
|
||||
u2Byte RTY[5];
|
||||
u4Byte TOTAL;
|
||||
u2Byte DROP;
|
||||
u1Byte Active;
|
||||
u2Byte RptTime;
|
||||
u1Byte RAWaitingCounter;
|
||||
u1Byte RAPendingCounter;
|
||||
u1Byte PTActive; /* on or off */
|
||||
u1Byte PTTryState; /* 0 trying state, 1 for decision state */
|
||||
u1Byte PTStage; /* 0~6 */
|
||||
u1Byte PTStopCount; /* Stop PT counter */
|
||||
u1Byte PTPreRate; /* if rate change do PT */
|
||||
u1Byte PTPreRssi; /* if RSSI change 5% do PT */
|
||||
u1Byte PTModeSS; /* decide whitch rate should do PT */
|
||||
u1Byte RAstage; /* StageRA, decide how many times RA will be done between PT */
|
||||
u1Byte PTSmoothFactor;
|
||||
u8 RateID;
|
||||
u32 RateMask;
|
||||
u32 RAUseRate;
|
||||
u8 RateSGI;
|
||||
u8 RssiStaRA;
|
||||
u8 PreRssiStaRA;
|
||||
u8 SGIEnable;
|
||||
u8 DecisionRate;
|
||||
u8 PreRate;
|
||||
u8 HighestRate;
|
||||
u8 LowestRate;
|
||||
u32 NscUp;
|
||||
u32 NscDown;
|
||||
u16 RTY[5];
|
||||
u32 TOTAL;
|
||||
u16 DROP;
|
||||
u8 Active;
|
||||
u16 RptTime;
|
||||
u8 RAWaitingCounter;
|
||||
u8 RAPendingCounter;
|
||||
u8 PTActive; /* on or off */
|
||||
u8 PTTryState; /* 0 trying state, 1 for decision state */
|
||||
u8 PTStage; /* 0~6 */
|
||||
u8 PTStopCount; /* Stop PT counter */
|
||||
u8 PTPreRate; /* if rate change do PT */
|
||||
u8 PTPreRssi; /* if RSSI change 5% do PT */
|
||||
u8 PTModeSS; /* decide whitch rate should do PT */
|
||||
u8 RAstage; /* StageRA, decide how many times RA will be done between PT */
|
||||
u8 PTSmoothFactor;
|
||||
};
|
||||
|
||||
struct ijk_matrix_regs_set {
|
||||
bool bIQKDone;
|
||||
s4Byte Value[1][IQK_Matrix_REG_NUM];
|
||||
s32 Value[1][IQK_Matrix_REG_NUM];
|
||||
};
|
||||
|
||||
struct odm_rf_cal {
|
||||
/* for tx power tracking */
|
||||
|
||||
u4Byte RegA24; /* for TempCCK */
|
||||
s4Byte RegE94;
|
||||
s4Byte RegE9C;
|
||||
s4Byte RegEB4;
|
||||
s4Byte RegEBC;
|
||||
u32 RegA24; /* for TempCCK */
|
||||
s32 RegE94;
|
||||
s32 RegE9C;
|
||||
s32 RegEB4;
|
||||
s32 RegEBC;
|
||||
|
||||
/* u1Byte bTXPowerTracking; */
|
||||
u1Byte TXPowercount;
|
||||
/* u8 bTXPowerTracking; */
|
||||
u8 TXPowercount;
|
||||
bool bTXPowerTrackingInit;
|
||||
bool bTXPowerTracking;
|
||||
u1Byte TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
|
||||
u1Byte TM_Trigger;
|
||||
u1Byte InternalPA5G[2]; /* pathA / pathB */
|
||||
u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
|
||||
u8 TM_Trigger;
|
||||
u8 InternalPA5G[2]; /* pathA / pathB */
|
||||
|
||||
u1Byte ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
|
||||
u1Byte ThermalValue;
|
||||
u1Byte ThermalValue_LCK;
|
||||
u1Byte ThermalValue_IQK;
|
||||
u1Byte ThermalValue_DPK;
|
||||
u1Byte ThermalValue_AVG[AVG_THERMAL_NUM];
|
||||
u1Byte ThermalValue_AVG_index;
|
||||
u1Byte ThermalValue_RxGain;
|
||||
u1Byte ThermalValue_Crystal;
|
||||
u1Byte ThermalValue_DPKstore;
|
||||
u1Byte ThermalValue_DPKtrack;
|
||||
u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
|
||||
u8 ThermalValue;
|
||||
u8 ThermalValue_LCK;
|
||||
u8 ThermalValue_IQK;
|
||||
u8 ThermalValue_DPK;
|
||||
u8 ThermalValue_AVG[AVG_THERMAL_NUM];
|
||||
u8 ThermalValue_AVG_index;
|
||||
u8 ThermalValue_RxGain;
|
||||
u8 ThermalValue_Crystal;
|
||||
u8 ThermalValue_DPKstore;
|
||||
u8 ThermalValue_DPKtrack;
|
||||
bool TxPowerTrackingInProgress;
|
||||
bool bDPKenable;
|
||||
|
||||
bool bReloadtxpowerindex;
|
||||
u1Byte bRfPiEnable;
|
||||
u4Byte TXPowerTrackingCallbackCnt; /* cosa add for debug */
|
||||
u8 bRfPiEnable;
|
||||
u32 TXPowerTrackingCallbackCnt; /* cosa add for debug */
|
||||
|
||||
u1Byte bCCKinCH14;
|
||||
u1Byte CCK_index;
|
||||
u1Byte OFDM_index[2];
|
||||
u8 bCCKinCH14;
|
||||
u8 CCK_index;
|
||||
u8 OFDM_index[2];
|
||||
bool bDoneTxpower;
|
||||
|
||||
u1Byte ThermalValue_HP[HP_THERMAL_NUM];
|
||||
u1Byte ThermalValue_HP_index;
|
||||
u8 ThermalValue_HP[HP_THERMAL_NUM];
|
||||
u8 ThermalValue_HP_index;
|
||||
struct ijk_matrix_regs_set IQKMatrixRegSetting[IQK_Matrix_Settings_NUM];
|
||||
|
||||
u1Byte Delta_IQK;
|
||||
u1Byte Delta_LCK;
|
||||
u8 Delta_IQK;
|
||||
u8 Delta_LCK;
|
||||
|
||||
/* for IQK */
|
||||
u4Byte RegC04;
|
||||
u4Byte Reg874;
|
||||
u4Byte RegC08;
|
||||
u4Byte RegB68;
|
||||
u4Byte RegB6C;
|
||||
u4Byte Reg870;
|
||||
u4Byte Reg860;
|
||||
u4Byte Reg864;
|
||||
u32 RegC04;
|
||||
u32 Reg874;
|
||||
u32 RegC08;
|
||||
u32 RegB68;
|
||||
u32 RegB6C;
|
||||
u32 Reg870;
|
||||
u32 Reg860;
|
||||
u32 Reg864;
|
||||
|
||||
bool bIQKInitialized;
|
||||
bool bLCKInProgress;
|
||||
bool bAntennaDetected;
|
||||
u4Byte ADDA_backup[IQK_ADDA_REG_NUM];
|
||||
u4Byte IQK_MAC_backup[IQK_MAC_REG_NUM];
|
||||
u4Byte IQK_BB_backup_recover[9];
|
||||
u4Byte IQK_BB_backup[IQK_BB_REG_NUM];
|
||||
u32 ADDA_backup[IQK_ADDA_REG_NUM];
|
||||
u32 IQK_MAC_backup[IQK_MAC_REG_NUM];
|
||||
u32 IQK_BB_backup_recover[9];
|
||||
u32 IQK_BB_backup[IQK_BB_REG_NUM];
|
||||
|
||||
/* for APK */
|
||||
u4Byte APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */
|
||||
u1Byte bAPKdone;
|
||||
u1Byte bAPKThermalMeterIgnore;
|
||||
u1Byte bDPdone;
|
||||
u1Byte bDPPathAOK;
|
||||
u1Byte bDPPathBOK;
|
||||
u32 APKoutput[2][2]; /* path A/B; output1_1a/output1_2a */
|
||||
u8 bAPKdone;
|
||||
u8 bAPKThermalMeterIgnore;
|
||||
u8 bDPdone;
|
||||
u8 bDPPathAOK;
|
||||
u8 bDPPathBOK;
|
||||
};
|
||||
|
||||
/* ODM Dynamic common info value definition */
|
||||
|
||||
struct fast_ant_train {
|
||||
u1Byte Bssid[6];
|
||||
u1Byte antsel_rx_keep_0;
|
||||
u1Byte antsel_rx_keep_1;
|
||||
u1Byte antsel_rx_keep_2;
|
||||
u4Byte antSumRSSI[7];
|
||||
u4Byte antRSSIcnt[7];
|
||||
u4Byte antAveRSSI[7];
|
||||
u1Byte FAT_State;
|
||||
u4Byte TrainIdx;
|
||||
u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u1Byte RxIdleAnt;
|
||||
u8 Bssid[6];
|
||||
u8 antsel_rx_keep_0;
|
||||
u8 antsel_rx_keep_1;
|
||||
u8 antsel_rx_keep_2;
|
||||
u32 antSumRSSI[7];
|
||||
u32 antRSSIcnt[7];
|
||||
u32 antAveRSSI[7];
|
||||
u8 FAT_State;
|
||||
u32 TrainIdx;
|
||||
u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u32 MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u32 AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u32 MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u32 AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u8 RxIdleAnt;
|
||||
bool bBecomeLinked;
|
||||
};
|
||||
|
||||
|
|
@ -815,47 +815,47 @@ struct odm_dm_struct {
|
|||
bool odm_ready;
|
||||
|
||||
struct rtl8192cd_priv *fake_priv;
|
||||
u8Byte DebugComponents;
|
||||
u4Byte DebugLevel;
|
||||
u64 DebugComponents;
|
||||
u32 DebugLevel;
|
||||
|
||||
/* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */
|
||||
bool bCckHighPower;
|
||||
u1Byte RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */
|
||||
u1Byte ControlChannel;
|
||||
u8 RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */
|
||||
u8 ControlChannel;
|
||||
/* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */
|
||||
|
||||
/* 1 COMMON INFORMATION */
|
||||
/* Init Value */
|
||||
/* HOOK BEFORE REG INIT----------- */
|
||||
/* ODM Platform info AP/ADSL/CE/MP = 1/2/3/4 */
|
||||
u1Byte SupportPlatform;
|
||||
u8 SupportPlatform;
|
||||
/* ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K */
|
||||
u4Byte SupportAbility;
|
||||
u32 SupportAbility;
|
||||
/* ODM PCIE/USB/SDIO/GSPI = 0/1/2/3 */
|
||||
u1Byte SupportInterface;
|
||||
u8 SupportInterface;
|
||||
/* ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... */
|
||||
u4Byte SupportICType;
|
||||
u32 SupportICType;
|
||||
/* Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... */
|
||||
u1Byte CutVersion;
|
||||
u8 CutVersion;
|
||||
/* Fab Version TSMC/UMC = 0/1 */
|
||||
u1Byte FabVersion;
|
||||
u8 FabVersion;
|
||||
/* RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... */
|
||||
u1Byte RFType;
|
||||
u8 RFType;
|
||||
/* Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... */
|
||||
u1Byte BoardType;
|
||||
u8 BoardType;
|
||||
/* with external LNA NO/Yes = 0/1 */
|
||||
u1Byte ExtLNA;
|
||||
u8 ExtLNA;
|
||||
/* with external PA NO/Yes = 0/1 */
|
||||
u1Byte ExtPA;
|
||||
u8 ExtPA;
|
||||
/* with external TRSW NO/Yes = 0/1 */
|
||||
u1Byte ExtTRSW;
|
||||
u1Byte PatchID; /* Customer ID */
|
||||
u8 ExtTRSW;
|
||||
u8 PatchID; /* Customer ID */
|
||||
bool bInHctTest;
|
||||
bool bWIFITest;
|
||||
|
||||
bool bDualMacSmartConcurrent;
|
||||
u4Byte BK_SupportAbility;
|
||||
u1Byte AntDivType;
|
||||
u32 BK_SupportAbility;
|
||||
u8 AntDivType;
|
||||
/* HOOK BEFORE REG INIT----------- */
|
||||
|
||||
/* */
|
||||
|
|
@ -863,28 +863,28 @@ struct odm_dm_struct {
|
|||
/* */
|
||||
/* POINTER REFERENCE----------- */
|
||||
|
||||
u1Byte u1Byte_temp;
|
||||
u8 u8_temp;
|
||||
bool bool_temp;
|
||||
struct adapter *adapter_temp;
|
||||
|
||||
/* MAC PHY Mode SMSP/DMSP/DMDP = 0/1/2 */
|
||||
u1Byte *pMacPhyMode;
|
||||
u8 *pMacPhyMode;
|
||||
/* TX Unicast byte count */
|
||||
u8Byte *pNumTxBytesUnicast;
|
||||
u64 *pNumTxBytesUnicast;
|
||||
/* RX Unicast byte count */
|
||||
u8Byte *pNumRxBytesUnicast;
|
||||
u64 *pNumRxBytesUnicast;
|
||||
/* Wireless mode B/G/A/N = BIT0/BIT1/BIT2/BIT3 */
|
||||
u1Byte *pWirelessMode; /* ODM_WIRELESS_MODE_E */
|
||||
u8 *pWirelessMode; /* ODM_WIRELESS_MODE_E */
|
||||
/* Frequence band 2.4G/5G = 0/1 */
|
||||
u1Byte *pBandType;
|
||||
u8 *pBandType;
|
||||
/* Secondary channel offset don't_care/below/above = 0/1/2 */
|
||||
u1Byte *pSecChOffset;
|
||||
u8 *pSecChOffset;
|
||||
/* Security mode Open/WEP/AES/TKIP = 0/1/2/3 */
|
||||
u1Byte *pSecurity;
|
||||
u8 *pSecurity;
|
||||
/* BW info 20M/40M/80M = 0/1/2 */
|
||||
u1Byte *pBandWidth;
|
||||
u8 *pBandWidth;
|
||||
/* Central channel location Ch1/Ch2/.... */
|
||||
u1Byte *pChannel; /* central channel number */
|
||||
u8 *pChannel; /* central channel number */
|
||||
/* Common info for 92D DMSP */
|
||||
|
||||
bool *pbGetValueFromOtherMac;
|
||||
|
|
@ -894,9 +894,9 @@ struct odm_dm_struct {
|
|||
bool *pbScanInProcess;
|
||||
bool *pbPowerSaving;
|
||||
/* CCA Path 2-path/path-A/path-B = 0/1/2; using ODM_CCA_PATH_E. */
|
||||
u1Byte *pOnePathCCA;
|
||||
u8 *pOnePathCCA;
|
||||
/* pMgntInfo->AntennaTest */
|
||||
u1Byte *pAntennaTest;
|
||||
u8 *pAntennaTest;
|
||||
bool *pbNet_closed;
|
||||
/* POINTER REFERENCE----------- */
|
||||
/* */
|
||||
|
|
@ -904,14 +904,14 @@ struct odm_dm_struct {
|
|||
bool bWIFI_Direct;
|
||||
bool bWIFI_Display;
|
||||
bool bLinked;
|
||||
u1Byte RSSI_Min;
|
||||
u1Byte InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */
|
||||
u8 RSSI_Min;
|
||||
u8 InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */
|
||||
bool bIsMPChip;
|
||||
bool bOneEntryOnly;
|
||||
/* Common info for BTDM */
|
||||
bool bBtDisabled; /* BT is disabled */
|
||||
bool bBtHsOperation; /* BT HS mode is under progress */
|
||||
u1Byte btHsDigVal; /* use BT rssi to decide the DIG value */
|
||||
u8 btHsDigVal; /* use BT rssi to decide the DIG value */
|
||||
bool bBtDisableEdcaTurbo; /* Under some condition, don't enable the EDCA Turbo */
|
||||
bool bBtBusy; /* BT is busy. */
|
||||
/* CALL BY VALUE------------- */
|
||||
|
|
@ -921,7 +921,7 @@ struct odm_dm_struct {
|
|||
/* 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? */
|
||||
struct sta_info *pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
|
||||
u2Byte CurrminRptTime;
|
||||
u16 CurrminRptTime;
|
||||
struct odm_ra_info RAInfo[ODM_ASSOCIATE_ENTRY_NUM]; /* Use MacID as array index. STA MacID=0, VWiFi Client MacID={1, ODM_ASSOCIATE_ENTRY_NUM-1} */
|
||||
/* */
|
||||
/* 2012/02/14 MH Add to share 88E ra with other SW team. */
|
||||
|
|
@ -951,7 +951,7 @@ struct odm_dm_struct {
|
|||
bool RSSI_test;
|
||||
|
||||
struct edca_turbo DM_EDCA_Table;
|
||||
u4Byte WMMEDCA_BE;
|
||||
u32 WMMEDCA_BE;
|
||||
/* Copy from SD4 structure */
|
||||
/* */
|
||||
/* ================================================== */
|
||||
|
|
@ -964,12 +964,12 @@ struct odm_dm_struct {
|
|||
/* PSD */
|
||||
bool bUserAssignLevel;
|
||||
struct timer_list PSDTimer;
|
||||
u1Byte RSSI_BT; /* come from BT */
|
||||
u8 RSSI_BT; /* come from BT */
|
||||
bool bPSDinProcess;
|
||||
bool bDMInitialGainEnable;
|
||||
|
||||
/* for rate adaptive, in fact, 88c/92c fw will handle this */
|
||||
u1Byte bUseRAMask;
|
||||
u8 bUseRAMask;
|
||||
|
||||
struct odm_rate_adapt RateAdaptive;
|
||||
|
||||
|
|
@ -979,15 +979,15 @@ struct odm_dm_struct {
|
|||
/* */
|
||||
/* TX power tracking */
|
||||
/* */
|
||||
u1Byte BbSwingIdxOfdm;
|
||||
u1Byte BbSwingIdxOfdmCurrent;
|
||||
u1Byte BbSwingIdxOfdmBase;
|
||||
u8 BbSwingIdxOfdm;
|
||||
u8 BbSwingIdxOfdmCurrent;
|
||||
u8 BbSwingIdxOfdmBase;
|
||||
bool BbSwingFlagOfdm;
|
||||
u1Byte BbSwingIdxCck;
|
||||
u1Byte BbSwingIdxCckCurrent;
|
||||
u1Byte BbSwingIdxCckBase;
|
||||
u8 BbSwingIdxCck;
|
||||
u8 BbSwingIdxCckCurrent;
|
||||
u8 BbSwingIdxCckBase;
|
||||
bool BbSwingFlagCck;
|
||||
u1Byte *mp_mode;
|
||||
u8 *mp_mode;
|
||||
/* */
|
||||
/* ODM system resource. */
|
||||
/* */
|
||||
|
|
@ -1166,9 +1166,9 @@ enum dm_swas {
|
|||
#define OFDM_TABLE_SIZE_92D 43
|
||||
#define CCK_TABLE_SIZE 33
|
||||
|
||||
extern u4Byte OFDMSwingTable[OFDM_TABLE_SIZE_92D];
|
||||
extern u1Byte CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
|
||||
extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
|
||||
extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D];
|
||||
extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
|
||||
extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
|
||||
|
||||
|
||||
|
||||
|
|
@ -1184,18 +1184,18 @@ extern u1Byte CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
|
|||
#define SWAW_STEP_PEAK 0
|
||||
#define SWAW_STEP_DETERMINE 1
|
||||
|
||||
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u1Byte CurrentIGI);
|
||||
void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u1Byte CurCCK_CCAThres);
|
||||
void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI);
|
||||
void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres);
|
||||
|
||||
void
|
||||
ODM_SetAntenna(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u1Byte Antenna);
|
||||
u8 Antenna);
|
||||
|
||||
|
||||
#define dm_RF_Saving ODM_RF_Saving
|
||||
void ODM_RF_Saving( struct odm_dm_struct *pDM_Odm,
|
||||
u1Byte bForceInNormal );
|
||||
u8 bForceInNormal );
|
||||
|
||||
#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
|
||||
void ODM_SwAntDivRestAfterLink( struct odm_dm_struct *pDM_Odm);
|
||||
|
|
@ -1206,35 +1206,30 @@ ODM_TXPowerTrackingCheck(
|
|||
struct odm_dm_struct *pDM_Odm
|
||||
);
|
||||
|
||||
bool
|
||||
ODM_RAStateCheck(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
s4Byte RSSI,
|
||||
bool bForceUpdate,
|
||||
pu1Byte pRATRState
|
||||
);
|
||||
bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI,
|
||||
bool bForceUpdate, u8 *pRATRState);
|
||||
|
||||
#define dm_SWAW_RSSI_Check ODM_SwAntDivChkPerPktRssi
|
||||
void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u1Byte StationID, struct odm_phy_status_info *pPhyInfo);
|
||||
void ODM_SwAntDivChkPerPktRssi(struct odm_dm_struct *pDM_Odm, u8 StationID, struct odm_phy_status_info *pPhyInfo);
|
||||
|
||||
u4Byte ConvertTo_dB(u4Byte Value);
|
||||
u32 ConvertTo_dB(u32 Value);
|
||||
|
||||
u4Byte
|
||||
u32
|
||||
GetPSDData(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
unsigned int point,
|
||||
u1Byte initial_gain_psd);
|
||||
u8 initial_gain_psd);
|
||||
|
||||
void
|
||||
odm_DIGbyRSSI_LPS(
|
||||
struct odm_dm_struct *pDM_Odm
|
||||
);
|
||||
|
||||
u4Byte ODM_Get_Rate_Bitmap(
|
||||
u32 ODM_Get_Rate_Bitmap(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte macid,
|
||||
u4Byte ra_mask,
|
||||
u1Byte rssi_level);
|
||||
u32 macid,
|
||||
u32 ra_mask,
|
||||
u8 rssi_level);
|
||||
|
||||
void ODM_DMInit( struct odm_dm_struct *pDM_Odm);
|
||||
|
||||
|
|
@ -1247,7 +1242,7 @@ void
|
|||
ODM_CmnInfoInit(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
enum odm_common_info_def CmnInfo,
|
||||
u4Byte Value
|
||||
u32 Value
|
||||
);
|
||||
|
||||
void
|
||||
|
|
@ -1261,15 +1256,15 @@ void
|
|||
ODM_CmnInfoPtrArrayHook(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
enum odm_common_info_def CmnInfo,
|
||||
u2Byte Index,
|
||||
u16 Index,
|
||||
void * pValue
|
||||
);
|
||||
|
||||
void
|
||||
ODM_CmnInfoUpdate(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte CmnInfo,
|
||||
u8Byte Value
|
||||
u32 CmnInfo,
|
||||
u64 Value
|
||||
);
|
||||
|
||||
void
|
||||
|
|
@ -1295,8 +1290,8 @@ ODM_ResetIQKResult(
|
|||
void
|
||||
ODM_AntselStatistics_88C(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u1Byte MacId,
|
||||
u4Byte PWDBAll,
|
||||
u8 MacId,
|
||||
u32 PWDBAll,
|
||||
bool isCCKrate
|
||||
);
|
||||
|
||||
|
|
@ -1308,7 +1303,7 @@ ODM_SingleDualAntennaDefaultSetting(
|
|||
bool
|
||||
ODM_SingleDualAntennaDetection(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u1Byte mode
|
||||
u8 mode
|
||||
);
|
||||
|
||||
void odm_dtc(struct odm_dm_struct *pDM_Odm);
|
||||
|
|
|
|||
|
|
@ -70,47 +70,47 @@
|
|||
|
||||
struct phy_rx_agc_info {
|
||||
#ifdef __LITTLE_ENDIAN
|
||||
u1Byte gain:7,trsw:1;
|
||||
u8 gain:7,trsw:1;
|
||||
#else
|
||||
u1Byte trsw:1,gain:7;
|
||||
u8 trsw:1,gain:7;
|
||||
#endif
|
||||
};
|
||||
|
||||
struct phy_status_rpt {
|
||||
struct phy_rx_agc_info path_agc[2];
|
||||
u1Byte ch_corr[2];
|
||||
u1Byte cck_sig_qual_ofdm_pwdb_all;
|
||||
u1Byte cck_agc_rpt_ofdm_cfosho_a;
|
||||
u1Byte cck_rpt_b_ofdm_cfosho_b;
|
||||
u1Byte rsvd_1;/* ch_corr_msb; */
|
||||
u1Byte noise_power_db_msb;
|
||||
u1Byte path_cfotail[2];
|
||||
u1Byte pcts_mask[2];
|
||||
s1Byte stream_rxevm[2];
|
||||
u1Byte path_rxsnr[2];
|
||||
u1Byte noise_power_db_lsb;
|
||||
u1Byte rsvd_2[3];
|
||||
u1Byte stream_csi[2];
|
||||
u1Byte stream_target_csi[2];
|
||||
s1Byte sig_evm;
|
||||
u1Byte rsvd_3;
|
||||
u8 ch_corr[2];
|
||||
u8 cck_sig_qual_ofdm_pwdb_all;
|
||||
u8 cck_agc_rpt_ofdm_cfosho_a;
|
||||
u8 cck_rpt_b_ofdm_cfosho_b;
|
||||
u8 rsvd_1;/* ch_corr_msb; */
|
||||
u8 noise_power_db_msb;
|
||||
u8 path_cfotail[2];
|
||||
u8 pcts_mask[2];
|
||||
s8 stream_rxevm[2];
|
||||
u8 path_rxsnr[2];
|
||||
u8 noise_power_db_lsb;
|
||||
u8 rsvd_2[3];
|
||||
u8 stream_csi[2];
|
||||
u8 stream_target_csi[2];
|
||||
s8 sig_evm;
|
||||
u8 rsvd_3;
|
||||
|
||||
#ifdef __LITTLE_ENDIAN
|
||||
u1Byte antsel_rx_keep_2:1; /* ex_intf_flg:1; */
|
||||
u1Byte sgi_en:1;
|
||||
u1Byte rxsc:2;
|
||||
u1Byte idle_long:1;
|
||||
u1Byte r_ant_train_en:1;
|
||||
u1Byte ant_sel_b:1;
|
||||
u1Byte ant_sel:1;
|
||||
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
|
||||
u8 sgi_en:1;
|
||||
u8 rxsc:2;
|
||||
u8 idle_long:1;
|
||||
u8 r_ant_train_en:1;
|
||||
u8 ant_sel_b:1;
|
||||
u8 ant_sel:1;
|
||||
#else /* _BIG_ENDIAN_ */
|
||||
u1Byte ant_sel:1;
|
||||
u1Byte ant_sel_b:1;
|
||||
u1Byte r_ant_train_en:1;
|
||||
u1Byte idle_long:1;
|
||||
u1Byte rxsc:2;
|
||||
u1Byte sgi_en:1;
|
||||
u1Byte antsel_rx_keep_2:1; /* ex_intf_flg:1; */
|
||||
u8 ant_sel:1;
|
||||
u8 ant_sel_b:1;
|
||||
u8 r_ant_train_en:1;
|
||||
u8 idle_long:1;
|
||||
u8 rxsc:2;
|
||||
u8 sgi_en:1;
|
||||
u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
@ -123,15 +123,15 @@ void
|
|||
ODM_PhyStatusQuery(
|
||||
struct odm_dm_struct * pDM_Odm,
|
||||
struct odm_phy_status_info *pPhyInfo,
|
||||
pu1Byte pPhyStatus,
|
||||
u8 *pPhyStatus,
|
||||
struct odm_per_pkt_info *pPktinfo
|
||||
);
|
||||
|
||||
void
|
||||
ODM_MacStatusQuery(
|
||||
struct odm_dm_struct * pDM_Odm,
|
||||
pu1Byte pMacStatus,
|
||||
u1Byte MacID,
|
||||
u8 *pMacStatus,
|
||||
u8 MacID,
|
||||
bool bPacketMatchBSSID,
|
||||
bool bPacketToSelf,
|
||||
bool bPacketBeacon
|
||||
|
|
|
|||
|
|
@ -33,17 +33,14 @@ void ODM_AntennaDiversityInit_88E(struct odm_dm_struct *pDM_Odm);
|
|||
|
||||
void ODM_AntennaDiversity_88E(struct odm_dm_struct *pDM_Odm);
|
||||
|
||||
void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm,
|
||||
pu1Byte pDesc,
|
||||
u1Byte macId
|
||||
);
|
||||
void ODM_SetTxAntByTxInfo_88E(struct odm_dm_struct *pDM_Odm, u8 *pDesc, u8 macId);
|
||||
|
||||
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *pDM_Odm, u1Byte Ant);
|
||||
void ODM_UpdateRxIdleAnt_88E(struct odm_dm_struct *pDM_Odm, u8 Ant);
|
||||
|
||||
void ODM_AntselStatistics_88E(struct odm_dm_struct *pDM_Odm,
|
||||
u1Byte antsel_tr_mux,
|
||||
u4Byte MacId,
|
||||
u1Byte RxPWDBAll
|
||||
u8 antsel_tr_mux,
|
||||
u32 MacId,
|
||||
u8 RxPWDBAll
|
||||
);
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -20,51 +20,51 @@
|
|||
#ifndef __INC_ODM_REGCONFIG_H_8188E
|
||||
#define __INC_ODM_REGCONFIG_H_8188E
|
||||
|
||||
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u4Byte Addr, u4Byte Data,
|
||||
enum ODM_RF_RADIO_PATH RF_PATH, u4Byte RegAddr);
|
||||
void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Data,
|
||||
enum ODM_RF_RADIO_PATH RF_PATH, u32 RegAddr);
|
||||
|
||||
void
|
||||
odm_ConfigRF_RadioA_8188E(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte Addr,
|
||||
u4Byte Data
|
||||
u32 Addr,
|
||||
u32 Data
|
||||
);
|
||||
|
||||
void
|
||||
odm_ConfigRF_RadioB_8188E(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte Addr,
|
||||
u4Byte Data
|
||||
u32 Addr,
|
||||
u32 Data
|
||||
);
|
||||
|
||||
void
|
||||
odm_ConfigMAC_8188E(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte Addr,
|
||||
u1Byte Data
|
||||
u32 Addr,
|
||||
u8 Data
|
||||
);
|
||||
|
||||
void
|
||||
odm_ConfigBB_AGC_8188E(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte Addr,
|
||||
u4Byte Bitmask,
|
||||
u4Byte Data
|
||||
u32 Addr,
|
||||
u32 Bitmask,
|
||||
u32 Data
|
||||
);
|
||||
|
||||
void
|
||||
odm_ConfigBB_PHY_REG_PG_8188E(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte Addr,
|
||||
u4Byte Bitmask,
|
||||
u4Byte Data
|
||||
u32 Addr,
|
||||
u32 Bitmask,
|
||||
u32 Data
|
||||
);
|
||||
|
||||
void
|
||||
odm_ConfigBB_PHY_8188E(
|
||||
struct odm_dm_struct *pDM_Odm,
|
||||
u4Byte Addr,
|
||||
u4Byte Bitmask,
|
||||
u4Byte Data
|
||||
u32 Addr,
|
||||
u32 Bitmask,
|
||||
u32 Data
|
||||
);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@
|
|||
if (((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
|
||||
{ \
|
||||
int __i; \
|
||||
pu1Byte __ptr = (pu1Byte)ptr; \
|
||||
pu8 __ptr = (pu8)ptr; \
|
||||
DbgPrint("[ODM] "); \
|
||||
DbgPrint(title_str); \
|
||||
DbgPrint(" "); \
|
||||
|
|
|
|||
|
|
@ -83,37 +83,37 @@ typedef void (*RT_WORKITEM_CALL_BACK)(void * pContext);
|
|||
/* =========== EXtern Function Prototype */
|
||||
/* */
|
||||
|
||||
u1Byte ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr);
|
||||
u8 ODM_Read1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
|
||||
|
||||
u2Byte ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr);
|
||||
u16 ODM_Read2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
|
||||
|
||||
u4Byte ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr);
|
||||
u32 ODM_Read4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr);
|
||||
|
||||
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u1Byte Data);
|
||||
void ODM_Write1Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u8 Data);
|
||||
|
||||
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u2Byte Data);
|
||||
void ODM_Write2Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u16 Data);
|
||||
|
||||
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte Data);
|
||||
void ODM_Write4Byte(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 Data);
|
||||
|
||||
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data);
|
||||
void ODM_SetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
|
||||
|
||||
u4Byte ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask);
|
||||
u32 ODM_GetMACReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);
|
||||
|
||||
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask, u4Byte Data);
|
||||
void ODM_SetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
|
||||
|
||||
u4Byte ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u4Byte RegAddr, u4Byte BitMask);
|
||||
u32 ODM_GetBBReg(struct odm_dm_struct *pDM_Odm, u32 RegAddr, u32 BitMask);
|
||||
|
||||
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask, u4Byte Data);
|
||||
void ODM_SetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
|
||||
|
||||
u4Byte ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u4Byte RegAddr, u4Byte BitMask);
|
||||
u32 ODM_GetRFReg(struct odm_dm_struct *pDM_Odm, enum ODM_RF_RADIO_PATH eRFPath, u32 RegAddr, u32 BitMask);
|
||||
|
||||
/* */
|
||||
/* Memory Relative Function. */
|
||||
/* */
|
||||
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u4Byte length);
|
||||
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u4Byte length);
|
||||
void ODM_AllocateMemory(struct odm_dm_struct *pDM_Odm, void **pPtr, u32 length);
|
||||
void ODM_FreeMemory(struct odm_dm_struct *pDM_Odm, void *pPtr, u32 length);
|
||||
|
||||
s4Byte ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u4Byte length);
|
||||
s32 ODM_CompareMemory(struct odm_dm_struct *pDM_Odm, void *pBuf1, void *pBuf2, u32 length);
|
||||
|
||||
/* */
|
||||
/* ODM MISC-spin lock relative API. */
|
||||
|
|
@ -142,17 +142,17 @@ void ODM_IsWorkItemScheduled(void *pRtWorkItem);
|
|||
/* */
|
||||
/* ODM Timer relative API. */
|
||||
/* */
|
||||
void ODM_StallExecution(u4Byte usDelay);
|
||||
void ODM_StallExecution(u32 usDelay);
|
||||
|
||||
void ODM_delay_ms(u4Byte ms);
|
||||
void ODM_delay_ms(u32 ms);
|
||||
|
||||
void ODM_delay_us(u4Byte us);
|
||||
void ODM_delay_us(u32 us);
|
||||
|
||||
void ODM_sleep_ms(u4Byte ms);
|
||||
void ODM_sleep_ms(u32 ms);
|
||||
|
||||
void ODM_sleep_us(u4Byte us);
|
||||
void ODM_sleep_us(u32 us);
|
||||
|
||||
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u4Byte msDelay);
|
||||
void ODM_SetTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, u32 msDelay);
|
||||
|
||||
void ODM_InitializeTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer, void *CallBackFunc, void *pContext, const char *szID);
|
||||
|
||||
|
|
@ -163,6 +163,6 @@ void ODM_ReleaseTimer(struct odm_dm_struct *pDM_Odm, struct timer_list *pTimer);
|
|||
/* */
|
||||
/* ODM FW relative API. */
|
||||
/* */
|
||||
u4Byte ODM_FillH2CCmd(pu1Byte pH2CBuffer, u4Byte H2CBufferLen, u4Byte CmdNum, pu4Byte pElementID, pu4Byte pCmdLen, pu1Byte *pCmbBuffer, pu1Byte CmdStartSeq);
|
||||
u32 ODM_FillH2CCmd(u8 *pH2CBuffer, u32 H2CBufferLen, u32 CmdNum, u32 *pElementID, u32 *pCmdLen, u8 **pCmbBuffer, u8 *CmdStartSeq);
|
||||
|
||||
#endif /* __ODM_INTERFACE_H__ */
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ void odm_DIG(struct odm_dm_struct *pDM_Odm);
|
|||
void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm);
|
||||
void odm_RefreshRateAdaptiveMaskMP(struct odm_dm_struct *pDM_Odm);
|
||||
void odm_DynamicBBPowerSaving(struct odm_dm_struct *pDM_Odm);
|
||||
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u1Byte Step);
|
||||
void odm_SwAntDivChkAntSwitch(struct odm_dm_struct *pDM_Odm, u8 Step);
|
||||
void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm);
|
||||
void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm);
|
||||
void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm);
|
||||
|
|
|
|||
|
|
@ -43,30 +43,6 @@ enum RT_SPINLOCK_TYPE {
|
|||
|
||||
#include <basic_types.h>
|
||||
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
#define u2Byte u16
|
||||
#define pu2Byte u16*
|
||||
|
||||
#define u4Byte u32
|
||||
#define pu4Byte u32*
|
||||
|
||||
#define u8Byte u64
|
||||
#define pu8Byte u64*
|
||||
|
||||
#define s1Byte s8
|
||||
#define ps1Byte s8*
|
||||
|
||||
#define s2Byte s16
|
||||
#define ps2Byte s16*
|
||||
|
||||
#define s4Byte s32
|
||||
#define ps4Byte s32*
|
||||
|
||||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
#define DEV_BUS_TYPE RT_USB_INTERFACE
|
||||
|
||||
#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
|
||||
|
|
|
|||
|
|
@ -194,13 +194,13 @@ enum ChannelPlan
|
|||
};
|
||||
|
||||
struct txpowerinfo24g {
|
||||
u1Byte IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
|
||||
u1Byte IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
|
||||
u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
|
||||
u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G-1];
|
||||
/* If only one tx, only BW20 and OFDM are used. */
|
||||
s1Byte CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s1Byte OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s1Byte BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s1Byte BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
|
||||
};
|
||||
|
||||
#define EFUSE_REAL_CONTENT_LEN 512
|
||||
|
|
|
|||
122
include/rtw_mp.h
122
include/rtw_mp.h
|
|
@ -81,44 +81,38 @@
|
|||
#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((int)0xC0010029L) /* cause 3 */
|
||||
|
||||
enum antenna_path {
|
||||
ANTENNA_NONE = 0x00,
|
||||
ANTENNA_D ,
|
||||
ANTENNA_C ,
|
||||
ANTENNA_CD ,
|
||||
ANTENNA_B ,
|
||||
ANTENNA_BD ,
|
||||
ANTENNA_BC ,
|
||||
ANTENNA_BCD ,
|
||||
ANTENNA_A ,
|
||||
ANTENNA_AD ,
|
||||
ANTENNA_AC ,
|
||||
ANTENNA_ACD ,
|
||||
ANTENNA_AB ,
|
||||
ANTENNA_ABD ,
|
||||
ANTENNA_ABC ,
|
||||
ANTENNA_ABCD
|
||||
ANTENNA_NONE = 0x00,
|
||||
ANTENNA_D,
|
||||
ANTENNA_C,
|
||||
ANTENNA_CD,
|
||||
ANTENNA_B,
|
||||
ANTENNA_BD,
|
||||
ANTENNA_BC,
|
||||
ANTENNA_BCD,
|
||||
ANTENNA_A,
|
||||
ANTENNA_AD,
|
||||
ANTENNA_AC,
|
||||
ANTENNA_ACD,
|
||||
ANTENNA_AB,
|
||||
ANTENNA_ABD,
|
||||
ANTENNA_ABC,
|
||||
ANTENNA_ABCD
|
||||
};
|
||||
|
||||
|
||||
#define MAX_MP_XMITBUF_SZ 2048
|
||||
#define NR_MP_XMITFRAME 8
|
||||
|
||||
struct mp_xmit_frame
|
||||
{
|
||||
struct mp_xmit_frame {
|
||||
struct list_head list;
|
||||
|
||||
struct pkt_attrib attrib;
|
||||
|
||||
struct sk_buff *pkt;
|
||||
|
||||
int frame_tag;
|
||||
|
||||
struct adapter *padapter;
|
||||
|
||||
struct urb *pxmit_urb[8];
|
||||
/* insert urb, irp, and irpcnt info below... */
|
||||
u8 *mem_addr;
|
||||
u32 sz[8];
|
||||
struct urb * pxmit_urb[8];
|
||||
u8 bpending[8];
|
||||
int ac_tag[8];
|
||||
int last[8];
|
||||
|
|
@ -127,15 +121,14 @@ struct mp_xmit_frame
|
|||
uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
|
||||
};
|
||||
|
||||
struct mp_wiparam
|
||||
{
|
||||
struct mp_wiparam {
|
||||
u32 bcompleted;
|
||||
u32 act_type;
|
||||
u32 io_offset;
|
||||
u32 io_value;
|
||||
};
|
||||
|
||||
typedef void(*wi_act_func)(void* padapter);
|
||||
typedef void(*wi_act_func)(void *padapter);
|
||||
|
||||
struct mp_tx {
|
||||
u8 stop;
|
||||
|
|
@ -153,41 +146,6 @@ struct mp_tx {
|
|||
|
||||
#define MP_MAX_LINES 1000
|
||||
#define MP_MAX_LINES_BYTES 256
|
||||
#define u1Byte u8
|
||||
#define s1Byte s8
|
||||
#define u4Byte u32
|
||||
#define s4Byte s32
|
||||
#define u1Byte u8
|
||||
#define pu1Byte u8*
|
||||
|
||||
#define u2Byte u16
|
||||
#define pu2Byte u16*
|
||||
|
||||
#define u4Byte u32
|
||||
#define pu4Byte u32*
|
||||
|
||||
#define u8Byte u64
|
||||
#define pu8Byte u64*
|
||||
|
||||
#define s1Byte s8
|
||||
#define ps1Byte s8*
|
||||
|
||||
#define s2Byte s16
|
||||
#define ps2Byte s16*
|
||||
|
||||
#define s4Byte s32
|
||||
#define ps4Byte s32*
|
||||
|
||||
#define s8Byte s64
|
||||
#define ps8Byte s64*
|
||||
|
||||
#define UCHAR u8
|
||||
#define USHORT u16
|
||||
#define UINT u32
|
||||
#define ULONG u32
|
||||
#define PULONG u32*
|
||||
|
||||
|
||||
|
||||
typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
|
||||
|
||||
|
|
@ -215,23 +173,23 @@ struct mpt_context {
|
|||
MPT_WORK_ITEM_HANDLER CurrMptAct;
|
||||
|
||||
/* 1=Start, 0=Stop from UI. */
|
||||
ULONG MptTestStart;
|
||||
u32 MptTestStart;
|
||||
/* _TEST_MODE, defined in MPT_Req2.h */
|
||||
ULONG MptTestItem;
|
||||
u32 MptTestItem;
|
||||
/* Variable needed in each implementation of CurrMptAct. */
|
||||
ULONG MptActType; /* Type of action performed in CurrMptAct. */
|
||||
u32 MptActType; /* Type of action performed in CurrMptAct. */
|
||||
/* The Offset of IO operation is depend of MptActType. */
|
||||
ULONG MptIoOffset;
|
||||
u32 MptIoOffset;
|
||||
/* The Value of IO operation is depend of MptActType. */
|
||||
ULONG MptIoValue;
|
||||
u32 MptIoValue;
|
||||
/* The RfPath of IO operation is depend of MptActType. */
|
||||
ULONG MptRfPath;
|
||||
u32 MptRfPath;
|
||||
|
||||
enum wireless_mode MptWirelessModeToSw; /* Wireless mode to switch. */
|
||||
u8 MptChannelToSw; /* Channel to switch. */
|
||||
u8 MptInitGainToSet; /* Initial gain to set. */
|
||||
ULONG MptBandWidth; /* bandwidth to switch. */
|
||||
ULONG MptRateIndex; /* rate index. */
|
||||
u32 MptBandWidth; /* bandwidth to switch. */
|
||||
u32 MptRateIndex; /* rate index. */
|
||||
/* Register value kept for Single Carrier Tx test. */
|
||||
u8 btMpCckTxPower;
|
||||
/* Register value kept for Single Carrier Tx test. */
|
||||
|
|
@ -240,13 +198,13 @@ struct mpt_context {
|
|||
u8 TxPwrLevel[2]; /* rf-A, rf-B */
|
||||
|
||||
/* Content of RCR Regsiter for Mass Production Test. */
|
||||
ULONG MptRCR;
|
||||
u32 MptRCR;
|
||||
/* true if we only receive packets with specific pattern. */
|
||||
bool bMptFilterPattern;
|
||||
/* Rx OK count, statistics used in Mass Production Test. */
|
||||
ULONG MptRxOkCnt;
|
||||
u32 MptRxOkCnt;
|
||||
/* Rx CRC32 error count, statistics used in Mass Production Test. */
|
||||
ULONG MptRxCrcErrCnt;
|
||||
u32 MptRxCrcErrCnt;
|
||||
|
||||
bool bCckContTx; /* true if we are in CCK Continuous Tx test. */
|
||||
bool bOfdmContTx; /* true if we are in OFDM Continuous Tx test. */
|
||||
|
|
@ -260,12 +218,12 @@ struct mpt_context {
|
|||
|
||||
/* ACK counter asked by K.Y.. */
|
||||
bool bMptEnableAckCounter;
|
||||
ULONG MptAckCounter;
|
||||
u32 MptAckCounter;
|
||||
|
||||
/* SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! */
|
||||
/* s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */
|
||||
/* s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */
|
||||
/* s4Byte RfReadLine[2]; */
|
||||
/* s8 BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; */
|
||||
/* s8 BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; */
|
||||
/* s32 RfReadLine[2]; */
|
||||
|
||||
u8 APK_bound[2]; /* for APK path A/path B */
|
||||
bool bMptIndexEven;
|
||||
|
|
@ -276,12 +234,12 @@ struct mpt_context {
|
|||
u8 backup0x52_RF_A;
|
||||
u8 backup0x52_RF_B;
|
||||
|
||||
u1Byte h2cReqNum;
|
||||
u1Byte c2hBuf[20];
|
||||
u8 h2cReqNum;
|
||||
u8 c2hBuf[20];
|
||||
|
||||
u1Byte btInBuf[100];
|
||||
ULONG mptOutLen;
|
||||
u1Byte mptOutBuf[100];
|
||||
u8 btInBuf[100];
|
||||
u32 mptOutLen;
|
||||
u8 mptOutBuf[100];
|
||||
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@
|
|||
extern char *rtw_initmac;
|
||||
extern int rtw_mc2u_disable;
|
||||
|
||||
#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3)
|
||||
#define USBD_HALTED(Status) ((u32)(Status) >> 30 == 3)
|
||||
|
||||
u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, enum bt_usb_request brequest,
|
||||
enum rt_usb_wvalue wvalue, u8 windex, void *data,
|
||||
|
|
|
|||
|
|
@ -30,8 +30,8 @@
|
|||
#define NDIS_802_11_RSSI long /* in dBm */
|
||||
|
||||
struct ndis_802_11_ssid {
|
||||
ULONG SsidLength;
|
||||
UCHAR Ssid[32];
|
||||
u32 SsidLength;
|
||||
u8 Ssid[32];
|
||||
};
|
||||
|
||||
enum NDIS_802_11_NETWORK_TYPE {
|
||||
|
|
@ -43,10 +43,10 @@ enum NDIS_802_11_NETWORK_TYPE {
|
|||
};
|
||||
|
||||
struct ndis_802_11_config_fh {
|
||||
ULONG Length; /* Length of structure */
|
||||
ULONG HopPattern; /* As defined by 802.11, MSB set */
|
||||
ULONG HopSet; /* to one if non-802.11 */
|
||||
ULONG DwellTime; /* units are Kusec */
|
||||
u32 Length; /* Length of structure */
|
||||
u32 HopPattern; /* As defined by 802.11, MSB set */
|
||||
u32 HopSet; /* to one if non-802.11 */
|
||||
u32 DwellTime; /* units are Kusec */
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -54,10 +54,10 @@ struct ndis_802_11_config_fh {
|
|||
* ODI Handler will convert the channel number to freq. number.
|
||||
*/
|
||||
struct ndis_802_11_config {
|
||||
ULONG Length; /* Length of structure */
|
||||
ULONG BeaconPeriod; /* units are Kusec */
|
||||
ULONG ATIMWindow; /* units are Kusec */
|
||||
ULONG DSConfig; /* Frequency, units are kHz */
|
||||
u32 Length; /* Length of structure */
|
||||
u32 BeaconPeriod; /* units are Kusec */
|
||||
u32 ATIMWindow; /* units are Kusec */
|
||||
u32 DSConfig; /* Frequency, units are kHz */
|
||||
struct ndis_802_11_config_fh FHConfig;
|
||||
};
|
||||
|
||||
|
|
@ -70,22 +70,22 @@ enum ndis_802_11_network_infra {
|
|||
};
|
||||
|
||||
struct ndis_802_11_fixed_ie {
|
||||
UCHAR Timestamp[8];
|
||||
USHORT BeaconInterval;
|
||||
USHORT Capabilities;
|
||||
u8 Timestamp[8];
|
||||
u16 BeaconInterval;
|
||||
u16 Capabilities;
|
||||
};
|
||||
|
||||
|
||||
|
||||
struct ndis_802_11_var_ie {
|
||||
UCHAR ElementID;
|
||||
UCHAR Length;
|
||||
UCHAR data[1];
|
||||
u8 ElementID;
|
||||
u8 Length;
|
||||
u8 data[1];
|
||||
};
|
||||
|
||||
/*
|
||||
* Length is the 4 bytes multiples of the sume of
|
||||
* [ETH_ALEN] + 2 + sizeof (struct ndis_802_11_ssid) + sizeof (ULONG)
|
||||
* [ETH_ALEN] + 2 + sizeof (struct ndis_802_11_ssid) + sizeof (u32)
|
||||
* + sizeof (NDIS_802_11_RSSI) + sizeof (enum NDIS_802_11_NETWORK_TYPE)
|
||||
* + sizeof (struct ndis_802_11_config)
|
||||
* + NDIS_802_11_LENGTH_RATES_EX + IELength
|
||||
|
|
@ -129,27 +129,27 @@ enum ndis_802_11_wep_status {
|
|||
#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4
|
||||
|
||||
struct ndis_802_11_ai_reqfi {
|
||||
USHORT Capabilities;
|
||||
USHORT ListenInterval;
|
||||
u16 Capabilities;
|
||||
u16 ListenInterval;
|
||||
unsigned char CurrentAPAddress[ETH_ALEN];
|
||||
};
|
||||
|
||||
struct ndis_802_11_ai_resfi {
|
||||
USHORT Capabilities;
|
||||
USHORT StatusCode;
|
||||
USHORT AssociationId;
|
||||
u16 Capabilities;
|
||||
u16 StatusCode;
|
||||
u16 AssociationId;
|
||||
};
|
||||
|
||||
struct ndis_802_11_assoc_info {
|
||||
ULONG Length;
|
||||
USHORT AvailableRequestFixedIEs;
|
||||
u32 Length;
|
||||
u16 AvailableRequestFixedIEs;
|
||||
struct ndis_802_11_ai_reqfi RequestFixedIEs;
|
||||
ULONG RequestIELength;
|
||||
ULONG OffsetRequestIEs;
|
||||
USHORT AvailableResponseFixedIEs;
|
||||
u32 RequestIELength;
|
||||
u32 OffsetRequestIEs;
|
||||
u16 AvailableResponseFixedIEs;
|
||||
struct ndis_802_11_ai_resfi ResponseFixedIEs;
|
||||
ULONG ResponseIELength;
|
||||
ULONG OffsetResponseIEs;
|
||||
u32 ResponseIELength;
|
||||
u32 OffsetResponseIEs;
|
||||
};
|
||||
|
||||
enum ndis_802_11_reload_def {
|
||||
|
|
@ -158,32 +158,32 @@ enum ndis_802_11_reload_def {
|
|||
|
||||
/* Key mapping keys require a BSSID */
|
||||
struct ndis_802_11_key {
|
||||
ULONG Length; /* Length of this structure */
|
||||
ULONG KeyIndex;
|
||||
ULONG KeyLength; /* length of key in bytes */
|
||||
u32 Length; /* Length of this structure */
|
||||
u32 KeyIndex;
|
||||
u32 KeyLength; /* length of key in bytes */
|
||||
unsigned char BSSID[ETH_ALEN];
|
||||
unsigned long long KeyRSC;
|
||||
UCHAR KeyMaterial[32]; /* var len depending on above field */
|
||||
u8 KeyMaterial[32]; /* var len depending on above field */
|
||||
};
|
||||
|
||||
struct ndis_802_11_remove_key {
|
||||
ULONG Length; /* Length */
|
||||
ULONG KeyIndex;
|
||||
u32 Length; /* Length */
|
||||
u32 KeyIndex;
|
||||
unsigned char BSSID[ETH_ALEN];
|
||||
};
|
||||
|
||||
struct ndis_802_11_wep {
|
||||
ULONG Length; /* Length of this structure */
|
||||
ULONG KeyIndex; /* 0 is the per-client key,
|
||||
u32 Length; /* Length of this structure */
|
||||
u32 KeyIndex; /* 0 is the per-client key,
|
||||
* 1-N are the global keys */
|
||||
ULONG KeyLength; /* length of key in bytes */
|
||||
UCHAR KeyMaterial[16];/* variable len depending on above field */
|
||||
u32 KeyLength; /* length of key in bytes */
|
||||
u8 KeyMaterial[16];/* variable len depending on above field */
|
||||
};
|
||||
|
||||
struct ndis_802_11_auth_req {
|
||||
ULONG Length; /* Length of structure */
|
||||
u32 Length; /* Length of structure */
|
||||
unsigned char Bssid[ETH_ALEN];
|
||||
ULONG Flags;
|
||||
u32 Flags;
|
||||
};
|
||||
|
||||
enum ndis_802_11_status_type {
|
||||
|
|
@ -214,8 +214,8 @@ struct ndis_802_11_auth_evt {
|
|||
};
|
||||
|
||||
struct ndis_802_11_test {
|
||||
ULONG Length;
|
||||
ULONG Type;
|
||||
u32 Length;
|
||||
u32 Type;
|
||||
union {
|
||||
struct ndis_802_11_auth_evt AuthenticationEvent;
|
||||
NDIS_802_11_RSSI RssiTrigger;
|
||||
|
|
@ -251,19 +251,19 @@ struct wlan_bcn_info {
|
|||
* struct wlan_bssid_ex and get_struct wlan_bssid_ex_sz()
|
||||
*/
|
||||
struct wlan_bssid_ex {
|
||||
ULONG Length;
|
||||
u32 Length;
|
||||
unsigned char MacAddress[ETH_ALEN];
|
||||
UCHAR Reserved[2];/* 0]: IS beacon frame */
|
||||
u8 Reserved[2];/* 0]: IS beacon frame */
|
||||
struct ndis_802_11_ssid Ssid;
|
||||
ULONG Privacy;
|
||||
u32 Privacy;
|
||||
NDIS_802_11_RSSI Rssi;/* in dBM,raw data ,get from PHY) */
|
||||
enum NDIS_802_11_NETWORK_TYPE NetworkTypeInUse;
|
||||
struct ndis_802_11_config Configuration;
|
||||
enum ndis_802_11_network_infra InfrastructureMode;
|
||||
unsigned char SupportedRates[NDIS_802_11_LENGTH_RATES_EX];
|
||||
struct wlan_phy_info PhyInfo;
|
||||
ULONG IELength;
|
||||
UCHAR IEs[MAX_IE_SZ]; /* timestamp, beacon interval, and
|
||||
u32 IELength;
|
||||
u8 IEs[MAX_IE_SZ]; /* timestamp, beacon interval, and
|
||||
* capability information) */
|
||||
} __packed;
|
||||
|
||||
|
|
@ -318,12 +318,12 @@ enum UAPSD_MAX_SP {
|
|||
|
||||
struct pmkid_candidate {
|
||||
unsigned char BSSID[ETH_ALEN];
|
||||
ULONG Flags;
|
||||
u32 Flags;
|
||||
};
|
||||
|
||||
struct ndis_802_11_pmkid_list {
|
||||
ULONG Version; /* Version of the structure */
|
||||
ULONG NumCandidates; /* No. of pmkid candidates */
|
||||
u32 Version; /* Version of the structure */
|
||||
u32 NumCandidates; /* No. of pmkid candidates */
|
||||
struct pmkid_candidate CandidateList[1];
|
||||
};
|
||||
|
||||
|
|
@ -333,10 +333,10 @@ struct ndis_802_11_auth_encrypt {
|
|||
};
|
||||
|
||||
struct ndis_802_11_cap {
|
||||
ULONG Length;
|
||||
ULONG Version;
|
||||
ULONG NoOfPMKIDs;
|
||||
ULONG NoOfAuthEncryptPairsSupported;
|
||||
u32 Length;
|
||||
u32 Version;
|
||||
u32 NoOfPMKIDs;
|
||||
u32 NoOfAuthEncryptPairsSupported;
|
||||
struct ndis_802_11_auth_encrypt AuthenticationEncryptionSupported[1];
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue